nandflash.h
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00035 #ifndef __NANDFLASH_H
00036 #define __NANDFLASH_H
00037
00038
00043
00048 #ifdef __cplusplus
00049 extern "C" {
00050 #endif
00051
00052 #define NAND256W3A_SPARESIZE 16
00054
00055 #define NAND_SPARE_BADBLOCK_POS 5
00056 #define NAND_SPARE_ECC0_POS 6
00057 #define NAND_SPARE_ECC1_POS 7
00058 #define NAND_SPARE_ECC2_POS 8
00061 typedef enum
00062 {
00063 NANDFLASH_STATUS_OK = 0,
00064 NANDFLASH_INVALID_DEVICE = -1,
00065 NANDFLASH_INVALID_ADDRESS = -2,
00066 NANDFLASH_WRITE_ERROR = -3,
00067 NANDFLASH_ECC_ERROR = -4,
00068 NANDFLASH_ECC_UNCORRECTABLE = -5,
00069 NANDFLASH_INVALID_SETUP = -6,
00070 NANDFLASH_NOT_INITIALIZED = -7,
00071 } NANDFLASH_Status_TypeDef;
00072
00074 typedef struct
00075 {
00076 uint32_t baseAddress;
00077 uint8_t manufacturerCode;
00078 uint8_t deviceCode;
00079 uint32_t deviceSize;
00080 uint32_t pageSize;
00081 uint32_t spareSize;
00082 uint32_t blockSize;
00083 uint32_t ecc;
00084 uint8_t spare[ NAND256W3A_SPARESIZE ];
00085 int dmaCh;
00086 } NANDFLASH_Info_TypeDef;
00087
00088 bool NANDFLASH_AddressValid(uint32_t addr);
00089 int NANDFLASH_CopyPage(uint32_t dstAddr, uint32_t srcAddr);
00090 NANDFLASH_Info_TypeDef *
00091 NANDFLASH_DeviceInfo(void);
00092 int NANDFLASH_EccCorrect(uint32_t generatedEcc, uint32_t readEcc, uint8_t *data);
00093 int NANDFLASH_EraseBlock(uint32_t address);
00094 int NANDFLASH_Init(int dmaCh);
00095 int NANDFLASH_MarkBadBlock(uint32_t address);
00096 int NANDFLASH_ReadPage(uint32_t address, uint8_t *buffer);
00097 int NANDFLASH_ReadSpare(uint32_t address, uint8_t *buffer);
00098 int NANDFLASH_WritePage(uint32_t address, uint8_t *buffer);
00099
00100 #ifdef __cplusplus
00101 }
00102 #endif
00103
00107 #endif