bsp_dk_3201.c

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00001 /***************************************************************************/
00035 #include "em_device.h"
00036 #include "em_cmu.h"
00037 #include "em_ebi.h"
00038 #include "em_gpio.h"
00039 #include "em_usart.h"
00040 #include "bsp_dk_bcreg_3201.h"
00041 #include "bsp.h"
00042 
00043 #if defined( BSP_DK_3201 )
00044 
00046 /* USART used for SPI access */
00047 #define BSP_SPI_USART_USED  USART2          
00048 #define BSP_SPI_USART_CLK   cmuClock_USART2 
00050 /* GPIO pins used fotr SPI pins, please refer to DK user guide. */
00051 #define BSP_PORT_SPI_TX     gpioPortC       
00052 #define BSP_PIN_SPI_TX      2               
00053 #define BSP_PORT_SPI_RX     gpioPortC       
00054 #define BSP_PIN_SPI_RX      3               
00055 #define BSP_PORT_SPI_CLK    gpioPortC       
00056 #define BSP_PIN_SPI_CLK     4               
00057 #define BSP_PORT_SPI_CS     gpioPortC       
00058 #define BSP_PIN_SPI_CS      5               
00061 typedef enum
00062 {
00063   BSP_SPI_Audio,    
00064   BSP_SPI_Ethernet, 
00065   BSP_SPI_Display,  
00066   BSP_SPI_OFF,      
00067 } BSP_SpiControl_TypeDef;
00068 
00070 typedef enum
00071 {
00072   BSP_Init_EBI,    
00073   BSP_Init_SPI,    
00074   BSP_Init_DIRECT, 
00075   BSP_Init_OFF,    
00076 } BSP_Init_TypeDef;
00077 
00078 static bool EbiInit(void);
00079 static void EbiDisable(void);
00080 static uint16_t SpiBcAccess(uint8_t addr, uint8_t rw, uint16_t data);
00081 static void SpiBcInit(void);
00082 static void SpiControl(BSP_SpiControl_TypeDef device);
00083 static void SpiBcDisable(void);
00084 static bool SpiInit(void);
00085 static uint16_t SpiRegisterRead(volatile uint16_t *addr);
00086 static void SpiRegisterWrite(volatile uint16_t *addr, uint16_t data);
00087 
00088 /* Keep intialization mode */
00089 static uint32_t bspOperationMode;
00090 static BSP_BusControl_TypeDef busMode = BSP_BusControl_Undefined;
00091 static volatile const uint16_t *lastAddr = 0; 
00095 /***************************************************************************/
00100 /***************************************************************************/
00105 /**************************************************************************/
00113 int BSP_Disable(void)
00114 {
00115   if (bspOperationMode == BSP_INIT_DK_EBI)
00116   {
00117     EbiDisable();
00118   }
00119   if (bspOperationMode == BSP_INIT_DK_SPI)
00120   {
00121     SpiBcDisable();
00122   }
00123   BSP_BusControlModeSet(BSP_BusControl_OFF);
00124 
00125   return BSP_STATUS_OK;
00126 }
00127 
00128 /**************************************************************************/
00143 int BSP_Init(uint32_t flags)
00144 {
00145   bool ret = false;
00146 
00147   if (flags & BSP_INIT_DK_EBI)
00148   {
00149     bspOperationMode = BSP_INIT_DK_EBI;
00150     BSP_BusControlModeSet(BSP_BusControl_EBI);
00151     ret = EbiInit();
00152   }
00153   if (flags & BSP_INIT_DK_SPI)
00154   {
00155     bspOperationMode = BSP_INIT_DK_SPI;
00156     BSP_BusControlModeSet(BSP_BusControl_SPI);
00157     ret = SpiInit();
00158   }
00159 
00160   if (ret == false)
00161   {
00162     /* Unable to access board control, this is an abornomal situation. */
00163     /* Try to restart kit and reprogram EFM32 with a standard example */
00164     /* as this is most likely caused by a peripheral misconfiguration. */
00165     while (1) ;
00166   }
00167 
00168   /* Inform AEM application that we are in Energy Mode 0 by default */
00169   BSP_RegisterWrite(&BC_REGISTER->EM, 0);
00170 
00171   return BSP_STATUS_OK;
00172 }
00175 /***************************************************************************/
00180 /**************************************************************************/
00186 BSP_BusControl_TypeDef BSP_BusControlModeGet( void )
00187 {
00188   return busMode;
00189 }
00190 
00191 /**************************************************************************/
00200 int BSP_BusControlModeSet(BSP_BusControl_TypeDef mode)
00201 {
00202   int retVal = BSP_STATUS_OK;
00203 
00204   /* Configure GPIO pins for Board Bus mode */
00205   /* Note: Inverter on GPIO lines to BC, so signals are active low */
00206   CMU_ClockEnable(cmuClock_GPIO, true);
00207 
00208   busMode = mode;
00209 
00210   switch (mode)
00211   {
00212     case BSP_BusControl_OFF:
00213       /* Configure board for OFF mode on PB15 MCU_EBI_CONNECT */
00214       GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 1);
00215       /* Configure board for OFF mode on PD13 MCU_SPI_CONNECT */
00216       GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 1);
00217       break;
00218 
00219     case BSP_BusControl_DIRECT:
00220       /* Configure board for DIRECT on PB15 MCU_EBI_CONNECT */
00221       GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 0);
00222       /* Configure board for DIRECT on PD13 MCU_SPI_CONNECT */
00223       GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 0);
00224       break;
00225 
00226     case BSP_BusControl_SPI:
00227       /* Configure board for SPI mode on PB15 MCU_EBI_CONNECT */
00228       GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 1);
00229       /* Configure board for SPI mode on PD13 MCU_SPI_CONNECT */
00230       GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 0);
00231       break;
00232 
00233     case BSP_BusControl_EBI:
00234       /* Configure board for EBI mode on PB15 MCU_EBI_CONNECT */
00235       GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 0);
00236       /* Configure board for EBI mode on PD13 MCU_SPI_CONNECT */
00237       GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 1);
00238       break;
00239 
00240     default:
00241       retVal = BSP_STATUS_ILLEGAL_PARAM;
00242       break;
00243   }
00244   return retVal;
00245 }
00246 
00247 /**************************************************************************/
00251 uint32_t BSP_DipSwitchGet(void)
00252 {
00253   return BSP_RegisterRead(&BC_REGISTER->UIF_DIP) & 0x000f;
00254 }
00255 
00256 /**************************************************************************/
00264 int BSP_DisplayControl(BSP_Display_TypeDef option)
00265 {
00266   uint16_t tmp;
00267 
00268   switch (option)
00269   {
00270   case BSP_Display_EBI:
00271     BSP_RegisterWrite(&BC_REGISTER->ARB_CTRL, BC_ARB_CTRL_EBI);
00272     break;
00273 
00274   case BSP_Display_SPI:
00275     BSP_RegisterWrite(&BC_REGISTER->ARB_CTRL, BC_ARB_CTRL_SPI);
00276     break;
00277 
00278   case BSP_Display_BC:
00279     BSP_RegisterWrite(&BC_REGISTER->ARB_CTRL, BC_ARB_CTRL_BC);
00280     break;
00281 
00282   case BSP_Display_PowerEnable:
00283     tmp  = BSP_RegisterRead(&BC_REGISTER->DISPLAY_CTRL);
00284     tmp |= (BC_DISPLAY_CTRL_POWER_ENABLE);
00285     BSP_RegisterWrite(&BC_REGISTER->DISPLAY_CTRL, tmp);
00286     break;
00287 
00288   case BSP_Display_PowerDisable:
00289     tmp  = BSP_RegisterRead(&BC_REGISTER->DISPLAY_CTRL);
00290     tmp &= ~(BC_DISPLAY_CTRL_POWER_ENABLE);
00291     BSP_RegisterWrite(&BC_REGISTER->DISPLAY_CTRL, tmp);
00292     break;
00293 
00294   case BSP_Display_ResetAssert:
00295     tmp  = BSP_RegisterRead(&BC_REGISTER->DISPLAY_CTRL);
00296     tmp |= (BC_DISPLAY_CTRL_RESET);
00297     BSP_RegisterWrite(&BC_REGISTER->DISPLAY_CTRL, tmp);
00298     break;
00299 
00300   case BSP_Display_ResetRelease:
00301     tmp  = BSP_RegisterRead(&BC_REGISTER->DISPLAY_CTRL);
00302     tmp &= ~(BC_DISPLAY_CTRL_RESET);
00303     BSP_RegisterWrite(&BC_REGISTER->DISPLAY_CTRL, tmp);
00304     break;
00305 
00306   case BSP_Display_Mode8080:
00307     tmp  = BSP_RegisterRead(&BC_REGISTER->DISPLAY_CTRL);
00308     tmp &= ~(BC_DISPLAY_CTRL_MODE_GENERIC);
00309     BSP_RegisterWrite(&BC_REGISTER->DISPLAY_CTRL, tmp);
00310     break;
00311 
00312   case BSP_Display_ModeGeneric:
00313     tmp  = BSP_RegisterRead(&BC_REGISTER->DISPLAY_CTRL);
00314     tmp |= (BC_DISPLAY_CTRL_MODE_GENERIC);
00315     BSP_RegisterWrite(&BC_REGISTER->DISPLAY_CTRL, tmp);
00316     break;
00317 
00318   default:
00319     /* Unknown command */
00320     while (1);
00321   }
00322 
00323   return BSP_STATUS_OK;
00324 }
00325 
00326 /**************************************************************************/
00336 int BSP_EbiExtendedAddressRange(bool enable)
00337 {
00338   if (enable)
00339   {
00340     BSP_RegisterWrite(&BC_REGISTER->EBI_CTRL, BC_EBI_CTRL_EXTADDR_MASK);
00341   }
00342   else
00343   {
00344     BSP_RegisterWrite(&BC_REGISTER->EBI_CTRL, 0);
00345   }
00346   return BSP_STATUS_OK;
00347 }
00348 
00349 
00350 /**************************************************************************/
00357 int BSP_EnergyModeSet(uint16_t energyMode)
00358 {
00359   BSP_RegisterWrite(&BC_REGISTER->EM, energyMode);
00360   return BSP_STATUS_OK;
00361 }
00362 
00363 /**************************************************************************/
00370 int BSP_InterruptDisable(uint16_t flags)
00371 {
00372   uint16_t tmp;
00373 
00374   /* Clear flags from interrupt enable register */
00375   tmp   = BSP_RegisterRead(&BC_REGISTER->INTEN);
00376   flags = ~(flags);
00377   tmp  &= flags;
00378   BSP_RegisterWrite(&BC_REGISTER->INTEN, tmp);
00379   return BSP_STATUS_OK;
00380 }
00381 
00382 /**************************************************************************/
00389 int BSP_InterruptEnable(uint16_t flags)
00390 {
00391   uint16_t tmp;
00392 
00393   /* Add flags to interrupt enable register */
00394   tmp  = BSP_RegisterRead(&BC_REGISTER->INTEN);
00395   tmp |= flags;
00396   BSP_RegisterWrite(&BC_REGISTER->INTEN, tmp);
00397   return BSP_STATUS_OK;
00398 }
00399 
00400 /**************************************************************************/
00407 int BSP_InterruptFlagsClear(uint16_t flags)
00408 {
00409   uint16_t tmp;
00410   tmp  = BSP_RegisterRead(&BC_REGISTER->INTFLAG);
00411   tmp &= ~(flags);
00412   BSP_RegisterWrite(&BC_REGISTER->INTFLAG, tmp);
00413   return BSP_STATUS_OK;
00414 }
00415 
00416 /**************************************************************************/
00421 uint16_t BSP_InterruptFlagsGet(void)
00422 {
00423   return BSP_RegisterRead(&BC_REGISTER->INTFLAG);
00424 }
00425 
00426 /**************************************************************************/
00431 uint16_t BSP_JoystickGet(void)
00432 {
00433   return ~(BSP_RegisterRead(&BC_REGISTER->UIF_JOYSTICK)) & 0x001f;
00434 }
00435 
00436 /**************************************************************************/
00452 int BSP_PeripheralAccess(BSP_Peripheral_TypeDef perf, bool enable)
00453 {
00454   uint16_t perfControl;
00455 
00456   perfControl = BSP_RegisterRead(&BC_REGISTER->PERICON);
00457 
00458   /* Enable or disable the specificed peripheral by setting board control switch */
00459   if (enable)
00460   {
00461     switch (perf)
00462     {
00463     case BSP_RS232_SHUTDOWN:
00464       perfControl |= (1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
00465       break;
00466 
00467     case BSP_RS232_UART:
00468       perfControl &= ~(1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
00469       perfControl &= ~(1 << BC_PERICON_RS232_LEUART_SHIFT);
00470       perfControl |= (1 << BC_PERICON_RS232_UART_SHIFT);
00471       break;
00472 
00473     case BSP_RS232_LEUART:
00474       perfControl &= ~(1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
00475       perfControl &= ~(1 << BC_PERICON_RS232_UART_SHIFT);
00476       perfControl |= (1 << BC_PERICON_RS232_LEUART_SHIFT);
00477       break;
00478 
00479     case BSP_I2C:
00480       perfControl |= (1 << BC_PERICON_I2C_SHIFT);
00481       break;
00482 
00483     case BSP_ETH:
00484       /* Enable SPI interface */
00485       SpiControl(BSP_SPI_Ethernet);
00486 
00487       /* Enable Ethernet analog switches */
00488       perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
00489       perfControl |= (1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
00490 
00491       /* Disable Analog Diff Input - pins PD0 and PD1 is shared */
00492       perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
00493       /* Disable Touch Inputs - pin PD3 is shared */
00494       perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
00495       /* Disable Analog SE Input - pin PD2 is shared */
00496       perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
00497       break;
00498 
00499     case BSP_I2S:
00500       /* Direct SPI interface to I2S DAC */
00501       SpiControl(BSP_SPI_Audio);
00502 
00503       /* Also make surea Audio out is connected for I2S operation */
00504       perfControl |= (1 << BC_PERICON_AUDIO_OUT_SHIFT);
00505       perfControl |= (1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
00506       perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
00507       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
00508 
00509       /* Disable Analog Diff Input - pins PD0 and PD1 is shared */
00510       perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
00511       /* Disable Touch Inputs - pin PD3 is shared */
00512       perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
00513       /* Disable Analog SE Input - pin PD2 is shared */
00514       perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
00515       break;
00516 
00517     case BSP_TRACE:
00518       #if defined(ETM_PRESENT)
00519         perfControl |= (1 << BC_PERICON_TRACE_SHIFT);
00520         break;
00521       #else
00522         /* TRACE is not available on EFM32G890F128, application error */
00523         while (1) ;
00524       #endif
00525 
00526     case BSP_TOUCH:
00527       perfControl |= (1 << BC_PERICON_TOUCH_SHIFT);
00528       /* Disconnect SPI switch, pin PD3 is shared */
00529       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
00530       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
00531       SpiControl(BSP_SPI_OFF);
00532       break;
00533 
00534     case BSP_AUDIO_IN:
00535       perfControl |= (1 << BC_PERICON_AUDIO_IN_SHIFT);
00536       break;
00537 
00538     case BSP_AUDIO_OUT:
00539       perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
00540       perfControl |= (1 << BC_PERICON_AUDIO_OUT_SHIFT);
00541       break;
00542 
00543     case BSP_ANALOG_DIFF:
00544       perfControl |= (1 << BC_PERICON_ANALOG_DIFF_SHIFT);
00545       /* Disconnect SPI switch, pin PD0 and PD1 is shared */
00546       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
00547       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
00548       SpiControl(BSP_SPI_OFF);
00549       break;
00550 
00551     case BSP_ANALOG_SE:
00552       perfControl |= (1 << BC_PERICON_ANALOG_SE_SHIFT);
00553       /* Disconnect SPI switch, pin PD2 is shared */
00554       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
00555       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
00556       SpiControl(BSP_SPI_OFF);
00557       break;
00558 
00559     case BSP_MICROSD:
00560       perfControl |= (1 << BC_PERICON_SPI_SHIFT);
00561       break;
00562 
00563     case BSP_TFT:
00564       /* Enable SPI to SSD2119 */
00565       SpiControl(BSP_SPI_Display);
00566       /* Enable SPI analog switch */
00567       perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
00568       /* Disable Analog Diff Input - pins D0 and D1 is shared */
00569       perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
00570       /* Disable Touch Inputs - pin D3 is shared */
00571       perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
00572       /* Disable Analog SE Input - pin D2 is shared */
00573       perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
00574       break;
00575     }
00576   }
00577   else
00578   {
00579     switch (perf)
00580     {
00581     case BSP_RS232_SHUTDOWN:
00582       perfControl &= ~(1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
00583       break;
00584 
00585     case BSP_RS232_UART:
00586       perfControl |= (1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
00587       perfControl &= ~(1 << BC_PERICON_RS232_UART_SHIFT);
00588       break;
00589 
00590     case BSP_RS232_LEUART:
00591       perfControl |= (1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
00592       perfControl &= ~(1 << BC_PERICON_RS232_LEUART_SHIFT);
00593       break;
00594 
00595     case BSP_I2C:
00596       perfControl &= ~(1 << BC_PERICON_I2C_SHIFT);
00597       break;
00598 
00599     case BSP_ETH:
00600       /* Disable SPI interface */
00601       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
00602       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
00603       SpiControl(BSP_SPI_OFF);
00604       break;
00605 
00606     case BSP_I2S:
00607       /* Disable SPI interface and audio out */
00608       perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SHIFT);
00609       perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
00610       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
00611       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
00612       SpiControl(BSP_SPI_OFF);
00613       break;
00614 
00615     case BSP_TRACE:
00616       #if defined(ETM_PRESENT)
00617         perfControl &= ~(1 << BC_PERICON_TRACE_SHIFT);
00618         break;
00619       #else
00620         /* TRACE is not available on EFM32G890F128, application error */
00621         while (1) ;
00622       #endif
00623 
00624     case BSP_TOUCH:
00625       perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
00626       break;
00627 
00628     case BSP_AUDIO_IN:
00629       perfControl &= ~(1 << BC_PERICON_AUDIO_IN_SHIFT);
00630       break;
00631 
00632     case BSP_AUDIO_OUT:
00633       perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
00634       perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SHIFT);
00635       break;
00636 
00637     case BSP_ANALOG_DIFF:
00638       perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
00639       break;
00640 
00641     case BSP_ANALOG_SE:
00642       perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
00643       break;
00644 
00645     case BSP_MICROSD:
00646       perfControl &= ~(1 << BC_PERICON_SPI_SHIFT);
00647       break;
00648 
00649     case BSP_TFT:
00650       /* Disable SPI interface */
00651       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
00652       perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
00653       SpiControl(BSP_SPI_OFF);
00654       break;
00655     }
00656   }
00657   /* Write back register */
00658   BSP_RegisterWrite(&BC_REGISTER->PERICON, perfControl);
00659 
00660   return BSP_STATUS_OK;
00661 }
00662 
00663 /**************************************************************************/
00668 uint16_t BSP_PushButtonsGet(void)
00669 {
00670   return (~BSP_RegisterRead(&BC_REGISTER->UIF_PB)) & 0x000F;
00671 }
00672 
00673 /**************************************************************************/
00678 uint16_t BSP_RegisterRead(volatile uint16_t *addr)
00679 {
00680   if (bspOperationMode == BSP_INIT_DK_EBI)
00681   {
00682     return *addr;
00683   }
00684   else
00685   {
00686     return SpiRegisterRead(addr);
00687   }
00688 }
00689 
00690 /**************************************************************************/
00695 int BSP_RegisterWrite(volatile uint16_t *addr, uint16_t data)
00696 {
00697   if (bspOperationMode == BSP_INIT_DK_EBI)
00698   {
00699     *addr = data;
00700   }
00701   else
00702   {
00703     SpiRegisterWrite(addr, data);
00704   }
00705   return BSP_STATUS_OK;
00706 }
00712 static void EbiDisable(void)
00713 {
00714 #if defined(_EFM32_GECKO_FAMILY)
00715 
00716   /* Configure GPIO pins as disabled */
00717   GPIO_PinModeSet( gpioPortA,  0, gpioModeDisabled, 0 );
00718   GPIO_PinModeSet( gpioPortA,  1, gpioModeDisabled, 0 );
00719   GPIO_PinModeSet( gpioPortA,  2, gpioModeDisabled, 0 );
00720   GPIO_PinModeSet( gpioPortA,  3, gpioModeDisabled, 0 );
00721   GPIO_PinModeSet( gpioPortA,  4, gpioModeDisabled, 0 );
00722   GPIO_PinModeSet( gpioPortA,  5, gpioModeDisabled, 0 );
00723   GPIO_PinModeSet( gpioPortA,  6, gpioModeDisabled, 0 );
00724 
00725   GPIO_PinModeSet( gpioPortA, 15, gpioModeDisabled, 0 );
00726 
00727   GPIO_PinModeSet( gpioPortD,  9, gpioModeDisabled, 0 );
00728   GPIO_PinModeSet( gpioPortD, 10, gpioModeDisabled, 0 );
00729   GPIO_PinModeSet( gpioPortD, 11, gpioModeDisabled, 0 );
00730   GPIO_PinModeSet( gpioPortD, 12, gpioModeDisabled, 0 );
00731 
00732   GPIO_PinModeSet( gpioPortE,  8, gpioModeDisabled, 0 );
00733   GPIO_PinModeSet( gpioPortE,  9, gpioModeDisabled, 0 );
00734   GPIO_PinModeSet( gpioPortE, 10, gpioModeDisabled, 0 );
00735   GPIO_PinModeSet( gpioPortE, 11, gpioModeDisabled, 0 );
00736   GPIO_PinModeSet( gpioPortE, 12, gpioModeDisabled, 0 );
00737   GPIO_PinModeSet( gpioPortE, 13, gpioModeDisabled, 0 );
00738   GPIO_PinModeSet( gpioPortE, 14, gpioModeDisabled, 0 );
00739   GPIO_PinModeSet( gpioPortE, 15, gpioModeDisabled, 0 );
00740 
00741   GPIO_PinModeSet( gpioPortF, 2, gpioModeDisabled, 0 );
00742   GPIO_PinModeSet( gpioPortF, 3, gpioModeDisabled, 0 );
00743   GPIO_PinModeSet( gpioPortF, 4, gpioModeDisabled, 0 );
00744   GPIO_PinModeSet( gpioPortF, 5, gpioModeDisabled, 0 );
00745 
00746   /* EBI Byte Lane 0 support BL0/BL1 */
00747   GPIO_PinModeSet( gpioPortF, 6, gpioModeDisabled, 0 );
00748   GPIO_PinModeSet( gpioPortF, 7, gpioModeDisabled, 0 );
00749 
00750 #else
00751 
00752   /* Configure GPIO pins as disabled */
00753   /* EBI AD9..15 */
00754   GPIO_PinModeSet( gpioPortA,  0, gpioModeDisabled, 0 );
00755   GPIO_PinModeSet( gpioPortA,  1, gpioModeDisabled, 0 );
00756   GPIO_PinModeSet( gpioPortA,  2, gpioModeDisabled, 0 );
00757   GPIO_PinModeSet( gpioPortA,  3, gpioModeDisabled, 0 );
00758   GPIO_PinModeSet( gpioPortA,  4, gpioModeDisabled, 0 );
00759   GPIO_PinModeSet( gpioPortA,  5, gpioModeDisabled, 0 );
00760   GPIO_PinModeSet( gpioPortA,  6, gpioModeDisabled, 0 );
00761 
00762   /* EBI AD8 */
00763   GPIO_PinModeSet( gpioPortA, 15, gpioModeDisabled, 0 );
00764 
00765   /* EBI A16-A22 */
00766   GPIO_PinModeSet( gpioPortB,  0, gpioModeDisabled, 0 );
00767   GPIO_PinModeSet( gpioPortB,  1, gpioModeDisabled, 0 );
00768   GPIO_PinModeSet( gpioPortB,  2, gpioModeDisabled, 0 );
00769   GPIO_PinModeSet( gpioPortB,  3, gpioModeDisabled, 0 );
00770   GPIO_PinModeSet( gpioPortB,  4, gpioModeDisabled, 0 );
00771   GPIO_PinModeSet( gpioPortB,  5, gpioModeDisabled, 0 );
00772   GPIO_PinModeSet( gpioPortB,  6, gpioModeDisabled, 0 );
00773 
00774   /* EBI CS0-CS3 */
00775   GPIO_PinModeSet( gpioPortD,  9, gpioModeDisabled, 0 );
00776   GPIO_PinModeSet( gpioPortD, 10, gpioModeDisabled, 0 );
00777   GPIO_PinModeSet( gpioPortD, 11, gpioModeDisabled, 0 );
00778   GPIO_PinModeSet( gpioPortD, 12, gpioModeDisabled, 0 );
00779 
00780   /* EBI AD0..7 */
00781   GPIO_PinModeSet( gpioPortE,  8, gpioModeDisabled, 0 );
00782   GPIO_PinModeSet( gpioPortE,  9, gpioModeDisabled, 0 );
00783   GPIO_PinModeSet( gpioPortE, 10, gpioModeDisabled, 0 );
00784   GPIO_PinModeSet( gpioPortE, 11, gpioModeDisabled, 0 );
00785   GPIO_PinModeSet( gpioPortE, 12, gpioModeDisabled, 0 );
00786   GPIO_PinModeSet( gpioPortE, 13, gpioModeDisabled, 0 );
00787   GPIO_PinModeSet( gpioPortE, 14, gpioModeDisabled, 0 );
00788   GPIO_PinModeSet( gpioPortE, 15, gpioModeDisabled, 0 );
00789 
00790   /* EBI ARDY/WEN/REN/ALE */
00791   GPIO_PinModeSet( gpioPortF,  2, gpioModeDisabled, 0 );
00792   GPIO_PinModeSet( gpioPortF,  8, gpioModeDisabled, 0 );
00793   GPIO_PinModeSet( gpioPortF,  9, gpioModeDisabled, 0 );
00794   GPIO_PinModeSet( gpioPortC, 11, gpioModeDisabled, 0 );
00795 
00796   /* EBI Byte Lane 0 support BL0/BL1 */
00797   GPIO_PinModeSet( gpioPortF,  6, gpioModeDisabled, 0 );
00798   GPIO_PinModeSet( gpioPortF,  7, gpioModeDisabled, 0 );
00799 
00800 #endif
00801 
00802   /* Reset EBI configuration */
00803   EBI_Disable();
00804 
00805   /* Turn off EBI clock */
00806   CMU_ClockEnable(cmuClock_EBI, false);
00807 }
00808 
00809 /**************************************************************************/
00817 static bool EbiInit(void)
00818 {
00819   EBI_Init_TypeDef ebiConfig = EBI_INIT_DEFAULT;
00820 
00821   /* Enable clocks */
00822   CMU_ClockEnable(cmuClock_EBI, true);
00823   CMU_ClockEnable(cmuClock_GPIO, true);
00824 
00825 #if defined(_EFM32_GECKO_FAMILY)
00826 
00827   /* Configure LCD_SELECT (EBI and LCD cannot be shared) */
00828   GPIO_PinModeSet( gpioPortC, 12, gpioModePushPull, 1 );
00829 
00830   /* Configure GPIO pins as push pull */
00831   /* EBI AD9..15 */
00832   GPIO_PinModeSet( gpioPortA,  0, gpioModePushPull, 0 );
00833   GPIO_PinModeSet( gpioPortA,  1, gpioModePushPull, 0 );
00834   GPIO_PinModeSet( gpioPortA,  2, gpioModePushPull, 0 );
00835   GPIO_PinModeSet( gpioPortA,  3, gpioModePushPull, 0 );
00836   GPIO_PinModeSet( gpioPortA,  4, gpioModePushPull, 0 );
00837   GPIO_PinModeSet( gpioPortA,  5, gpioModePushPull, 0 );
00838   GPIO_PinModeSet( gpioPortA,  6, gpioModePushPull, 0 );
00839 
00840   /* EBI AD8 */
00841   GPIO_PinModeSet( gpioPortA, 15, gpioModePushPull, 0 );
00842 
00843   /* EBI CS0-CS3 */
00844   GPIO_PinModeSet( gpioPortD,  9, gpioModePushPull, 1 );
00845   GPIO_PinModeSet( gpioPortD, 10, gpioModePushPull, 1 );
00846   GPIO_PinModeSet( gpioPortD, 11, gpioModePushPull, 1 );
00847   GPIO_PinModeSet( gpioPortD, 12, gpioModePushPull, 1 );
00848 
00849   /* EBI AD0..7 */
00850   GPIO_PinModeSet( gpioPortE,  8, gpioModePushPull, 0 );
00851   GPIO_PinModeSet( gpioPortE,  9, gpioModePushPull, 0 );
00852   GPIO_PinModeSet( gpioPortE, 10, gpioModePushPull, 0 );
00853   GPIO_PinModeSet( gpioPortE, 11, gpioModePushPull, 0 );
00854   GPIO_PinModeSet( gpioPortE, 12, gpioModePushPull, 0 );
00855   GPIO_PinModeSet( gpioPortE, 13, gpioModePushPull, 0 );
00856   GPIO_PinModeSet( gpioPortE, 14, gpioModePushPull, 0 );
00857   GPIO_PinModeSet( gpioPortE, 15, gpioModePushPull, 0 );
00858 
00859   /* EBI ARDY/ALEN/Wen/Ren */
00860   GPIO_PinModeSet( gpioPortF,  2, gpioModeInput,    0 );
00861   GPIO_PinModeSet( gpioPortF,  3, gpioModePushPull, 0 );
00862   GPIO_PinModeSet( gpioPortF,  4, gpioModePushPull, 1 );
00863   GPIO_PinModeSet( gpioPortF,  5, gpioModePushPull, 1 );
00864 
00865   /* Byte Lanes */
00866   GPIO_PinModeSet( gpioPortF,  6, gpioModePushPull, 0 );
00867   GPIO_PinModeSet( gpioPortF,  7, gpioModePushPull, 0 );
00868 
00869   /* Configure EBI controller, changing default values */
00870   ebiConfig.mode = ebiModeD16A16ALE;
00871 
00872   /* --------------------------------------------------------- */
00873   /* Board Control Registers, Bank 0, Base Address 0x80000000  */
00874   /* FPGA Xilinx Spartan XC6SLX9 CSG324                        */
00875   /* --------------------------------------------------------- */
00876 
00877   /* ----------------------------------------------------- */
00878   /* TFT-LCD Registers, Bank1, Base Address 0x84000000     */
00879   /* URT USMH_8252MD_320X240_RGB                           */
00880   /* Solomon Systech SSD 2119                              */
00881   /* ----------------------------------------------------- */
00882 
00883   /* ---------------------------------------------------- */
00884   /* External 4MB PSRAM, Bank 2, Base Address 0x88000000  */
00885   /* Micron MT45W2MW16PGA-70 IT, 32Mb Cellular RAM        */
00886   /* ---------------------------------------------------- */
00887 
00888   /* ----------------------------------------- */
00889   /* NOR Flash, Bank3, Base Address 0x8c000000 */
00890   /* Spansion flash S29GLxxx_FBGA              */
00891   /* ----------------------------------------- */
00892 
00893   ebiConfig.banks   = EBI_BANK0 | EBI_BANK1 | EBI_BANK2 | EBI_BANK3;
00894   ebiConfig.csLines = EBI_CS0 | EBI_CS1 | EBI_CS2 | EBI_CS3;
00895 
00896   /* Address Setup and hold time */
00897   ebiConfig.addrHoldCycles  = 3;
00898   ebiConfig.addrSetupCycles = 3;
00899 
00900   /* Read cycle times */
00901   ebiConfig.readStrobeCycles = 7;
00902   ebiConfig.readHoldCycles   = 3;
00903   ebiConfig.readSetupCycles  = 3;
00904 
00905   /* Write cycle times */
00906   ebiConfig.writeStrobeCycles = 7;
00907   ebiConfig.writeHoldCycles   = 3;
00908   ebiConfig.writeSetupCycles  = 3;
00909 
00910   /* Address Latch Enable polarity is active high */
00911   ebiConfig.alePolarity = ebiActiveHigh;
00912 
00913   /* Configure EBI */
00914   EBI_Init(&ebiConfig);
00915 
00916 #else
00917 
00918   /* Giant or Leopard family. */
00919 
00920   /* Configure GPIO pins as push pull */
00921   /* EBI AD9..15 */
00922   GPIO_PinModeSet( gpioPortA,  0, gpioModePushPull, 0 );
00923   GPIO_PinModeSet( gpioPortA,  1, gpioModePushPull, 0 );
00924   GPIO_PinModeSet( gpioPortA,  2, gpioModePushPull, 0 );
00925   GPIO_PinModeSet( gpioPortA,  3, gpioModePushPull, 0 );
00926   GPIO_PinModeSet( gpioPortA,  4, gpioModePushPull, 0 );
00927   GPIO_PinModeSet( gpioPortA,  5, gpioModePushPull, 0 );
00928   GPIO_PinModeSet( gpioPortA,  6, gpioModePushPull, 0 );
00929 
00930   /* EBI AD8 */
00931   GPIO_PinModeSet( gpioPortA, 15, gpioModePushPull, 0 );
00932 
00933   /* EBI A16-A22 */
00934   GPIO_PinModeSet( gpioPortB,  0, gpioModePushPull, 0 );
00935   GPIO_PinModeSet( gpioPortB,  1, gpioModePushPull, 0 );
00936   GPIO_PinModeSet( gpioPortB,  2, gpioModePushPull, 0 );
00937   GPIO_PinModeSet( gpioPortB,  3, gpioModePushPull, 0 );
00938   GPIO_PinModeSet( gpioPortB,  4, gpioModePushPull, 0 );
00939   GPIO_PinModeSet( gpioPortB,  5, gpioModePushPull, 0 );
00940   GPIO_PinModeSet( gpioPortB,  6, gpioModePushPull, 0 );
00941 
00942   /* EBI CS0-CS3 */
00943   GPIO_PinModeSet( gpioPortD,  9, gpioModePushPull, 1 );
00944   GPIO_PinModeSet( gpioPortD, 10, gpioModePushPull, 1 );
00945   GPIO_PinModeSet( gpioPortD, 11, gpioModePushPull, 1 );
00946   GPIO_PinModeSet( gpioPortD, 12, gpioModePushPull, 1 );
00947 
00948   /* EBI AD0..7 */
00949   GPIO_PinModeSet( gpioPortE,  8, gpioModePushPull, 0 );
00950   GPIO_PinModeSet( gpioPortE,  9, gpioModePushPull, 0 );
00951   GPIO_PinModeSet( gpioPortE, 10, gpioModePushPull, 0 );
00952   GPIO_PinModeSet( gpioPortE, 11, gpioModePushPull, 0 );
00953   GPIO_PinModeSet( gpioPortE, 12, gpioModePushPull, 0 );
00954   GPIO_PinModeSet( gpioPortE, 13, gpioModePushPull, 0 );
00955   GPIO_PinModeSet( gpioPortE, 14, gpioModePushPull, 0 );
00956   GPIO_PinModeSet( gpioPortE, 15, gpioModePushPull, 0 );
00957 
00958   /* EBI ARDY/WEN/REN/ALE */
00959   GPIO_PinModeSet( gpioPortF,  2, gpioModeInput,    0 );
00960   GPIO_PinModeSet( gpioPortF,  8, gpioModePushPull, 0 );
00961   GPIO_PinModeSet( gpioPortF,  9, gpioModePushPull, 0 );
00962   GPIO_PinModeSet( gpioPortC, 11, gpioModePushPull, 0 );
00963 
00964   /* EBI Byte Lane 0 support BL0/BL1 */
00965   GPIO_PinModeSet( gpioPortF, 6, gpioModePushPull, 0 );
00966   GPIO_PinModeSet( gpioPortF, 7, gpioModePushPull, 0 );
00967 
00968   /* ---------------------------------------------------- */
00969   /* External 4MB PSRAM, Bank 2, Base Address 0x88000000  */
00970   /* Micron MT45W2MW16PGA-70 IT, 32Mb Cellular RAM        */
00971   /* ---------------------------------------------------- */
00972   ebiConfig.banks        = EBI_BANK2;
00973   ebiConfig.csLines      = EBI_CS2;
00974   ebiConfig.mode         = ebiModeD16A16ALE;
00975   ebiConfig.alePolarity  = ebiActiveHigh;
00976   ebiConfig.blEnable     = true;
00977   ebiConfig.noIdle       = true;
00978   ebiConfig.ardyEnable   = false;
00979   ebiConfig.addrHalfALE  = true;
00980   ebiConfig.readPrefetch = true;
00981   ebiConfig.aLow         = ebiALowA16;
00982   ebiConfig.aHigh        = ebiAHighA23;
00983   ebiConfig.location     = ebiLocation1;
00984 
00985   /* Address Setup and hold time */
00986   ebiConfig.addrHoldCycles  = 0;
00987   ebiConfig.addrSetupCycles = 0;
00988 
00989   /* Read cycle times */
00990   ebiConfig.readStrobeCycles = 4;
00991   ebiConfig.readHoldCycles   = 0;
00992   ebiConfig.readSetupCycles  = 0;
00993 
00994   /* Write cycle times */
00995   ebiConfig.writeStrobeCycles = 2;
00996   ebiConfig.writeHoldCycles   = 0;
00997   ebiConfig.writeSetupCycles  = 0;
00998 
00999   /* Configure EBI bank 2 - external PSRAM */
01000   EBI_Init(&ebiConfig);
01001 
01002   /* --------------------------------------------------------- */
01003   /* Board Control Registers, Bank 0, Base Address 0x80000000  */
01004   /* FPGA Xilinx Spartan XC6SLX9 CSG324                        */
01005   /* --------------------------------------------------------- */
01006   ebiConfig.banks       = EBI_BANK0;
01007   ebiConfig.csLines     = EBI_CS0;
01008   ebiConfig.mode        = ebiModeD16A16ALE;;
01009   ebiConfig.alePolarity = ebiActiveHigh;
01010   /* keep blEnable */
01011   ebiConfig.blEnable     = false;
01012   ebiConfig.addrHalfALE  = true;
01013   ebiConfig.readPrefetch = false;
01014   ebiConfig.noIdle       = true;
01015 
01016   /* keep alow/ahigh configuration */
01017   /* ebiConfig.aLow = ebiALowA0; - needs to be set for PSRAM */
01018   /* ebiConfig.aHigh = ebiAHighA0; - needs to be set for PSRAM */
01019 
01020   /* Address Setup and hold time */
01021   ebiConfig.addrHoldCycles  = 3;
01022   ebiConfig.addrSetupCycles = 3;
01023 
01024   /* Read cycle times */
01025   ebiConfig.readStrobeCycles = 7;
01026   ebiConfig.readHoldCycles   = 3;
01027   ebiConfig.readSetupCycles  = 3;
01028 
01029   /* Write cycle times */
01030   ebiConfig.writeStrobeCycles = 7;
01031   ebiConfig.writeHoldCycles   = 3;
01032   ebiConfig.writeSetupCycles  = 3;
01033 
01034   /* Configure EBI bank 0 */
01035   EBI_Init(&ebiConfig);
01036 
01037   /* ----------------------------------------------------- */
01038   /* TFT-LCD Registers, Bank1, Base Address 0x84000000     */
01039   /* URT USMH_8252MD_320X240_RGB                           */
01040   /* Solomon Systech SSD 2119                              */
01041   /* ----------------------------------------------------- */
01042   ebiConfig.banks   = EBI_BANK1;
01043   ebiConfig.csLines = EBI_CS1;
01044 
01045   /* Address Setup and hold time */
01046   ebiConfig.addrHoldCycles  = 1;
01047   ebiConfig.addrSetupCycles = 1;
01048 
01049   /* Read cycle times */
01050   ebiConfig.readStrobeCycles = 7;
01051   ebiConfig.readHoldCycles   = 3;
01052   ebiConfig.readSetupCycles  = 3;
01053 
01054   /* Write cycle times */
01055   ebiConfig.writeStrobeCycles = 2;
01056   ebiConfig.writeHoldCycles   = 1;
01057   ebiConfig.writeSetupCycles  = 1;
01058 
01059   /* Configure EBI bank 1 */
01060   EBI_Init(&ebiConfig);
01061 
01062   /* ----------------------------------------- */
01063   /* NOR Flash, Bank3, Base Address 0x8c000000 */
01064   /* Spansion flash S29GLxxx_FBGA              */
01065   /* ----------------------------------------- */
01066   ebiConfig.banks       = EBI_BANK3;
01067   ebiConfig.csLines     = EBI_CS3;
01068   ebiConfig.mode        = ebiModeD16A16ALE;
01069   ebiConfig.alePolarity = ebiActiveHigh;
01070 
01071   /* keep blEnable */
01072   ebiConfig.blEnable     = true;
01073   ebiConfig.addrHalfALE  = true;
01074   ebiConfig.readPrefetch = false;
01075   ebiConfig.noIdle       = true;
01076 
01077   /* Address Setup and hold time */
01078   ebiConfig.addrHoldCycles  = 0;
01079   ebiConfig.addrSetupCycles = 0;
01080 
01081   /* Read cycle times */
01082   ebiConfig.readStrobeCycles = 6;
01083   ebiConfig.readHoldCycles   = 0;
01084   ebiConfig.readSetupCycles  = 0;
01085 
01086   /* Write cycle times */
01087   ebiConfig.writeStrobeCycles = 5;
01088   ebiConfig.writeHoldCycles   = 0;
01089   ebiConfig.writeSetupCycles  = 0;
01090 
01091   /* Configure EBI bank 3 */
01092   EBI_Init(&ebiConfig);
01093 
01094   /* Enable extended address range */
01095   BSP_EbiExtendedAddressRange(true);
01096 #endif
01097 
01098   /* Verify connectivity to Board Control registers */
01099   if (BC_REGISTER->MAGIC != 0xef32)
01100   {
01101     return false;
01102   }
01103   else
01104   {
01105     return true;
01106   }
01107 }
01108 
01109 static uint16_t SpiBcAccess(uint8_t addr, uint8_t rw, uint16_t data)
01110 {
01111   uint16_t tmp;
01112 
01113   /* Enable CS */
01114   GPIO_PinOutClear(BSP_PORT_SPI_CS, BSP_PIN_SPI_CS);
01115 
01116   /* Write SPI address MSB */
01117   USART_Tx(BSP_SPI_USART_USED, (addr & 0x3) | rw << 3);
01118   /* Just ignore data read back */
01119   USART_Rx(BSP_SPI_USART_USED);
01120 
01121   /* Write SPI address  LSB */
01122   USART_Tx(BSP_SPI_USART_USED, data & 0xFF);
01123 
01124   tmp = (uint16_t) USART_Rx(BSP_SPI_USART_USED);
01125 
01126   /* SPI data MSB */
01127   USART_Tx(BSP_SPI_USART_USED, data >> 8);
01128   tmp |= (uint16_t) USART_Rx(BSP_SPI_USART_USED) << 8;
01129 
01130   /* Disable CS */
01131   GPIO_PinOutSet(BSP_PORT_SPI_CS, BSP_PIN_SPI_CS);
01132 
01133   return tmp;
01134 }
01135 
01136 static void SpiBcDisable(void)
01137 {
01138   /* Restore and disable USART */
01139   USART_Reset(BSP_SPI_USART_USED);
01140 
01141   GPIO_PinModeSet(BSP_PORT_SPI_TX, BSP_PIN_SPI_TX, gpioModeDisabled, 0);
01142   GPIO_PinModeSet(BSP_PORT_SPI_RX, BSP_PIN_SPI_RX, gpioModeDisabled, 0);
01143   GPIO_PinModeSet(BSP_PORT_SPI_CLK, BSP_PIN_SPI_CLK, gpioModeDisabled, 0);
01144   GPIO_PinModeSet(BSP_PORT_SPI_CS, BSP_PIN_SPI_CS, gpioModeDisabled, 0);
01145 
01146   /* Disable USART clock - we can't disable GPIO or HFPER as we don't know who else
01147    * might be using it */
01148   CMU_ClockEnable(BSP_SPI_USART_CLK, false);
01149 }
01150 
01151 static void SpiBcInit(void)
01152 {
01153   USART_InitSync_TypeDef bcinit = USART_INITSYNC_DEFAULT;
01154 
01155   /* Enable module clocks */
01156   CMU_ClockEnable(BSP_SPI_USART_CLK, true);
01157 
01158   /* Configure SPI pins */
01159   GPIO_PinModeSet(BSP_PORT_SPI_TX, BSP_PIN_SPI_TX, gpioModePushPull, 0);
01160   GPIO_PinModeSet(BSP_PORT_SPI_RX, BSP_PIN_SPI_RX, gpioModeInput, 0);
01161   GPIO_PinModeSet(BSP_PORT_SPI_CLK, BSP_PIN_SPI_CLK, gpioModePushPull, 0);
01162 
01163   /* Keep CS high to not activate slave */
01164   GPIO_PinModeSet(BSP_PORT_SPI_CS, BSP_PIN_SPI_CS, gpioModePushPull, 1);
01165 
01166   /* Configure to use SPI master with manual CS */
01167   /* For now, configure SPI for worst case 48/32MHz clock in order to work */
01168   /* for all configurations. */
01169 
01170   #if defined(_EFM32_GECKO_FAMILY)
01171     bcinit.refFreq  = 32000000;
01172   #else
01173     bcinit.refFreq  = 48000000;
01174   #endif
01175   bcinit.baudrate = 7000000;
01176 
01177   /* Initialize USART */
01178   USART_InitSync(BSP_SPI_USART_USED, &bcinit);
01179 
01180   /* Enable pins at default location */
01181   BSP_SPI_USART_USED->ROUTE = USART_ROUTE_TXPEN | USART_ROUTE_RXPEN | USART_ROUTE_CLKPEN;
01182 }
01183 
01184 static void SpiControl(BSP_SpiControl_TypeDef device)
01185 {
01186   switch (device)
01187   {
01188   case BSP_SPI_Audio:
01189     BSP_RegisterWrite(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_AUDIO);
01190     break;
01191 
01192   case BSP_SPI_Ethernet:
01193     BSP_RegisterWrite(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_ETHERNET);
01194     break;
01195 
01196   case BSP_SPI_Display:
01197     BSP_RegisterWrite(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_DISPLAY);
01198     break;
01199 
01200   case BSP_SPI_OFF:
01201     USART_Reset(USART1);
01202     CMU_ClockEnable(cmuClock_USART1, false);
01203     break;
01204   }
01205 }
01206 
01207 static bool SpiInit(void)
01208 {
01209   uint16_t bcMagic;
01210 
01211   /* Enable HF and GPIO clocks */
01212   CMU_ClockEnable(cmuClock_HFPER, true);
01213   CMU_ClockEnable(cmuClock_GPIO, true);
01214 
01215   SpiBcInit();
01216   /* Read "board control Magic" register to verify SPI is up and running */
01217   /*  if not FPGA is configured to be in EBI mode  */
01218   bcMagic = SpiRegisterRead(&BC_REGISTER->MAGIC);
01219   if (bcMagic != BC_MAGIC_VALUE)
01220   {
01221     return false;
01222   }
01223   else
01224   {
01225     return true;
01226   }
01227 }
01228 
01229 static uint16_t SpiRegisterRead(volatile uint16_t *addr)
01230 {
01231   uint16_t data;
01232 
01233   if (addr != lastAddr)
01234   {
01235     SpiBcAccess(0x00, 0, 0xFFFF & ((uint32_t) addr));           /* LSBs of address */
01236     SpiBcAccess(0x01, 0, 0xFF & ((uint32_t) addr >> 16));       /* MSBs of address */
01237     SpiBcAccess(0x02, 0, (0x0C000000 & (uint32_t) addr) >> 26); /* Chip select */
01238   }
01239   /* Read twice; when register address has changed we need two SPI transfer
01240    * to clock out valid data through board controller FIFOs */
01241   data     = SpiBcAccess(0x03, 1, 0);
01242   data     = SpiBcAccess(0x03, 1, 0);
01243 
01244   lastAddr = addr;
01245   return data;
01246 }
01247 
01248 static void SpiRegisterWrite(volatile uint16_t *addr, uint16_t data)
01249 {
01250   if (addr != lastAddr)
01251   {
01252     SpiBcAccess(0x00, 0, 0xFFFF & ((uint32_t) addr));           /* LSBs of address */
01253     SpiBcAccess(0x01, 0, 0xFF & ((uint32_t) addr >> 16));       /* MSBs of address */
01254     SpiBcAccess(0x02, 0, (0x0C000000 & (uint32_t) addr) >> 26); /* Chip select */
01255   }
01256   SpiBcAccess(0x03, 0, data);                                   /* Data */
01257   lastAddr = addr;
01258 }
01259 
01261 #endif  /* BSP_DK_3201 */