Board Control register definitions. More...
#include <stdint.h>
Go to the source code of this file.
Data Structures | |
struct | BC_TypeDef |
Board Controller Register definiton. More... | |
Defines | |
#define | BC_REGISTER_BASE 0x80000000 |
Defines FPGA register bank for Energy Micro Development Kit board, i.e. | |
#define | BC_SSD2119_BASE 0x84000000 |
TFT-LCD controller. | |
#define | BC_PSRAM_BASE 0x88000000 |
PSRAM base address. | |
#define | BC_FLASH_BASE 0x8C000000 |
External Flash base address. | |
#define | __IO volatile |
Defines bit fields for board control registers. | |
#define | BC_REGISTER ((BC_TypeDef *) BC_REGISTER_BASE) |
Register block base. | |
#define | BC_EM_EM0 (0) |
Indicate EM0. | |
#define | BC_EM_EM1 (1) |
Indicate EM1. | |
#define | BC_EM_EM2 (2) |
Indicate EM2. | |
#define | BC_EM_EM3 (3) |
Indicate EM3. | |
#define | BC_EM_EM4 (4) |
Indicate EM4. | |
#define | BC_MAGIC_VALUE (0xef32) |
Magic. | |
#define | BC_UIF_PB_MASK (0x000f) |
Push button mask. | |
#define | BC_UIF_PB1 (1 << 0) |
Push button PB1. | |
#define | BC_UIF_PB2 (1 << 1) |
Push button PB2. | |
#define | BC_UIF_PB3 (1 << 2) |
Push button PB3. | |
#define | BC_UIF_PB4 (1 << 3) |
Push button PB4. | |
#define | BC_DIPSWITCH_MASK (0x000f) |
Dip switch mask. | |
#define | BC_UIF_JOYSTICK_MASK (0x001f) |
Joystick mask. | |
#define | BC_UIF_JOYSTICK_DOWN (1 << 0) |
Joystick down. | |
#define | BC_UIF_JOYSTICK_RIGHT (1 << 1) |
Joystick right. | |
#define | BC_UIF_JOYSTICK_UP (1 << 2) |
Joystick up. | |
#define | BC_UIF_JOYSTICK_LEFT (1 << 3) |
Joystick left. | |
#define | BC_UIF_JOYSTICK_CENTER (1 << 4) |
Joystick center button. | |
#define | BC_UIF_AEM_BC (0) |
AEM button state, BC controls buttons. | |
#define | BC_UIF_AEM_EFM (1) |
AEM button state, EFM32 controls buttons. | |
#define | BC_DISPLAY_CTRL_RESET (1 << 1) |
Reset. | |
#define | BC_DISPLAY_CTRL_POWER_ENABLE (1 << 0) |
Display Control Power and Backlight Enable. | |
#define | BC_DISPLAY_CTRL_MODE_SHIFT 2 |
Bit offset value for Display_Mode setting. | |
#define | BC_DISPLAY_CTRL_MODE_8080 (0 << BC_DISPLAY_CTRL_MODE_SHIFT) |
Address mapped mode. | |
#define | BC_DISPLAY_CTRL_MODE_GENERIC (1 << BC_DISPLAY_CTRL_MODE_SHIFT) |
Direct Drive + SPI mode. | |
#define | BC_EBI_CTRL_EXTADDR_MASK (0x0001) |
Enable extended addressing support. | |
#define | BC_ARB_CTRL_SHIFT 0 |
Bit offset value for ARB_CTRL setting. | |
#define | BC_ARB_CTRL_BC (0 << BC_ARB_CTRL_SHIFT) |
BC drives display. | |
#define | BC_ARB_CTRL_EBI (1 << BC_ARB_CTRL_SHIFT) |
EFM32GG EBI drives display, memory mapped or direct drive. | |
#define | BC_ARB_CTRL_SPI (2 << BC_ARB_CTRL_SHIFT) |
EFM32GG SPI drives display. | |
#define | BC_INTEN_MASK (0x000f) |
Interrupt enable mask. | |
#define | BC_INTEN_PB (1 << 0) |
Push Button Interrupt enable. | |
#define | BC_INTEN_DIP (1 << 1) |
DIP Switch Interrupt enable. | |
#define | BC_INTEN_JOYSTICK (1 << 2) |
Joystick Interrupt enable. | |
#define | BC_INTEN_AEM (1 << 3) |
AEM Interrupt enable. | |
#define | BC_INTEN_ETH (1 << 4) |
Ethernet Interrupt enable. | |
#define | BC_INTFLAG_MASK (0x000f) |
Interrupt flag mask. | |
#define | BC_INTFLAG_PB (1 << 0) |
Push Button interrupt triggered. | |
#define | BC_INTFLAG_DIP (1 << 1) |
DIP interrupt triggered. | |
#define | BC_INTFLAG_JOYSTICK (1 << 2) |
Joystick interrupt triggered. | |
#define | BC_INTFLAG_AEM (1 << 3) |
AEM Interrupt triggered. | |
#define | BC_INTFLAG_ETH (1 << 4) |
Ethernet Interrupt triggered. | |
#define | BC_PERICON_RS232_SHUTDOWN_SHIFT 13 |
RS232 enable MUX bit. | |
#define | BC_PERICON_RS232_UART_SHIFT 12 |
UART enable. | |
#define | BC_PERICON_RS232_LEUART_SHIFT 11 |
LEUART enable. | |
#define | BC_PERICON_I2C_SHIFT 10 |
I2C enable. | |
#define | BC_PERICON_I2S_ETH_SEL_SHIFT 9 |
I2S/ETH/TFT SPI enable. | |
#define | BC_PERICON_I2S_ETH_SHIFT 8 |
I2S/ETH mux select. | |
#define | BC_PERICON_TRACE_SHIFT 7 |
ETM Trace enable. | |
#define | BC_PERICON_TOUCH_SHIFT 6 |
Touch enable. | |
#define | BC_PERICON_AUDIO_IN_SHIFT 5 |
Audio In enable. | |
#define | BC_PERICON_AUDIO_OUT_SEL_SHIFT 4 |
Audio Out I2S/DAC select. | |
#define | BC_PERICON_AUDIO_OUT_SHIFT 3 |
Audio Out enable. | |
#define | BC_PERICON_ANALOG_DIFF_SHIFT 2 |
Analog Diff enable. | |
#define | BC_PERICON_ANALOG_SE_SHIFT 1 |
Anallog SE enable. | |
#define | BC_PERICON_SPI_SHIFT 0 |
Micro-SD SPI enable. | |
#define | BC_SPI_DEMUX_SLAVE_MASK (0x0003) |
Mask for SPI MUX bits. | |
#define | BC_SPI_DEMUX_SLAVE_AUDIO (0) |
SPI interface to I2S Audio. | |
#define | BC_SPI_DEMUX_SLAVE_ETHERNET (1) |
SPI interface to Ethernet controller. | |
#define | BC_SPI_DEMUX_SLAVE_DISPLAY (2) |
SPI interface to TFT-LCD-SSD2119 controller. | |
#define | BC_ADC_STATUS_DONE (0) |
ADC Status Done. | |
#define | BC_ADC_STATUS_BUSY (1) |
ADC Status Busy. | |
#define | BC_CLKRST_FLASH_SHIFT (1 << 1) |
Flash Reset Control. | |
#define | BC_CLKRST_ETH_SHIFT (1 << 2) |
Ethernet Reset Control. | |
#define | BC_HW_VERSION_PCB_MASK (0x07f0) |
PCB Version mask. | |
#define | BC_HW_VERSION_PCB_SHIFT (4) |
PCB Version shift. | |
#define | BC_HW_VERSION_BOARD_MASK (0x000f) |
Board version mask. | |
#define | BC_HW_VERSION_BOARD_SHIFT (0) |
Board version shift. | |
#define | BC_FW_VERSION_MAJOR_MASK (0xf000) |
FW Version major mask. | |
#define | BC_FW_VERSION_MAJOR_SHIFT (12) |
FW version major shift. | |
#define | BC_FW_VERSION_MINOR_MASK (0x0f00) |
FW version minor mask. | |
#define | BC_FW_VERSION_MINOR_SHIFT (8) |
FW version minor shift. | |
#define | BC_FW_VERSION_PATCHLEVEL_MASK (0x00ff) |
FW Patchlevel mask. | |
#define | BC_FW_VERSION_PATCHLEVEL_SHIFT (0) |
FW Patchlevel shift. | |
#define | BC_MBOX_TXSTATUS0_FIFOEMPTY (1 << 0) |
BC/EFM32 communication register. | |
#define | BC_MBOX_TXSTATUS0_FIFOFULL (1 << 1) |
BC/EFM32 communication register. | |
#define | BC_MBOX_TXSTATUS0_FIFOUNDERFLOW (1 << 4) |
BC/EFM32 communication register. | |
#define | BC_MBOX_TXSTATUS0_FIFOOVERFLOW (1 << 5) |
BC/EFM32 communication register. | |
#define | BC_MBOX_TXSTATUS1_WORDCOUNT_MASK (0x07FF) |
BC/EFM32 communication register. | |
#define | BC_BUF_CTRL_CS_ENABLE (1 << 0) |
BC/EFM32 communication register. |
Board Control register definitions.
(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com
Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:
1. The origin of this software must not be misrepresented; you must not claim that you wrote the original software. 2. Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software. 3. This notice may not be removed or altered from any source distribution. 4. The source and compiled code may only be used on Energy Micro "EFM32" microcontrollers and "EFR4" radios.
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Energy Micro AS will not be liable for any consequential, incidental, or special damages, or any other relief, or for any claim by any third party, arising from your use of this Software.
Definition in file bsp_dk_bcreg_3201.h.