Defines | |
#define | _PRS_SWPULSE_RESETVALUE 0x00000000UL |
#define | _PRS_SWPULSE_MASK 0x00000FFFUL |
#define | PRS_SWPULSE_CH0PULSE (0x1UL << 0) |
#define | _PRS_SWPULSE_CH0PULSE_SHIFT 0 |
#define | _PRS_SWPULSE_CH0PULSE_MASK 0x1UL |
#define | _PRS_SWPULSE_CH0PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH0PULSE_DEFAULT (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0) |
#define | PRS_SWPULSE_CH1PULSE (0x1UL << 1) |
#define | _PRS_SWPULSE_CH1PULSE_SHIFT 1 |
#define | _PRS_SWPULSE_CH1PULSE_MASK 0x2UL |
#define | _PRS_SWPULSE_CH1PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH1PULSE_DEFAULT (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1) |
#define | PRS_SWPULSE_CH2PULSE (0x1UL << 2) |
#define | _PRS_SWPULSE_CH2PULSE_SHIFT 2 |
#define | _PRS_SWPULSE_CH2PULSE_MASK 0x4UL |
#define | _PRS_SWPULSE_CH2PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH2PULSE_DEFAULT (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2) |
#define | PRS_SWPULSE_CH3PULSE (0x1UL << 3) |
#define | _PRS_SWPULSE_CH3PULSE_SHIFT 3 |
#define | _PRS_SWPULSE_CH3PULSE_MASK 0x8UL |
#define | _PRS_SWPULSE_CH3PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH3PULSE_DEFAULT (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3) |
#define | PRS_SWPULSE_CH4PULSE (0x1UL << 4) |
#define | _PRS_SWPULSE_CH4PULSE_SHIFT 4 |
#define | _PRS_SWPULSE_CH4PULSE_MASK 0x10UL |
#define | _PRS_SWPULSE_CH4PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH4PULSE_DEFAULT (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4) |
#define | PRS_SWPULSE_CH5PULSE (0x1UL << 5) |
#define | _PRS_SWPULSE_CH5PULSE_SHIFT 5 |
#define | _PRS_SWPULSE_CH5PULSE_MASK 0x20UL |
#define | _PRS_SWPULSE_CH5PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH5PULSE_DEFAULT (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5) |
#define | PRS_SWPULSE_CH6PULSE (0x1UL << 6) |
#define | _PRS_SWPULSE_CH6PULSE_SHIFT 6 |
#define | _PRS_SWPULSE_CH6PULSE_MASK 0x40UL |
#define | _PRS_SWPULSE_CH6PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH6PULSE_DEFAULT (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6) |
#define | PRS_SWPULSE_CH7PULSE (0x1UL << 7) |
#define | _PRS_SWPULSE_CH7PULSE_SHIFT 7 |
#define | _PRS_SWPULSE_CH7PULSE_MASK 0x80UL |
#define | _PRS_SWPULSE_CH7PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH7PULSE_DEFAULT (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7) |
#define | PRS_SWPULSE_CH8PULSE (0x1UL << 8) |
#define | _PRS_SWPULSE_CH8PULSE_SHIFT 8 |
#define | _PRS_SWPULSE_CH8PULSE_MASK 0x100UL |
#define | _PRS_SWPULSE_CH8PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH8PULSE_DEFAULT (_PRS_SWPULSE_CH8PULSE_DEFAULT << 8) |
#define | PRS_SWPULSE_CH9PULSE (0x1UL << 9) |
#define | _PRS_SWPULSE_CH9PULSE_SHIFT 9 |
#define | _PRS_SWPULSE_CH9PULSE_MASK 0x200UL |
#define | _PRS_SWPULSE_CH9PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH9PULSE_DEFAULT (_PRS_SWPULSE_CH9PULSE_DEFAULT << 9) |
#define | PRS_SWPULSE_CH10PULSE (0x1UL << 10) |
#define | _PRS_SWPULSE_CH10PULSE_SHIFT 10 |
#define | _PRS_SWPULSE_CH10PULSE_MASK 0x400UL |
#define | _PRS_SWPULSE_CH10PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH10PULSE_DEFAULT (_PRS_SWPULSE_CH10PULSE_DEFAULT << 10) |
#define | PRS_SWPULSE_CH11PULSE (0x1UL << 11) |
#define | _PRS_SWPULSE_CH11PULSE_SHIFT 11 |
#define | _PRS_SWPULSE_CH11PULSE_MASK 0x800UL |
#define | _PRS_SWPULSE_CH11PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH11PULSE_DEFAULT (_PRS_SWPULSE_CH11PULSE_DEFAULT << 11) |
#define | _PRS_SWLEVEL_RESETVALUE 0x00000000UL |
#define | _PRS_SWLEVEL_MASK 0x00000FFFUL |
#define | PRS_SWLEVEL_CH0LEVEL (0x1UL << 0) |
#define | _PRS_SWLEVEL_CH0LEVEL_SHIFT 0 |
#define | _PRS_SWLEVEL_CH0LEVEL_MASK 0x1UL |
#define | _PRS_SWLEVEL_CH0LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH0LEVEL_DEFAULT (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0) |
#define | PRS_SWLEVEL_CH1LEVEL (0x1UL << 1) |
#define | _PRS_SWLEVEL_CH1LEVEL_SHIFT 1 |
#define | _PRS_SWLEVEL_CH1LEVEL_MASK 0x2UL |
#define | _PRS_SWLEVEL_CH1LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH1LEVEL_DEFAULT (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1) |
#define | PRS_SWLEVEL_CH2LEVEL (0x1UL << 2) |
#define | _PRS_SWLEVEL_CH2LEVEL_SHIFT 2 |
#define | _PRS_SWLEVEL_CH2LEVEL_MASK 0x4UL |
#define | _PRS_SWLEVEL_CH2LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH2LEVEL_DEFAULT (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2) |
#define | PRS_SWLEVEL_CH3LEVEL (0x1UL << 3) |
#define | _PRS_SWLEVEL_CH3LEVEL_SHIFT 3 |
#define | _PRS_SWLEVEL_CH3LEVEL_MASK 0x8UL |
#define | _PRS_SWLEVEL_CH3LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH3LEVEL_DEFAULT (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3) |
#define | PRS_SWLEVEL_CH4LEVEL (0x1UL << 4) |
#define | _PRS_SWLEVEL_CH4LEVEL_SHIFT 4 |
#define | _PRS_SWLEVEL_CH4LEVEL_MASK 0x10UL |
#define | _PRS_SWLEVEL_CH4LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH4LEVEL_DEFAULT (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4) |
#define | PRS_SWLEVEL_CH5LEVEL (0x1UL << 5) |
#define | _PRS_SWLEVEL_CH5LEVEL_SHIFT 5 |
#define | _PRS_SWLEVEL_CH5LEVEL_MASK 0x20UL |
#define | _PRS_SWLEVEL_CH5LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH5LEVEL_DEFAULT (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5) |
#define | PRS_SWLEVEL_CH6LEVEL (0x1UL << 6) |
#define | _PRS_SWLEVEL_CH6LEVEL_SHIFT 6 |
#define | _PRS_SWLEVEL_CH6LEVEL_MASK 0x40UL |
#define | _PRS_SWLEVEL_CH6LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH6LEVEL_DEFAULT (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6) |
#define | PRS_SWLEVEL_CH7LEVEL (0x1UL << 7) |
#define | _PRS_SWLEVEL_CH7LEVEL_SHIFT 7 |
#define | _PRS_SWLEVEL_CH7LEVEL_MASK 0x80UL |
#define | _PRS_SWLEVEL_CH7LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH7LEVEL_DEFAULT (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7) |
#define | PRS_SWLEVEL_CH8LEVEL (0x1UL << 8) |
#define | _PRS_SWLEVEL_CH8LEVEL_SHIFT 8 |
#define | _PRS_SWLEVEL_CH8LEVEL_MASK 0x100UL |
#define | _PRS_SWLEVEL_CH8LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH8LEVEL_DEFAULT (_PRS_SWLEVEL_CH8LEVEL_DEFAULT << 8) |
#define | PRS_SWLEVEL_CH9LEVEL (0x1UL << 9) |
#define | _PRS_SWLEVEL_CH9LEVEL_SHIFT 9 |
#define | _PRS_SWLEVEL_CH9LEVEL_MASK 0x200UL |
#define | _PRS_SWLEVEL_CH9LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH9LEVEL_DEFAULT (_PRS_SWLEVEL_CH9LEVEL_DEFAULT << 9) |
#define | PRS_SWLEVEL_CH10LEVEL (0x1UL << 10) |
#define | _PRS_SWLEVEL_CH10LEVEL_SHIFT 10 |
#define | _PRS_SWLEVEL_CH10LEVEL_MASK 0x400UL |
#define | _PRS_SWLEVEL_CH10LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH10LEVEL_DEFAULT (_PRS_SWLEVEL_CH10LEVEL_DEFAULT << 10) |
#define | PRS_SWLEVEL_CH11LEVEL (0x1UL << 11) |
#define | _PRS_SWLEVEL_CH11LEVEL_SHIFT 11 |
#define | _PRS_SWLEVEL_CH11LEVEL_MASK 0x800UL |
#define | _PRS_SWLEVEL_CH11LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH11LEVEL_DEFAULT (_PRS_SWLEVEL_CH11LEVEL_DEFAULT << 11) |
#define | _PRS_ROUTE_RESETVALUE 0x00000000UL |
#define | _PRS_ROUTE_MASK 0x0000070FUL |
#define | PRS_ROUTE_CH0PEN (0x1UL << 0) |
#define | _PRS_ROUTE_CH0PEN_SHIFT 0 |
#define | _PRS_ROUTE_CH0PEN_MASK 0x1UL |
#define | _PRS_ROUTE_CH0PEN_DEFAULT 0x00000000UL |
#define | PRS_ROUTE_CH0PEN_DEFAULT (_PRS_ROUTE_CH0PEN_DEFAULT << 0) |
#define | PRS_ROUTE_CH1PEN (0x1UL << 1) |
#define | _PRS_ROUTE_CH1PEN_SHIFT 1 |
#define | _PRS_ROUTE_CH1PEN_MASK 0x2UL |
#define | _PRS_ROUTE_CH1PEN_DEFAULT 0x00000000UL |
#define | PRS_ROUTE_CH1PEN_DEFAULT (_PRS_ROUTE_CH1PEN_DEFAULT << 1) |
#define | PRS_ROUTE_CH2PEN (0x1UL << 2) |
#define | _PRS_ROUTE_CH2PEN_SHIFT 2 |
#define | _PRS_ROUTE_CH2PEN_MASK 0x4UL |
#define | _PRS_ROUTE_CH2PEN_DEFAULT 0x00000000UL |
#define | PRS_ROUTE_CH2PEN_DEFAULT (_PRS_ROUTE_CH2PEN_DEFAULT << 2) |
#define | PRS_ROUTE_CH3PEN (0x1UL << 3) |
#define | _PRS_ROUTE_CH3PEN_SHIFT 3 |
#define | _PRS_ROUTE_CH3PEN_MASK 0x8UL |
#define | _PRS_ROUTE_CH3PEN_DEFAULT 0x00000000UL |
#define | PRS_ROUTE_CH3PEN_DEFAULT (_PRS_ROUTE_CH3PEN_DEFAULT << 3) |
#define | _PRS_ROUTE_LOCATION_SHIFT 8 |
#define | _PRS_ROUTE_LOCATION_MASK 0x700UL |
#define | _PRS_ROUTE_LOCATION_LOC0 0x00000000UL |
#define | _PRS_ROUTE_LOCATION_DEFAULT 0x00000000UL |
#define | _PRS_ROUTE_LOCATION_LOC1 0x00000001UL |
#define | PRS_ROUTE_LOCATION_LOC0 (_PRS_ROUTE_LOCATION_LOC0 << 8) |
#define | PRS_ROUTE_LOCATION_DEFAULT (_PRS_ROUTE_LOCATION_DEFAULT << 8) |
#define | PRS_ROUTE_LOCATION_LOC1 (_PRS_ROUTE_LOCATION_LOC1 << 8) |
#define | _PRS_CH_CTRL_RESETVALUE 0x00000000UL |
#define | _PRS_CH_CTRL_MASK 0x133F0007UL |
#define | _PRS_CH_CTRL_SIGSEL_SHIFT 0 |
#define | _PRS_CH_CTRL_SIGSEL_MASK 0x7UL |
#define | _PRS_CH_CTRL_SIGSEL_VCMPOUT 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_ACMP0OUT 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_ACMP1OUT 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_DAC0CH0 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_ADC0SINGLE 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_USART0IRTX 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER0UF 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER1UF 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER2UF 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER3UF 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_USBSOF 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_RTCOF 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN0 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN8 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_LETIMER0CH0 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_BURTCOF 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSEDEC0 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_DAC0CH1 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_ADC0SCAN 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_USART0TXC 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_USART1TXC 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_USART2TXC 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER0OF 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER1OF 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER2OF 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER3OF 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_USBSOFSR 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_RTCCOMP0 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN1 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN9 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_LETIMER0CH1 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_BURTCCOMP0 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSEDEC1 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_USART0RXDATAV 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_USART1RXDATAV 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_USART2RXDATAV 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER0CC0 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER1CC0 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER2CC0 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER3CC0 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_RTCCOMP1 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN2 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN10 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSEDEC2 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER0CC1 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER1CC1 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER2CC1 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER3CC1 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN3 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN11 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER0CC2 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER1CC2 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER2CC2 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER3CC2 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN4 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN12 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN5 0x00000005UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN13 0x00000005UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 0x00000005UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 0x00000005UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN6 0x00000006UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN14 0x00000006UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 0x00000006UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 0x00000006UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN7 0x00000007UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN15 0x00000007UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 0x00000007UL |
#define | _PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 0x00000007UL |
#define | PRS_CH_CTRL_SIGSEL_VCMPOUT (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0) |
#define | PRS_CH_CTRL_SIGSEL_ACMP0OUT (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0) |
#define | PRS_CH_CTRL_SIGSEL_ACMP1OUT (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0) |
#define | PRS_CH_CTRL_SIGSEL_DAC0CH0 (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_ADC0SINGLE (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART0IRTX (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER0UF (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER1UF (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER2UF (_PRS_CH_CTRL_SIGSEL_TIMER2UF << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER3UF (_PRS_CH_CTRL_SIGSEL_TIMER3UF << 0) |
#define | PRS_CH_CTRL_SIGSEL_USBSOF (_PRS_CH_CTRL_SIGSEL_USBSOF << 0) |
#define | PRS_CH_CTRL_SIGSEL_RTCOF (_PRS_CH_CTRL_SIGSEL_RTCOF << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN0 (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN8 (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LETIMER0CH0 (_PRS_CH_CTRL_SIGSEL_LETIMER0CH0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_BURTCOF (_PRS_CH_CTRL_SIGSEL_BURTCOF << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSEDEC0 (_PRS_CH_CTRL_SIGSEL_LESENSEDEC0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_DAC0CH1 (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_ADC0SCAN (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART0TXC (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART1TXC (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART2TXC (_PRS_CH_CTRL_SIGSEL_USART2TXC << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER0OF (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER1OF (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER2OF (_PRS_CH_CTRL_SIGSEL_TIMER2OF << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER3OF (_PRS_CH_CTRL_SIGSEL_TIMER3OF << 0) |
#define | PRS_CH_CTRL_SIGSEL_USBSOFSR (_PRS_CH_CTRL_SIGSEL_USBSOFSR << 0) |
#define | PRS_CH_CTRL_SIGSEL_RTCCOMP0 (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN1 (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN9 (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LETIMER0CH1 (_PRS_CH_CTRL_SIGSEL_LETIMER0CH1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_BURTCCOMP0 (_PRS_CH_CTRL_SIGSEL_BURTCCOMP0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSEDEC1 (_PRS_CH_CTRL_SIGSEL_LESENSEDEC1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART0RXDATAV (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART1RXDATAV (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART2RXDATAV (_PRS_CH_CTRL_SIGSEL_USART2RXDATAV << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER0CC0 (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER1CC0 (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER2CC0 (_PRS_CH_CTRL_SIGSEL_TIMER2CC0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER3CC0 (_PRS_CH_CTRL_SIGSEL_TIMER3CC0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_RTCCOMP1 (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN2 (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN10 (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSEDEC2 (_PRS_CH_CTRL_SIGSEL_LESENSEDEC2 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER0CC1 (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER1CC1 (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER2CC1 (_PRS_CH_CTRL_SIGSEL_TIMER2CC1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER3CC1 (_PRS_CH_CTRL_SIGSEL_TIMER3CC1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN3 (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN11 (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER0CC2 (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER1CC2 (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER2CC2 (_PRS_CH_CTRL_SIGSEL_TIMER2CC2 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER3CC2 (_PRS_CH_CTRL_SIGSEL_TIMER3CC2 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN4 (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN12 (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN5 (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN13 (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN6 (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN14 (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN7 (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN15 (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 << 0) |
#define | PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 << 0) |
#define | _PRS_CH_CTRL_SOURCESEL_SHIFT 16 |
#define | _PRS_CH_CTRL_SOURCESEL_MASK 0x3F0000UL |
#define | _PRS_CH_CTRL_SOURCESEL_NONE 0x00000000UL |
#define | _PRS_CH_CTRL_SOURCESEL_VCMP 0x00000001UL |
#define | _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL |
#define | _PRS_CH_CTRL_SOURCESEL_ACMP1 0x00000003UL |
#define | _PRS_CH_CTRL_SOURCESEL_DAC0 0x00000006UL |
#define | _PRS_CH_CTRL_SOURCESEL_ADC0 0x00000008UL |
#define | _PRS_CH_CTRL_SOURCESEL_USART0 0x00000010UL |
#define | _PRS_CH_CTRL_SOURCESEL_USART1 0x00000011UL |
#define | _PRS_CH_CTRL_SOURCESEL_USART2 0x00000012UL |
#define | _PRS_CH_CTRL_SOURCESEL_TIMER0 0x0000001CUL |
#define | _PRS_CH_CTRL_SOURCESEL_TIMER1 0x0000001DUL |
#define | _PRS_CH_CTRL_SOURCESEL_TIMER2 0x0000001EUL |
#define | _PRS_CH_CTRL_SOURCESEL_TIMER3 0x0000001FUL |
#define | _PRS_CH_CTRL_SOURCESEL_USB 0x00000024UL |
#define | _PRS_CH_CTRL_SOURCESEL_RTC 0x00000028UL |
#define | _PRS_CH_CTRL_SOURCESEL_GPIOL 0x00000030UL |
#define | _PRS_CH_CTRL_SOURCESEL_GPIOH 0x00000031UL |
#define | _PRS_CH_CTRL_SOURCESEL_LETIMER0 0x00000034UL |
#define | _PRS_CH_CTRL_SOURCESEL_BURTC 0x00000037UL |
#define | _PRS_CH_CTRL_SOURCESEL_LESENSEL 0x00000039UL |
#define | _PRS_CH_CTRL_SOURCESEL_LESENSEH 0x0000003AUL |
#define | _PRS_CH_CTRL_SOURCESEL_LESENSED 0x0000003BUL |
#define | PRS_CH_CTRL_SOURCESEL_NONE (_PRS_CH_CTRL_SOURCESEL_NONE << 16) |
#define | PRS_CH_CTRL_SOURCESEL_VCMP (_PRS_CH_CTRL_SOURCESEL_VCMP << 16) |
#define | PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_ACMP1 (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_DAC0 (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_ADC0 (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_USART0 (_PRS_CH_CTRL_SOURCESEL_USART0 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_USART1 (_PRS_CH_CTRL_SOURCESEL_USART1 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_USART2 (_PRS_CH_CTRL_SOURCESEL_USART2 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_TIMER0 (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_TIMER1 (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_TIMER2 (_PRS_CH_CTRL_SOURCESEL_TIMER2 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_TIMER3 (_PRS_CH_CTRL_SOURCESEL_TIMER3 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_USB (_PRS_CH_CTRL_SOURCESEL_USB << 16) |
#define | PRS_CH_CTRL_SOURCESEL_RTC (_PRS_CH_CTRL_SOURCESEL_RTC << 16) |
#define | PRS_CH_CTRL_SOURCESEL_GPIOL (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16) |
#define | PRS_CH_CTRL_SOURCESEL_GPIOH (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16) |
#define | PRS_CH_CTRL_SOURCESEL_LETIMER0 (_PRS_CH_CTRL_SOURCESEL_LETIMER0 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_BURTC (_PRS_CH_CTRL_SOURCESEL_BURTC << 16) |
#define | PRS_CH_CTRL_SOURCESEL_LESENSEL (_PRS_CH_CTRL_SOURCESEL_LESENSEL << 16) |
#define | PRS_CH_CTRL_SOURCESEL_LESENSEH (_PRS_CH_CTRL_SOURCESEL_LESENSEH << 16) |
#define | PRS_CH_CTRL_SOURCESEL_LESENSED (_PRS_CH_CTRL_SOURCESEL_LESENSED << 16) |
#define | _PRS_CH_CTRL_EDSEL_SHIFT 24 |
#define | _PRS_CH_CTRL_EDSEL_MASK 0x3000000UL |
#define | _PRS_CH_CTRL_EDSEL_DEFAULT 0x00000000UL |
#define | _PRS_CH_CTRL_EDSEL_OFF 0x00000000UL |
#define | _PRS_CH_CTRL_EDSEL_POSEDGE 0x00000001UL |
#define | _PRS_CH_CTRL_EDSEL_NEGEDGE 0x00000002UL |
#define | _PRS_CH_CTRL_EDSEL_BOTHEDGES 0x00000003UL |
#define | PRS_CH_CTRL_EDSEL_DEFAULT (_PRS_CH_CTRL_EDSEL_DEFAULT << 24) |
#define | PRS_CH_CTRL_EDSEL_OFF (_PRS_CH_CTRL_EDSEL_OFF << 24) |
#define | PRS_CH_CTRL_EDSEL_POSEDGE (_PRS_CH_CTRL_EDSEL_POSEDGE << 24) |
#define | PRS_CH_CTRL_EDSEL_NEGEDGE (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24) |
#define | PRS_CH_CTRL_EDSEL_BOTHEDGES (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24) |
#define | PRS_CH_CTRL_ASYNC (0x1UL << 28) |
#define | _PRS_CH_CTRL_ASYNC_SHIFT 28 |
#define | _PRS_CH_CTRL_ASYNC_MASK 0x10000000UL |
#define | _PRS_CH_CTRL_ASYNC_DEFAULT 0x00000000UL |
#define | PRS_CH_CTRL_ASYNC_DEFAULT (_PRS_CH_CTRL_ASYNC_DEFAULT << 28) |
#define _PRS_CH_CTRL_ASYNC_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_CH_CTRL
Definition at line 3676 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_ASYNC_MASK 0x10000000UL |
Bit mask for PRS_ASYNC
Definition at line 3675 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_ASYNC_SHIFT 28 |
Shift value for PRS_ASYNC
Definition at line 3674 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_EDSEL_BOTHEDGES 0x00000003UL |
Mode BOTHEDGES for PRS_CH_CTRL
Definition at line 3667 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_EDSEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_CH_CTRL
Definition at line 3663 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_EDSEL_MASK 0x3000000UL |
Bit mask for PRS_EDSEL
Definition at line 3662 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_EDSEL_NEGEDGE 0x00000002UL |
Mode NEGEDGE for PRS_CH_CTRL
Definition at line 3666 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_EDSEL_OFF 0x00000000UL |
Mode OFF for PRS_CH_CTRL
Definition at line 3664 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_EDSEL_POSEDGE 0x00000001UL |
Mode POSEDGE for PRS_CH_CTRL
Definition at line 3665 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_EDSEL_SHIFT 24 |
Shift value for PRS_EDSEL
Definition at line 3661 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_MASK 0x133F0007UL |
Mask for PRS_CH_CTRL
Definition at line 3456 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_RESETVALUE 0x00000000UL |
Default value for PRS_CH_CTRL
Definition at line 3455 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_ACMP0OUT 0x00000000UL |
Mode ACMP0OUT for PRS_CH_CTRL
Definition at line 3460 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_ACMP1OUT 0x00000000UL |
Mode ACMP1OUT for PRS_CH_CTRL
Definition at line 3461 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_ADC0SCAN 0x00000001UL |
Mode ADC0SCAN for PRS_CH_CTRL
Definition at line 3479 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE 0x00000000UL |
Mode ADC0SINGLE for PRS_CH_CTRL
Definition at line 3463 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_BURTCCOMP0 0x00000001UL |
Mode BURTCCOMP0 for PRS_CH_CTRL
Definition at line 3492 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_BURTCOF 0x00000000UL |
Mode BURTCOF for PRS_CH_CTRL
Definition at line 3474 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_DAC0CH0 0x00000000UL |
Mode DAC0CH0 for PRS_CH_CTRL
Definition at line 3462 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_DAC0CH1 0x00000001UL |
Mode DAC0CH1 for PRS_CH_CTRL
Definition at line 3478 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN0 0x00000000UL |
Mode GPIOPIN0 for PRS_CH_CTRL
Definition at line 3471 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN1 0x00000001UL |
Mode GPIOPIN1 for PRS_CH_CTRL
Definition at line 3489 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN10 0x00000002UL |
Mode GPIOPIN10 for PRS_CH_CTRL
Definition at line 3505 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN11 0x00000003UL |
Mode GPIOPIN11 for PRS_CH_CTRL
Definition at line 3514 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN12 0x00000004UL |
Mode GPIOPIN12 for PRS_CH_CTRL
Definition at line 3522 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN13 0x00000005UL |
Mode GPIOPIN13 for PRS_CH_CTRL
Definition at line 3526 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN14 0x00000006UL |
Mode GPIOPIN14 for PRS_CH_CTRL
Definition at line 3530 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN15 0x00000007UL |
Mode GPIOPIN15 for PRS_CH_CTRL
Definition at line 3534 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN2 0x00000002UL |
Mode GPIOPIN2 for PRS_CH_CTRL
Definition at line 3504 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN3 0x00000003UL |
Mode GPIOPIN3 for PRS_CH_CTRL
Definition at line 3513 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN4 0x00000004UL |
Mode GPIOPIN4 for PRS_CH_CTRL
Definition at line 3521 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN5 0x00000005UL |
Mode GPIOPIN5 for PRS_CH_CTRL
Definition at line 3525 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN6 0x00000006UL |
Mode GPIOPIN6 for PRS_CH_CTRL
Definition at line 3529 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN7 0x00000007UL |
Mode GPIOPIN7 for PRS_CH_CTRL
Definition at line 3533 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN8 0x00000000UL |
Mode GPIOPIN8 for PRS_CH_CTRL
Definition at line 3472 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN9 0x00000001UL |
Mode GPIOPIN9 for PRS_CH_CTRL
Definition at line 3490 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC0 0x00000000UL |
Mode LESENSEDEC0 for PRS_CH_CTRL
Definition at line 3477 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC1 0x00000001UL |
Mode LESENSEDEC1 for PRS_CH_CTRL
Definition at line 3495 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC2 0x00000002UL |
Mode LESENSEDEC2 for PRS_CH_CTRL
Definition at line 3508 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 0x00000000UL |
Mode LESENSESCANRES0 for PRS_CH_CTRL
Definition at line 3475 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 0x00000001UL |
Mode LESENSESCANRES1 for PRS_CH_CTRL
Definition at line 3493 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 0x00000002UL |
Mode LESENSESCANRES10 for PRS_CH_CTRL
Definition at line 3507 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 0x00000003UL |
Mode LESENSESCANRES11 for PRS_CH_CTRL
Definition at line 3516 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 0x00000004UL |
Mode LESENSESCANRES12 for PRS_CH_CTRL
Definition at line 3524 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 0x00000005UL |
Mode LESENSESCANRES13 for PRS_CH_CTRL
Definition at line 3528 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 0x00000006UL |
Mode LESENSESCANRES14 for PRS_CH_CTRL
Definition at line 3532 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 0x00000007UL |
Mode LESENSESCANRES15 for PRS_CH_CTRL
Definition at line 3536 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 0x00000002UL |
Mode LESENSESCANRES2 for PRS_CH_CTRL
Definition at line 3506 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 0x00000003UL |
Mode LESENSESCANRES3 for PRS_CH_CTRL
Definition at line 3515 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 0x00000004UL |
Mode LESENSESCANRES4 for PRS_CH_CTRL
Definition at line 3523 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 0x00000005UL |
Mode LESENSESCANRES5 for PRS_CH_CTRL
Definition at line 3527 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 0x00000006UL |
Mode LESENSESCANRES6 for PRS_CH_CTRL
Definition at line 3531 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 0x00000007UL |
Mode LESENSESCANRES7 for PRS_CH_CTRL
Definition at line 3535 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 0x00000000UL |
Mode LESENSESCANRES8 for PRS_CH_CTRL
Definition at line 3476 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 0x00000001UL |
Mode LESENSESCANRES9 for PRS_CH_CTRL
Definition at line 3494 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LETIMER0CH0 0x00000000UL |
Mode LETIMER0CH0 for PRS_CH_CTRL
Definition at line 3473 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_LETIMER0CH1 0x00000001UL |
Mode LETIMER0CH1 for PRS_CH_CTRL
Definition at line 3491 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_MASK 0x7UL |
Bit mask for PRS_SIGSEL
Definition at line 3458 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_RTCCOMP0 0x00000001UL |
Mode RTCCOMP0 for PRS_CH_CTRL
Definition at line 3488 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_RTCCOMP1 0x00000002UL |
Mode RTCCOMP1 for PRS_CH_CTRL
Definition at line 3503 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_RTCOF 0x00000000UL |
Mode RTCOF for PRS_CH_CTRL
Definition at line 3470 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_SHIFT 0 |
Shift value for PRS_SIGSEL
Definition at line 3457 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC0 0x00000002UL |
Mode TIMER0CC0 for PRS_CH_CTRL
Definition at line 3499 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC1 0x00000003UL |
Mode TIMER0CC1 for PRS_CH_CTRL
Definition at line 3509 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC2 0x00000004UL |
Mode TIMER0CC2 for PRS_CH_CTRL
Definition at line 3517 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER0OF 0x00000001UL |
Mode TIMER0OF for PRS_CH_CTRL
Definition at line 3483 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER0UF 0x00000000UL |
Mode TIMER0UF for PRS_CH_CTRL
Definition at line 3465 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC0 0x00000002UL |
Mode TIMER1CC0 for PRS_CH_CTRL
Definition at line 3500 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC1 0x00000003UL |
Mode TIMER1CC1 for PRS_CH_CTRL
Definition at line 3510 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC2 0x00000004UL |
Mode TIMER1CC2 for PRS_CH_CTRL
Definition at line 3518 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER1OF 0x00000001UL |
Mode TIMER1OF for PRS_CH_CTRL
Definition at line 3484 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER1UF 0x00000000UL |
Mode TIMER1UF for PRS_CH_CTRL
Definition at line 3466 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER2CC0 0x00000002UL |
Mode TIMER2CC0 for PRS_CH_CTRL
Definition at line 3501 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER2CC1 0x00000003UL |
Mode TIMER2CC1 for PRS_CH_CTRL
Definition at line 3511 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER2CC2 0x00000004UL |
Mode TIMER2CC2 for PRS_CH_CTRL
Definition at line 3519 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER2OF 0x00000001UL |
Mode TIMER2OF for PRS_CH_CTRL
Definition at line 3485 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER2UF 0x00000000UL |
Mode TIMER2UF for PRS_CH_CTRL
Definition at line 3467 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER3CC0 0x00000002UL |
Mode TIMER3CC0 for PRS_CH_CTRL
Definition at line 3502 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER3CC1 0x00000003UL |
Mode TIMER3CC1 for PRS_CH_CTRL
Definition at line 3512 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER3CC2 0x00000004UL |
Mode TIMER3CC2 for PRS_CH_CTRL
Definition at line 3520 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER3OF 0x00000001UL |
Mode TIMER3OF for PRS_CH_CTRL
Definition at line 3486 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_TIMER3UF 0x00000000UL |
Mode TIMER3UF for PRS_CH_CTRL
Definition at line 3468 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_USART0IRTX 0x00000000UL |
Mode USART0IRTX for PRS_CH_CTRL
Definition at line 3464 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_USART0RXDATAV 0x00000002UL |
Mode USART0RXDATAV for PRS_CH_CTRL
Definition at line 3496 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_USART0TXC 0x00000001UL |
Mode USART0TXC for PRS_CH_CTRL
Definition at line 3480 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV 0x00000002UL |
Mode USART1RXDATAV for PRS_CH_CTRL
Definition at line 3497 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_USART1TXC 0x00000001UL |
Mode USART1TXC for PRS_CH_CTRL
Definition at line 3481 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_USART2RXDATAV 0x00000002UL |
Mode USART2RXDATAV for PRS_CH_CTRL
Definition at line 3498 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_USART2TXC 0x00000001UL |
Mode USART2TXC for PRS_CH_CTRL
Definition at line 3482 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_USBSOF 0x00000000UL |
Mode USBSOF for PRS_CH_CTRL
Definition at line 3469 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_USBSOFSR 0x00000001UL |
Mode USBSOFSR for PRS_CH_CTRL
Definition at line 3487 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SIGSEL_VCMPOUT 0x00000000UL |
Mode VCMPOUT for PRS_CH_CTRL
Definition at line 3459 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL |
Mode ACMP0 for PRS_CH_CTRL
Definition at line 3619 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_ACMP1 0x00000003UL |
Mode ACMP1 for PRS_CH_CTRL
Definition at line 3620 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_ADC0 0x00000008UL |
Mode ADC0 for PRS_CH_CTRL
Definition at line 3622 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_BURTC 0x00000037UL |
Mode BURTC for PRS_CH_CTRL
Definition at line 3635 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_DAC0 0x00000006UL |
Mode DAC0 for PRS_CH_CTRL
Definition at line 3621 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_GPIOH 0x00000031UL |
Mode GPIOH for PRS_CH_CTRL
Definition at line 3633 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_GPIOL 0x00000030UL |
Mode GPIOL for PRS_CH_CTRL
Definition at line 3632 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_LESENSED 0x0000003BUL |
Mode LESENSED for PRS_CH_CTRL
Definition at line 3638 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_LESENSEH 0x0000003AUL |
Mode LESENSEH for PRS_CH_CTRL
Definition at line 3637 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_LESENSEL 0x00000039UL |
Mode LESENSEL for PRS_CH_CTRL
Definition at line 3636 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_LETIMER0 0x00000034UL |
Mode LETIMER0 for PRS_CH_CTRL
Definition at line 3634 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_MASK 0x3F0000UL |
Bit mask for PRS_SOURCESEL
Definition at line 3616 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_NONE 0x00000000UL |
Mode NONE for PRS_CH_CTRL
Definition at line 3617 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_RTC 0x00000028UL |
Mode RTC for PRS_CH_CTRL
Definition at line 3631 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_SHIFT 16 |
Shift value for PRS_SOURCESEL
Definition at line 3615 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_TIMER0 0x0000001CUL |
Mode TIMER0 for PRS_CH_CTRL
Definition at line 3626 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_TIMER1 0x0000001DUL |
Mode TIMER1 for PRS_CH_CTRL
Definition at line 3627 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_TIMER2 0x0000001EUL |
Mode TIMER2 for PRS_CH_CTRL
Definition at line 3628 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_TIMER3 0x0000001FUL |
Mode TIMER3 for PRS_CH_CTRL
Definition at line 3629 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_USART0 0x00000010UL |
Mode USART0 for PRS_CH_CTRL
Definition at line 3623 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_USART1 0x00000011UL |
Mode USART1 for PRS_CH_CTRL
Definition at line 3624 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_USART2 0x00000012UL |
Mode USART2 for PRS_CH_CTRL
Definition at line 3625 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_USB 0x00000024UL |
Mode USB for PRS_CH_CTRL
Definition at line 3630 of file efm32lg940f256.h.
#define _PRS_CH_CTRL_SOURCESEL_VCMP 0x00000001UL |
Mode VCMP for PRS_CH_CTRL
Definition at line 3618 of file efm32lg940f256.h.
#define _PRS_ROUTE_CH0PEN_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_ROUTE
Definition at line 3428 of file efm32lg940f256.h.
#define _PRS_ROUTE_CH0PEN_MASK 0x1UL |
Bit mask for PRS_CH0PEN
Definition at line 3427 of file efm32lg940f256.h.
#define _PRS_ROUTE_CH0PEN_SHIFT 0 |
Shift value for PRS_CH0PEN
Definition at line 3426 of file efm32lg940f256.h.
#define _PRS_ROUTE_CH1PEN_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_ROUTE
Definition at line 3433 of file efm32lg940f256.h.
#define _PRS_ROUTE_CH1PEN_MASK 0x2UL |
Bit mask for PRS_CH1PEN
Definition at line 3432 of file efm32lg940f256.h.
#define _PRS_ROUTE_CH1PEN_SHIFT 1 |
Shift value for PRS_CH1PEN
Definition at line 3431 of file efm32lg940f256.h.
#define _PRS_ROUTE_CH2PEN_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_ROUTE
Definition at line 3438 of file efm32lg940f256.h.
#define _PRS_ROUTE_CH2PEN_MASK 0x4UL |
Bit mask for PRS_CH2PEN
Definition at line 3437 of file efm32lg940f256.h.
#define _PRS_ROUTE_CH2PEN_SHIFT 2 |
Shift value for PRS_CH2PEN
Definition at line 3436 of file efm32lg940f256.h.
#define _PRS_ROUTE_CH3PEN_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_ROUTE
Definition at line 3443 of file efm32lg940f256.h.
#define _PRS_ROUTE_CH3PEN_MASK 0x8UL |
Bit mask for PRS_CH3PEN
Definition at line 3442 of file efm32lg940f256.h.
#define _PRS_ROUTE_CH3PEN_SHIFT 3 |
Shift value for PRS_CH3PEN
Definition at line 3441 of file efm32lg940f256.h.
#define _PRS_ROUTE_LOCATION_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_ROUTE
Definition at line 3448 of file efm32lg940f256.h.
#define _PRS_ROUTE_LOCATION_LOC0 0x00000000UL |
Mode LOC0 for PRS_ROUTE
Definition at line 3447 of file efm32lg940f256.h.
#define _PRS_ROUTE_LOCATION_LOC1 0x00000001UL |
Mode LOC1 for PRS_ROUTE
Definition at line 3449 of file efm32lg940f256.h.
#define _PRS_ROUTE_LOCATION_MASK 0x700UL |
Bit mask for PRS_LOCATION
Definition at line 3446 of file efm32lg940f256.h.
#define _PRS_ROUTE_LOCATION_SHIFT 8 |
Shift value for PRS_LOCATION
Definition at line 3445 of file efm32lg940f256.h.
#define _PRS_ROUTE_MASK 0x0000070FUL |
Mask for PRS_ROUTE
Definition at line 3424 of file efm32lg940f256.h.
#define _PRS_ROUTE_RESETVALUE 0x00000000UL |
Default value for PRS_ROUTE
Definition at line 3423 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH0LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 3364 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH0LEVEL_MASK 0x1UL |
Bit mask for PRS_CH0LEVEL
Definition at line 3363 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH0LEVEL_SHIFT 0 |
Shift value for PRS_CH0LEVEL
Definition at line 3362 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH10LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 3414 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH10LEVEL_MASK 0x400UL |
Bit mask for PRS_CH10LEVEL
Definition at line 3413 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH10LEVEL_SHIFT 10 |
Shift value for PRS_CH10LEVEL
Definition at line 3412 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH11LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 3419 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH11LEVEL_MASK 0x800UL |
Bit mask for PRS_CH11LEVEL
Definition at line 3418 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH11LEVEL_SHIFT 11 |
Shift value for PRS_CH11LEVEL
Definition at line 3417 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH1LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 3369 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH1LEVEL_MASK 0x2UL |
Bit mask for PRS_CH1LEVEL
Definition at line 3368 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH1LEVEL_SHIFT 1 |
Shift value for PRS_CH1LEVEL
Definition at line 3367 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH2LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 3374 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH2LEVEL_MASK 0x4UL |
Bit mask for PRS_CH2LEVEL
Definition at line 3373 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH2LEVEL_SHIFT 2 |
Shift value for PRS_CH2LEVEL
Definition at line 3372 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH3LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 3379 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH3LEVEL_MASK 0x8UL |
Bit mask for PRS_CH3LEVEL
Definition at line 3378 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH3LEVEL_SHIFT 3 |
Shift value for PRS_CH3LEVEL
Definition at line 3377 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH4LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 3384 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH4LEVEL_MASK 0x10UL |
Bit mask for PRS_CH4LEVEL
Definition at line 3383 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH4LEVEL_SHIFT 4 |
Shift value for PRS_CH4LEVEL
Definition at line 3382 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH5LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 3389 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH5LEVEL_MASK 0x20UL |
Bit mask for PRS_CH5LEVEL
Definition at line 3388 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH5LEVEL_SHIFT 5 |
Shift value for PRS_CH5LEVEL
Definition at line 3387 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH6LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 3394 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH6LEVEL_MASK 0x40UL |
Bit mask for PRS_CH6LEVEL
Definition at line 3393 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH6LEVEL_SHIFT 6 |
Shift value for PRS_CH6LEVEL
Definition at line 3392 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH7LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 3399 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH7LEVEL_MASK 0x80UL |
Bit mask for PRS_CH7LEVEL
Definition at line 3398 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH7LEVEL_SHIFT 7 |
Shift value for PRS_CH7LEVEL
Definition at line 3397 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH8LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 3404 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH8LEVEL_MASK 0x100UL |
Bit mask for PRS_CH8LEVEL
Definition at line 3403 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH8LEVEL_SHIFT 8 |
Shift value for PRS_CH8LEVEL
Definition at line 3402 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH9LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 3409 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH9LEVEL_MASK 0x200UL |
Bit mask for PRS_CH9LEVEL
Definition at line 3408 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_CH9LEVEL_SHIFT 9 |
Shift value for PRS_CH9LEVEL
Definition at line 3407 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_MASK 0x00000FFFUL |
Mask for PRS_SWLEVEL
Definition at line 3360 of file efm32lg940f256.h.
#define _PRS_SWLEVEL_RESETVALUE 0x00000000UL |
Default value for PRS_SWLEVEL
Definition at line 3359 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH0PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 3300 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH0PULSE_MASK 0x1UL |
Bit mask for PRS_CH0PULSE
Definition at line 3299 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH0PULSE_SHIFT 0 |
Shift value for PRS_CH0PULSE
Definition at line 3298 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH10PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 3350 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH10PULSE_MASK 0x400UL |
Bit mask for PRS_CH10PULSE
Definition at line 3349 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH10PULSE_SHIFT 10 |
Shift value for PRS_CH10PULSE
Definition at line 3348 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH11PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 3355 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH11PULSE_MASK 0x800UL |
Bit mask for PRS_CH11PULSE
Definition at line 3354 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH11PULSE_SHIFT 11 |
Shift value for PRS_CH11PULSE
Definition at line 3353 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH1PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 3305 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH1PULSE_MASK 0x2UL |
Bit mask for PRS_CH1PULSE
Definition at line 3304 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH1PULSE_SHIFT 1 |
Shift value for PRS_CH1PULSE
Definition at line 3303 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH2PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 3310 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH2PULSE_MASK 0x4UL |
Bit mask for PRS_CH2PULSE
Definition at line 3309 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH2PULSE_SHIFT 2 |
Shift value for PRS_CH2PULSE
Definition at line 3308 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH3PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 3315 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH3PULSE_MASK 0x8UL |
Bit mask for PRS_CH3PULSE
Definition at line 3314 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH3PULSE_SHIFT 3 |
Shift value for PRS_CH3PULSE
Definition at line 3313 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH4PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 3320 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH4PULSE_MASK 0x10UL |
Bit mask for PRS_CH4PULSE
Definition at line 3319 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH4PULSE_SHIFT 4 |
Shift value for PRS_CH4PULSE
Definition at line 3318 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH5PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 3325 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH5PULSE_MASK 0x20UL |
Bit mask for PRS_CH5PULSE
Definition at line 3324 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH5PULSE_SHIFT 5 |
Shift value for PRS_CH5PULSE
Definition at line 3323 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH6PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 3330 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH6PULSE_MASK 0x40UL |
Bit mask for PRS_CH6PULSE
Definition at line 3329 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH6PULSE_SHIFT 6 |
Shift value for PRS_CH6PULSE
Definition at line 3328 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH7PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 3335 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH7PULSE_MASK 0x80UL |
Bit mask for PRS_CH7PULSE
Definition at line 3334 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH7PULSE_SHIFT 7 |
Shift value for PRS_CH7PULSE
Definition at line 3333 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH8PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 3340 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH8PULSE_MASK 0x100UL |
Bit mask for PRS_CH8PULSE
Definition at line 3339 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH8PULSE_SHIFT 8 |
Shift value for PRS_CH8PULSE
Definition at line 3338 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH9PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 3345 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH9PULSE_MASK 0x200UL |
Bit mask for PRS_CH9PULSE
Definition at line 3344 of file efm32lg940f256.h.
#define _PRS_SWPULSE_CH9PULSE_SHIFT 9 |
Shift value for PRS_CH9PULSE
Definition at line 3343 of file efm32lg940f256.h.
#define _PRS_SWPULSE_MASK 0x00000FFFUL |
Mask for PRS_SWPULSE
Definition at line 3296 of file efm32lg940f256.h.
#define _PRS_SWPULSE_RESETVALUE 0x00000000UL |
Default value for PRS_SWPULSE
Definition at line 3295 of file efm32lg940f256.h.
#define PRS_CH_CTRL_ASYNC (0x1UL << 28) |
Asynchronous reflex
Definition at line 3673 of file efm32lg940f256.h.
#define PRS_CH_CTRL_ASYNC_DEFAULT (_PRS_CH_CTRL_ASYNC_DEFAULT << 28) |
Shifted mode DEFAULT for PRS_CH_CTRL
Definition at line 3677 of file efm32lg940f256.h.
#define PRS_CH_CTRL_EDSEL_BOTHEDGES (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24) |
Shifted mode BOTHEDGES for PRS_CH_CTRL
Definition at line 3672 of file efm32lg940f256.h.
#define PRS_CH_CTRL_EDSEL_DEFAULT (_PRS_CH_CTRL_EDSEL_DEFAULT << 24) |
Shifted mode DEFAULT for PRS_CH_CTRL
Definition at line 3668 of file efm32lg940f256.h.
#define PRS_CH_CTRL_EDSEL_NEGEDGE (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24) |
Shifted mode NEGEDGE for PRS_CH_CTRL
Definition at line 3671 of file efm32lg940f256.h.
#define PRS_CH_CTRL_EDSEL_OFF (_PRS_CH_CTRL_EDSEL_OFF << 24) |
Shifted mode OFF for PRS_CH_CTRL
Definition at line 3669 of file efm32lg940f256.h.
#define PRS_CH_CTRL_EDSEL_POSEDGE (_PRS_CH_CTRL_EDSEL_POSEDGE << 24) |
Shifted mode POSEDGE for PRS_CH_CTRL
Definition at line 3670 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_ACMP0OUT (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0) |
Shifted mode ACMP0OUT for PRS_CH_CTRL
Definition at line 3538 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_ACMP1OUT (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0) |
Shifted mode ACMP1OUT for PRS_CH_CTRL
Definition at line 3539 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_ADC0SCAN (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0) |
Shifted mode ADC0SCAN for PRS_CH_CTRL
Definition at line 3557 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_ADC0SINGLE (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0) |
Shifted mode ADC0SINGLE for PRS_CH_CTRL
Definition at line 3541 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_BURTCCOMP0 (_PRS_CH_CTRL_SIGSEL_BURTCCOMP0 << 0) |
Shifted mode BURTCCOMP0 for PRS_CH_CTRL
Definition at line 3570 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_BURTCOF (_PRS_CH_CTRL_SIGSEL_BURTCOF << 0) |
Shifted mode BURTCOF for PRS_CH_CTRL
Definition at line 3552 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_DAC0CH0 (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0) |
Shifted mode DAC0CH0 for PRS_CH_CTRL
Definition at line 3540 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_DAC0CH1 (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0) |
Shifted mode DAC0CH1 for PRS_CH_CTRL
Definition at line 3556 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN0 (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0) |
Shifted mode GPIOPIN0 for PRS_CH_CTRL
Definition at line 3549 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN1 (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0) |
Shifted mode GPIOPIN1 for PRS_CH_CTRL
Definition at line 3567 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN10 (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0) |
Shifted mode GPIOPIN10 for PRS_CH_CTRL
Definition at line 3583 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN11 (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0) |
Shifted mode GPIOPIN11 for PRS_CH_CTRL
Definition at line 3592 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN12 (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0) |
Shifted mode GPIOPIN12 for PRS_CH_CTRL
Definition at line 3600 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN13 (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0) |
Shifted mode GPIOPIN13 for PRS_CH_CTRL
Definition at line 3604 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN14 (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0) |
Shifted mode GPIOPIN14 for PRS_CH_CTRL
Definition at line 3608 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN15 (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0) |
Shifted mode GPIOPIN15 for PRS_CH_CTRL
Definition at line 3612 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN2 (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0) |
Shifted mode GPIOPIN2 for PRS_CH_CTRL
Definition at line 3582 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN3 (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0) |
Shifted mode GPIOPIN3 for PRS_CH_CTRL
Definition at line 3591 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN4 (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0) |
Shifted mode GPIOPIN4 for PRS_CH_CTRL
Definition at line 3599 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN5 (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0) |
Shifted mode GPIOPIN5 for PRS_CH_CTRL
Definition at line 3603 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN6 (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0) |
Shifted mode GPIOPIN6 for PRS_CH_CTRL
Definition at line 3607 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN7 (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0) |
Shifted mode GPIOPIN7 for PRS_CH_CTRL
Definition at line 3611 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN8 (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0) |
Shifted mode GPIOPIN8 for PRS_CH_CTRL
Definition at line 3550 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_GPIOPIN9 (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0) |
Shifted mode GPIOPIN9 for PRS_CH_CTRL
Definition at line 3568 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSEDEC0 (_PRS_CH_CTRL_SIGSEL_LESENSEDEC0 << 0) |
Shifted mode LESENSEDEC0 for PRS_CH_CTRL
Definition at line 3555 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSEDEC1 (_PRS_CH_CTRL_SIGSEL_LESENSEDEC1 << 0) |
Shifted mode LESENSEDEC1 for PRS_CH_CTRL
Definition at line 3573 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSEDEC2 (_PRS_CH_CTRL_SIGSEL_LESENSEDEC2 << 0) |
Shifted mode LESENSEDEC2 for PRS_CH_CTRL
Definition at line 3586 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 << 0) |
Shifted mode LESENSESCANRES0 for PRS_CH_CTRL
Definition at line 3553 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 << 0) |
Shifted mode LESENSESCANRES1 for PRS_CH_CTRL
Definition at line 3571 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 << 0) |
Shifted mode LESENSESCANRES10 for PRS_CH_CTRL
Definition at line 3585 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 << 0) |
Shifted mode LESENSESCANRES11 for PRS_CH_CTRL
Definition at line 3594 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 << 0) |
Shifted mode LESENSESCANRES12 for PRS_CH_CTRL
Definition at line 3602 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 << 0) |
Shifted mode LESENSESCANRES13 for PRS_CH_CTRL
Definition at line 3606 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 << 0) |
Shifted mode LESENSESCANRES14 for PRS_CH_CTRL
Definition at line 3610 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 << 0) |
Shifted mode LESENSESCANRES15 for PRS_CH_CTRL
Definition at line 3614 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 << 0) |
Shifted mode LESENSESCANRES2 for PRS_CH_CTRL
Definition at line 3584 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 << 0) |
Shifted mode LESENSESCANRES3 for PRS_CH_CTRL
Definition at line 3593 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 << 0) |
Shifted mode LESENSESCANRES4 for PRS_CH_CTRL
Definition at line 3601 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 << 0) |
Shifted mode LESENSESCANRES5 for PRS_CH_CTRL
Definition at line 3605 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 << 0) |
Shifted mode LESENSESCANRES6 for PRS_CH_CTRL
Definition at line 3609 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 << 0) |
Shifted mode LESENSESCANRES7 for PRS_CH_CTRL
Definition at line 3613 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 << 0) |
Shifted mode LESENSESCANRES8 for PRS_CH_CTRL
Definition at line 3554 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 << 0) |
Shifted mode LESENSESCANRES9 for PRS_CH_CTRL
Definition at line 3572 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LETIMER0CH0 (_PRS_CH_CTRL_SIGSEL_LETIMER0CH0 << 0) |
Shifted mode LETIMER0CH0 for PRS_CH_CTRL
Definition at line 3551 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_LETIMER0CH1 (_PRS_CH_CTRL_SIGSEL_LETIMER0CH1 << 0) |
Shifted mode LETIMER0CH1 for PRS_CH_CTRL
Definition at line 3569 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_RTCCOMP0 (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0) |
Shifted mode RTCCOMP0 for PRS_CH_CTRL
Definition at line 3566 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_RTCCOMP1 (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0) |
Shifted mode RTCCOMP1 for PRS_CH_CTRL
Definition at line 3581 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_RTCOF (_PRS_CH_CTRL_SIGSEL_RTCOF << 0) |
Shifted mode RTCOF for PRS_CH_CTRL
Definition at line 3548 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER0CC0 (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0) |
Shifted mode TIMER0CC0 for PRS_CH_CTRL
Definition at line 3577 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER0CC1 (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0) |
Shifted mode TIMER0CC1 for PRS_CH_CTRL
Definition at line 3587 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER0CC2 (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0) |
Shifted mode TIMER0CC2 for PRS_CH_CTRL
Definition at line 3595 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER0OF (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0) |
Shifted mode TIMER0OF for PRS_CH_CTRL
Definition at line 3561 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER0UF (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0) |
Shifted mode TIMER0UF for PRS_CH_CTRL
Definition at line 3543 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER1CC0 (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0) |
Shifted mode TIMER1CC0 for PRS_CH_CTRL
Definition at line 3578 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER1CC1 (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0) |
Shifted mode TIMER1CC1 for PRS_CH_CTRL
Definition at line 3588 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER1CC2 (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0) |
Shifted mode TIMER1CC2 for PRS_CH_CTRL
Definition at line 3596 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER1OF (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0) |
Shifted mode TIMER1OF for PRS_CH_CTRL
Definition at line 3562 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER1UF (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0) |
Shifted mode TIMER1UF for PRS_CH_CTRL
Definition at line 3544 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER2CC0 (_PRS_CH_CTRL_SIGSEL_TIMER2CC0 << 0) |
Shifted mode TIMER2CC0 for PRS_CH_CTRL
Definition at line 3579 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER2CC1 (_PRS_CH_CTRL_SIGSEL_TIMER2CC1 << 0) |
Shifted mode TIMER2CC1 for PRS_CH_CTRL
Definition at line 3589 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER2CC2 (_PRS_CH_CTRL_SIGSEL_TIMER2CC2 << 0) |
Shifted mode TIMER2CC2 for PRS_CH_CTRL
Definition at line 3597 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER2OF (_PRS_CH_CTRL_SIGSEL_TIMER2OF << 0) |
Shifted mode TIMER2OF for PRS_CH_CTRL
Definition at line 3563 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER2UF (_PRS_CH_CTRL_SIGSEL_TIMER2UF << 0) |
Shifted mode TIMER2UF for PRS_CH_CTRL
Definition at line 3545 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER3CC0 (_PRS_CH_CTRL_SIGSEL_TIMER3CC0 << 0) |
Shifted mode TIMER3CC0 for PRS_CH_CTRL
Definition at line 3580 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER3CC1 (_PRS_CH_CTRL_SIGSEL_TIMER3CC1 << 0) |
Shifted mode TIMER3CC1 for PRS_CH_CTRL
Definition at line 3590 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER3CC2 (_PRS_CH_CTRL_SIGSEL_TIMER3CC2 << 0) |
Shifted mode TIMER3CC2 for PRS_CH_CTRL
Definition at line 3598 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER3OF (_PRS_CH_CTRL_SIGSEL_TIMER3OF << 0) |
Shifted mode TIMER3OF for PRS_CH_CTRL
Definition at line 3564 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_TIMER3UF (_PRS_CH_CTRL_SIGSEL_TIMER3UF << 0) |
Shifted mode TIMER3UF for PRS_CH_CTRL
Definition at line 3546 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_USART0IRTX (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0) |
Shifted mode USART0IRTX for PRS_CH_CTRL
Definition at line 3542 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_USART0RXDATAV (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0) |
Shifted mode USART0RXDATAV for PRS_CH_CTRL
Definition at line 3574 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_USART0TXC (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0) |
Shifted mode USART0TXC for PRS_CH_CTRL
Definition at line 3558 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_USART1RXDATAV (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0) |
Shifted mode USART1RXDATAV for PRS_CH_CTRL
Definition at line 3575 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_USART1TXC (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0) |
Shifted mode USART1TXC for PRS_CH_CTRL
Definition at line 3559 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_USART2RXDATAV (_PRS_CH_CTRL_SIGSEL_USART2RXDATAV << 0) |
Shifted mode USART2RXDATAV for PRS_CH_CTRL
Definition at line 3576 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_USART2TXC (_PRS_CH_CTRL_SIGSEL_USART2TXC << 0) |
Shifted mode USART2TXC for PRS_CH_CTRL
Definition at line 3560 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_USBSOF (_PRS_CH_CTRL_SIGSEL_USBSOF << 0) |
Shifted mode USBSOF for PRS_CH_CTRL
Definition at line 3547 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_USBSOFSR (_PRS_CH_CTRL_SIGSEL_USBSOFSR << 0) |
Shifted mode USBSOFSR for PRS_CH_CTRL
Definition at line 3565 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SIGSEL_VCMPOUT (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0) |
Shifted mode VCMPOUT for PRS_CH_CTRL
Definition at line 3537 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) |
Shifted mode ACMP0 for PRS_CH_CTRL
Definition at line 3641 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_ACMP1 (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16) |
Shifted mode ACMP1 for PRS_CH_CTRL
Definition at line 3642 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_ADC0 (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16) |
Shifted mode ADC0 for PRS_CH_CTRL
Definition at line 3644 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_BURTC (_PRS_CH_CTRL_SOURCESEL_BURTC << 16) |
Shifted mode BURTC for PRS_CH_CTRL
Definition at line 3657 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_DAC0 (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16) |
Shifted mode DAC0 for PRS_CH_CTRL
Definition at line 3643 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_GPIOH (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16) |
Shifted mode GPIOH for PRS_CH_CTRL
Definition at line 3655 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_GPIOL (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16) |
Shifted mode GPIOL for PRS_CH_CTRL
Definition at line 3654 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_LESENSED (_PRS_CH_CTRL_SOURCESEL_LESENSED << 16) |
Shifted mode LESENSED for PRS_CH_CTRL
Definition at line 3660 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_LESENSEH (_PRS_CH_CTRL_SOURCESEL_LESENSEH << 16) |
Shifted mode LESENSEH for PRS_CH_CTRL
Definition at line 3659 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_LESENSEL (_PRS_CH_CTRL_SOURCESEL_LESENSEL << 16) |
Shifted mode LESENSEL for PRS_CH_CTRL
Definition at line 3658 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_LETIMER0 (_PRS_CH_CTRL_SOURCESEL_LETIMER0 << 16) |
Shifted mode LETIMER0 for PRS_CH_CTRL
Definition at line 3656 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_NONE (_PRS_CH_CTRL_SOURCESEL_NONE << 16) |
Shifted mode NONE for PRS_CH_CTRL
Definition at line 3639 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_RTC (_PRS_CH_CTRL_SOURCESEL_RTC << 16) |
Shifted mode RTC for PRS_CH_CTRL
Definition at line 3653 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_TIMER0 (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16) |
Shifted mode TIMER0 for PRS_CH_CTRL
Definition at line 3648 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_TIMER1 (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16) |
Shifted mode TIMER1 for PRS_CH_CTRL
Definition at line 3649 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_TIMER2 (_PRS_CH_CTRL_SOURCESEL_TIMER2 << 16) |
Shifted mode TIMER2 for PRS_CH_CTRL
Definition at line 3650 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_TIMER3 (_PRS_CH_CTRL_SOURCESEL_TIMER3 << 16) |
Shifted mode TIMER3 for PRS_CH_CTRL
Definition at line 3651 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_USART0 (_PRS_CH_CTRL_SOURCESEL_USART0 << 16) |
Shifted mode USART0 for PRS_CH_CTRL
Definition at line 3645 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_USART1 (_PRS_CH_CTRL_SOURCESEL_USART1 << 16) |
Shifted mode USART1 for PRS_CH_CTRL
Definition at line 3646 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_USART2 (_PRS_CH_CTRL_SOURCESEL_USART2 << 16) |
Shifted mode USART2 for PRS_CH_CTRL
Definition at line 3647 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_USB (_PRS_CH_CTRL_SOURCESEL_USB << 16) |
Shifted mode USB for PRS_CH_CTRL
Definition at line 3652 of file efm32lg940f256.h.
#define PRS_CH_CTRL_SOURCESEL_VCMP (_PRS_CH_CTRL_SOURCESEL_VCMP << 16) |
Shifted mode VCMP for PRS_CH_CTRL
Definition at line 3640 of file efm32lg940f256.h.
#define PRS_ROUTE_CH0PEN (0x1UL << 0) |
CH0 Pin Enable
Definition at line 3425 of file efm32lg940f256.h.
#define PRS_ROUTE_CH0PEN_DEFAULT (_PRS_ROUTE_CH0PEN_DEFAULT << 0) |
Shifted mode DEFAULT for PRS_ROUTE
Definition at line 3429 of file efm32lg940f256.h.
#define PRS_ROUTE_CH1PEN (0x1UL << 1) |
CH1 Pin Enable
Definition at line 3430 of file efm32lg940f256.h.
#define PRS_ROUTE_CH1PEN_DEFAULT (_PRS_ROUTE_CH1PEN_DEFAULT << 1) |
Shifted mode DEFAULT for PRS_ROUTE
Definition at line 3434 of file efm32lg940f256.h.
#define PRS_ROUTE_CH2PEN (0x1UL << 2) |
CH2 Pin Enable
Definition at line 3435 of file efm32lg940f256.h.
#define PRS_ROUTE_CH2PEN_DEFAULT (_PRS_ROUTE_CH2PEN_DEFAULT << 2) |
Shifted mode DEFAULT for PRS_ROUTE
Definition at line 3439 of file efm32lg940f256.h.
#define PRS_ROUTE_CH3PEN (0x1UL << 3) |
CH3 Pin Enable
Definition at line 3440 of file efm32lg940f256.h.
#define PRS_ROUTE_CH3PEN_DEFAULT (_PRS_ROUTE_CH3PEN_DEFAULT << 3) |
Shifted mode DEFAULT for PRS_ROUTE
Definition at line 3444 of file efm32lg940f256.h.
#define PRS_ROUTE_LOCATION_DEFAULT (_PRS_ROUTE_LOCATION_DEFAULT << 8) |
Shifted mode DEFAULT for PRS_ROUTE
Definition at line 3451 of file efm32lg940f256.h.
#define PRS_ROUTE_LOCATION_LOC0 (_PRS_ROUTE_LOCATION_LOC0 << 8) |
Shifted mode LOC0 for PRS_ROUTE
Definition at line 3450 of file efm32lg940f256.h.
#define PRS_ROUTE_LOCATION_LOC1 (_PRS_ROUTE_LOCATION_LOC1 << 8) |
Shifted mode LOC1 for PRS_ROUTE
Definition at line 3452 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH0LEVEL (0x1UL << 0) |
Channel 0 Software Level
Definition at line 3361 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH0LEVEL_DEFAULT (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 3365 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH10LEVEL (0x1UL << 10) |
Channel 10 Software Level
Definition at line 3411 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH10LEVEL_DEFAULT (_PRS_SWLEVEL_CH10LEVEL_DEFAULT << 10) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 3415 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH11LEVEL (0x1UL << 11) |
Channel 11 Software Level
Definition at line 3416 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH11LEVEL_DEFAULT (_PRS_SWLEVEL_CH11LEVEL_DEFAULT << 11) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 3420 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH1LEVEL (0x1UL << 1) |
Channel 1 Software Level
Definition at line 3366 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH1LEVEL_DEFAULT (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 3370 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH2LEVEL (0x1UL << 2) |
Channel 2 Software Level
Definition at line 3371 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH2LEVEL_DEFAULT (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 3375 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH3LEVEL (0x1UL << 3) |
Channel 3 Software Level
Definition at line 3376 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH3LEVEL_DEFAULT (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 3380 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH4LEVEL (0x1UL << 4) |
Channel 4 Software Level
Definition at line 3381 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH4LEVEL_DEFAULT (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 3385 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH5LEVEL (0x1UL << 5) |
Channel 5 Software Level
Definition at line 3386 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH5LEVEL_DEFAULT (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 3390 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH6LEVEL (0x1UL << 6) |
Channel 6 Software Level
Definition at line 3391 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH6LEVEL_DEFAULT (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 3395 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH7LEVEL (0x1UL << 7) |
Channel 7 Software Level
Definition at line 3396 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH7LEVEL_DEFAULT (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 3400 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH8LEVEL (0x1UL << 8) |
Channel 8 Software Level
Definition at line 3401 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH8LEVEL_DEFAULT (_PRS_SWLEVEL_CH8LEVEL_DEFAULT << 8) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 3405 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH9LEVEL (0x1UL << 9) |
Channel 9 Software Level
Definition at line 3406 of file efm32lg940f256.h.
#define PRS_SWLEVEL_CH9LEVEL_DEFAULT (_PRS_SWLEVEL_CH9LEVEL_DEFAULT << 9) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 3410 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH0PULSE (0x1UL << 0) |
Channel 0 Pulse Generation
Definition at line 3297 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH0PULSE_DEFAULT (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 3301 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH10PULSE (0x1UL << 10) |
Channel 10 Pulse Generation
Definition at line 3347 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH10PULSE_DEFAULT (_PRS_SWPULSE_CH10PULSE_DEFAULT << 10) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 3351 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH11PULSE (0x1UL << 11) |
Channel 11 Pulse Generation
Definition at line 3352 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH11PULSE_DEFAULT (_PRS_SWPULSE_CH11PULSE_DEFAULT << 11) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 3356 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH1PULSE (0x1UL << 1) |
Channel 1 Pulse Generation
Definition at line 3302 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH1PULSE_DEFAULT (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 3306 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH2PULSE (0x1UL << 2) |
Channel 2 Pulse Generation
Definition at line 3307 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH2PULSE_DEFAULT (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 3311 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH3PULSE (0x1UL << 3) |
Channel 3 Pulse Generation
Definition at line 3312 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH3PULSE_DEFAULT (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 3316 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH4PULSE (0x1UL << 4) |
Channel 4 Pulse Generation
Definition at line 3317 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH4PULSE_DEFAULT (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 3321 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH5PULSE (0x1UL << 5) |
Channel 5 Pulse Generation
Definition at line 3322 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH5PULSE_DEFAULT (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 3326 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH6PULSE (0x1UL << 6) |
Channel 6 Pulse Generation
Definition at line 3327 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH6PULSE_DEFAULT (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 3331 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH7PULSE (0x1UL << 7) |
Channel 7 Pulse Generation
Definition at line 3332 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH7PULSE_DEFAULT (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 3336 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH8PULSE (0x1UL << 8) |
Channel 8 Pulse Generation
Definition at line 3337 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH8PULSE_DEFAULT (_PRS_SWPULSE_CH8PULSE_DEFAULT << 8) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 3341 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH9PULSE (0x1UL << 9) |
Channel 9 Pulse Generation
Definition at line 3342 of file efm32lg940f256.h.
#define PRS_SWPULSE_CH9PULSE_DEFAULT (_PRS_SWPULSE_CH9PULSE_DEFAULT << 9) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 3346 of file efm32lg940f256.h.