Data Fields | |
__I uint32_t | STATUS |
__O uint32_t | CONFIG |
__IO uint32_t | CTRLBASE |
__I uint32_t | ALTCTRLBASE |
__I uint32_t | CHWAITSTATUS |
__O uint32_t | CHSWREQ |
__IO uint32_t | CHUSEBURSTS |
__O uint32_t | CHUSEBURSTC |
__IO uint32_t | CHREQMASKS |
__O uint32_t | CHREQMASKC |
__IO uint32_t | CHENS |
__O uint32_t | CHENC |
__IO uint32_t | CHALTS |
__O uint32_t | CHALTC |
__IO uint32_t | CHPRIS |
__O uint32_t | CHPRIC |
uint32_t | RESERVED0 [3] |
__IO uint32_t | ERRORC |
uint32_t | RESERVED1 [880] |
__I uint32_t | CHREQSTATUS |
uint32_t | RESERVED2 [1] |
__I uint32_t | CHSREQSTATUS |
uint32_t | RESERVED3 [121] |
__I uint32_t | IF |
__IO uint32_t | IFS |
__IO uint32_t | IFC |
__IO uint32_t | IEN |
__IO uint32_t | CTRL |
__IO uint32_t | RDS |
uint32_t | RESERVED4 [2] |
__IO uint32_t | LOOP0 |
__IO uint32_t | LOOP1 |
uint32_t | RESERVED5 [14] |
__IO uint32_t | RECT0 |
uint32_t | RESERVED6 [39] |
DMA_CH_TypeDef | CH [12] |
Definition at line 265 of file efm32gg230f1024.h.
__I uint32_t DMA_TypeDef::ALTCTRLBASE |
Channel Alternate Control Data Base Pointer Register
Definition at line 270 of file efm32gg230f1024.h.
Channel registers
Definition at line 307 of file efm32gg230f1024.h.
__O uint32_t DMA_TypeDef::CHALTC |
Channel Alternate Clear Register
Definition at line 280 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::CHALTS |
Channel Alternate Set Register
Definition at line 279 of file efm32gg230f1024.h.
__O uint32_t DMA_TypeDef::CHENC |
Channel Enable Clear Register
Definition at line 278 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::CHENS |
Channel Enable Set Register
Definition at line 277 of file efm32gg230f1024.h.
__O uint32_t DMA_TypeDef::CHPRIC |
Channel Priority Clear Register
Definition at line 282 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::CHPRIS |
Channel Priority Set Register
Definition at line 281 of file efm32gg230f1024.h.
__O uint32_t DMA_TypeDef::CHREQMASKC |
Channel Request Mask Clear Register
Definition at line 276 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::CHREQMASKS |
Channel Request Mask Set Register
Definition at line 275 of file efm32gg230f1024.h.
__I uint32_t DMA_TypeDef::CHREQSTATUS |
Channel Request Status
Definition at line 287 of file efm32gg230f1024.h.
__I uint32_t DMA_TypeDef::CHSREQSTATUS |
Channel Single Request Status
Definition at line 289 of file efm32gg230f1024.h.
__O uint32_t DMA_TypeDef::CHSWREQ |
Channel Software Request Register
Definition at line 272 of file efm32gg230f1024.h.
__O uint32_t DMA_TypeDef::CHUSEBURSTC |
Channel Useburst Clear Register
Definition at line 274 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::CHUSEBURSTS |
Channel Useburst Set Register
Definition at line 273 of file efm32gg230f1024.h.
__I uint32_t DMA_TypeDef::CHWAITSTATUS |
Channel Wait on Request Status Register
Definition at line 271 of file efm32gg230f1024.h.
__O uint32_t DMA_TypeDef::CONFIG |
DMA Configuration Register
Definition at line 268 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::CTRL |
DMA Control Register
Definition at line 296 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::CTRLBASE |
Channel Control Data Base Pointer Register
Definition at line 269 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::ERRORC |
Bus Error Clear Register
Definition at line 284 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::IEN |
Interrupt Enable register
Definition at line 295 of file efm32gg230f1024.h.
__I uint32_t DMA_TypeDef::IF |
Interrupt Flag Register
Definition at line 292 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::IFC |
Interrupt Flag Clear Register
Definition at line 294 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::IFS |
Interrupt Flag Set Register
Definition at line 293 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::LOOP0 |
Channel 0 Loop Register
Definition at line 300 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::LOOP1 |
Channel 1 Loop Register
Definition at line 301 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::RDS |
DMA Retain Descriptor State
Definition at line 297 of file efm32gg230f1024.h.
__IO uint32_t DMA_TypeDef::RECT0 |
Channel 0 Rectangle Register
Definition at line 303 of file efm32gg230f1024.h.
uint32_t DMA_TypeDef::RESERVED0 |
Reserved for future use
Definition at line 283 of file efm32gg230f1024.h.
uint32_t DMA_TypeDef::RESERVED1 |
Reserved for future use
Definition at line 286 of file efm32gg230f1024.h.
uint32_t DMA_TypeDef::RESERVED2 |
Reserved for future use
Definition at line 288 of file efm32gg230f1024.h.
uint32_t DMA_TypeDef::RESERVED3 |
Reserved for future use
Definition at line 291 of file efm32gg230f1024.h.
uint32_t DMA_TypeDef::RESERVED4 |
Reserved for future use
Definition at line 299 of file efm32gg230f1024.h.
uint32_t DMA_TypeDef::RESERVED5 |
Reserved for future use
Definition at line 302 of file efm32gg230f1024.h.
uint32_t DMA_TypeDef::RESERVED6 |
Reserved registers
Definition at line 305 of file efm32gg230f1024.h.
__I uint32_t DMA_TypeDef::STATUS |
DMA Status Registers
Definition at line 267 of file efm32gg230f1024.h.