00001
00034 #ifndef __EM_ADC_H
00035 #define __EM_ADC_H
00036
00037 #include "em_device.h"
00038 #if defined(ADC_COUNT) && (ADC_COUNT > 0)
00039
00040 #include <stdbool.h>
00041
00042 #ifdef __cplusplus
00043 extern "C" {
00044 #endif
00045
00046
00051
00056
00057
00058
00059
00061 typedef enum
00062 {
00063 adcAcqTime1 = _ADC_SINGLECTRL_AT_1CYCLE,
00064 adcAcqTime2 = _ADC_SINGLECTRL_AT_2CYCLES,
00065 adcAcqTime4 = _ADC_SINGLECTRL_AT_4CYCLES,
00066 adcAcqTime8 = _ADC_SINGLECTRL_AT_8CYCLES,
00067 adcAcqTime16 = _ADC_SINGLECTRL_AT_16CYCLES,
00068 adcAcqTime32 = _ADC_SINGLECTRL_AT_32CYCLES,
00069 adcAcqTime64 = _ADC_SINGLECTRL_AT_64CYCLES,
00070 adcAcqTime128 = _ADC_SINGLECTRL_AT_128CYCLES,
00071 adcAcqTime256 = _ADC_SINGLECTRL_AT_256CYCLES
00072 } ADC_AcqTime_TypeDef;
00073
00074
00076 typedef enum
00077 {
00079 adcLPFilterBypass = _ADC_CTRL_LPFMODE_BYPASS,
00080
00082 adcLPFilterRC = _ADC_CTRL_LPFMODE_RCFILT,
00083
00085 adcLPFilterDeCap = _ADC_CTRL_LPFMODE_DECAP
00086 } ADC_LPFilter_TypeDef;
00087
00088
00090 typedef enum
00091 {
00093 adcOvsRateSel2 = _ADC_CTRL_OVSRSEL_X2,
00094
00096 adcOvsRateSel4 = _ADC_CTRL_OVSRSEL_X4,
00097
00099 adcOvsRateSel8 = _ADC_CTRL_OVSRSEL_X8,
00100
00102 adcOvsRateSel16 = _ADC_CTRL_OVSRSEL_X16,
00103
00105 adcOvsRateSel32 = _ADC_CTRL_OVSRSEL_X32,
00106
00108 adcOvsRateSel64 = _ADC_CTRL_OVSRSEL_X64,
00109
00111 adcOvsRateSel128 = _ADC_CTRL_OVSRSEL_X128,
00112
00114 adcOvsRateSel256 = _ADC_CTRL_OVSRSEL_X256,
00115
00117 adcOvsRateSel512 = _ADC_CTRL_OVSRSEL_X512,
00118
00120 adcOvsRateSel1024 = _ADC_CTRL_OVSRSEL_X1024,
00121
00123 adcOvsRateSel2048 = _ADC_CTRL_OVSRSEL_X2048,
00124
00126 adcOvsRateSel4096 = _ADC_CTRL_OVSRSEL_X4096
00127 } ADC_OvsRateSel_TypeDef;
00128
00129
00131 typedef enum
00132 {
00133 adcPRSSELCh0 = _ADC_SINGLECTRL_PRSSEL_PRSCH0,
00134 adcPRSSELCh1 = _ADC_SINGLECTRL_PRSSEL_PRSCH1,
00135 adcPRSSELCh2 = _ADC_SINGLECTRL_PRSSEL_PRSCH2,
00136 adcPRSSELCh3 = _ADC_SINGLECTRL_PRSSEL_PRSCH3,
00138 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH7 )
00139 adcPRSSELCh4 = _ADC_SINGLECTRL_PRSSEL_PRSCH4,
00140 adcPRSSELCh5 = _ADC_SINGLECTRL_PRSSEL_PRSCH5,
00141 adcPRSSELCh6 = _ADC_SINGLECTRL_PRSSEL_PRSCH6,
00142 adcPRSSELCh7 = _ADC_SINGLECTRL_PRSSEL_PRSCH7
00143 #endif
00144 } ADC_PRSSEL_TypeDef;
00145
00146
00148 typedef enum
00149 {
00151 adcRef1V25 = _ADC_SINGLECTRL_REF_1V25,
00152
00154 adcRef2V5 = _ADC_SINGLECTRL_REF_2V5,
00155
00157 adcRefVDD = _ADC_SINGLECTRL_REF_VDD,
00158
00160 adcRef5VDIFF = _ADC_SINGLECTRL_REF_5VDIFF,
00161
00163 adcRefExtSingle = _ADC_SINGLECTRL_REF_EXTSINGLE,
00164
00166 adcRef2xExtDiff = _ADC_SINGLECTRL_REF_2XEXTDIFF,
00167
00169 adcRef2xVDD = _ADC_SINGLECTRL_REF_2XVDD
00170 } ADC_Ref_TypeDef;
00171
00172
00174 typedef enum
00175 {
00176 adcRes12Bit = _ADC_SINGLECTRL_RES_12BIT,
00177 adcRes8Bit = _ADC_SINGLECTRL_RES_8BIT,
00178 adcRes6Bit = _ADC_SINGLECTRL_RES_6BIT,
00179 adcResOVS = _ADC_SINGLECTRL_RES_OVS
00180 } ADC_Res_TypeDef;
00181
00182
00184 typedef enum
00185 {
00186
00187 adcSingleInpCh0 = _ADC_SINGLECTRL_INPUTSEL_CH0,
00188 adcSingleInpCh1 = _ADC_SINGLECTRL_INPUTSEL_CH1,
00189 adcSingleInpCh2 = _ADC_SINGLECTRL_INPUTSEL_CH2,
00190 adcSingleInpCh3 = _ADC_SINGLECTRL_INPUTSEL_CH3,
00191 adcSingleInpCh4 = _ADC_SINGLECTRL_INPUTSEL_CH4,
00192 adcSingleInpCh5 = _ADC_SINGLECTRL_INPUTSEL_CH5,
00193 adcSingleInpCh6 = _ADC_SINGLECTRL_INPUTSEL_CH6,
00194 adcSingleInpCh7 = _ADC_SINGLECTRL_INPUTSEL_CH7,
00195 adcSingleInpTemp = _ADC_SINGLECTRL_INPUTSEL_TEMP,
00196 adcSingleInpVDDDiv3 = _ADC_SINGLECTRL_INPUTSEL_VDDDIV3,
00197 adcSingleInpVDD = _ADC_SINGLECTRL_INPUTSEL_VDD,
00198 adcSingleInpVSS = _ADC_SINGLECTRL_INPUTSEL_VSS,
00199 adcSingleInpVrefDiv2 = _ADC_SINGLECTRL_INPUTSEL_VREFDIV2,
00200 adcSingleInpDACOut0 = _ADC_SINGLECTRL_INPUTSEL_DAC0OUT0,
00201 adcSingleInpDACOut1 = _ADC_SINGLECTRL_INPUTSEL_DAC0OUT1,
00202
00203 adcSingleInpATEST = 15,
00205
00206 adcSingleInpCh0Ch1 = _ADC_SINGLECTRL_INPUTSEL_CH0CH1,
00207 adcSingleInpCh2Ch3 = _ADC_SINGLECTRL_INPUTSEL_CH2CH3,
00208 adcSingleInpCh4Ch5 = _ADC_SINGLECTRL_INPUTSEL_CH4CH5,
00209 adcSingleInpCh6Ch7 = _ADC_SINGLECTRL_INPUTSEL_CH6CH7,
00210
00211 adcSingleInpDiff0 = 4
00212 } ADC_SingleInput_TypeDef;
00213
00214
00216 typedef enum
00217 {
00219 adcStartSingle = ADC_CMD_SINGLESTART,
00220
00222 adcStartScan = ADC_CMD_SCANSTART,
00223
00228 adcStartScanAndSingle = ADC_CMD_SCANSTART | ADC_CMD_SINGLESTART
00229 } ADC_Start_TypeDef;
00230
00231
00233 typedef enum
00234 {
00236 adcWarmupNormal = _ADC_CTRL_WARMUPMODE_NORMAL,
00237
00239 adcWarmupFastBG = _ADC_CTRL_WARMUPMODE_FASTBG,
00240
00242 adcWarmupKeepScanRefWarm = _ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM,
00243
00245 adcWarmupKeepADCWarm = _ADC_CTRL_WARMUPMODE_KEEPADCWARM
00246 } ADC_Warmup_TypeDef;
00247
00248
00249
00250
00251
00252
00254 typedef struct
00255 {
00260 ADC_OvsRateSel_TypeDef ovsRateSel;
00261
00263 ADC_LPFilter_TypeDef lpfMode;
00264
00266 ADC_Warmup_TypeDef warmUpMode;
00267
00275 uint8_t timebase;
00276
00278 uint8_t prescale;
00279
00281 bool tailgate;
00282 } ADC_Init_TypeDef;
00283
00285 #define ADC_INIT_DEFAULT \
00286 { adcOvsRateSel2, \
00287 adcLPFilterBypass, \
00288 adcWarmupNormal, \
00289 _ADC_CTRL_TIMEBASE_DEFAULT, \
00290 _ADC_CTRL_PRESC_DEFAULT, \
00291 false \
00292 }
00293
00294
00296 typedef struct
00297 {
00302 ADC_PRSSEL_TypeDef prsSel;
00303
00305 ADC_AcqTime_TypeDef acqTime;
00306
00311 ADC_Ref_TypeDef reference;
00312
00314 ADC_Res_TypeDef resolution;
00315
00322 uint32_t input;
00323
00325 bool diff;
00326
00328 bool prsEnable;
00329
00331 bool leftAdjust;
00332
00334 bool rep;
00335 } ADC_InitScan_TypeDef;
00336
00338 #define ADC_INITSCAN_DEFAULT \
00339 { adcPRSSELCh0, \
00340 adcAcqTime1, \
00341 adcRef1V25, \
00342 adcRes12Bit, \
00343 0, \
00344 false, \
00345 false, \
00346 false, \
00347 false \
00348 }
00349
00350
00352 typedef struct
00353 {
00358 ADC_PRSSEL_TypeDef prsSel;
00359
00361 ADC_AcqTime_TypeDef acqTime;
00362
00367 ADC_Ref_TypeDef reference;
00368
00370 ADC_Res_TypeDef resolution;
00371
00376 ADC_SingleInput_TypeDef input;
00377
00379 bool diff;
00380
00382 bool prsEnable;
00383
00385 bool leftAdjust;
00386
00388 bool rep;
00389 } ADC_InitSingle_TypeDef;
00390
00392 #define ADC_INITSINGLE_DEFAULT \
00393 { adcPRSSELCh0, \
00394 adcAcqTime1, \
00395 adcRef1V25, \
00396 adcRes12Bit, \
00397 adcSingleInpCh0, \
00398 false, \
00399 false, \
00400 false, \
00401 false \
00402 }
00403
00404
00405
00406
00407
00408
00409
00422 __STATIC_INLINE uint32_t ADC_DataSingleGet(ADC_TypeDef *adc)
00423 {
00424 return(adc->SINGLEDATA);
00425 }
00426
00427
00428
00438 __STATIC_INLINE uint32_t ADC_DataScanGet(ADC_TypeDef *adc)
00439 {
00440 return(adc->SCANDATA);
00441 }
00442
00443
00444 void ADC_Init(ADC_TypeDef *adc, const ADC_Init_TypeDef *init);
00445 void ADC_InitScan(ADC_TypeDef *adc, const ADC_InitScan_TypeDef *init);
00446 void ADC_InitSingle(ADC_TypeDef *adc, const ADC_InitSingle_TypeDef *init);
00447
00448
00459 __STATIC_INLINE void ADC_IntClear(ADC_TypeDef *adc, uint32_t flags)
00460 {
00461 adc->IFC = flags;
00462 }
00463
00464
00465
00476 __STATIC_INLINE void ADC_IntDisable(ADC_TypeDef *adc, uint32_t flags)
00477 {
00478 adc->IEN &= ~(flags);
00479 }
00480
00481
00482
00498 __STATIC_INLINE void ADC_IntEnable(ADC_TypeDef *adc, uint32_t flags)
00499 {
00500 adc->IEN |= flags;
00501 }
00502
00503
00504
00518 __STATIC_INLINE uint32_t ADC_IntGet(ADC_TypeDef *adc)
00519 {
00520 return(adc->IF);
00521 }
00522
00523
00524
00535 __STATIC_INLINE void ADC_IntSet(ADC_TypeDef *adc, uint32_t flags)
00536 {
00537 adc->IFS = flags;
00538 }
00539
00540 uint8_t ADC_PrescaleCalc(uint32_t adcFreq, uint32_t hfperFreq);
00541
00542
00543
00553 __STATIC_INLINE void ADC_Start(ADC_TypeDef *adc, ADC_Start_TypeDef cmd)
00554 {
00555 adc->CMD = (uint32_t)cmd;
00556 }
00557
00558 void ADC_Reset(ADC_TypeDef *adc);
00559 uint8_t ADC_TimebaseCalc(uint32_t hfperFreq);
00560
00564 #ifdef __cplusplus
00565 }
00566 #endif
00567
00568 #endif
00569 #endif