em_chip.h

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00001 /***************************************************************************/
00034 #ifndef __EM_CHIP_H
00035 #define __EM_CHIP_H
00036 
00037 #include "em_device.h"
00038 #include "em_system.h"
00039 
00040 #ifdef __cplusplus
00041 extern "C" {
00042 #endif
00043 
00044 /***************************************************************************/
00049 /***************************************************************************/
00055 /**************************************************************************/
00063 __STATIC_INLINE void CHIP_Init(void)
00064 {
00065 #if defined(_EFM32_GECKO_FAMILY)
00066   uint32_t                    rev;
00067   SYSTEM_ChipRevision_TypeDef chipRev;
00068   volatile uint32_t           *reg;
00069 
00070   rev = *(volatile uint32_t *)(0x0FE081FC);
00071   /* Engineering Sample calibration setup */
00072   if ((rev >> 24) == 0)
00073   {
00074     reg   = (volatile uint32_t *)0x400CA00C;
00075     *reg &= ~(0x70UL);
00076     /* DREG */
00077     reg   = (volatile uint32_t *)0x400C6020;
00078     *reg &= ~(0xE0000000UL);
00079     *reg |= ~(7UL << 25);
00080   }
00081   if ((rev >> 24) <= 3)
00082   {
00083     /* DREG */
00084     reg   = (volatile uint32_t *)0x400C6020;
00085     *reg &= ~(0x00001F80UL);
00086     /* Update CMU reset values */
00087     reg  = (volatile uint32_t *)0x400C8040;
00088     *reg = 0;
00089     reg  = (volatile uint32_t *)0x400C8044;
00090     *reg = 0;
00091     reg  = (volatile uint32_t *)0x400C8058;
00092     *reg = 0;
00093     reg  = (volatile uint32_t *)0x400C8060;
00094     *reg = 0;
00095     reg  = (volatile uint32_t *)0x400C8078;
00096     *reg = 0;
00097   }
00098 
00099   SYSTEM_ChipRevisionGet(&chipRev);
00100   if (chipRev.major == 0x01)
00101   {
00102     /* Rev A errata handling for EM2/3. Must enable DMA clock in order for EM2/3 */
00103     /* to work. This will be fixed in later chip revisions, so only do for rev A. */
00104     if (chipRev.minor == 00)
00105     {
00106       reg   = (volatile uint32_t *)0x400C8040;
00107       *reg |= 0x2;
00108     }
00109 
00110     /* Rev A+B errata handling for I2C when using EM2/3. USART0 clock must be enabled */
00111     /* after waking up from EM2/EM3 in order for I2C to work. This will be fixed in */
00112     /* later chip revisions, so only do for rev A+B. */
00113     if (chipRev.minor <= 0x01)
00114     {
00115       reg   = (volatile uint32_t *)0x400C8044;
00116       *reg |= 0x1;
00117     }
00118   }
00119   /* Ensure correct ADC/DAC calibration value */
00120   rev = *(volatile uint32_t *)0x0FE081F0;
00121   if (rev < 0x4C8ABA00)
00122   {
00123     uint32_t cal;
00124 
00125     /* Enable ADC/DAC clocks */
00126     reg   = (volatile uint32_t *)0x400C8044UL;
00127     *reg |= (1 << 14 | 1 << 11);
00128 
00129     /* Retrive calibration values */
00130     cal = ((*(volatile uint32_t *)(0x0FE081B4UL) & 0x00007F00UL) >>
00131            8) << 24;
00132 
00133     cal |= ((*(volatile uint32_t *)(0x0FE081B4UL) & 0x0000007FUL) >>
00134             0) << 16;
00135 
00136     cal |= ((*(volatile uint32_t *)(0x0FE081B4UL) & 0x00007F00UL) >>
00137             8) << 8;
00138 
00139     cal |= ((*(volatile uint32_t *)(0x0FE081B4UL) & 0x0000007FUL) >>
00140             0) << 0;
00141 
00142     /* ADC0->CAL = 1.25 reference */
00143     reg  = (volatile uint32_t *)0x40002034UL;
00144     *reg = cal;
00145 
00146     /* DAC0->CAL = 1.25 reference */
00147     reg  = (volatile uint32_t *)(0x4000402CUL);
00148     cal  = *(volatile uint32_t *)0x0FE081C8UL;
00149     *reg = cal;
00150 
00151     /* Turn off ADC/DAC clocks */
00152     reg   = (volatile uint32_t *)0x400C8044UL;
00153     *reg &= ~(1 << 14 | 1 << 11);
00154   }
00155 #endif
00156 
00157 #if defined(_EFM32_GIANT_FAMILY)
00158   uint32_t                    rev;
00159   SYSTEM_ChipRevision_TypeDef chipRev;
00160 
00161   rev = *(volatile uint32_t *)(0x0FE081FC);
00162   SYSTEM_ChipRevisionGet(&chipRev);
00163 
00164   if (((rev >> 24) > 15) && (chipRev.minor == 3))
00165   {
00166     /* This fixes an issue with the LFXO on high temperatures. */
00167     *(volatile uint32_t*)0x400C80C0 =
00168                       ( *(volatile uint32_t*)0x400C80C0 & ~(1<<6) ) | (1<<4);
00169   }
00170 #endif
00171 }
00172 
00176 #ifdef __cplusplus
00177 }
00178 #endif
00179 
00180 #endif /* __EM_CHIP_H */