em_rmu.c

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00001 /***************************************************************************/
00035 #include "em_rmu.h"
00036 #if defined(RMU_COUNT) && (RMU_COUNT > 0)
00037 
00038 #include "em_emu.h"
00039 #include "em_bitband.h"
00040 
00041 /***************************************************************************/
00046 /***************************************************************************/
00052 /*******************************************************************************
00053  *****************************     DEFINES     *********************************
00054  ******************************************************************************/
00055 
00058 /* Reset cause "don't care" definitions.
00059    1's mark the bits that must be zero, zeros are "don't cares". */
00060 #define RMU_RSTCAUSE_PORST_XMASK         (0x00000000) 
00061 #define RMU_RSTCAUSE_BODUNREGRST_XMASK   (0x00000081) 
00062 #define RMU_RSTCAUSE_BODREGRST_XMASK     (0x00000091) 
00063 #define RMU_RSTCAUSE_EXTRST_XMASK        (0x00000001) 
00064 #define RMU_RSTCAUSE_WDOGRST_XMASK       (0x00000003) 
00065 #define RMU_RSTCAUSE_LOCKUPRST_XMASK     (0x0000EFDF) 
00066 #define RMU_RSTCAUSE_SYSREQRST_XMASK     (0x0000EF9F) 
00067 #define NUM_RSTCAUSES                             (7)
00068 #ifndef _EFM32_GECKO_FAMILY
00069 #define RMU_RSTCAUSE_EM4RST_XMASK        (0x00000719) 
00070 #define RMU_RSTCAUSE_EM4WURST_XMASK      (0x00000619) 
00071 #define RMU_RSTCAUSE_BODAVDD0_XMASK      (0x0000041F) 
00072 #define RMU_RSTCAUSE_BODAVDD1_XMASK      (0x0000021F) 
00073 #undef NUM_RSTCAUSES
00074 #define NUM_RSTCAUSES                            (11)
00075 #endif
00076 #ifdef BU_PRESENT
00077 #define RMU_RSTCAUSE_BUBODVDDDREG_XMASK  (0x00000001) 
00078 #define RMU_RSTCAUSE_BUBODBUVIN_XMASK    (0x00000001) 
00079 #define RMU_RSTCAUSE_BUBODUNREG_XMASK    (0x00000001) 
00080 #define RMU_RSTCAUSE_BUBODREG_XMASK      (0x00000001) 
00081 #define RMU_RSTCAUSE_BUMODERST_XMASK     (0x00000001) 
00082 #undef NUM_RSTCAUSES
00083 #define NUM_RSTCAUSES                            (16)
00084 #endif
00085 
00086 /*******************************************************************************
00087  *******************************   STRUCTS   ***********************************
00088  ******************************************************************************/
00089 
00091 typedef struct
00092 {
00093   uint32_t    resetCauseMask;
00094   uint32_t    dontCareMask;
00095 } RMU_ResetCauseMasks_Typedef;
00096 
00097 
00098 /*******************************************************************************
00099  *******************************   TYPEDEFS   **********************************
00100  ******************************************************************************/
00101 
00103 static const RMU_ResetCauseMasks_Typedef  resetCauseMasks[NUM_RSTCAUSES] =
00104   {
00105     { RMU_RSTCAUSE_PORST,        RMU_RSTCAUSE_PORST_XMASK },
00106     { RMU_RSTCAUSE_BODUNREGRST,  RMU_RSTCAUSE_BODUNREGRST_XMASK },
00107     { RMU_RSTCAUSE_BODREGRST,    RMU_RSTCAUSE_BODREGRST_XMASK },
00108     { RMU_RSTCAUSE_EXTRST,       RMU_RSTCAUSE_EXTRST_XMASK },
00109     { RMU_RSTCAUSE_WDOGRST,      RMU_RSTCAUSE_WDOGRST_XMASK },
00110     { RMU_RSTCAUSE_LOCKUPRST,    RMU_RSTCAUSE_LOCKUPRST_XMASK },
00111     { RMU_RSTCAUSE_SYSREQRST,    RMU_RSTCAUSE_SYSREQRST_XMASK },
00112 #ifndef _EFM32_GECKO_FAMILY
00113     { RMU_RSTCAUSE_EM4RST,       RMU_RSTCAUSE_EM4RST_XMASK },
00114     { RMU_RSTCAUSE_EM4WURST,     RMU_RSTCAUSE_EM4WURST_XMASK },
00115     { RMU_RSTCAUSE_BODAVDD0,     RMU_RSTCAUSE_BODAVDD0_XMASK },
00116     { RMU_RSTCAUSE_BODAVDD1,     RMU_RSTCAUSE_BODAVDD1_XMASK },
00117 #endif
00118 #ifdef BU_PRESENT
00119     { RMU_RSTCAUSE_BUBODVDDDREG, RMU_RSTCAUSE_BUBODVDDDREG_XMASK },
00120     { RMU_RSTCAUSE_BUBODBUVIN,   RMU_RSTCAUSE_BUBODBUVIN_XMASK },
00121     { RMU_RSTCAUSE_BUBODUNREG,   RMU_RSTCAUSE_BUBODUNREG_XMASK },
00122     { RMU_RSTCAUSE_BUBODREG,     RMU_RSTCAUSE_BUBODREG_XMASK },
00123     { RMU_RSTCAUSE_BUMODERST,    RMU_RSTCAUSE_BUMODERST_XMASK },
00124 #endif
00125   };
00126 
00127 
00128 /*******************************************************************************
00129  ********************************     TEST     ********************************
00130  ******************************************************************************/
00131 #ifdef EMLIB_REGRESSION_TEST
00132 /* Test variable that replaces the RSTCAUSE cause register when testing
00133    the RMU_ResetCauseGet function. */
00134 extern uint32_t rstCause;
00135 #endif
00136 
00137 
00140 /*******************************************************************************
00141  **************************   GLOBAL FUNCTIONS   *******************************
00142  ******************************************************************************/
00143 
00144 /***************************************************************************/
00154 void RMU_ResetControl(RMU_Reset_TypeDef reset, bool enable)
00155 {
00156   BITBAND_Peripheral(&(RMU->CTRL), (uint32_t)reset, (uint32_t)enable);
00157 }
00158 
00159 
00160 /***************************************************************************/
00169 void RMU_ResetCauseClear(void)
00170 {
00171   uint32_t locked;
00172 
00173   RMU->CMD = RMU_CMD_RCCLR;
00174 
00175   /* Clear some reset causes not cleared with RMU CMD register */
00176   /* (If EMU registers locked, they must be unlocked first) */
00177   locked = EMU->LOCK & EMU_LOCK_LOCKKEY_LOCKED;
00178   if (locked)
00179   {
00180     EMU_Unlock();
00181   }
00182 
00183   BITBAND_Peripheral(&(EMU->AUXCTRL), 0, 1);
00184   BITBAND_Peripheral(&(EMU->AUXCTRL), 0, 0);
00185 
00186   if (locked)
00187   {
00188     EMU_Lock();
00189   }
00190 }
00191 
00192 
00193 /***************************************************************************/
00222 uint32_t RMU_ResetCauseGet(void)
00223 {
00224 #ifndef EMLIB_REGRESSION_TEST
00225   uint32_t rstCause      = RMU->RSTCAUSE;
00226 #endif
00227   uint32_t validRstCause = 0;
00228   int      i;
00229   
00230   for (i=0; i<NUM_RSTCAUSES; i++)
00231   {
00232     //Checks to see if rstCause matches a RSTCAUSE and is not excluded by the X-mask
00233     if ((rstCause & resetCauseMasks[i].resetCauseMask) &&
00234         !(rstCause & resetCauseMasks[i].dontCareMask))
00235     {
00236       //Adds the reset-cause to list of real reset-causes
00237       validRstCause |= resetCauseMasks[i].resetCauseMask;
00238     }
00239   }
00240   
00241   return validRstCause;
00242 }
00243 
00244 
00247 #endif /* defined(RMU_COUNT) && (RMU_COUNT > 0) */