MSC_TypeDef Struct Reference
[EFM32GG_MSCEFM32LG_MSC]


Data Fields

__IO uint32_t CTRL
__IO uint32_t READCTRL
__IO uint32_t WRITECTRL
__IO uint32_t WRITECMD
__IO uint32_t ADDRB
uint32_t RESERVED0 [1]
__IO uint32_t WDATA
__I uint32_t STATUS
uint32_t RESERVED1 [3]
__I uint32_t IF
__IO uint32_t IFS
__IO uint32_t IFC
__IO uint32_t IEN
__IO uint32_t LOCK
__IO uint32_t CMD
__I uint32_t CACHEHITS
__I uint32_t CACHEMISSES
uint32_t RESERVED2 [1]
__IO uint32_t TIMEBASE
__IO uint32_t MASSLOCK

Detailed Description

Definition at line 37 of file efm32gg_msc.h.


Field Documentation

__IO uint32_t MSC_TypeDef::ADDRB

Page Erase/Write Address Buffer

Definition at line 43 of file efm32gg_msc.h.

__I uint32_t MSC_TypeDef::CACHEHITS

Cache Hits Performance Counter

Definition at line 56 of file efm32gg_msc.h.

__I uint32_t MSC_TypeDef::CACHEMISSES

Cache Misses Performance Counter

Definition at line 57 of file efm32gg_msc.h.

__IO uint32_t MSC_TypeDef::CMD

Command Register

Definition at line 55 of file efm32gg_msc.h.

__IO uint32_t MSC_TypeDef::CTRL

Memory System Control Register

Definition at line 39 of file efm32gg_msc.h.

__IO uint32_t MSC_TypeDef::IEN

Interrupt Enable Register

Definition at line 53 of file efm32gg_msc.h.

__I uint32_t MSC_TypeDef::IF

Interrupt Flag Register

Definition at line 50 of file efm32gg_msc.h.

__IO uint32_t MSC_TypeDef::IFC

Interrupt Flag Clear Register

Definition at line 52 of file efm32gg_msc.h.

__IO uint32_t MSC_TypeDef::IFS

Interrupt Flag Set Register

Definition at line 51 of file efm32gg_msc.h.

__IO uint32_t MSC_TypeDef::LOCK

Configuration Lock Register

Definition at line 54 of file efm32gg_msc.h.

__IO uint32_t MSC_TypeDef::MASSLOCK

Mass Erase Lock Register

Definition at line 60 of file efm32gg_msc.h.

__IO uint32_t MSC_TypeDef::READCTRL

Read Control Register

Definition at line 40 of file efm32gg_msc.h.

uint32_t MSC_TypeDef::RESERVED0

Reserved for future use

Definition at line 45 of file efm32gg_msc.h.

uint32_t MSC_TypeDef::RESERVED1

Reserved for future use

Definition at line 49 of file efm32gg_msc.h.

uint32_t MSC_TypeDef::RESERVED2

Reserved for future use

Definition at line 58 of file efm32gg_msc.h.

__I uint32_t MSC_TypeDef::STATUS

Status Register

Definition at line 47 of file efm32gg_msc.h.

__IO uint32_t MSC_TypeDef::TIMEBASE

Flash Write and Erase Timebase

Definition at line 59 of file efm32gg_msc.h.

__IO uint32_t MSC_TypeDef::WDATA

Write Data Register

Definition at line 46 of file efm32gg_msc.h.

__IO uint32_t MSC_TypeDef::WRITECMD

Write Command Register

Definition at line 42 of file efm32gg_msc.h.

__IO uint32_t MSC_TypeDef::WRITECTRL

Write Control Register

Definition at line 41 of file efm32gg_msc.h.


The documentation for this struct was generated from the following files: