release/EM_CMSIS_3.20.6/Device/SiliconLabs/EFM32GG/Include/efm32gg980f1024.h

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00001 /**************************************************************************/
00034 #ifndef __EFM32GG980F1024_H
00035 #define __EFM32GG980F1024_H
00036 
00037 #ifdef __cplusplus
00038 extern "C" {
00039 #endif
00040 
00041 /**************************************************************************/
00046 /**************************************************************************/
00052 typedef enum IRQn
00053 {
00054 /******  Cortex-M3 Processor Exceptions Numbers *******************************************/
00055   NonMaskableInt_IRQn   = -14,              
00056   HardFault_IRQn        = -13,              
00057   MemoryManagement_IRQn = -12,              
00058   BusFault_IRQn         = -11,              
00059   UsageFault_IRQn       = -10,              
00060   SVCall_IRQn           = -5,               
00061   DebugMonitor_IRQn     = -4,               
00062   PendSV_IRQn           = -2,               
00063   SysTick_IRQn          = -1,               
00065 /******  EFM32G Peripheral Interrupt Numbers **********************************************/
00066   DMA_IRQn              = 0,  
00067   GPIO_EVEN_IRQn        = 1,  
00068   TIMER0_IRQn           = 2,  
00069   USART0_RX_IRQn        = 3,  
00070   USART0_TX_IRQn        = 4,  
00071   USB_IRQn              = 5,  
00072   ACMP0_IRQn            = 6,  
00073   ADC0_IRQn             = 7,  
00074   DAC0_IRQn             = 8,  
00075   I2C0_IRQn             = 9,  
00076   I2C1_IRQn             = 10, 
00077   GPIO_ODD_IRQn         = 11, 
00078   TIMER1_IRQn           = 12, 
00079   TIMER2_IRQn           = 13, 
00080   TIMER3_IRQn           = 14, 
00081   USART1_RX_IRQn        = 15, 
00082   USART1_TX_IRQn        = 16, 
00083   LESENSE_IRQn          = 17, 
00084   USART2_RX_IRQn        = 18, 
00085   USART2_TX_IRQn        = 19, 
00086   UART0_RX_IRQn         = 20, 
00087   UART0_TX_IRQn         = 21, 
00088   UART1_RX_IRQn         = 22, 
00089   UART1_TX_IRQn         = 23, 
00090   LEUART0_IRQn          = 24, 
00091   LEUART1_IRQn          = 25, 
00092   LETIMER0_IRQn         = 26, 
00093   PCNT0_IRQn            = 27, 
00094   PCNT1_IRQn            = 28, 
00095   PCNT2_IRQn            = 29, 
00096   RTC_IRQn              = 30, 
00097   BURTC_IRQn            = 31, 
00098   CMU_IRQn              = 32, 
00099   VCMP_IRQn             = 33, 
00100   LCD_IRQn              = 34, 
00101   MSC_IRQn              = 35, 
00102   AES_IRQn              = 36, 
00103   EBI_IRQn              = 37, 
00104   EMU_IRQn              = 38, 
00105 } IRQn_Type;
00106 
00107 /**************************************************************************/
00112 #define __MPU_PRESENT             1 
00113 #define __NVIC_PRIO_BITS          3 
00114 #define __Vendor_SysTickConfig    0 
00118 /**************************************************************************/
00124 #define _EFM32_GIANT_FAMILY    1 
00125 #define _EFM_DEVICE              
00127 /* If part number is not defined as compiler option, define it */
00128 #if !defined(EFM32GG980F1024)
00129 #define EFM32GG980F1024    1 
00130 #endif
00131 
00133 #define PART_NUMBER          "EFM32GG980F1024" 
00136 #define FLASH_MEM_BASE       ((uint32_t) 0x0UL)        
00137 #define FLASH_MEM_SIZE       ((uint32_t) 0x10000000UL) 
00138 #define FLASH_MEM_END        ((uint32_t) 0xFFFFFFFUL)  
00139 #define FLASH_MEM_BITS       ((uint32_t) 0x28UL)       
00140 #define AES_MEM_BASE         ((uint32_t) 0x400E0000UL) 
00141 #define AES_MEM_SIZE         ((uint32_t) 0x400UL)      
00142 #define AES_MEM_END          ((uint32_t) 0x400E03FFUL) 
00143 #define AES_MEM_BITS         ((uint32_t) 0x10UL)       
00144 #define USBC_MEM_BASE        ((uint32_t) 0x40100000UL) 
00145 #define USBC_MEM_SIZE        ((uint32_t) 0x40000UL)    
00146 #define USBC_MEM_END         ((uint32_t) 0x4013FFFFUL) 
00147 #define USBC_MEM_BITS        ((uint32_t) 0x18UL)       
00148 #define EBI_CODE_MEM_BASE    ((uint32_t) 0x12000000UL) 
00149 #define EBI_CODE_MEM_SIZE    ((uint32_t) 0xE000000UL)  
00150 #define EBI_CODE_MEM_END     ((uint32_t) 0x1FFFFFFFUL) 
00151 #define EBI_CODE_MEM_BITS    ((uint32_t) 0x28UL)       
00152 #define PER_MEM_BASE         ((uint32_t) 0x40000000UL) 
00153 #define PER_MEM_SIZE         ((uint32_t) 0xE0000UL)    
00154 #define PER_MEM_END          ((uint32_t) 0x400DFFFFUL) 
00155 #define PER_MEM_BITS         ((uint32_t) 0x20UL)       
00156 #define RAM_MEM_BASE         ((uint32_t) 0x20000000UL) 
00157 #define RAM_MEM_SIZE         ((uint32_t) 0x40000UL)    
00158 #define RAM_MEM_END          ((uint32_t) 0x2003FFFFUL) 
00159 #define RAM_MEM_BITS         ((uint32_t) 0x18UL)       
00160 #define RAM_CODE_MEM_BASE    ((uint32_t) 0x10000000UL) 
00161 #define RAM_CODE_MEM_SIZE    ((uint32_t) 0x20000UL)    
00162 #define RAM_CODE_MEM_END     ((uint32_t) 0x1001FFFFUL) 
00163 #define RAM_CODE_MEM_BITS    ((uint32_t) 0x17UL)       
00164 #define EBI_MEM_BASE         ((uint32_t) 0x80000000UL) 
00165 #define EBI_MEM_SIZE         ((uint32_t) 0x40000000UL) 
00166 #define EBI_MEM_END          ((uint32_t) 0xBFFFFFFFUL) 
00167 #define EBI_MEM_BITS         ((uint32_t) 0x30UL)       
00170 #define BITBAND_PER_BASE     ((uint32_t) 0x42000000UL) 
00171 #define BITBAND_RAM_BASE     ((uint32_t) 0x22000000UL) 
00174 #define FLASH_BASE           (0x00000000UL) 
00175 #define FLASH_SIZE           (0x00100000UL) 
00176 #define FLASH_PAGE_SIZE      4096           
00177 #define SRAM_BASE            (0x20000000UL) 
00178 #define SRAM_SIZE            (0x00020000UL) 
00179 #define __CM3_REV            0x201          
00180 #define PRS_CHAN_COUNT       12             
00181 #define DMA_CHAN_COUNT       12             
00184 #define AFCHAN_MAX           163
00185 #define AFCHANLOC_MAX        7
00186 
00187 #define AFACHAN_MAX          53
00188 
00189 /* Part number capabilities */
00190 
00191 #define LETIMER_PRESENT       
00192 #define LETIMER_COUNT       1 
00193 #define USART_PRESENT         
00194 #define USART_COUNT         3 
00195 #define UART_PRESENT          
00196 #define UART_COUNT          2 
00197 #define TIMER_PRESENT         
00198 #define TIMER_COUNT         4 
00199 #define ACMP_PRESENT          
00200 #define ACMP_COUNT          2 
00201 #define I2C_PRESENT           
00202 #define I2C_COUNT           2 
00203 #define LEUART_PRESENT        
00204 #define LEUART_COUNT        2 
00205 #define PCNT_PRESENT          
00206 #define PCNT_COUNT          3 
00207 #define ADC_PRESENT           
00208 #define ADC_COUNT           1 
00209 #define DAC_PRESENT           
00210 #define DAC_COUNT           1 
00211 #define DMA_PRESENT
00212 #define DMA_COUNT           1
00213 #define AES_PRESENT
00214 #define AES_COUNT           1
00215 #define USBC_PRESENT
00216 #define USBC_COUNT          1
00217 #define USB_PRESENT
00218 #define USB_COUNT           1
00219 #define LE_PRESENT
00220 #define LE_COUNT            1
00221 #define MSC_PRESENT
00222 #define MSC_COUNT           1
00223 #define EMU_PRESENT
00224 #define EMU_COUNT           1
00225 #define RMU_PRESENT
00226 #define RMU_COUNT           1
00227 #define CMU_PRESENT
00228 #define CMU_COUNT           1
00229 #define LESENSE_PRESENT
00230 #define LESENSE_COUNT       1
00231 #define RTC_PRESENT
00232 #define RTC_COUNT           1
00233 #define EBI_PRESENT
00234 #define EBI_COUNT           1
00235 #define GPIO_PRESENT
00236 #define GPIO_COUNT          1
00237 #define VCMP_PRESENT
00238 #define VCMP_COUNT          1
00239 #define PRS_PRESENT
00240 #define PRS_COUNT           1
00241 #define OPAMP_PRESENT
00242 #define OPAMP_COUNT         1
00243 #define BU_PRESENT
00244 #define BU_COUNT            1
00245 #define LCD_PRESENT
00246 #define LCD_COUNT           1
00247 #define BURTC_PRESENT
00248 #define BURTC_COUNT         1
00249 #define HFXTAL_PRESENT
00250 #define HFXTAL_COUNT        1
00251 #define LFXTAL_PRESENT
00252 #define LFXTAL_COUNT        1
00253 #define WDOG_PRESENT
00254 #define WDOG_COUNT          1
00255 #define DBG_PRESENT
00256 #define DBG_COUNT           1
00257 #define ETM_PRESENT
00258 #define ETM_COUNT           1
00259 #define BOOTLOADER_PRESENT
00260 #define BOOTLOADER_COUNT    1
00261 #define ANALOG_PRESENT
00262 #define ANALOG_COUNT        1
00263 
00264 #include "core_cm3.h"       /* Cortex-M3 processor and core peripherals */
00265 #include "system_efm32gg.h" /* System Header */
00266 
00269 /**************************************************************************/
00275 #include "efm32gg_dma_ch.h"
00276 #include "efm32gg_dma.h"
00277 #include "efm32gg_aes.h"
00278 #include "efm32gg_usb_hc.h"
00279 #include "efm32gg_usb_diep.h"
00280 #include "efm32gg_usb_doep.h"
00281 #include "efm32gg_usb.h"
00282 #include "efm32gg_msc.h"
00283 #include "efm32gg_emu.h"
00284 #include "efm32gg_rmu.h"
00285 #include "efm32gg_cmu.h"
00286 #include "efm32gg_lesense_st.h"
00287 #include "efm32gg_lesense_buf.h"
00288 #include "efm32gg_lesense_ch.h"
00289 #include "efm32gg_lesense.h"
00290 #include "efm32gg_rtc.h"
00291 #include "efm32gg_letimer.h"
00292 #include "efm32gg_ebi.h"
00293 #include "efm32gg_usart.h"
00294 #include "efm32gg_timer_cc.h"
00295 #include "efm32gg_timer.h"
00296 #include "efm32gg_acmp.h"
00297 #include "efm32gg_i2c.h"
00298 #include "efm32gg_gpio_p.h"
00299 #include "efm32gg_gpio.h"
00300 #include "efm32gg_vcmp.h"
00301 #include "efm32gg_prs_ch.h"
00302 #include "efm32gg_prs.h"
00303 #include "efm32gg_leuart.h"
00304 #include "efm32gg_pcnt.h"
00305 #include "efm32gg_adc.h"
00306 #include "efm32gg_dac.h"
00307 #include "efm32gg_lcd.h"
00308 #include "efm32gg_burtc_ret.h"
00309 #include "efm32gg_burtc.h"
00310 #include "efm32gg_wdog.h"
00311 #include "efm32gg_etm.h"
00312 #include "efm32gg_dma_descriptor.h"
00313 #include "efm32gg_devinfo.h"
00314 #include "efm32gg_romtable.h"
00315 #include "efm32gg_calibrate.h"
00316 
00319 /**************************************************************************/
00324 #define DMA_BASE          (0x400C2000UL) 
00325 #define AES_BASE          (0x400E0000UL) 
00326 #define USB_BASE          (0x400C4000UL) 
00327 #define MSC_BASE          (0x400C0000UL) 
00328 #define EMU_BASE          (0x400C6000UL) 
00329 #define RMU_BASE          (0x400CA000UL) 
00330 #define CMU_BASE          (0x400C8000UL) 
00331 #define LESENSE_BASE      (0x4008C000UL) 
00332 #define RTC_BASE          (0x40080000UL) 
00333 #define LETIMER0_BASE     (0x40082000UL) 
00334 #define EBI_BASE          (0x40008000UL) 
00335 #define USART0_BASE       (0x4000C000UL) 
00336 #define USART1_BASE       (0x4000C400UL) 
00337 #define USART2_BASE       (0x4000C800UL) 
00338 #define UART0_BASE        (0x4000E000UL) 
00339 #define UART1_BASE        (0x4000E400UL) 
00340 #define TIMER0_BASE       (0x40010000UL) 
00341 #define TIMER1_BASE       (0x40010400UL) 
00342 #define TIMER2_BASE       (0x40010800UL) 
00343 #define TIMER3_BASE       (0x40010C00UL) 
00344 #define ACMP0_BASE        (0x40001000UL) 
00345 #define ACMP1_BASE        (0x40001400UL) 
00346 #define I2C0_BASE         (0x4000A000UL) 
00347 #define I2C1_BASE         (0x4000A400UL) 
00348 #define GPIO_BASE         (0x40006000UL) 
00349 #define VCMP_BASE         (0x40000000UL) 
00350 #define PRS_BASE          (0x400CC000UL) 
00351 #define LEUART0_BASE      (0x40084000UL) 
00352 #define LEUART1_BASE      (0x40084400UL) 
00353 #define PCNT0_BASE        (0x40086000UL) 
00354 #define PCNT1_BASE        (0x40086400UL) 
00355 #define PCNT2_BASE        (0x40086800UL) 
00356 #define ADC0_BASE         (0x40002000UL) 
00357 #define DAC0_BASE         (0x40004000UL) 
00358 #define LCD_BASE          (0x4008A000UL) 
00359 #define BURTC_BASE        (0x40081000UL) 
00360 #define WDOG_BASE         (0x40088000UL) 
00361 #define ETM_BASE          (0xE0041000UL) 
00362 #define CALIBRATE_BASE    (0x0FE08000UL) 
00363 #define DEVINFO_BASE      (0x0FE081B0UL) 
00364 #define ROMTABLE_BASE     (0xE00FFFD0UL) 
00365 #define LOCKBITS_BASE     (0x0FE04000UL) 
00366 #define USERDATA_BASE     (0x0FE00000UL) 
00370 /**************************************************************************/
00375 #define DMA          ((DMA_TypeDef *) DMA_BASE)             
00376 #define AES          ((AES_TypeDef *) AES_BASE)             
00377 #define USB          ((USB_TypeDef *) USB_BASE)             
00378 #define MSC          ((MSC_TypeDef *) MSC_BASE)             
00379 #define EMU          ((EMU_TypeDef *) EMU_BASE)             
00380 #define RMU          ((RMU_TypeDef *) RMU_BASE)             
00381 #define CMU          ((CMU_TypeDef *) CMU_BASE)             
00382 #define LESENSE      ((LESENSE_TypeDef *) LESENSE_BASE)     
00383 #define RTC          ((RTC_TypeDef *) RTC_BASE)             
00384 #define LETIMER0     ((LETIMER_TypeDef *) LETIMER0_BASE)    
00385 #define EBI          ((EBI_TypeDef *) EBI_BASE)             
00386 #define USART0       ((USART_TypeDef *) USART0_BASE)        
00387 #define USART1       ((USART_TypeDef *) USART1_BASE)        
00388 #define USART2       ((USART_TypeDef *) USART2_BASE)        
00389 #define UART0        ((USART_TypeDef *) UART0_BASE)         
00390 #define UART1        ((USART_TypeDef *) UART1_BASE)         
00391 #define TIMER0       ((TIMER_TypeDef *) TIMER0_BASE)        
00392 #define TIMER1       ((TIMER_TypeDef *) TIMER1_BASE)        
00393 #define TIMER2       ((TIMER_TypeDef *) TIMER2_BASE)        
00394 #define TIMER3       ((TIMER_TypeDef *) TIMER3_BASE)        
00395 #define ACMP0        ((ACMP_TypeDef *) ACMP0_BASE)          
00396 #define ACMP1        ((ACMP_TypeDef *) ACMP1_BASE)          
00397 #define I2C0         ((I2C_TypeDef *) I2C0_BASE)            
00398 #define I2C1         ((I2C_TypeDef *) I2C1_BASE)            
00399 #define GPIO         ((GPIO_TypeDef *) GPIO_BASE)           
00400 #define VCMP         ((VCMP_TypeDef *) VCMP_BASE)           
00401 #define PRS          ((PRS_TypeDef *) PRS_BASE)             
00402 #define LEUART0      ((LEUART_TypeDef *) LEUART0_BASE)      
00403 #define LEUART1      ((LEUART_TypeDef *) LEUART1_BASE)      
00404 #define PCNT0        ((PCNT_TypeDef *) PCNT0_BASE)          
00405 #define PCNT1        ((PCNT_TypeDef *) PCNT1_BASE)          
00406 #define PCNT2        ((PCNT_TypeDef *) PCNT2_BASE)          
00407 #define ADC0         ((ADC_TypeDef *) ADC0_BASE)            
00408 #define DAC0         ((DAC_TypeDef *) DAC0_BASE)            
00409 #define LCD          ((LCD_TypeDef *) LCD_BASE)             
00410 #define BURTC        ((BURTC_TypeDef *) BURTC_BASE)         
00411 #define WDOG         ((WDOG_TypeDef *) WDOG_BASE)           
00412 #define ETM          ((ETM_TypeDef *) ETM_BASE)             
00413 #define CALIBRATE    ((CALIBRATE_TypeDef *) CALIBRATE_BASE) 
00414 #define DEVINFO      ((DEVINFO_TypeDef *) DEVINFO_BASE)     
00415 #define ROMTABLE     ((ROMTABLE_TypeDef *) ROMTABLE_BASE)   
00419 /**************************************************************************/
00424 #include "efm32gg_prs_signals.h"
00425 #include "efm32gg_dmareq.h"
00426 #include "efm32gg_dmactrl.h"
00427 #include "efm32gg_uart.h"
00428 
00429 /**************************************************************************/
00433 #define MSC_UNLOCK_CODE      0x1B71 
00434 #define EMU_UNLOCK_CODE      0xADE8 
00435 #define CMU_UNLOCK_CODE      0x580E 
00436 #define TIMER_UNLOCK_CODE    0xCE80 
00437 #define GPIO_UNLOCK_CODE     0xA534 
00438 #define BURTC_UNLOCK_CODE    0xAEE8 
00444 /**************************************************************************/
00449 #include "efm32gg_af_ports.h"
00450 #include "efm32gg_af_pins.h"
00451 
00454 /**************************************************************************/
00467 #define SET_BIT_FIELD(REG, MASK, VALUE, OFFSET) \
00468   REG = ((REG) &~(MASK)) | (((VALUE) << (OFFSET)) & (MASK));
00469 
00474 #ifdef __cplusplus
00475 }
00476 #endif
00477 #endif /* __EFM32GG980F1024_H */