LESENSE_TypeDef Struct Reference
[EFM32GG_LESENSEEFM32LG_LESENSE]


Data Fields

__IO uint32_t CTRL
__IO uint32_t TIMCTRL
__IO uint32_t PERCTRL
__IO uint32_t DECCTRL
__IO uint32_t BIASCTRL
__IO uint32_t CMD
__IO uint32_t CHEN
__I uint32_t SCANRES
__I uint32_t STATUS
__I uint32_t PTR
__I uint32_t BUFDATA
__I uint32_t CURCH
__IO uint32_t DECSTATE
__IO uint32_t SENSORSTATE
__IO uint32_t IDLECONF
__IO uint32_t ALTEXCONF
__I uint32_t IF
__IO uint32_t IFC
__IO uint32_t IFS
__IO uint32_t IEN
__I uint32_t SYNCBUSY
__IO uint32_t ROUTE
__IO uint32_t POWERDOWN
uint32_t RESERVED0 [105]
LESENSE_ST_TypeDef ST [16]
LESENSE_BUF_TypeDef BUF [16]
LESENSE_CH_TypeDef CH [16]

Detailed Description

Definition at line 37 of file efm32gg_lesense.h.


Field Documentation

__IO uint32_t LESENSE_TypeDef::ALTEXCONF

Alternative excite pin configuration

Definition at line 54 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::BIASCTRL

Bias Control Register

Definition at line 43 of file efm32gg_lesense.h.

LESENSE_BUF_TypeDef LESENSE_TypeDef::BUF

Scanresult

Definition at line 66 of file efm32gg_lesense.h.

__I uint32_t LESENSE_TypeDef::BUFDATA

Result buffer data register

Definition at line 49 of file efm32gg_lesense.h.

LESENSE_CH_TypeDef LESENSE_TypeDef::CH

Scanconfig

Definition at line 67 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::CHEN

Channel enable Register

Definition at line 45 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::CMD

Command Register

Definition at line 44 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::CTRL

Control Register

Definition at line 39 of file efm32gg_lesense.h.

__I uint32_t LESENSE_TypeDef::CURCH

Current channel index

Definition at line 50 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::DECCTRL

Decoder control Register

Definition at line 42 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::DECSTATE

Current decoder state

Definition at line 51 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::IDLECONF

GPIO Idle phase configuration

Definition at line 53 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::IEN

Interrupt Enable Register

Definition at line 58 of file efm32gg_lesense.h.

__I uint32_t LESENSE_TypeDef::IF

Interrupt Flag Register

Definition at line 55 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::IFC

Interrupt Flag Clear Register

Definition at line 56 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::IFS

Interrupt Flag Set Register

Definition at line 57 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::PERCTRL

Peripheral Control Register

Definition at line 41 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::POWERDOWN

LESENSE RAM power-down register

Definition at line 61 of file efm32gg_lesense.h.

__I uint32_t LESENSE_TypeDef::PTR

Result buffer pointers

Definition at line 48 of file efm32gg_lesense.h.

uint32_t LESENSE_TypeDef::RESERVED0

Reserved registers

Definition at line 63 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::ROUTE

I/O Routing Register

Definition at line 60 of file efm32gg_lesense.h.

__I uint32_t LESENSE_TypeDef::SCANRES

Scan result register

Definition at line 46 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::SENSORSTATE

Decoder input register

Definition at line 52 of file efm32gg_lesense.h.

LESENSE_ST_TypeDef LESENSE_TypeDef::ST

Decoding states

Definition at line 65 of file efm32gg_lesense.h.

__I uint32_t LESENSE_TypeDef::STATUS

Status Register

Definition at line 47 of file efm32gg_lesense.h.

__I uint32_t LESENSE_TypeDef::SYNCBUSY

Synchronization Busy Register

Definition at line 59 of file efm32gg_lesense.h.

__IO uint32_t LESENSE_TypeDef::TIMCTRL

Timing Control Register

Definition at line 40 of file efm32gg_lesense.h.


The documentation for this struct was generated from the following files: