EFM32LG895F256_PRS Bit Fields
[EFM32LG895F256 Bit Fields]


Defines

#define _PRS_SWPULSE_RESETVALUE   0x00000000UL
#define _PRS_SWPULSE_MASK   0x00000FFFUL
#define PRS_SWPULSE_CH0PULSE   (0x1UL << 0)
#define _PRS_SWPULSE_CH0PULSE_SHIFT   0
#define _PRS_SWPULSE_CH0PULSE_MASK   0x1UL
#define _PRS_SWPULSE_CH0PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH0PULSE_DEFAULT   (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0)
#define PRS_SWPULSE_CH1PULSE   (0x1UL << 1)
#define _PRS_SWPULSE_CH1PULSE_SHIFT   1
#define _PRS_SWPULSE_CH1PULSE_MASK   0x2UL
#define _PRS_SWPULSE_CH1PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH1PULSE_DEFAULT   (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1)
#define PRS_SWPULSE_CH2PULSE   (0x1UL << 2)
#define _PRS_SWPULSE_CH2PULSE_SHIFT   2
#define _PRS_SWPULSE_CH2PULSE_MASK   0x4UL
#define _PRS_SWPULSE_CH2PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH2PULSE_DEFAULT   (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2)
#define PRS_SWPULSE_CH3PULSE   (0x1UL << 3)
#define _PRS_SWPULSE_CH3PULSE_SHIFT   3
#define _PRS_SWPULSE_CH3PULSE_MASK   0x8UL
#define _PRS_SWPULSE_CH3PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH3PULSE_DEFAULT   (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3)
#define PRS_SWPULSE_CH4PULSE   (0x1UL << 4)
#define _PRS_SWPULSE_CH4PULSE_SHIFT   4
#define _PRS_SWPULSE_CH4PULSE_MASK   0x10UL
#define _PRS_SWPULSE_CH4PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH4PULSE_DEFAULT   (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4)
#define PRS_SWPULSE_CH5PULSE   (0x1UL << 5)
#define _PRS_SWPULSE_CH5PULSE_SHIFT   5
#define _PRS_SWPULSE_CH5PULSE_MASK   0x20UL
#define _PRS_SWPULSE_CH5PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH5PULSE_DEFAULT   (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5)
#define PRS_SWPULSE_CH6PULSE   (0x1UL << 6)
#define _PRS_SWPULSE_CH6PULSE_SHIFT   6
#define _PRS_SWPULSE_CH6PULSE_MASK   0x40UL
#define _PRS_SWPULSE_CH6PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH6PULSE_DEFAULT   (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6)
#define PRS_SWPULSE_CH7PULSE   (0x1UL << 7)
#define _PRS_SWPULSE_CH7PULSE_SHIFT   7
#define _PRS_SWPULSE_CH7PULSE_MASK   0x80UL
#define _PRS_SWPULSE_CH7PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH7PULSE_DEFAULT   (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7)
#define PRS_SWPULSE_CH8PULSE   (0x1UL << 8)
#define _PRS_SWPULSE_CH8PULSE_SHIFT   8
#define _PRS_SWPULSE_CH8PULSE_MASK   0x100UL
#define _PRS_SWPULSE_CH8PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH8PULSE_DEFAULT   (_PRS_SWPULSE_CH8PULSE_DEFAULT << 8)
#define PRS_SWPULSE_CH9PULSE   (0x1UL << 9)
#define _PRS_SWPULSE_CH9PULSE_SHIFT   9
#define _PRS_SWPULSE_CH9PULSE_MASK   0x200UL
#define _PRS_SWPULSE_CH9PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH9PULSE_DEFAULT   (_PRS_SWPULSE_CH9PULSE_DEFAULT << 9)
#define PRS_SWPULSE_CH10PULSE   (0x1UL << 10)
#define _PRS_SWPULSE_CH10PULSE_SHIFT   10
#define _PRS_SWPULSE_CH10PULSE_MASK   0x400UL
#define _PRS_SWPULSE_CH10PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH10PULSE_DEFAULT   (_PRS_SWPULSE_CH10PULSE_DEFAULT << 10)
#define PRS_SWPULSE_CH11PULSE   (0x1UL << 11)
#define _PRS_SWPULSE_CH11PULSE_SHIFT   11
#define _PRS_SWPULSE_CH11PULSE_MASK   0x800UL
#define _PRS_SWPULSE_CH11PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH11PULSE_DEFAULT   (_PRS_SWPULSE_CH11PULSE_DEFAULT << 11)
#define _PRS_SWLEVEL_RESETVALUE   0x00000000UL
#define _PRS_SWLEVEL_MASK   0x00000FFFUL
#define PRS_SWLEVEL_CH0LEVEL   (0x1UL << 0)
#define _PRS_SWLEVEL_CH0LEVEL_SHIFT   0
#define _PRS_SWLEVEL_CH0LEVEL_MASK   0x1UL
#define _PRS_SWLEVEL_CH0LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH0LEVEL_DEFAULT   (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0)
#define PRS_SWLEVEL_CH1LEVEL   (0x1UL << 1)
#define _PRS_SWLEVEL_CH1LEVEL_SHIFT   1
#define _PRS_SWLEVEL_CH1LEVEL_MASK   0x2UL
#define _PRS_SWLEVEL_CH1LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH1LEVEL_DEFAULT   (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1)
#define PRS_SWLEVEL_CH2LEVEL   (0x1UL << 2)
#define _PRS_SWLEVEL_CH2LEVEL_SHIFT   2
#define _PRS_SWLEVEL_CH2LEVEL_MASK   0x4UL
#define _PRS_SWLEVEL_CH2LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH2LEVEL_DEFAULT   (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2)
#define PRS_SWLEVEL_CH3LEVEL   (0x1UL << 3)
#define _PRS_SWLEVEL_CH3LEVEL_SHIFT   3
#define _PRS_SWLEVEL_CH3LEVEL_MASK   0x8UL
#define _PRS_SWLEVEL_CH3LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH3LEVEL_DEFAULT   (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3)
#define PRS_SWLEVEL_CH4LEVEL   (0x1UL << 4)
#define _PRS_SWLEVEL_CH4LEVEL_SHIFT   4
#define _PRS_SWLEVEL_CH4LEVEL_MASK   0x10UL
#define _PRS_SWLEVEL_CH4LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH4LEVEL_DEFAULT   (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4)
#define PRS_SWLEVEL_CH5LEVEL   (0x1UL << 5)
#define _PRS_SWLEVEL_CH5LEVEL_SHIFT   5
#define _PRS_SWLEVEL_CH5LEVEL_MASK   0x20UL
#define _PRS_SWLEVEL_CH5LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH5LEVEL_DEFAULT   (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5)
#define PRS_SWLEVEL_CH6LEVEL   (0x1UL << 6)
#define _PRS_SWLEVEL_CH6LEVEL_SHIFT   6
#define _PRS_SWLEVEL_CH6LEVEL_MASK   0x40UL
#define _PRS_SWLEVEL_CH6LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH6LEVEL_DEFAULT   (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6)
#define PRS_SWLEVEL_CH7LEVEL   (0x1UL << 7)
#define _PRS_SWLEVEL_CH7LEVEL_SHIFT   7
#define _PRS_SWLEVEL_CH7LEVEL_MASK   0x80UL
#define _PRS_SWLEVEL_CH7LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH7LEVEL_DEFAULT   (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7)
#define PRS_SWLEVEL_CH8LEVEL   (0x1UL << 8)
#define _PRS_SWLEVEL_CH8LEVEL_SHIFT   8
#define _PRS_SWLEVEL_CH8LEVEL_MASK   0x100UL
#define _PRS_SWLEVEL_CH8LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH8LEVEL_DEFAULT   (_PRS_SWLEVEL_CH8LEVEL_DEFAULT << 8)
#define PRS_SWLEVEL_CH9LEVEL   (0x1UL << 9)
#define _PRS_SWLEVEL_CH9LEVEL_SHIFT   9
#define _PRS_SWLEVEL_CH9LEVEL_MASK   0x200UL
#define _PRS_SWLEVEL_CH9LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH9LEVEL_DEFAULT   (_PRS_SWLEVEL_CH9LEVEL_DEFAULT << 9)
#define PRS_SWLEVEL_CH10LEVEL   (0x1UL << 10)
#define _PRS_SWLEVEL_CH10LEVEL_SHIFT   10
#define _PRS_SWLEVEL_CH10LEVEL_MASK   0x400UL
#define _PRS_SWLEVEL_CH10LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH10LEVEL_DEFAULT   (_PRS_SWLEVEL_CH10LEVEL_DEFAULT << 10)
#define PRS_SWLEVEL_CH11LEVEL   (0x1UL << 11)
#define _PRS_SWLEVEL_CH11LEVEL_SHIFT   11
#define _PRS_SWLEVEL_CH11LEVEL_MASK   0x800UL
#define _PRS_SWLEVEL_CH11LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH11LEVEL_DEFAULT   (_PRS_SWLEVEL_CH11LEVEL_DEFAULT << 11)
#define _PRS_ROUTE_RESETVALUE   0x00000000UL
#define _PRS_ROUTE_MASK   0x0000070FUL
#define PRS_ROUTE_CH0PEN   (0x1UL << 0)
#define _PRS_ROUTE_CH0PEN_SHIFT   0
#define _PRS_ROUTE_CH0PEN_MASK   0x1UL
#define _PRS_ROUTE_CH0PEN_DEFAULT   0x00000000UL
#define PRS_ROUTE_CH0PEN_DEFAULT   (_PRS_ROUTE_CH0PEN_DEFAULT << 0)
#define PRS_ROUTE_CH1PEN   (0x1UL << 1)
#define _PRS_ROUTE_CH1PEN_SHIFT   1
#define _PRS_ROUTE_CH1PEN_MASK   0x2UL
#define _PRS_ROUTE_CH1PEN_DEFAULT   0x00000000UL
#define PRS_ROUTE_CH1PEN_DEFAULT   (_PRS_ROUTE_CH1PEN_DEFAULT << 1)
#define PRS_ROUTE_CH2PEN   (0x1UL << 2)
#define _PRS_ROUTE_CH2PEN_SHIFT   2
#define _PRS_ROUTE_CH2PEN_MASK   0x4UL
#define _PRS_ROUTE_CH2PEN_DEFAULT   0x00000000UL
#define PRS_ROUTE_CH2PEN_DEFAULT   (_PRS_ROUTE_CH2PEN_DEFAULT << 2)
#define PRS_ROUTE_CH3PEN   (0x1UL << 3)
#define _PRS_ROUTE_CH3PEN_SHIFT   3
#define _PRS_ROUTE_CH3PEN_MASK   0x8UL
#define _PRS_ROUTE_CH3PEN_DEFAULT   0x00000000UL
#define PRS_ROUTE_CH3PEN_DEFAULT   (_PRS_ROUTE_CH3PEN_DEFAULT << 3)
#define _PRS_ROUTE_LOCATION_SHIFT   8
#define _PRS_ROUTE_LOCATION_MASK   0x700UL
#define _PRS_ROUTE_LOCATION_LOC0   0x00000000UL
#define _PRS_ROUTE_LOCATION_DEFAULT   0x00000000UL
#define _PRS_ROUTE_LOCATION_LOC1   0x00000001UL
#define PRS_ROUTE_LOCATION_LOC0   (_PRS_ROUTE_LOCATION_LOC0 << 8)
#define PRS_ROUTE_LOCATION_DEFAULT   (_PRS_ROUTE_LOCATION_DEFAULT << 8)
#define PRS_ROUTE_LOCATION_LOC1   (_PRS_ROUTE_LOCATION_LOC1 << 8)
#define _PRS_CH_CTRL_RESETVALUE   0x00000000UL
#define _PRS_CH_CTRL_MASK   0x133F0007UL
#define _PRS_CH_CTRL_SIGSEL_SHIFT   0
#define _PRS_CH_CTRL_SIGSEL_MASK   0x7UL
#define _PRS_CH_CTRL_SIGSEL_VCMPOUT   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_ACMP0OUT   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_ACMP1OUT   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_DAC0CH0   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_USART0IRTX   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_TIMER0UF   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_TIMER1UF   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_TIMER2UF   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_TIMER3UF   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_RTCOF   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN0   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN8   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_LETIMER0CH0   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_BURTCOF   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES0   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES8   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC0   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_DAC0CH1   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_ADC0SCAN   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_USART0TXC   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_USART1TXC   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_USART2TXC   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_TIMER0OF   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_TIMER1OF   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_TIMER2OF   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_TIMER3OF   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_RTCCOMP0   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_UART0TXC   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_UART1TXC   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN1   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN9   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_LETIMER0CH1   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_BURTCCOMP0   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES1   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES9   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC1   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_USART0RXDATAV   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_USART2RXDATAV   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC0   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC0   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_TIMER2CC0   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_TIMER3CC0   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_RTCCOMP1   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_UART0RXDATAV   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_UART1RXDATAV   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN2   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN10   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES2   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES10   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC2   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC1   0x00000003UL
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC1   0x00000003UL
#define _PRS_CH_CTRL_SIGSEL_TIMER2CC1   0x00000003UL
#define _PRS_CH_CTRL_SIGSEL_TIMER3CC1   0x00000003UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN3   0x00000003UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN11   0x00000003UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES3   0x00000003UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES11   0x00000003UL
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC2   0x00000004UL
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC2   0x00000004UL
#define _PRS_CH_CTRL_SIGSEL_TIMER2CC2   0x00000004UL
#define _PRS_CH_CTRL_SIGSEL_TIMER3CC2   0x00000004UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN4   0x00000004UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN12   0x00000004UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES4   0x00000004UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES12   0x00000004UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN5   0x00000005UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN13   0x00000005UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES5   0x00000005UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES13   0x00000005UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN6   0x00000006UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN14   0x00000006UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES6   0x00000006UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES14   0x00000006UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN7   0x00000007UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN15   0x00000007UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES7   0x00000007UL
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES15   0x00000007UL
#define PRS_CH_CTRL_SIGSEL_VCMPOUT   (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0)
#define PRS_CH_CTRL_SIGSEL_ACMP0OUT   (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0)
#define PRS_CH_CTRL_SIGSEL_ACMP1OUT   (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0)
#define PRS_CH_CTRL_SIGSEL_DAC0CH0   (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0)
#define PRS_CH_CTRL_SIGSEL_ADC0SINGLE   (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0)
#define PRS_CH_CTRL_SIGSEL_USART0IRTX   (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER0UF   (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER1UF   (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER2UF   (_PRS_CH_CTRL_SIGSEL_TIMER2UF << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER3UF   (_PRS_CH_CTRL_SIGSEL_TIMER3UF << 0)
#define PRS_CH_CTRL_SIGSEL_RTCOF   (_PRS_CH_CTRL_SIGSEL_RTCOF << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN0   (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN8   (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0)
#define PRS_CH_CTRL_SIGSEL_LETIMER0CH0   (_PRS_CH_CTRL_SIGSEL_LETIMER0CH0 << 0)
#define PRS_CH_CTRL_SIGSEL_BURTCOF   (_PRS_CH_CTRL_SIGSEL_BURTCOF << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES0   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES8   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSEDEC0   (_PRS_CH_CTRL_SIGSEL_LESENSEDEC0 << 0)
#define PRS_CH_CTRL_SIGSEL_DAC0CH1   (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0)
#define PRS_CH_CTRL_SIGSEL_ADC0SCAN   (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0)
#define PRS_CH_CTRL_SIGSEL_USART0TXC   (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0)
#define PRS_CH_CTRL_SIGSEL_USART1TXC   (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0)
#define PRS_CH_CTRL_SIGSEL_USART2TXC   (_PRS_CH_CTRL_SIGSEL_USART2TXC << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER0OF   (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER1OF   (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER2OF   (_PRS_CH_CTRL_SIGSEL_TIMER2OF << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER3OF   (_PRS_CH_CTRL_SIGSEL_TIMER3OF << 0)
#define PRS_CH_CTRL_SIGSEL_RTCCOMP0   (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0)
#define PRS_CH_CTRL_SIGSEL_UART0TXC   (_PRS_CH_CTRL_SIGSEL_UART0TXC << 0)
#define PRS_CH_CTRL_SIGSEL_UART1TXC   (_PRS_CH_CTRL_SIGSEL_UART1TXC << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN1   (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN9   (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0)
#define PRS_CH_CTRL_SIGSEL_LETIMER0CH1   (_PRS_CH_CTRL_SIGSEL_LETIMER0CH1 << 0)
#define PRS_CH_CTRL_SIGSEL_BURTCCOMP0   (_PRS_CH_CTRL_SIGSEL_BURTCCOMP0 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES1   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES9   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSEDEC1   (_PRS_CH_CTRL_SIGSEL_LESENSEDEC1 << 0)
#define PRS_CH_CTRL_SIGSEL_USART0RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0)
#define PRS_CH_CTRL_SIGSEL_USART1RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0)
#define PRS_CH_CTRL_SIGSEL_USART2RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART2RXDATAV << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER0CC0   (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER1CC0   (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER2CC0   (_PRS_CH_CTRL_SIGSEL_TIMER2CC0 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER3CC0   (_PRS_CH_CTRL_SIGSEL_TIMER3CC0 << 0)
#define PRS_CH_CTRL_SIGSEL_RTCCOMP1   (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0)
#define PRS_CH_CTRL_SIGSEL_UART0RXDATAV   (_PRS_CH_CTRL_SIGSEL_UART0RXDATAV << 0)
#define PRS_CH_CTRL_SIGSEL_UART1RXDATAV   (_PRS_CH_CTRL_SIGSEL_UART1RXDATAV << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN2   (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN10   (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES2   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES10   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSEDEC2   (_PRS_CH_CTRL_SIGSEL_LESENSEDEC2 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER0CC1   (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER1CC1   (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER2CC1   (_PRS_CH_CTRL_SIGSEL_TIMER2CC1 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER3CC1   (_PRS_CH_CTRL_SIGSEL_TIMER3CC1 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN3   (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN11   (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES3   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES11   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER0CC2   (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER1CC2   (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER2CC2   (_PRS_CH_CTRL_SIGSEL_TIMER2CC2 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER3CC2   (_PRS_CH_CTRL_SIGSEL_TIMER3CC2 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN4   (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN12   (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES4   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES12   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN5   (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN13   (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES5   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES13   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN6   (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN14   (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES6   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES14   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN7   (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN15   (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES7   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 << 0)
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES15   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 << 0)
#define _PRS_CH_CTRL_SOURCESEL_SHIFT   16
#define _PRS_CH_CTRL_SOURCESEL_MASK   0x3F0000UL
#define _PRS_CH_CTRL_SOURCESEL_NONE   0x00000000UL
#define _PRS_CH_CTRL_SOURCESEL_VCMP   0x00000001UL
#define _PRS_CH_CTRL_SOURCESEL_ACMP0   0x00000002UL
#define _PRS_CH_CTRL_SOURCESEL_ACMP1   0x00000003UL
#define _PRS_CH_CTRL_SOURCESEL_DAC0   0x00000006UL
#define _PRS_CH_CTRL_SOURCESEL_ADC0   0x00000008UL
#define _PRS_CH_CTRL_SOURCESEL_USART0   0x00000010UL
#define _PRS_CH_CTRL_SOURCESEL_USART1   0x00000011UL
#define _PRS_CH_CTRL_SOURCESEL_USART2   0x00000012UL
#define _PRS_CH_CTRL_SOURCESEL_TIMER0   0x0000001CUL
#define _PRS_CH_CTRL_SOURCESEL_TIMER1   0x0000001DUL
#define _PRS_CH_CTRL_SOURCESEL_TIMER2   0x0000001EUL
#define _PRS_CH_CTRL_SOURCESEL_TIMER3   0x0000001FUL
#define _PRS_CH_CTRL_SOURCESEL_RTC   0x00000028UL
#define _PRS_CH_CTRL_SOURCESEL_UART0   0x00000029UL
#define _PRS_CH_CTRL_SOURCESEL_UART1   0x0000002AUL
#define _PRS_CH_CTRL_SOURCESEL_GPIOL   0x00000030UL
#define _PRS_CH_CTRL_SOURCESEL_GPIOH   0x00000031UL
#define _PRS_CH_CTRL_SOURCESEL_LETIMER0   0x00000034UL
#define _PRS_CH_CTRL_SOURCESEL_BURTC   0x00000037UL
#define _PRS_CH_CTRL_SOURCESEL_LESENSEL   0x00000039UL
#define _PRS_CH_CTRL_SOURCESEL_LESENSEH   0x0000003AUL
#define _PRS_CH_CTRL_SOURCESEL_LESENSED   0x0000003BUL
#define PRS_CH_CTRL_SOURCESEL_NONE   (_PRS_CH_CTRL_SOURCESEL_NONE << 16)
#define PRS_CH_CTRL_SOURCESEL_VCMP   (_PRS_CH_CTRL_SOURCESEL_VCMP << 16)
#define PRS_CH_CTRL_SOURCESEL_ACMP0   (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16)
#define PRS_CH_CTRL_SOURCESEL_ACMP1   (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16)
#define PRS_CH_CTRL_SOURCESEL_DAC0   (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16)
#define PRS_CH_CTRL_SOURCESEL_ADC0   (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16)
#define PRS_CH_CTRL_SOURCESEL_USART0   (_PRS_CH_CTRL_SOURCESEL_USART0 << 16)
#define PRS_CH_CTRL_SOURCESEL_USART1   (_PRS_CH_CTRL_SOURCESEL_USART1 << 16)
#define PRS_CH_CTRL_SOURCESEL_USART2   (_PRS_CH_CTRL_SOURCESEL_USART2 << 16)
#define PRS_CH_CTRL_SOURCESEL_TIMER0   (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16)
#define PRS_CH_CTRL_SOURCESEL_TIMER1   (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16)
#define PRS_CH_CTRL_SOURCESEL_TIMER2   (_PRS_CH_CTRL_SOURCESEL_TIMER2 << 16)
#define PRS_CH_CTRL_SOURCESEL_TIMER3   (_PRS_CH_CTRL_SOURCESEL_TIMER3 << 16)
#define PRS_CH_CTRL_SOURCESEL_RTC   (_PRS_CH_CTRL_SOURCESEL_RTC << 16)
#define PRS_CH_CTRL_SOURCESEL_UART0   (_PRS_CH_CTRL_SOURCESEL_UART0 << 16)
#define PRS_CH_CTRL_SOURCESEL_UART1   (_PRS_CH_CTRL_SOURCESEL_UART1 << 16)
#define PRS_CH_CTRL_SOURCESEL_GPIOL   (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16)
#define PRS_CH_CTRL_SOURCESEL_GPIOH   (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16)
#define PRS_CH_CTRL_SOURCESEL_LETIMER0   (_PRS_CH_CTRL_SOURCESEL_LETIMER0 << 16)
#define PRS_CH_CTRL_SOURCESEL_BURTC   (_PRS_CH_CTRL_SOURCESEL_BURTC << 16)
#define PRS_CH_CTRL_SOURCESEL_LESENSEL   (_PRS_CH_CTRL_SOURCESEL_LESENSEL << 16)
#define PRS_CH_CTRL_SOURCESEL_LESENSEH   (_PRS_CH_CTRL_SOURCESEL_LESENSEH << 16)
#define PRS_CH_CTRL_SOURCESEL_LESENSED   (_PRS_CH_CTRL_SOURCESEL_LESENSED << 16)
#define _PRS_CH_CTRL_EDSEL_SHIFT   24
#define _PRS_CH_CTRL_EDSEL_MASK   0x3000000UL
#define _PRS_CH_CTRL_EDSEL_DEFAULT   0x00000000UL
#define _PRS_CH_CTRL_EDSEL_OFF   0x00000000UL
#define _PRS_CH_CTRL_EDSEL_POSEDGE   0x00000001UL
#define _PRS_CH_CTRL_EDSEL_NEGEDGE   0x00000002UL
#define _PRS_CH_CTRL_EDSEL_BOTHEDGES   0x00000003UL
#define PRS_CH_CTRL_EDSEL_DEFAULT   (_PRS_CH_CTRL_EDSEL_DEFAULT << 24)
#define PRS_CH_CTRL_EDSEL_OFF   (_PRS_CH_CTRL_EDSEL_OFF << 24)
#define PRS_CH_CTRL_EDSEL_POSEDGE   (_PRS_CH_CTRL_EDSEL_POSEDGE << 24)
#define PRS_CH_CTRL_EDSEL_NEGEDGE   (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24)
#define PRS_CH_CTRL_EDSEL_BOTHEDGES   (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24)
#define PRS_CH_CTRL_ASYNC   (0x1UL << 28)
#define _PRS_CH_CTRL_ASYNC_SHIFT   28
#define _PRS_CH_CTRL_ASYNC_MASK   0x10000000UL
#define _PRS_CH_CTRL_ASYNC_DEFAULT   0x00000000UL
#define PRS_CH_CTRL_ASYNC_DEFAULT   (_PRS_CH_CTRL_ASYNC_DEFAULT << 28)

Define Documentation

#define _PRS_CH_CTRL_ASYNC_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_CH_CTRL

Definition at line 2079 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_ASYNC_MASK   0x10000000UL

Bit mask for PRS_ASYNC

Definition at line 2078 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_ASYNC_SHIFT   28

Shift value for PRS_ASYNC

Definition at line 2077 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_EDSEL_BOTHEDGES   0x00000003UL

Mode BOTHEDGES for PRS_CH_CTRL

Definition at line 2070 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_EDSEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_CH_CTRL

Definition at line 2066 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_EDSEL_MASK   0x3000000UL

Bit mask for PRS_EDSEL

Definition at line 2065 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_EDSEL_NEGEDGE   0x00000002UL

Mode NEGEDGE for PRS_CH_CTRL

Definition at line 2069 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_EDSEL_OFF   0x00000000UL

Mode OFF for PRS_CH_CTRL

Definition at line 2067 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_EDSEL_POSEDGE   0x00000001UL

Mode POSEDGE for PRS_CH_CTRL

Definition at line 2068 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_EDSEL_SHIFT   24

Shift value for PRS_EDSEL

Definition at line 2064 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_MASK   0x133F0007UL

Mask for PRS_CH_CTRL

Definition at line 1852 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_RESETVALUE   0x00000000UL

Default value for PRS_CH_CTRL

Definition at line 1851 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_ACMP0OUT   0x00000000UL

Mode ACMP0OUT for PRS_CH_CTRL

Definition at line 1856 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_ACMP1OUT   0x00000000UL

Mode ACMP1OUT for PRS_CH_CTRL

Definition at line 1857 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_ADC0SCAN   0x00000001UL

Mode ADC0SCAN for PRS_CH_CTRL

Definition at line 1874 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE   0x00000000UL

Mode ADC0SINGLE for PRS_CH_CTRL

Definition at line 1859 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_BURTCCOMP0   0x00000001UL

Mode BURTCCOMP0 for PRS_CH_CTRL

Definition at line 1889 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_BURTCOF   0x00000000UL

Mode BURTCOF for PRS_CH_CTRL

Definition at line 1869 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_DAC0CH0   0x00000000UL

Mode DAC0CH0 for PRS_CH_CTRL

Definition at line 1858 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_DAC0CH1   0x00000001UL

Mode DAC0CH1 for PRS_CH_CTRL

Definition at line 1873 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN0   0x00000000UL

Mode GPIOPIN0 for PRS_CH_CTRL

Definition at line 1866 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN1   0x00000001UL

Mode GPIOPIN1 for PRS_CH_CTRL

Definition at line 1885 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN10   0x00000002UL

Mode GPIOPIN10 for PRS_CH_CTRL

Definition at line 1904 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN11   0x00000003UL

Mode GPIOPIN11 for PRS_CH_CTRL

Definition at line 1913 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN12   0x00000004UL

Mode GPIOPIN12 for PRS_CH_CTRL

Definition at line 1921 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN13   0x00000005UL

Mode GPIOPIN13 for PRS_CH_CTRL

Definition at line 1925 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN14   0x00000006UL

Mode GPIOPIN14 for PRS_CH_CTRL

Definition at line 1929 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN15   0x00000007UL

Mode GPIOPIN15 for PRS_CH_CTRL

Definition at line 1933 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN2   0x00000002UL

Mode GPIOPIN2 for PRS_CH_CTRL

Definition at line 1903 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN3   0x00000003UL

Mode GPIOPIN3 for PRS_CH_CTRL

Definition at line 1912 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN4   0x00000004UL

Mode GPIOPIN4 for PRS_CH_CTRL

Definition at line 1920 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN5   0x00000005UL

Mode GPIOPIN5 for PRS_CH_CTRL

Definition at line 1924 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN6   0x00000006UL

Mode GPIOPIN6 for PRS_CH_CTRL

Definition at line 1928 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN7   0x00000007UL

Mode GPIOPIN7 for PRS_CH_CTRL

Definition at line 1932 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN8   0x00000000UL

Mode GPIOPIN8 for PRS_CH_CTRL

Definition at line 1867 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN9   0x00000001UL

Mode GPIOPIN9 for PRS_CH_CTRL

Definition at line 1886 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC0   0x00000000UL

Mode LESENSEDEC0 for PRS_CH_CTRL

Definition at line 1872 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC1   0x00000001UL

Mode LESENSEDEC1 for PRS_CH_CTRL

Definition at line 1892 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC2   0x00000002UL

Mode LESENSEDEC2 for PRS_CH_CTRL

Definition at line 1907 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES0   0x00000000UL

Mode LESENSESCANRES0 for PRS_CH_CTRL

Definition at line 1870 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES1   0x00000001UL

Mode LESENSESCANRES1 for PRS_CH_CTRL

Definition at line 1890 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES10   0x00000002UL

Mode LESENSESCANRES10 for PRS_CH_CTRL

Definition at line 1906 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES11   0x00000003UL

Mode LESENSESCANRES11 for PRS_CH_CTRL

Definition at line 1915 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES12   0x00000004UL

Mode LESENSESCANRES12 for PRS_CH_CTRL

Definition at line 1923 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES13   0x00000005UL

Mode LESENSESCANRES13 for PRS_CH_CTRL

Definition at line 1927 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES14   0x00000006UL

Mode LESENSESCANRES14 for PRS_CH_CTRL

Definition at line 1931 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES15   0x00000007UL

Mode LESENSESCANRES15 for PRS_CH_CTRL

Definition at line 1935 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES2   0x00000002UL

Mode LESENSESCANRES2 for PRS_CH_CTRL

Definition at line 1905 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES3   0x00000003UL

Mode LESENSESCANRES3 for PRS_CH_CTRL

Definition at line 1914 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES4   0x00000004UL

Mode LESENSESCANRES4 for PRS_CH_CTRL

Definition at line 1922 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES5   0x00000005UL

Mode LESENSESCANRES5 for PRS_CH_CTRL

Definition at line 1926 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES6   0x00000006UL

Mode LESENSESCANRES6 for PRS_CH_CTRL

Definition at line 1930 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES7   0x00000007UL

Mode LESENSESCANRES7 for PRS_CH_CTRL

Definition at line 1934 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES8   0x00000000UL

Mode LESENSESCANRES8 for PRS_CH_CTRL

Definition at line 1871 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES9   0x00000001UL

Mode LESENSESCANRES9 for PRS_CH_CTRL

Definition at line 1891 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LETIMER0CH0   0x00000000UL

Mode LETIMER0CH0 for PRS_CH_CTRL

Definition at line 1868 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_LETIMER0CH1   0x00000001UL

Mode LETIMER0CH1 for PRS_CH_CTRL

Definition at line 1887 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_MASK   0x7UL

Bit mask for PRS_SIGSEL

Definition at line 1854 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_RTCCOMP0   0x00000001UL

Mode RTCCOMP0 for PRS_CH_CTRL

Definition at line 1882 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_RTCCOMP1   0x00000002UL

Mode RTCCOMP1 for PRS_CH_CTRL

Definition at line 1900 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_RTCOF   0x00000000UL

Mode RTCOF for PRS_CH_CTRL

Definition at line 1865 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_SHIFT   0

Shift value for PRS_SIGSEL

Definition at line 1853 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0CC0   0x00000002UL

Mode TIMER0CC0 for PRS_CH_CTRL

Definition at line 1896 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0CC1   0x00000003UL

Mode TIMER0CC1 for PRS_CH_CTRL

Definition at line 1908 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0CC2   0x00000004UL

Mode TIMER0CC2 for PRS_CH_CTRL

Definition at line 1916 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0OF   0x00000001UL

Mode TIMER0OF for PRS_CH_CTRL

Definition at line 1878 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0UF   0x00000000UL

Mode TIMER0UF for PRS_CH_CTRL

Definition at line 1861 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1CC0   0x00000002UL

Mode TIMER1CC0 for PRS_CH_CTRL

Definition at line 1897 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1CC1   0x00000003UL

Mode TIMER1CC1 for PRS_CH_CTRL

Definition at line 1909 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1CC2   0x00000004UL

Mode TIMER1CC2 for PRS_CH_CTRL

Definition at line 1917 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1OF   0x00000001UL

Mode TIMER1OF for PRS_CH_CTRL

Definition at line 1879 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1UF   0x00000000UL

Mode TIMER1UF for PRS_CH_CTRL

Definition at line 1862 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER2CC0   0x00000002UL

Mode TIMER2CC0 for PRS_CH_CTRL

Definition at line 1898 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER2CC1   0x00000003UL

Mode TIMER2CC1 for PRS_CH_CTRL

Definition at line 1910 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER2CC2   0x00000004UL

Mode TIMER2CC2 for PRS_CH_CTRL

Definition at line 1918 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER2OF   0x00000001UL

Mode TIMER2OF for PRS_CH_CTRL

Definition at line 1880 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER2UF   0x00000000UL

Mode TIMER2UF for PRS_CH_CTRL

Definition at line 1863 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER3CC0   0x00000002UL

Mode TIMER3CC0 for PRS_CH_CTRL

Definition at line 1899 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER3CC1   0x00000003UL

Mode TIMER3CC1 for PRS_CH_CTRL

Definition at line 1911 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER3CC2   0x00000004UL

Mode TIMER3CC2 for PRS_CH_CTRL

Definition at line 1919 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER3OF   0x00000001UL

Mode TIMER3OF for PRS_CH_CTRL

Definition at line 1881 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER3UF   0x00000000UL

Mode TIMER3UF for PRS_CH_CTRL

Definition at line 1864 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_UART0RXDATAV   0x00000002UL

Mode UART0RXDATAV for PRS_CH_CTRL

Definition at line 1901 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_UART0TXC   0x00000001UL

Mode UART0TXC for PRS_CH_CTRL

Definition at line 1883 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_UART1RXDATAV   0x00000002UL

Mode UART1RXDATAV for PRS_CH_CTRL

Definition at line 1902 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_UART1TXC   0x00000001UL

Mode UART1TXC for PRS_CH_CTRL

Definition at line 1884 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_USART0IRTX   0x00000000UL

Mode USART0IRTX for PRS_CH_CTRL

Definition at line 1860 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_USART0RXDATAV   0x00000002UL

Mode USART0RXDATAV for PRS_CH_CTRL

Definition at line 1893 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_USART0TXC   0x00000001UL

Mode USART0TXC for PRS_CH_CTRL

Definition at line 1875 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV   0x00000002UL

Mode USART1RXDATAV for PRS_CH_CTRL

Definition at line 1894 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_USART1TXC   0x00000001UL

Mode USART1TXC for PRS_CH_CTRL

Definition at line 1876 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_USART2RXDATAV   0x00000002UL

Mode USART2RXDATAV for PRS_CH_CTRL

Definition at line 1895 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_USART2TXC   0x00000001UL

Mode USART2TXC for PRS_CH_CTRL

Definition at line 1877 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SIGSEL_VCMPOUT   0x00000000UL

Mode VCMPOUT for PRS_CH_CTRL

Definition at line 1855 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_ACMP0   0x00000002UL

Mode ACMP0 for PRS_CH_CTRL

Definition at line 2020 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_ACMP1   0x00000003UL

Mode ACMP1 for PRS_CH_CTRL

Definition at line 2021 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_ADC0   0x00000008UL

Mode ADC0 for PRS_CH_CTRL

Definition at line 2023 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_BURTC   0x00000037UL

Mode BURTC for PRS_CH_CTRL

Definition at line 2037 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_DAC0   0x00000006UL

Mode DAC0 for PRS_CH_CTRL

Definition at line 2022 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_GPIOH   0x00000031UL

Mode GPIOH for PRS_CH_CTRL

Definition at line 2035 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_GPIOL   0x00000030UL

Mode GPIOL for PRS_CH_CTRL

Definition at line 2034 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_LESENSED   0x0000003BUL

Mode LESENSED for PRS_CH_CTRL

Definition at line 2040 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_LESENSEH   0x0000003AUL

Mode LESENSEH for PRS_CH_CTRL

Definition at line 2039 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_LESENSEL   0x00000039UL

Mode LESENSEL for PRS_CH_CTRL

Definition at line 2038 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_LETIMER0   0x00000034UL

Mode LETIMER0 for PRS_CH_CTRL

Definition at line 2036 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_MASK   0x3F0000UL

Bit mask for PRS_SOURCESEL

Definition at line 2017 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_NONE   0x00000000UL

Mode NONE for PRS_CH_CTRL

Definition at line 2018 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_RTC   0x00000028UL

Mode RTC for PRS_CH_CTRL

Definition at line 2031 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_SHIFT   16

Shift value for PRS_SOURCESEL

Definition at line 2016 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_TIMER0   0x0000001CUL

Mode TIMER0 for PRS_CH_CTRL

Definition at line 2027 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_TIMER1   0x0000001DUL

Mode TIMER1 for PRS_CH_CTRL

Definition at line 2028 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_TIMER2   0x0000001EUL

Mode TIMER2 for PRS_CH_CTRL

Definition at line 2029 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_TIMER3   0x0000001FUL

Mode TIMER3 for PRS_CH_CTRL

Definition at line 2030 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_UART0   0x00000029UL

Mode UART0 for PRS_CH_CTRL

Definition at line 2032 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_UART1   0x0000002AUL

Mode UART1 for PRS_CH_CTRL

Definition at line 2033 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_USART0   0x00000010UL

Mode USART0 for PRS_CH_CTRL

Definition at line 2024 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_USART1   0x00000011UL

Mode USART1 for PRS_CH_CTRL

Definition at line 2025 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_USART2   0x00000012UL

Mode USART2 for PRS_CH_CTRL

Definition at line 2026 of file efm32lg895f256.h.

#define _PRS_CH_CTRL_SOURCESEL_VCMP   0x00000001UL

Mode VCMP for PRS_CH_CTRL

Definition at line 2019 of file efm32lg895f256.h.

#define _PRS_ROUTE_CH0PEN_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 1824 of file efm32lg895f256.h.

#define _PRS_ROUTE_CH0PEN_MASK   0x1UL

Bit mask for PRS_CH0PEN

Definition at line 1823 of file efm32lg895f256.h.

#define _PRS_ROUTE_CH0PEN_SHIFT   0

Shift value for PRS_CH0PEN

Definition at line 1822 of file efm32lg895f256.h.

#define _PRS_ROUTE_CH1PEN_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 1829 of file efm32lg895f256.h.

#define _PRS_ROUTE_CH1PEN_MASK   0x2UL

Bit mask for PRS_CH1PEN

Definition at line 1828 of file efm32lg895f256.h.

#define _PRS_ROUTE_CH1PEN_SHIFT   1

Shift value for PRS_CH1PEN

Definition at line 1827 of file efm32lg895f256.h.

#define _PRS_ROUTE_CH2PEN_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 1834 of file efm32lg895f256.h.

#define _PRS_ROUTE_CH2PEN_MASK   0x4UL

Bit mask for PRS_CH2PEN

Definition at line 1833 of file efm32lg895f256.h.

#define _PRS_ROUTE_CH2PEN_SHIFT   2

Shift value for PRS_CH2PEN

Definition at line 1832 of file efm32lg895f256.h.

#define _PRS_ROUTE_CH3PEN_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 1839 of file efm32lg895f256.h.

#define _PRS_ROUTE_CH3PEN_MASK   0x8UL

Bit mask for PRS_CH3PEN

Definition at line 1838 of file efm32lg895f256.h.

#define _PRS_ROUTE_CH3PEN_SHIFT   3

Shift value for PRS_CH3PEN

Definition at line 1837 of file efm32lg895f256.h.

#define _PRS_ROUTE_LOCATION_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 1844 of file efm32lg895f256.h.

#define _PRS_ROUTE_LOCATION_LOC0   0x00000000UL

Mode LOC0 for PRS_ROUTE

Definition at line 1843 of file efm32lg895f256.h.

#define _PRS_ROUTE_LOCATION_LOC1   0x00000001UL

Mode LOC1 for PRS_ROUTE

Definition at line 1845 of file efm32lg895f256.h.

#define _PRS_ROUTE_LOCATION_MASK   0x700UL

Bit mask for PRS_LOCATION

Definition at line 1842 of file efm32lg895f256.h.

#define _PRS_ROUTE_LOCATION_SHIFT   8

Shift value for PRS_LOCATION

Definition at line 1841 of file efm32lg895f256.h.

#define _PRS_ROUTE_MASK   0x0000070FUL

Mask for PRS_ROUTE

Definition at line 1820 of file efm32lg895f256.h.

#define _PRS_ROUTE_RESETVALUE   0x00000000UL

Default value for PRS_ROUTE

Definition at line 1819 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH0LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 1760 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH0LEVEL_MASK   0x1UL

Bit mask for PRS_CH0LEVEL

Definition at line 1759 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH0LEVEL_SHIFT   0

Shift value for PRS_CH0LEVEL

Definition at line 1758 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH10LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 1810 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH10LEVEL_MASK   0x400UL

Bit mask for PRS_CH10LEVEL

Definition at line 1809 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH10LEVEL_SHIFT   10

Shift value for PRS_CH10LEVEL

Definition at line 1808 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH11LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 1815 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH11LEVEL_MASK   0x800UL

Bit mask for PRS_CH11LEVEL

Definition at line 1814 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH11LEVEL_SHIFT   11

Shift value for PRS_CH11LEVEL

Definition at line 1813 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH1LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 1765 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH1LEVEL_MASK   0x2UL

Bit mask for PRS_CH1LEVEL

Definition at line 1764 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH1LEVEL_SHIFT   1

Shift value for PRS_CH1LEVEL

Definition at line 1763 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH2LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 1770 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH2LEVEL_MASK   0x4UL

Bit mask for PRS_CH2LEVEL

Definition at line 1769 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH2LEVEL_SHIFT   2

Shift value for PRS_CH2LEVEL

Definition at line 1768 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH3LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 1775 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH3LEVEL_MASK   0x8UL

Bit mask for PRS_CH3LEVEL

Definition at line 1774 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH3LEVEL_SHIFT   3

Shift value for PRS_CH3LEVEL

Definition at line 1773 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH4LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 1780 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH4LEVEL_MASK   0x10UL

Bit mask for PRS_CH4LEVEL

Definition at line 1779 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH4LEVEL_SHIFT   4

Shift value for PRS_CH4LEVEL

Definition at line 1778 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH5LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 1785 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH5LEVEL_MASK   0x20UL

Bit mask for PRS_CH5LEVEL

Definition at line 1784 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH5LEVEL_SHIFT   5

Shift value for PRS_CH5LEVEL

Definition at line 1783 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH6LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 1790 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH6LEVEL_MASK   0x40UL

Bit mask for PRS_CH6LEVEL

Definition at line 1789 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH6LEVEL_SHIFT   6

Shift value for PRS_CH6LEVEL

Definition at line 1788 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH7LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 1795 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH7LEVEL_MASK   0x80UL

Bit mask for PRS_CH7LEVEL

Definition at line 1794 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH7LEVEL_SHIFT   7

Shift value for PRS_CH7LEVEL

Definition at line 1793 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH8LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 1800 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH8LEVEL_MASK   0x100UL

Bit mask for PRS_CH8LEVEL

Definition at line 1799 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH8LEVEL_SHIFT   8

Shift value for PRS_CH8LEVEL

Definition at line 1798 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH9LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 1805 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH9LEVEL_MASK   0x200UL

Bit mask for PRS_CH9LEVEL

Definition at line 1804 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_CH9LEVEL_SHIFT   9

Shift value for PRS_CH9LEVEL

Definition at line 1803 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_MASK   0x00000FFFUL

Mask for PRS_SWLEVEL

Definition at line 1756 of file efm32lg895f256.h.

#define _PRS_SWLEVEL_RESETVALUE   0x00000000UL

Default value for PRS_SWLEVEL

Definition at line 1755 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH0PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 1696 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH0PULSE_MASK   0x1UL

Bit mask for PRS_CH0PULSE

Definition at line 1695 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH0PULSE_SHIFT   0

Shift value for PRS_CH0PULSE

Definition at line 1694 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH10PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 1746 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH10PULSE_MASK   0x400UL

Bit mask for PRS_CH10PULSE

Definition at line 1745 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH10PULSE_SHIFT   10

Shift value for PRS_CH10PULSE

Definition at line 1744 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH11PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 1751 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH11PULSE_MASK   0x800UL

Bit mask for PRS_CH11PULSE

Definition at line 1750 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH11PULSE_SHIFT   11

Shift value for PRS_CH11PULSE

Definition at line 1749 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH1PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 1701 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH1PULSE_MASK   0x2UL

Bit mask for PRS_CH1PULSE

Definition at line 1700 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH1PULSE_SHIFT   1

Shift value for PRS_CH1PULSE

Definition at line 1699 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH2PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 1706 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH2PULSE_MASK   0x4UL

Bit mask for PRS_CH2PULSE

Definition at line 1705 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH2PULSE_SHIFT   2

Shift value for PRS_CH2PULSE

Definition at line 1704 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH3PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 1711 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH3PULSE_MASK   0x8UL

Bit mask for PRS_CH3PULSE

Definition at line 1710 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH3PULSE_SHIFT   3

Shift value for PRS_CH3PULSE

Definition at line 1709 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH4PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 1716 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH4PULSE_MASK   0x10UL

Bit mask for PRS_CH4PULSE

Definition at line 1715 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH4PULSE_SHIFT   4

Shift value for PRS_CH4PULSE

Definition at line 1714 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH5PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 1721 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH5PULSE_MASK   0x20UL

Bit mask for PRS_CH5PULSE

Definition at line 1720 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH5PULSE_SHIFT   5

Shift value for PRS_CH5PULSE

Definition at line 1719 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH6PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 1726 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH6PULSE_MASK   0x40UL

Bit mask for PRS_CH6PULSE

Definition at line 1725 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH6PULSE_SHIFT   6

Shift value for PRS_CH6PULSE

Definition at line 1724 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH7PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 1731 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH7PULSE_MASK   0x80UL

Bit mask for PRS_CH7PULSE

Definition at line 1730 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH7PULSE_SHIFT   7

Shift value for PRS_CH7PULSE

Definition at line 1729 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH8PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 1736 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH8PULSE_MASK   0x100UL

Bit mask for PRS_CH8PULSE

Definition at line 1735 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH8PULSE_SHIFT   8

Shift value for PRS_CH8PULSE

Definition at line 1734 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH9PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 1741 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH9PULSE_MASK   0x200UL

Bit mask for PRS_CH9PULSE

Definition at line 1740 of file efm32lg895f256.h.

#define _PRS_SWPULSE_CH9PULSE_SHIFT   9

Shift value for PRS_CH9PULSE

Definition at line 1739 of file efm32lg895f256.h.

#define _PRS_SWPULSE_MASK   0x00000FFFUL

Mask for PRS_SWPULSE

Definition at line 1692 of file efm32lg895f256.h.

#define _PRS_SWPULSE_RESETVALUE   0x00000000UL

Default value for PRS_SWPULSE

Definition at line 1691 of file efm32lg895f256.h.

#define PRS_CH_CTRL_ASYNC   (0x1UL << 28)

Asynchronous reflex

Definition at line 2076 of file efm32lg895f256.h.

#define PRS_CH_CTRL_ASYNC_DEFAULT   (_PRS_CH_CTRL_ASYNC_DEFAULT << 28)

Shifted mode DEFAULT for PRS_CH_CTRL

Definition at line 2080 of file efm32lg895f256.h.

#define PRS_CH_CTRL_EDSEL_BOTHEDGES   (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24)

Shifted mode BOTHEDGES for PRS_CH_CTRL

Definition at line 2075 of file efm32lg895f256.h.

#define PRS_CH_CTRL_EDSEL_DEFAULT   (_PRS_CH_CTRL_EDSEL_DEFAULT << 24)

Shifted mode DEFAULT for PRS_CH_CTRL

Definition at line 2071 of file efm32lg895f256.h.

#define PRS_CH_CTRL_EDSEL_NEGEDGE   (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24)

Shifted mode NEGEDGE for PRS_CH_CTRL

Definition at line 2074 of file efm32lg895f256.h.

#define PRS_CH_CTRL_EDSEL_OFF   (_PRS_CH_CTRL_EDSEL_OFF << 24)

Shifted mode OFF for PRS_CH_CTRL

Definition at line 2072 of file efm32lg895f256.h.

#define PRS_CH_CTRL_EDSEL_POSEDGE   (_PRS_CH_CTRL_EDSEL_POSEDGE << 24)

Shifted mode POSEDGE for PRS_CH_CTRL

Definition at line 2073 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_ACMP0OUT   (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0)

Shifted mode ACMP0OUT for PRS_CH_CTRL

Definition at line 1937 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_ACMP1OUT   (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0)

Shifted mode ACMP1OUT for PRS_CH_CTRL

Definition at line 1938 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_ADC0SCAN   (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0)

Shifted mode ADC0SCAN for PRS_CH_CTRL

Definition at line 1955 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_ADC0SINGLE   (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0)

Shifted mode ADC0SINGLE for PRS_CH_CTRL

Definition at line 1940 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_BURTCCOMP0   (_PRS_CH_CTRL_SIGSEL_BURTCCOMP0 << 0)

Shifted mode BURTCCOMP0 for PRS_CH_CTRL

Definition at line 1969 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_BURTCOF   (_PRS_CH_CTRL_SIGSEL_BURTCOF << 0)

Shifted mode BURTCOF for PRS_CH_CTRL

Definition at line 1950 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_DAC0CH0   (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0)

Shifted mode DAC0CH0 for PRS_CH_CTRL

Definition at line 1939 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_DAC0CH1   (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0)

Shifted mode DAC0CH1 for PRS_CH_CTRL

Definition at line 1954 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN0   (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0)

Shifted mode GPIOPIN0 for PRS_CH_CTRL

Definition at line 1947 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN1   (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0)

Shifted mode GPIOPIN1 for PRS_CH_CTRL

Definition at line 1966 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN10   (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0)

Shifted mode GPIOPIN10 for PRS_CH_CTRL

Definition at line 1984 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN11   (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0)

Shifted mode GPIOPIN11 for PRS_CH_CTRL

Definition at line 1993 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN12   (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0)

Shifted mode GPIOPIN12 for PRS_CH_CTRL

Definition at line 2001 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN13   (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0)

Shifted mode GPIOPIN13 for PRS_CH_CTRL

Definition at line 2005 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN14   (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0)

Shifted mode GPIOPIN14 for PRS_CH_CTRL

Definition at line 2009 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN15   (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0)

Shifted mode GPIOPIN15 for PRS_CH_CTRL

Definition at line 2013 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN2   (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0)

Shifted mode GPIOPIN2 for PRS_CH_CTRL

Definition at line 1983 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN3   (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0)

Shifted mode GPIOPIN3 for PRS_CH_CTRL

Definition at line 1992 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN4   (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0)

Shifted mode GPIOPIN4 for PRS_CH_CTRL

Definition at line 2000 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN5   (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0)

Shifted mode GPIOPIN5 for PRS_CH_CTRL

Definition at line 2004 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN6   (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0)

Shifted mode GPIOPIN6 for PRS_CH_CTRL

Definition at line 2008 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN7   (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0)

Shifted mode GPIOPIN7 for PRS_CH_CTRL

Definition at line 2012 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN8   (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0)

Shifted mode GPIOPIN8 for PRS_CH_CTRL

Definition at line 1948 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN9   (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0)

Shifted mode GPIOPIN9 for PRS_CH_CTRL

Definition at line 1967 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSEDEC0   (_PRS_CH_CTRL_SIGSEL_LESENSEDEC0 << 0)

Shifted mode LESENSEDEC0 for PRS_CH_CTRL

Definition at line 1953 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSEDEC1   (_PRS_CH_CTRL_SIGSEL_LESENSEDEC1 << 0)

Shifted mode LESENSEDEC1 for PRS_CH_CTRL

Definition at line 1972 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSEDEC2   (_PRS_CH_CTRL_SIGSEL_LESENSEDEC2 << 0)

Shifted mode LESENSEDEC2 for PRS_CH_CTRL

Definition at line 1987 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES0   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 << 0)

Shifted mode LESENSESCANRES0 for PRS_CH_CTRL

Definition at line 1951 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES1   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 << 0)

Shifted mode LESENSESCANRES1 for PRS_CH_CTRL

Definition at line 1970 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES10   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 << 0)

Shifted mode LESENSESCANRES10 for PRS_CH_CTRL

Definition at line 1986 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES11   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 << 0)

Shifted mode LESENSESCANRES11 for PRS_CH_CTRL

Definition at line 1995 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES12   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 << 0)

Shifted mode LESENSESCANRES12 for PRS_CH_CTRL

Definition at line 2003 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES13   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 << 0)

Shifted mode LESENSESCANRES13 for PRS_CH_CTRL

Definition at line 2007 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES14   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 << 0)

Shifted mode LESENSESCANRES14 for PRS_CH_CTRL

Definition at line 2011 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES15   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 << 0)

Shifted mode LESENSESCANRES15 for PRS_CH_CTRL

Definition at line 2015 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES2   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 << 0)

Shifted mode LESENSESCANRES2 for PRS_CH_CTRL

Definition at line 1985 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES3   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 << 0)

Shifted mode LESENSESCANRES3 for PRS_CH_CTRL

Definition at line 1994 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES4   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 << 0)

Shifted mode LESENSESCANRES4 for PRS_CH_CTRL

Definition at line 2002 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES5   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 << 0)

Shifted mode LESENSESCANRES5 for PRS_CH_CTRL

Definition at line 2006 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES6   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 << 0)

Shifted mode LESENSESCANRES6 for PRS_CH_CTRL

Definition at line 2010 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES7   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 << 0)

Shifted mode LESENSESCANRES7 for PRS_CH_CTRL

Definition at line 2014 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES8   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 << 0)

Shifted mode LESENSESCANRES8 for PRS_CH_CTRL

Definition at line 1952 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES9   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 << 0)

Shifted mode LESENSESCANRES9 for PRS_CH_CTRL

Definition at line 1971 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LETIMER0CH0   (_PRS_CH_CTRL_SIGSEL_LETIMER0CH0 << 0)

Shifted mode LETIMER0CH0 for PRS_CH_CTRL

Definition at line 1949 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_LETIMER0CH1   (_PRS_CH_CTRL_SIGSEL_LETIMER0CH1 << 0)

Shifted mode LETIMER0CH1 for PRS_CH_CTRL

Definition at line 1968 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_RTCCOMP0   (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0)

Shifted mode RTCCOMP0 for PRS_CH_CTRL

Definition at line 1963 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_RTCCOMP1   (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0)

Shifted mode RTCCOMP1 for PRS_CH_CTRL

Definition at line 1980 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_RTCOF   (_PRS_CH_CTRL_SIGSEL_RTCOF << 0)

Shifted mode RTCOF for PRS_CH_CTRL

Definition at line 1946 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0CC0   (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0)

Shifted mode TIMER0CC0 for PRS_CH_CTRL

Definition at line 1976 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0CC1   (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0)

Shifted mode TIMER0CC1 for PRS_CH_CTRL

Definition at line 1988 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0CC2   (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0)

Shifted mode TIMER0CC2 for PRS_CH_CTRL

Definition at line 1996 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0OF   (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0)

Shifted mode TIMER0OF for PRS_CH_CTRL

Definition at line 1959 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0UF   (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0)

Shifted mode TIMER0UF for PRS_CH_CTRL

Definition at line 1942 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1CC0   (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0)

Shifted mode TIMER1CC0 for PRS_CH_CTRL

Definition at line 1977 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1CC1   (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0)

Shifted mode TIMER1CC1 for PRS_CH_CTRL

Definition at line 1989 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1CC2   (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0)

Shifted mode TIMER1CC2 for PRS_CH_CTRL

Definition at line 1997 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1OF   (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0)

Shifted mode TIMER1OF for PRS_CH_CTRL

Definition at line 1960 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1UF   (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0)

Shifted mode TIMER1UF for PRS_CH_CTRL

Definition at line 1943 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER2CC0   (_PRS_CH_CTRL_SIGSEL_TIMER2CC0 << 0)

Shifted mode TIMER2CC0 for PRS_CH_CTRL

Definition at line 1978 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER2CC1   (_PRS_CH_CTRL_SIGSEL_TIMER2CC1 << 0)

Shifted mode TIMER2CC1 for PRS_CH_CTRL

Definition at line 1990 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER2CC2   (_PRS_CH_CTRL_SIGSEL_TIMER2CC2 << 0)

Shifted mode TIMER2CC2 for PRS_CH_CTRL

Definition at line 1998 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER2OF   (_PRS_CH_CTRL_SIGSEL_TIMER2OF << 0)

Shifted mode TIMER2OF for PRS_CH_CTRL

Definition at line 1961 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER2UF   (_PRS_CH_CTRL_SIGSEL_TIMER2UF << 0)

Shifted mode TIMER2UF for PRS_CH_CTRL

Definition at line 1944 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER3CC0   (_PRS_CH_CTRL_SIGSEL_TIMER3CC0 << 0)

Shifted mode TIMER3CC0 for PRS_CH_CTRL

Definition at line 1979 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER3CC1   (_PRS_CH_CTRL_SIGSEL_TIMER3CC1 << 0)

Shifted mode TIMER3CC1 for PRS_CH_CTRL

Definition at line 1991 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER3CC2   (_PRS_CH_CTRL_SIGSEL_TIMER3CC2 << 0)

Shifted mode TIMER3CC2 for PRS_CH_CTRL

Definition at line 1999 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER3OF   (_PRS_CH_CTRL_SIGSEL_TIMER3OF << 0)

Shifted mode TIMER3OF for PRS_CH_CTRL

Definition at line 1962 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_TIMER3UF   (_PRS_CH_CTRL_SIGSEL_TIMER3UF << 0)

Shifted mode TIMER3UF for PRS_CH_CTRL

Definition at line 1945 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_UART0RXDATAV   (_PRS_CH_CTRL_SIGSEL_UART0RXDATAV << 0)

Shifted mode UART0RXDATAV for PRS_CH_CTRL

Definition at line 1981 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_UART0TXC   (_PRS_CH_CTRL_SIGSEL_UART0TXC << 0)

Shifted mode UART0TXC for PRS_CH_CTRL

Definition at line 1964 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_UART1RXDATAV   (_PRS_CH_CTRL_SIGSEL_UART1RXDATAV << 0)

Shifted mode UART1RXDATAV for PRS_CH_CTRL

Definition at line 1982 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_UART1TXC   (_PRS_CH_CTRL_SIGSEL_UART1TXC << 0)

Shifted mode UART1TXC for PRS_CH_CTRL

Definition at line 1965 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_USART0IRTX   (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0)

Shifted mode USART0IRTX for PRS_CH_CTRL

Definition at line 1941 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_USART0RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0)

Shifted mode USART0RXDATAV for PRS_CH_CTRL

Definition at line 1973 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_USART0TXC   (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0)

Shifted mode USART0TXC for PRS_CH_CTRL

Definition at line 1956 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_USART1RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0)

Shifted mode USART1RXDATAV for PRS_CH_CTRL

Definition at line 1974 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_USART1TXC   (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0)

Shifted mode USART1TXC for PRS_CH_CTRL

Definition at line 1957 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_USART2RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART2RXDATAV << 0)

Shifted mode USART2RXDATAV for PRS_CH_CTRL

Definition at line 1975 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_USART2TXC   (_PRS_CH_CTRL_SIGSEL_USART2TXC << 0)

Shifted mode USART2TXC for PRS_CH_CTRL

Definition at line 1958 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SIGSEL_VCMPOUT   (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0)

Shifted mode VCMPOUT for PRS_CH_CTRL

Definition at line 1936 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_ACMP0   (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16)

Shifted mode ACMP0 for PRS_CH_CTRL

Definition at line 2043 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_ACMP1   (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16)

Shifted mode ACMP1 for PRS_CH_CTRL

Definition at line 2044 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_ADC0   (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16)

Shifted mode ADC0 for PRS_CH_CTRL

Definition at line 2046 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_BURTC   (_PRS_CH_CTRL_SOURCESEL_BURTC << 16)

Shifted mode BURTC for PRS_CH_CTRL

Definition at line 2060 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_DAC0   (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16)

Shifted mode DAC0 for PRS_CH_CTRL

Definition at line 2045 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_GPIOH   (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16)

Shifted mode GPIOH for PRS_CH_CTRL

Definition at line 2058 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_GPIOL   (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16)

Shifted mode GPIOL for PRS_CH_CTRL

Definition at line 2057 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_LESENSED   (_PRS_CH_CTRL_SOURCESEL_LESENSED << 16)

Shifted mode LESENSED for PRS_CH_CTRL

Definition at line 2063 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_LESENSEH   (_PRS_CH_CTRL_SOURCESEL_LESENSEH << 16)

Shifted mode LESENSEH for PRS_CH_CTRL

Definition at line 2062 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_LESENSEL   (_PRS_CH_CTRL_SOURCESEL_LESENSEL << 16)

Shifted mode LESENSEL for PRS_CH_CTRL

Definition at line 2061 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_LETIMER0   (_PRS_CH_CTRL_SOURCESEL_LETIMER0 << 16)

Shifted mode LETIMER0 for PRS_CH_CTRL

Definition at line 2059 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_NONE   (_PRS_CH_CTRL_SOURCESEL_NONE << 16)

Shifted mode NONE for PRS_CH_CTRL

Definition at line 2041 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_RTC   (_PRS_CH_CTRL_SOURCESEL_RTC << 16)

Shifted mode RTC for PRS_CH_CTRL

Definition at line 2054 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_TIMER0   (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16)

Shifted mode TIMER0 for PRS_CH_CTRL

Definition at line 2050 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_TIMER1   (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16)

Shifted mode TIMER1 for PRS_CH_CTRL

Definition at line 2051 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_TIMER2   (_PRS_CH_CTRL_SOURCESEL_TIMER2 << 16)

Shifted mode TIMER2 for PRS_CH_CTRL

Definition at line 2052 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_TIMER3   (_PRS_CH_CTRL_SOURCESEL_TIMER3 << 16)

Shifted mode TIMER3 for PRS_CH_CTRL

Definition at line 2053 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_UART0   (_PRS_CH_CTRL_SOURCESEL_UART0 << 16)

Shifted mode UART0 for PRS_CH_CTRL

Definition at line 2055 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_UART1   (_PRS_CH_CTRL_SOURCESEL_UART1 << 16)

Shifted mode UART1 for PRS_CH_CTRL

Definition at line 2056 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_USART0   (_PRS_CH_CTRL_SOURCESEL_USART0 << 16)

Shifted mode USART0 for PRS_CH_CTRL

Definition at line 2047 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_USART1   (_PRS_CH_CTRL_SOURCESEL_USART1 << 16)

Shifted mode USART1 for PRS_CH_CTRL

Definition at line 2048 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_USART2   (_PRS_CH_CTRL_SOURCESEL_USART2 << 16)

Shifted mode USART2 for PRS_CH_CTRL

Definition at line 2049 of file efm32lg895f256.h.

#define PRS_CH_CTRL_SOURCESEL_VCMP   (_PRS_CH_CTRL_SOURCESEL_VCMP << 16)

Shifted mode VCMP for PRS_CH_CTRL

Definition at line 2042 of file efm32lg895f256.h.

#define PRS_ROUTE_CH0PEN   (0x1UL << 0)

CH0 Pin Enable

Definition at line 1821 of file efm32lg895f256.h.

#define PRS_ROUTE_CH0PEN_DEFAULT   (_PRS_ROUTE_CH0PEN_DEFAULT << 0)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 1825 of file efm32lg895f256.h.

#define PRS_ROUTE_CH1PEN   (0x1UL << 1)

CH1 Pin Enable

Definition at line 1826 of file efm32lg895f256.h.

#define PRS_ROUTE_CH1PEN_DEFAULT   (_PRS_ROUTE_CH1PEN_DEFAULT << 1)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 1830 of file efm32lg895f256.h.

#define PRS_ROUTE_CH2PEN   (0x1UL << 2)

CH2 Pin Enable

Definition at line 1831 of file efm32lg895f256.h.

#define PRS_ROUTE_CH2PEN_DEFAULT   (_PRS_ROUTE_CH2PEN_DEFAULT << 2)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 1835 of file efm32lg895f256.h.

#define PRS_ROUTE_CH3PEN   (0x1UL << 3)

CH3 Pin Enable

Definition at line 1836 of file efm32lg895f256.h.

#define PRS_ROUTE_CH3PEN_DEFAULT   (_PRS_ROUTE_CH3PEN_DEFAULT << 3)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 1840 of file efm32lg895f256.h.

#define PRS_ROUTE_LOCATION_DEFAULT   (_PRS_ROUTE_LOCATION_DEFAULT << 8)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 1847 of file efm32lg895f256.h.

#define PRS_ROUTE_LOCATION_LOC0   (_PRS_ROUTE_LOCATION_LOC0 << 8)

Shifted mode LOC0 for PRS_ROUTE

Definition at line 1846 of file efm32lg895f256.h.

#define PRS_ROUTE_LOCATION_LOC1   (_PRS_ROUTE_LOCATION_LOC1 << 8)

Shifted mode LOC1 for PRS_ROUTE

Definition at line 1848 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH0LEVEL   (0x1UL << 0)

Channel 0 Software Level

Definition at line 1757 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH0LEVEL_DEFAULT   (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 1761 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH10LEVEL   (0x1UL << 10)

Channel 10 Software Level

Definition at line 1807 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH10LEVEL_DEFAULT   (_PRS_SWLEVEL_CH10LEVEL_DEFAULT << 10)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 1811 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH11LEVEL   (0x1UL << 11)

Channel 11 Software Level

Definition at line 1812 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH11LEVEL_DEFAULT   (_PRS_SWLEVEL_CH11LEVEL_DEFAULT << 11)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 1816 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH1LEVEL   (0x1UL << 1)

Channel 1 Software Level

Definition at line 1762 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH1LEVEL_DEFAULT   (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 1766 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH2LEVEL   (0x1UL << 2)

Channel 2 Software Level

Definition at line 1767 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH2LEVEL_DEFAULT   (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 1771 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH3LEVEL   (0x1UL << 3)

Channel 3 Software Level

Definition at line 1772 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH3LEVEL_DEFAULT   (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 1776 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH4LEVEL   (0x1UL << 4)

Channel 4 Software Level

Definition at line 1777 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH4LEVEL_DEFAULT   (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 1781 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH5LEVEL   (0x1UL << 5)

Channel 5 Software Level

Definition at line 1782 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH5LEVEL_DEFAULT   (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 1786 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH6LEVEL   (0x1UL << 6)

Channel 6 Software Level

Definition at line 1787 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH6LEVEL_DEFAULT   (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 1791 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH7LEVEL   (0x1UL << 7)

Channel 7 Software Level

Definition at line 1792 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH7LEVEL_DEFAULT   (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 1796 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH8LEVEL   (0x1UL << 8)

Channel 8 Software Level

Definition at line 1797 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH8LEVEL_DEFAULT   (_PRS_SWLEVEL_CH8LEVEL_DEFAULT << 8)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 1801 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH9LEVEL   (0x1UL << 9)

Channel 9 Software Level

Definition at line 1802 of file efm32lg895f256.h.

#define PRS_SWLEVEL_CH9LEVEL_DEFAULT   (_PRS_SWLEVEL_CH9LEVEL_DEFAULT << 9)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 1806 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH0PULSE   (0x1UL << 0)

Channel 0 Pulse Generation

Definition at line 1693 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH0PULSE_DEFAULT   (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 1697 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH10PULSE   (0x1UL << 10)

Channel 10 Pulse Generation

Definition at line 1743 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH10PULSE_DEFAULT   (_PRS_SWPULSE_CH10PULSE_DEFAULT << 10)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 1747 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH11PULSE   (0x1UL << 11)

Channel 11 Pulse Generation

Definition at line 1748 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH11PULSE_DEFAULT   (_PRS_SWPULSE_CH11PULSE_DEFAULT << 11)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 1752 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH1PULSE   (0x1UL << 1)

Channel 1 Pulse Generation

Definition at line 1698 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH1PULSE_DEFAULT   (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 1702 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH2PULSE   (0x1UL << 2)

Channel 2 Pulse Generation

Definition at line 1703 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH2PULSE_DEFAULT   (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 1707 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH3PULSE   (0x1UL << 3)

Channel 3 Pulse Generation

Definition at line 1708 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH3PULSE_DEFAULT   (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 1712 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH4PULSE   (0x1UL << 4)

Channel 4 Pulse Generation

Definition at line 1713 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH4PULSE_DEFAULT   (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 1717 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH5PULSE   (0x1UL << 5)

Channel 5 Pulse Generation

Definition at line 1718 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH5PULSE_DEFAULT   (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 1722 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH6PULSE   (0x1UL << 6)

Channel 6 Pulse Generation

Definition at line 1723 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH6PULSE_DEFAULT   (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 1727 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH7PULSE   (0x1UL << 7)

Channel 7 Pulse Generation

Definition at line 1728 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH7PULSE_DEFAULT   (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 1732 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH8PULSE   (0x1UL << 8)

Channel 8 Pulse Generation

Definition at line 1733 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH8PULSE_DEFAULT   (_PRS_SWPULSE_CH8PULSE_DEFAULT << 8)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 1737 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH9PULSE   (0x1UL << 9)

Channel 9 Pulse Generation

Definition at line 1738 of file efm32lg895f256.h.

#define PRS_SWPULSE_CH9PULSE_DEFAULT   (_PRS_SWPULSE_CH9PULSE_DEFAULT << 9)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 1742 of file efm32lg895f256.h.