EFM32GG230F1024 Peripheral Memory Map
[EFM32GG230F1024]


Defines

#define DMA_BASE   (0x400C2000UL)
#define AES_BASE   (0x400E0000UL)
#define MSC_BASE   (0x400C0000UL)
#define EMU_BASE   (0x400C6000UL)
#define RMU_BASE   (0x400CA000UL)
#define CMU_BASE   (0x400C8000UL)
#define LESENSE_BASE   (0x4008C000UL)
#define RTC_BASE   (0x40080000UL)
#define LETIMER0_BASE   (0x40082000UL)
#define USART0_BASE   (0x4000C000UL)
#define USART1_BASE   (0x4000C400UL)
#define USART2_BASE   (0x4000C800UL)
#define TIMER0_BASE   (0x40010000UL)
#define TIMER1_BASE   (0x40010400UL)
#define TIMER2_BASE   (0x40010800UL)
#define TIMER3_BASE   (0x40010C00UL)
#define ACMP0_BASE   (0x40001000UL)
#define ACMP1_BASE   (0x40001400UL)
#define I2C0_BASE   (0x4000A000UL)
#define I2C1_BASE   (0x4000A400UL)
#define GPIO_BASE   (0x40006000UL)
#define VCMP_BASE   (0x40000000UL)
#define PRS_BASE   (0x400CC000UL)
#define LEUART0_BASE   (0x40084000UL)
#define LEUART1_BASE   (0x40084400UL)
#define PCNT0_BASE   (0x40086000UL)
#define PCNT1_BASE   (0x40086400UL)
#define PCNT2_BASE   (0x40086800UL)
#define ADC0_BASE   (0x40002000UL)
#define DAC0_BASE   (0x40004000UL)
#define BURTC_BASE   (0x40081000UL)
#define WDOG_BASE   (0x40088000UL)
#define ETM_BASE   (0xE0041000UL)
#define CALIBRATE_BASE   (0x0FE08000UL)
#define DEVINFO_BASE   (0x0FE081B0UL)
#define ROMTABLE_BASE   (0xE00FFFD0UL)
#define LOCKBITS_BASE   (0x0FE04000UL)
#define USERDATA_BASE   (0x0FE00000UL)

Define Documentation

#define ACMP0_BASE   (0x40001000UL)

ACMP0 base address

Definition at line 426 of file efm32gg230f1024.h.

#define ACMP1_BASE   (0x40001400UL)

ACMP1 base address

Definition at line 427 of file efm32gg230f1024.h.

#define ADC0_BASE   (0x40002000UL)

ADC0 base address

Definition at line 438 of file efm32gg230f1024.h.

#define AES_BASE   (0x400E0000UL)

AES base address

Definition at line 411 of file efm32gg230f1024.h.

#define BURTC_BASE   (0x40081000UL)

BURTC base address

Definition at line 440 of file efm32gg230f1024.h.

#define CALIBRATE_BASE   (0x0FE08000UL)

CALIBRATE base address

Definition at line 443 of file efm32gg230f1024.h.

#define CMU_BASE   (0x400C8000UL)

CMU base address

Definition at line 415 of file efm32gg230f1024.h.

#define DAC0_BASE   (0x40004000UL)

DAC0 base address

Definition at line 439 of file efm32gg230f1024.h.

#define DEVINFO_BASE   (0x0FE081B0UL)

DEVINFO base address

Definition at line 444 of file efm32gg230f1024.h.

#define DMA_BASE   (0x400C2000UL)

DMA base address

Definition at line 410 of file efm32gg230f1024.h.

#define EMU_BASE   (0x400C6000UL)

EMU base address

Definition at line 413 of file efm32gg230f1024.h.

#define ETM_BASE   (0xE0041000UL)

ETM base address

Definition at line 442 of file efm32gg230f1024.h.

#define GPIO_BASE   (0x40006000UL)

GPIO base address

Definition at line 430 of file efm32gg230f1024.h.

#define I2C0_BASE   (0x4000A000UL)

I2C0 base address

Definition at line 428 of file efm32gg230f1024.h.

#define I2C1_BASE   (0x4000A400UL)

I2C1 base address

Definition at line 429 of file efm32gg230f1024.h.

#define LESENSE_BASE   (0x4008C000UL)

LESENSE base address

Definition at line 416 of file efm32gg230f1024.h.

#define LETIMER0_BASE   (0x40082000UL)

LETIMER0 base address

Definition at line 418 of file efm32gg230f1024.h.

#define LEUART0_BASE   (0x40084000UL)

LEUART0 base address

Definition at line 433 of file efm32gg230f1024.h.

#define LEUART1_BASE   (0x40084400UL)

LEUART1 base address

Definition at line 434 of file efm32gg230f1024.h.

#define LOCKBITS_BASE   (0x0FE04000UL)

Lock-bits page base address

Definition at line 446 of file efm32gg230f1024.h.

#define MSC_BASE   (0x400C0000UL)

MSC base address

Definition at line 412 of file efm32gg230f1024.h.

#define PCNT0_BASE   (0x40086000UL)

PCNT0 base address

Definition at line 435 of file efm32gg230f1024.h.

#define PCNT1_BASE   (0x40086400UL)

PCNT1 base address

Definition at line 436 of file efm32gg230f1024.h.

#define PCNT2_BASE   (0x40086800UL)

PCNT2 base address

Definition at line 437 of file efm32gg230f1024.h.

#define PRS_BASE   (0x400CC000UL)

PRS base address

Definition at line 432 of file efm32gg230f1024.h.

#define RMU_BASE   (0x400CA000UL)

RMU base address

Definition at line 414 of file efm32gg230f1024.h.

#define ROMTABLE_BASE   (0xE00FFFD0UL)

ROMTABLE base address

Definition at line 445 of file efm32gg230f1024.h.

#define RTC_BASE   (0x40080000UL)

RTC base address

Definition at line 417 of file efm32gg230f1024.h.

#define TIMER0_BASE   (0x40010000UL)

TIMER0 base address

Definition at line 422 of file efm32gg230f1024.h.

#define TIMER1_BASE   (0x40010400UL)

TIMER1 base address

Definition at line 423 of file efm32gg230f1024.h.

#define TIMER2_BASE   (0x40010800UL)

TIMER2 base address

Definition at line 424 of file efm32gg230f1024.h.

#define TIMER3_BASE   (0x40010C00UL)

TIMER3 base address

Definition at line 425 of file efm32gg230f1024.h.

#define USART0_BASE   (0x4000C000UL)

USART0 base address

Definition at line 419 of file efm32gg230f1024.h.

#define USART1_BASE   (0x4000C400UL)

USART1 base address

Definition at line 420 of file efm32gg230f1024.h.

#define USART2_BASE   (0x4000C800UL)

USART2 base address

Definition at line 421 of file efm32gg230f1024.h.

#define USERDATA_BASE   (0x0FE00000UL)

User data page base address

Definition at line 447 of file efm32gg230f1024.h.

#define VCMP_BASE   (0x40000000UL)

VCMP base address

Definition at line 431 of file efm32gg230f1024.h.

#define WDOG_BASE   (0x40088000UL)

WDOG base address

Definition at line 441 of file efm32gg230f1024.h.