EFM32 Giant Gecko Software Documentation  efm32gg-doc-4.2.1
em_timer.h
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1 /***************************************************************************/
33 #ifndef __SILICON_LABS_EM_TIMER_H__
34 #define __SILICON_LABS_EM_TIMER_H__
35 
36 #include "em_device.h"
37 #if defined(TIMER_COUNT) && (TIMER_COUNT > 0)
38 
39 #include <stdbool.h>
40 #include "em_assert.h"
41 
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45 
46 /***************************************************************************/
51 /***************************************************************************/
56 /*******************************************************************************
57  ******************************* DEFINES ***********************************
58  ******************************************************************************/
59 
64 #if (TIMER_COUNT == 1)
65 #define TIMER_REF_VALID(ref) ((ref) == TIMER0)
66 #elif (TIMER_COUNT == 2)
67 #define TIMER_REF_VALID(ref) (((ref) == TIMER0) || ((ref) == TIMER1))
68 #elif (TIMER_COUNT == 3)
69 #define TIMER_REF_VALID(ref) (((ref) == TIMER0) \
70  || ((ref) == TIMER1) \
71  || ((ref) == TIMER2))
72 #elif (TIMER_COUNT == 4)
73 #define TIMER_REF_VALID(ref) (((ref) == TIMER0) \
74  || ((ref) == TIMER1) \
75  || ((ref) == TIMER2) \
76  || ((ref) == TIMER3))
77 #else
78 #error "Undefined number of timers."
79 #endif
80 
82 #if defined(_SILICON_LABS_32B_PLATFORM_1)
83 #define TIMER_CH_VALID(ch) ((ch) < 3)
84 #elif defined(_SILICON_LABS_32B_PLATFORM_2)
85 #define TIMER_CH_VALID(ch) ((ch) < 4)
86 #else
87 #error "Unknown platform. Undefined number of channels."
88 #endif
89 
92 /*******************************************************************************
93  ******************************** ENUMS ************************************
94  ******************************************************************************/
95 
97 typedef enum
98 {
104 
105 
107 typedef enum
108 {
111 
114 
121 
122 
124 typedef enum
125 {
128 
131 
134 
138 
139 
141 typedef enum
142 {
158 
159 
161 typedef enum
162 {
165 
168 
171 
175 
176 
178 typedef enum
179 {
185 
186 
188 typedef enum
189 {
192 
195 
198 
202 
203 
205 typedef enum
206 {
219 
220 
222 typedef enum
223 {
228 #if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH4)
230 #endif
231 #if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH5)
233 #endif
234 #if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH6)
236 #endif
237 #if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH7)
239 #endif
240 #if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH8)
242 #endif
243 #if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH9)
245 #endif
246 #if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH10)
248 #endif
249 #if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH11)
251 #endif
253 
254 #if defined(_TIMER_DTFC_DTFA_NONE)
255 
256 typedef enum
257 {
263 #endif
264 
265 /*******************************************************************************
266  ******************************* STRUCTS ***********************************
267  ******************************************************************************/
268 
270 typedef struct
271 {
273  bool enable;
274 
276  bool debugRun;
277 
280 
283 
284 #if defined(TIMER_CTRL_X2CNT) && defined(TIMER_CTRL_ATI)
285 
286  bool count2x;
287 
290  bool ati;
291 #endif
292 
295 
298 
301 
303  bool dmaClrAct;
304 
307 
309  bool oneShot;
310 
312  bool sync;
314 
316 #if defined(TIMER_CTRL_X2CNT) && defined(TIMER_CTRL_ATI)
317 #define TIMER_INIT_DEFAULT \
318 { \
319  true, /* Enable timer when init complete. */ \
320  false, /* Stop counter during debug halt. */ \
321  timerPrescale1, /* No prescaling. */ \
322  timerClkSelHFPerClk, /* Select HFPER clock. */ \
323  false, /* Not 2x count mode. */ \
324  false, /* No ATI. */ \
325  timerInputActionNone, /* No action on falling input edge. */ \
326  timerInputActionNone, /* No action on rising input edge. */ \
327  timerModeUp, /* Up-counting. */ \
328  false, /* Do not clear DMA requests when DMA channel is active. */ \
329  false, /* Select X2 quadrature decode mode (if used). */ \
330  false, /* Disable one shot. */ \
331  false /* Not started/stopped/reloaded by other timers. */ \
332 }
333 #else
334 #define TIMER_INIT_DEFAULT \
335 { \
336  true, /* Enable timer when init complete. */ \
337  false, /* Stop counter during debug halt. */ \
338  timerPrescale1, /* No prescaling. */ \
339  timerClkSelHFPerClk, /* Select HFPER clock. */ \
340  timerInputActionNone, /* No action on falling input edge. */ \
341  timerInputActionNone, /* No action on rising input edge. */ \
342  timerModeUp, /* Up-counting. */ \
343  false, /* Do not clear DMA requests when DMA channel is active. */ \
344  false, /* Select X2 quadrature decode mode (if used). */ \
345  false, /* Disable one shot. */ \
346  false /* Not started/stopped/reloaded by other timers. */ \
347 }
348 #endif
349 
351 typedef struct
352 {
355 
358 
364 
367 
370 
373 
376 
378  bool filter;
379 
381  bool prsInput;
382 
390  bool coist;
391 
393  bool outInvert;
395 
397 #define TIMER_INITCC_DEFAULT \
398 { \
399  timerEventEveryEdge, /* Event on every capture. */ \
400  timerEdgeRising, /* Input capture edge on rising edge. */ \
401  timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
402  timerOutputActionNone, /* No action on underflow. */ \
403  timerOutputActionNone, /* No action on overflow. */ \
404  timerOutputActionNone, /* No action on match. */ \
405  timerCCModeOff, /* Disable compare/capture channel. */ \
406  false, /* Disable filter. */ \
407  false, /* Select TIMERnCCx input. */ \
408  false, /* Clear output when counter disabled. */ \
409  false /* Do not invert output. */ \
410 }
411 
412 #if defined(_TIMER_DTCTRL_MASK)
413 
414 typedef struct
415 {
417  bool enable;
418 
421 
424 
427 
430 
434 
437 
439  unsigned int riseTime;
440 
442  unsigned int fallTime;
443 
449 
452 
455 
458 
461 
464 
467 
470 
472 
473 
475 #define TIMER_INITDTI_DEFAULT \
476 { \
477  true, /* Enable the DTI. */ \
478  false, /* CC[0|1|2] outputs are active high. */ \
479  false, /* CDTI[0|1|2] outputs are not inverted. */ \
480  false, /* No auto restart when debugger exits. */ \
481  false, /* No PRS source selected. */ \
482  timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
483  timerPrescale1, /* No prescaling. */ \
484  0, /* No rise time. */ \
485  0, /* No fall time. */ \
486  TIMER_DTOGEN_DTOGCC0EN|TIMER_DTOGEN_DTOGCDTI0EN, /* Enable CC0 and CDTI0 */\
487  true, /* Enable core lockup as fault source */ \
488  true, /* Enable debugger as fault source */ \
489  false, /* Disable PRS fault source 0 */ \
490  timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
491  false, /* Disable PRS fault source 1 */ \
492  timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
493  timerDtiFaultActionInactive, /* No fault action. */ \
494 }
495 #endif /* _TIMER_DTCTRL_MASK */
496 
497 
498 /*******************************************************************************
499  ***************************** PROTOTYPES **********************************
500  ******************************************************************************/
501 
502 /***************************************************************************/
516 __STATIC_INLINE uint32_t TIMER_CaptureGet(TIMER_TypeDef *timer, unsigned int ch)
517 {
518  return timer->CC[ch].CCV;
519 }
520 
521 
522 /***************************************************************************/
541 __STATIC_INLINE void TIMER_CompareBufSet(TIMER_TypeDef *timer,
542  unsigned int ch,
543  uint32_t val)
544 {
545  timer->CC[ch].CCVB = val;
546 }
547 
548 
549 /***************************************************************************/
563 __STATIC_INLINE void TIMER_CompareSet(TIMER_TypeDef *timer,
564  unsigned int ch,
565  uint32_t val)
566 {
567  timer->CC[ch].CCV = val;
568 }
569 
570 
571 /***************************************************************************/
581 __STATIC_INLINE uint32_t TIMER_CounterGet(TIMER_TypeDef *timer)
582 {
583  return timer->CNT;
584 }
585 
586 
587 /***************************************************************************/
597 __STATIC_INLINE void TIMER_CounterSet(TIMER_TypeDef *timer, uint32_t val)
598 {
599  timer->CNT = val;
600 }
601 
602 
603 /***************************************************************************/
613 __STATIC_INLINE void TIMER_Enable(TIMER_TypeDef *timer, bool enable)
614 {
615  EFM_ASSERT(TIMER_REF_VALID(timer));
616 
617  if (enable)
618  {
619  timer->CMD = TIMER_CMD_START;
620  }
621  else
622  {
623  timer->CMD = TIMER_CMD_STOP;
624  }
625 }
626 
627 
628 void TIMER_Init(TIMER_TypeDef *timer, const TIMER_Init_TypeDef *init);
629 void TIMER_InitCC(TIMER_TypeDef *timer,
630  unsigned int ch,
631  const TIMER_InitCC_TypeDef *init);
632 
633 #if defined(_TIMER_DTCTRL_MASK)
634 void TIMER_InitDTI(TIMER_TypeDef *timer, const TIMER_InitDTI_TypeDef *init);
635 
636 /***************************************************************************/
646 __STATIC_INLINE void TIMER_EnableDTI(TIMER_TypeDef *timer, bool enable)
647 {
648  EFM_ASSERT(TIMER0 == timer);
649 
650  if (enable)
651  {
652  timer->DTCTRL |= TIMER_DTCTRL_DTEN;
653  }
654  else
655  {
656  timer->DTCTRL &= ~TIMER_DTCTRL_DTEN;
657  }
658 }
659 
660 
661 /***************************************************************************/
675 __STATIC_INLINE uint32_t TIMER_GetDTIFault(TIMER_TypeDef *timer)
676 {
677  EFM_ASSERT(TIMER0 == timer);
678  return timer->DTFAULT;
679 }
680 
681 
682 /***************************************************************************/
693 __STATIC_INLINE void TIMER_ClearDTIFault(TIMER_TypeDef *timer, uint32_t flags)
694 
695 {
696  EFM_ASSERT(TIMER0 == timer);
697  timer->DTFAULTC = flags;
698 }
699 #endif /* _TIMER_DTCTRL_MASK */
700 
701 
702 /***************************************************************************/
713 __STATIC_INLINE void TIMER_IntClear(TIMER_TypeDef *timer, uint32_t flags)
714 {
715  timer->IFC = flags;
716 }
717 
718 
719 /***************************************************************************/
730 __STATIC_INLINE void TIMER_IntDisable(TIMER_TypeDef *timer, uint32_t flags)
731 {
732  timer->IEN &= ~flags;
733 }
734 
735 
736 /***************************************************************************/
752 __STATIC_INLINE void TIMER_IntEnable(TIMER_TypeDef *timer, uint32_t flags)
753 {
754  timer->IEN |= flags;
755 }
756 
757 
758 /***************************************************************************/
772 __STATIC_INLINE uint32_t TIMER_IntGet(TIMER_TypeDef *timer)
773 {
774  return timer->IF;
775 }
776 
777 
778 /***************************************************************************/
797 __STATIC_INLINE uint32_t TIMER_IntGetEnabled(TIMER_TypeDef *timer)
798 {
799  uint32_t ien;
800 
801  /* Store TIMER->IEN in temporary variable in order to define explicit order
802  * of volatile accesses. */
803  ien = timer->IEN;
804 
805  /* Bitwise AND of pending and enabled interrupts */
806  return timer->IF & ien;
807 }
808 
809 
810 /***************************************************************************/
821 __STATIC_INLINE void TIMER_IntSet(TIMER_TypeDef *timer, uint32_t flags)
822 {
823  timer->IFS = flags;
824 }
825 
826 #if defined(_TIMER_DTLOCK_LOCKKEY_LOCK)
827 /***************************************************************************/
843 __STATIC_INLINE void TIMER_Lock(TIMER_TypeDef *timer)
844 {
845  EFM_ASSERT(TIMER0 == timer);
846 
848 }
849 #endif
850 
851 void TIMER_Reset(TIMER_TypeDef *timer);
852 
853 /***************************************************************************/
868 __STATIC_INLINE void TIMER_TopBufSet(TIMER_TypeDef *timer, uint32_t val)
869 {
870  timer->TOPB = val;
871 }
872 
873 
874 /***************************************************************************/
884 __STATIC_INLINE uint32_t TIMER_TopGet(TIMER_TypeDef *timer)
885 {
886  return timer->TOP;
887 }
888 
889 
890 /***************************************************************************/
900 __STATIC_INLINE void TIMER_TopSet(TIMER_TypeDef *timer, uint32_t val)
901 {
902  timer->TOP = val;
903 }
904 
905 
906 #if defined(TIMER_DTLOCK_LOCKKEY_UNLOCK)
907 /***************************************************************************/
914 __STATIC_INLINE void TIMER_Unlock(TIMER_TypeDef *timer)
915 {
916  EFM_ASSERT(TIMER0 == timer);
917 
919 }
920 #endif
921 
922 
926 #ifdef __cplusplus
927 }
928 #endif
929 
930 #endif /* defined(TIMER_COUNT) && (TIMER_COUNT > 0) */
931 #endif /* __SILICON_LABS_EM_TIMER_H__ */
uint32_t outputsEnableMask
Definition: em_timer.h:448
#define _TIMER_CTRL_MODE_QDEC
Definition: efm32gg_timer.h:82
#define _TIMER_CC_CTRL_PRSSEL_PRSCH5
__STATIC_INLINE void TIMER_IntDisable(TIMER_TypeDef *timer, uint32_t flags)
Disable one or more TIMER interrupts.
Definition: em_timer.h:730
#define _TIMER_CC_CTRL_CUFOA_SET
__STATIC_INLINE void TIMER_TopSet(TIMER_TypeDef *timer, uint32_t val)
Set top value for timer.
Definition: em_timer.h:900
TIMER_CC_TypeDef CC[3]
Definition: efm32gg_timer.h:56
#define _TIMER_DTFC_DTFA_INACTIVE
#define TIMER_DTLOCK_LOCKKEY_UNLOCK
TIMER_ClkSel_TypeDef clkSel
Definition: em_timer.h:282
bool enableFaultSourcePrsSel0
Definition: em_timer.h:457
TIMER_OutputAction_TypeDef cufoa
Definition: em_timer.h:366
Emlib peripheral API "assert" implementation.
TIMER_PRSSEL_TypeDef faultSourcePrsSel0
Definition: em_timer.h:460
void TIMER_Reset(TIMER_TypeDef *timer)
Reset TIMER to same state as after a HW reset.
Definition: em_timer.c:218
TIMER_InputAction_TypeDef fallAction
Definition: em_timer.h:294
#define _TIMER_DTFC_DTFA_CLEAR
#define _TIMER_CC_CTRL_CUFOA_TOGGLE
#define _TIMER_CTRL_MODE_DOWN
Definition: efm32gg_timer.h:80
__STATIC_INLINE void TIMER_Enable(TIMER_TypeDef *timer, bool enable)
Start/stop TIMER.
Definition: em_timer.h:613
__IO uint32_t IFC
Definition: efm32gg_timer.h:49
#define TIMER0
__STATIC_INLINE void TIMER_CounterSet(TIMER_TypeDef *timer, uint32_t val)
Set TIMER counter value.
Definition: em_timer.h:597
#define TIMER_DTLOCK_LOCKKEY_LOCK
#define _TIMER_CC_CTRL_ICEVCTRL_FALLING
#define _TIMER_CC_CTRL_PRSSEL_PRSCH6
#define _TIMER_CC_CTRL_PRSSEL_PRSCH10
#define _TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE
#define _TIMER_CTRL_PRESC_DIV4
__STATIC_INLINE void TIMER_IntClear(TIMER_TypeDef *timer, uint32_t flags)
Clear one or more pending TIMER interrupts.
Definition: em_timer.h:713
#define _TIMER_CC_CTRL_PRSSEL_PRSCH2
#define _TIMER_CTRL_FALLA_START
TIMER_Event_TypeDef
Definition: em_timer.h:141
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
#define TIMER_DTCTRL_DTEN
TIMER_PRSSEL_TypeDef
Definition: em_timer.h:222
TIMER_Mode_TypeDef mode
Definition: em_timer.h:300
__STATIC_INLINE void TIMER_EnableDTI(TIMER_TypeDef *timer, bool enable)
Enable or disable DTI unit.
Definition: em_timer.h:646
#define _TIMER_CC_CTRL_PRSSEL_PRSCH3
TIMER_CCMode_TypeDef mode
Definition: em_timer.h:375
__IO uint32_t IFS
Definition: efm32gg_timer.h:48
void TIMER_InitDTI(TIMER_TypeDef *timer, const TIMER_InitDTI_TypeDef *init)
Initialize the TIMER DTI unit.
Definition: em_timer.c:163
#define _TIMER_CTRL_PRESC_DIV1024
__STATIC_INLINE void TIMER_IntEnable(TIMER_TypeDef *timer, uint32_t flags)
Enable one or more TIMER interrupts.
Definition: em_timer.h:752
__IO uint32_t DTLOCK
Definition: efm32gg_timer.h:65
#define _TIMER_CC_CTRL_MODE_OUTPUTCOMPARE
__IO uint32_t CCVB
#define TIMER_CMD_START
__I uint32_t DTFAULT
Definition: efm32gg_timer.h:63
#define _TIMER_CC_CTRL_ICEDGE_FALLING
#define _TIMER_CC_CTRL_CUFOA_CLEAR
#define _TIMER_CTRL_FALLA_STOP
__STATIC_INLINE void TIMER_IntSet(TIMER_TypeDef *timer, uint32_t flags)
Set one or more pending TIMER interrupts from SW.
Definition: em_timer.h:821
__IO uint32_t CCV
TIMER_PRSSEL_TypeDef prsSel
Definition: em_timer.h:363
__STATIC_INLINE void TIMER_TopBufSet(TIMER_TypeDef *timer, uint32_t val)
Set top value buffer for timer.
Definition: em_timer.h:868
TIMER_CCMode_TypeDef
Definition: em_timer.h:97
TIMER_Edge_TypeDef edge
Definition: em_timer.h:357
#define _TIMER_CTRL_PRESC_DIV16
__O uint32_t DTFAULTC
Definition: efm32gg_timer.h:64
__IO uint32_t DTCTRL
Definition: efm32gg_timer.h:59
#define _TIMER_CTRL_PRESC_DIV64
#define _TIMER_CTRL_CLKSEL_TIMEROUF
#define _TIMER_CTRL_MODE_UP
Definition: efm32gg_timer.h:79
#define _TIMER_CTRL_FALLA_RELOADSTART
__I uint32_t IF
Definition: efm32gg_timer.h:47
__STATIC_INLINE void TIMER_Lock(TIMER_TypeDef *timer)
Lock some of the TIMER registers in order to protect them from being modified.
Definition: em_timer.h:843
#define _TIMER_CTRL_PRESC_DIV32
TIMER_DtiFaultAction_TypeDef faultAction
Definition: em_timer.h:469
#define _TIMER_CC_CTRL_PRSSEL_PRSCH7
#define _TIMER_CTRL_PRESC_DIV128
__STATIC_INLINE uint32_t TIMER_IntGet(TIMER_TypeDef *timer)
Get pending TIMER interrupt flags.
Definition: em_timer.h:772
#define _TIMER_CC_CTRL_ICEDGE_NONE
#define _TIMER_CC_CTRL_MODE_INPUTCAPTURE
TIMER_OutputAction_TypeDef
Definition: em_timer.h:188
#define _TIMER_CC_CTRL_PRSSEL_PRSCH1
__IO uint32_t CMD
Definition: efm32gg_timer.h:44
#define _TIMER_CTRL_MODE_UPDOWN
Definition: efm32gg_timer.h:81
#define _TIMER_CC_CTRL_CUFOA_NONE
#define _TIMER_CC_CTRL_ICEDGE_RISING
#define _TIMER_DTFC_DTFA_TRISTATE
TIMER_PRSSEL_TypeDef faultSourcePrsSel1
Definition: em_timer.h:466
unsigned int riseTime
Definition: em_timer.h:439
TIMER_Event_TypeDef eventCtrl
Definition: em_timer.h:354
#define _TIMER_CC_CTRL_PRSSEL_PRSCH11
#define _TIMER_DTFC_DTFA_NONE
#define _TIMER_CTRL_FALLA_NONE
#define _TIMER_CTRL_PRESC_DIV512
TIMER_Prescale_TypeDef prescale
Definition: em_timer.h:436
TIMER_ClkSel_TypeDef
Definition: em_timer.h:107
#define _TIMER_CC_CTRL_MODE_OFF
__IO uint32_t TOP
Definition: efm32gg_timer.h:50
__STATIC_INLINE void TIMER_CompareSet(TIMER_TypeDef *timer, unsigned int ch, uint32_t val)
Set compare value for compare/capture channel when operating in compare or PWM mode.
Definition: em_timer.h:563
__STATIC_INLINE uint32_t TIMER_CounterGet(TIMER_TypeDef *timer)
Get TIMER counter value.
Definition: em_timer.h:581
unsigned int fallTime
Definition: em_timer.h:442
__STATIC_INLINE uint32_t TIMER_CaptureGet(TIMER_TypeDef *timer, unsigned int ch)
Get capture value for compare/capture channel when operating in capture mode.
Definition: em_timer.h:516
TIMER_PRSSEL_TypeDef prsSel
Definition: em_timer.h:433
#define _TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE
TIMER_Prescale_TypeDef prescale
Definition: em_timer.h:279
TIMER_OutputAction_TypeDef cofoa
Definition: em_timer.h:369
#define _TIMER_CTRL_PRESC_DIV2
#define _TIMER_CC_CTRL_PRSSEL_PRSCH4
void TIMER_Init(TIMER_TypeDef *timer, const TIMER_Init_TypeDef *init)
Initialize TIMER.
Definition: em_timer.c:76
TIMER_DtiFaultAction_TypeDef
Definition: em_timer.h:256
#define _TIMER_CTRL_CLKSEL_CC1
__IO uint32_t CNT
Definition: efm32gg_timer.h:52
#define _TIMER_CTRL_PRESC_DIV1
#define _TIMER_CTRL_PRESC_DIV256
__STATIC_INLINE uint32_t TIMER_TopGet(TIMER_TypeDef *timer)
Get top value setting for timer.
Definition: em_timer.h:884
#define _TIMER_CC_CTRL_PRSSEL_PRSCH9
TIMER_InputAction_TypeDef riseAction
Definition: em_timer.h:297
#define _TIMER_CC_CTRL_PRSSEL_PRSCH0
__STATIC_INLINE void TIMER_CompareBufSet(TIMER_TypeDef *timer, unsigned int ch, uint32_t val)
Set compare value buffer for compare/capture channel when operating in compare or PWM mode...
Definition: em_timer.h:541
__STATIC_INLINE uint32_t TIMER_IntGetEnabled(TIMER_TypeDef *timer)
Get enabled and pending TIMER interrupt flags. Useful for handling more interrupt sources in the same...
Definition: em_timer.h:797
__STATIC_INLINE void TIMER_ClearDTIFault(TIMER_TypeDef *timer, uint32_t flags)
Clear DTI fault source flags.
Definition: em_timer.h:693
TIMER_Edge_TypeDef
Definition: em_timer.h:124
#define _TIMER_CC_CTRL_PRSSEL_PRSCH8
bool enableFaultSourceCoreLockup
Definition: em_timer.h:451
bool enableFaultSourcePrsSel1
Definition: em_timer.h:463
TIMER_Mode_TypeDef
Definition: em_timer.h:178
#define TIMER_CMD_STOP
void TIMER_InitCC(TIMER_TypeDef *timer, unsigned int ch, const TIMER_InitCC_TypeDef *init)
Initialize TIMER compare/capture channel.
Definition: em_timer.c:130
TIMER_OutputAction_TypeDef cmoa
Definition: em_timer.h:372
__STATIC_INLINE uint32_t TIMER_GetDTIFault(TIMER_TypeDef *timer)
Get DTI fault source flags status.
Definition: em_timer.h:675
#define _TIMER_CTRL_PRESC_DIV8
#define _TIMER_CC_CTRL_ICEDGE_BOTH
#define _TIMER_CC_CTRL_MODE_PWM
__STATIC_INLINE void TIMER_Unlock(TIMER_TypeDef *timer)
Unlock the TIMER so that writing to locked registers again is possible.
Definition: em_timer.h:914
#define _TIMER_CC_CTRL_ICEVCTRL_RISING
__IO uint32_t TOPB
Definition: efm32gg_timer.h:51
TIMER_InputAction_TypeDef
Definition: em_timer.h:161
#define _TIMER_CTRL_CLKSEL_PRESCHFPERCLK
TIMER_Prescale_TypeDef
Definition: em_timer.h:205
bool enableFaultSourceDebugger
Definition: em_timer.h:454
__IO uint32_t IEN
Definition: efm32gg_timer.h:46