EFM32 Giant Gecko Software Documentation  efm32gg-doc-4.2.1
em_adc.h
Go to the documentation of this file.
1 /***************************************************************************/
33 #ifndef __SILICON_LABS_EM_ADC_H__
34 #define __SILICON_LABS_EM_ADC_H__
35 
36 #include "em_device.h"
37 #if defined( ADC_COUNT ) && ( ADC_COUNT > 0 )
38 
39 #include <stdbool.h>
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 /***************************************************************************/
50 /***************************************************************************/
55 /*******************************************************************************
56  ******************************** ENUMS ************************************
57  ******************************************************************************/
58 
60 typedef enum
61 {
72 
73 #if defined( _ADC_CTRL_LPFMODE_MASK )
74 
75 typedef enum
76 {
79 
82 
86 #endif
87 
89 typedef enum
90 {
93 
96 
99 
102 
105 
108 
111 
114 
117 
120 
123 
127 
128 
130 typedef enum
131 {
132 #if defined( _ADC_SINGLECTRL_PRSSEL_MASK )
137 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH4 )
139 #endif
140 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH5 )
142 #endif
143 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH6 )
145 #endif
146 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH7 )
148 #endif
149 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH8 )
151 #endif
152 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH9 )
154 #endif
155 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH10 )
157 #endif
158 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH11 )
160 #endif
161 #elif defined(_ADC_SINGLECTRLX_PRSSEL_MASK)
162  adcPRSSELCh0 = _ADC_SINGLECTRLX_PRSSEL_PRSCH0,
163  adcPRSSELCh1 = _ADC_SINGLECTRLX_PRSSEL_PRSCH1,
164  adcPRSSELCh2 = _ADC_SINGLECTRLX_PRSSEL_PRSCH2,
165  adcPRSSELCh3 = _ADC_SINGLECTRLX_PRSSEL_PRSCH3,
166  adcPRSSELCh4 = _ADC_SINGLECTRLX_PRSSEL_PRSCH4,
167  adcPRSSELCh5 = _ADC_SINGLECTRLX_PRSSEL_PRSCH5,
168  adcPRSSELCh6 = _ADC_SINGLECTRLX_PRSSEL_PRSCH6,
169  adcPRSSELCh7 = _ADC_SINGLECTRLX_PRSSEL_PRSCH7,
170  adcPRSSELCh8 = _ADC_SINGLECTRLX_PRSSEL_PRSCH8,
171  adcPRSSELCh9 = _ADC_SINGLECTRLX_PRSSEL_PRSCH9,
172  adcPRSSELCh10 = _ADC_SINGLECTRLX_PRSSEL_PRSCH10,
173  adcPRSSELCh11 = _ADC_SINGLECTRLX_PRSSEL_PRSCH11,
174 #if defined( _ADC_SINGLECTRLX_PRSSEL_PRSCH12 )
175  adcPRSSELCh12 = _ADC_SINGLECTRLX_PRSSEL_PRSCH12,
176  adcPRSSELCh13 = _ADC_SINGLECTRLX_PRSSEL_PRSCH13,
177  adcPRSSELCh14 = _ADC_SINGLECTRLX_PRSSEL_PRSCH14,
178  adcPRSSELCh15 = _ADC_SINGLECTRLX_PRSSEL_PRSCH15,
179 #endif
180 #endif
182 
183 
186 #if defined( _ADC_SCANCTRLX_VREFSEL_MASK )
187 #define ADC_CTRLX_VREFSEL_REG 0x80
188 #endif
189 typedef enum
190 {
193 
196 
199 
202 
205 
208 
211 
212 #if defined( _ADC_SINGLECTRLX_VREFSEL_VBGR )
213 
214  adcRefVBGR = _ADC_SINGLECTRLX_VREFSEL_VBGR | ADC_CTRLX_VREFSEL_REG,
215 #endif
216 
217 #if defined( _ADC_SINGLECTRLX_VREFSEL_VDDXWATT )
218 
219  adcRefVddxAtt = _ADC_SINGLECTRLX_VREFSEL_VDDXWATT | ADC_CTRLX_VREFSEL_REG,
220 #endif
221 
222 #if defined( _ADC_SINGLECTRLX_VREFSEL_VREFPWATT )
223 
225  adcRefVPxAtt = _ADC_SINGLECTRLX_VREFSEL_VREFPWATT | ADC_CTRLX_VREFSEL_REG,
226 #endif
227 
228 #if defined( _ADC_SINGLECTRLX_VREFSEL_VREFP )
229 
230  adcRefP = _ADC_SINGLECTRLX_VREFSEL_VREFP | ADC_CTRLX_VREFSEL_REG,
231 #endif
232 
233 #if defined( _ADC_SINGLECTRLX_VREFSEL_VENTROPY )
234 
235  adcRefVEntropy = _ADC_SINGLECTRLX_VREFSEL_VENTROPY | ADC_CTRLX_VREFSEL_REG,
236 #endif
237 
238 #if defined( _ADC_SINGLECTRLX_VREFSEL_VREFPNWATT )
239 
241  adcRefVPNxAtt = _ADC_SINGLECTRLX_VREFSEL_VREFPNWATT | ADC_CTRLX_VREFSEL_REG,
242 #endif
243 
244 #if defined( _ADC_SINGLECTRLX_VREFSEL_VREFPN )
245 
247  adcRefPN = _ADC_SINGLECTRLX_VREFSEL_VREFPN | ADC_CTRLX_VREFSEL_REG,
248 #endif
250 
251 
253 typedef enum
254 {
260 
261 
262 #if defined( _ADC_SINGLECTRL_INPUTSEL_MASK )
263 
264 typedef enum
265 {
266  /* Differential mode disabled */
282  /* TBD: Use define when available */
285  /* Differential mode enabled */
290  /* TBD: Use define when available */
293 
295 /* Legacy enum names */
296 #define adcSingleInpCh0 adcSingleInputCh0
297 #define adcSingleInpCh1 adcSingleInputCh1
298 #define adcSingleInpCh2 adcSingleInputCh2
299 #define adcSingleInpCh3 adcSingleInputCh3
300 #define adcSingleInpCh4 adcSingleInputCh4
301 #define adcSingleInpCh5 adcSingleInputCh5
302 #define adcSingleInpCh6 adcSingleInputCh6
303 #define adcSingleInpCh7 adcSingleInputCh7
304 #define adcSingleInpTemp adcSingleInputTemp
305 #define adcSingleInpVDDDiv3 adcSingleInputVDDDiv3
306 #define adcSingleInpVDD adcSingleInputVDD
307 #define adcSingleInpVSS adcSingleInputVSS
308 #define adcSingleInpVrefDiv2 adcSingleInputVrefDiv2
309 #define adcSingleInpDACOut0 adcSingleInputDACOut0
310 #define adcSingleInpDACOut1 adcSingleInputDACOut1
311 #define adcSingleInpATEST adcSingleInputATEST
312 #define adcSingleInpCh0Ch1 adcSingleInputCh0Ch1
313 #define adcSingleInpCh2Ch3 adcSingleInputCh2Ch3
314 #define adcSingleInpCh4Ch5 adcSingleInputCh4Ch5
315 #define adcSingleInpCh6Ch7 adcSingleInputCh6Ch7
316 #define adcSingleInpDiff0 adcSingleInputDiff0
317 
318 #endif
319 
320 #if defined( _ADC_SINGLECTRL_POSSEL_MASK )
321 
322 typedef enum
323 {
324  adcPosSelAPORT0XCH0 = _ADC_SINGLECTRL_POSSEL_APORT0XCH0,
325  adcPosSelAPORT0XCH1 = _ADC_SINGLECTRL_POSSEL_APORT0XCH1,
326  adcPosSelAPORT0XCH2 = _ADC_SINGLECTRL_POSSEL_APORT0XCH2,
327  adcPosSelAPORT0XCH3 = _ADC_SINGLECTRL_POSSEL_APORT0XCH3,
328  adcPosSelAPORT0XCH4 = _ADC_SINGLECTRL_POSSEL_APORT0XCH4,
329  adcPosSelAPORT0XCH5 = _ADC_SINGLECTRL_POSSEL_APORT0XCH5,
330  adcPosSelAPORT0XCH6 = _ADC_SINGLECTRL_POSSEL_APORT0XCH6,
331  adcPosSelAPORT0XCH7 = _ADC_SINGLECTRL_POSSEL_APORT0XCH7,
332  adcPosSelAPORT0XCH8 = _ADC_SINGLECTRL_POSSEL_APORT0XCH8,
333  adcPosSelAPORT0XCH9 = _ADC_SINGLECTRL_POSSEL_APORT0XCH9,
334  adcPosSelAPORT0XCH10 = _ADC_SINGLECTRL_POSSEL_APORT0XCH10,
335  adcPosSelAPORT0XCH11 = _ADC_SINGLECTRL_POSSEL_APORT0XCH11,
336  adcPosSelAPORT0XCH12 = _ADC_SINGLECTRL_POSSEL_APORT0XCH12,
337  adcPosSelAPORT0XCH13 = _ADC_SINGLECTRL_POSSEL_APORT0XCH13,
338  adcPosSelAPORT0XCH14 = _ADC_SINGLECTRL_POSSEL_APORT0XCH14,
339  adcPosSelAPORT0XCH15 = _ADC_SINGLECTRL_POSSEL_APORT0XCH15,
340  adcPosSelAPORT0YCH0 = _ADC_SINGLECTRL_POSSEL_APORT0YCH0,
341  adcPosSelAPORT0YCH1 = _ADC_SINGLECTRL_POSSEL_APORT0YCH1,
342  adcPosSelAPORT0YCH2 = _ADC_SINGLECTRL_POSSEL_APORT0YCH2,
343  adcPosSelAPORT0YCH3 = _ADC_SINGLECTRL_POSSEL_APORT0YCH3,
344  adcPosSelAPORT0YCH4 = _ADC_SINGLECTRL_POSSEL_APORT0YCH4,
345  adcPosSelAPORT0YCH5 = _ADC_SINGLECTRL_POSSEL_APORT0YCH5,
346  adcPosSelAPORT0YCH6 = _ADC_SINGLECTRL_POSSEL_APORT0YCH6,
347  adcPosSelAPORT0YCH7 = _ADC_SINGLECTRL_POSSEL_APORT0YCH7,
348  adcPosSelAPORT0YCH8 = _ADC_SINGLECTRL_POSSEL_APORT0YCH8,
349  adcPosSelAPORT0YCH9 = _ADC_SINGLECTRL_POSSEL_APORT0YCH9,
350  adcPosSelAPORT0YCH10 = _ADC_SINGLECTRL_POSSEL_APORT0YCH10,
351  adcPosSelAPORT0YCH11 = _ADC_SINGLECTRL_POSSEL_APORT0YCH11,
352  adcPosSelAPORT0YCH12 = _ADC_SINGLECTRL_POSSEL_APORT0YCH12,
353  adcPosSelAPORT0YCH13 = _ADC_SINGLECTRL_POSSEL_APORT0YCH13,
354  adcPosSelAPORT0YCH14 = _ADC_SINGLECTRL_POSSEL_APORT0YCH14,
355  adcPosSelAPORT0YCH15 = _ADC_SINGLECTRL_POSSEL_APORT0YCH15,
356  adcPosSelAPORT1XCH0 = _ADC_SINGLECTRL_POSSEL_APORT1XCH0,
357  adcPosSelAPORT1YCH1 = _ADC_SINGLECTRL_POSSEL_APORT1YCH1,
358  adcPosSelAPORT1XCH2 = _ADC_SINGLECTRL_POSSEL_APORT1XCH2,
359  adcPosSelAPORT1YCH3 = _ADC_SINGLECTRL_POSSEL_APORT1YCH3,
360  adcPosSelAPORT1XCH4 = _ADC_SINGLECTRL_POSSEL_APORT1XCH4,
361  adcPosSelAPORT1YCH5 = _ADC_SINGLECTRL_POSSEL_APORT1YCH5,
362  adcPosSelAPORT1XCH6 = _ADC_SINGLECTRL_POSSEL_APORT1XCH6,
363  adcPosSelAPORT1YCH7 = _ADC_SINGLECTRL_POSSEL_APORT1YCH7,
364  adcPosSelAPORT1XCH8 = _ADC_SINGLECTRL_POSSEL_APORT1XCH8,
365  adcPosSelAPORT1YCH9 = _ADC_SINGLECTRL_POSSEL_APORT1YCH9,
366  adcPosSelAPORT1XCH10 = _ADC_SINGLECTRL_POSSEL_APORT1XCH10,
367  adcPosSelAPORT1YCH11 = _ADC_SINGLECTRL_POSSEL_APORT1YCH11,
368  adcPosSelAPORT1XCH12 = _ADC_SINGLECTRL_POSSEL_APORT1XCH12,
369  adcPosSelAPORT1YCH13 = _ADC_SINGLECTRL_POSSEL_APORT1YCH13,
370  adcPosSelAPORT1XCH14 = _ADC_SINGLECTRL_POSSEL_APORT1XCH14,
371  adcPosSelAPORT1YCH15 = _ADC_SINGLECTRL_POSSEL_APORT1YCH15,
372  adcPosSelAPORT1XCH16 = _ADC_SINGLECTRL_POSSEL_APORT1XCH16,
373  adcPosSelAPORT1YCH17 = _ADC_SINGLECTRL_POSSEL_APORT1YCH17,
374  adcPosSelAPORT1XCH18 = _ADC_SINGLECTRL_POSSEL_APORT1XCH18,
375  adcPosSelAPORT1YCH19 = _ADC_SINGLECTRL_POSSEL_APORT1YCH19,
376  adcPosSelAPORT1XCH20 = _ADC_SINGLECTRL_POSSEL_APORT1XCH20,
377  adcPosSelAPORT1YCH21 = _ADC_SINGLECTRL_POSSEL_APORT1YCH21,
378  adcPosSelAPORT1XCH22 = _ADC_SINGLECTRL_POSSEL_APORT1XCH22,
379  adcPosSelAPORT1YCH23 = _ADC_SINGLECTRL_POSSEL_APORT1YCH23,
380  adcPosSelAPORT1XCH24 = _ADC_SINGLECTRL_POSSEL_APORT1XCH24,
381  adcPosSelAPORT1YCH25 = _ADC_SINGLECTRL_POSSEL_APORT1YCH25,
382  adcPosSelAPORT1XCH26 = _ADC_SINGLECTRL_POSSEL_APORT1XCH26,
383  adcPosSelAPORT1YCH27 = _ADC_SINGLECTRL_POSSEL_APORT1YCH27,
384  adcPosSelAPORT1XCH28 = _ADC_SINGLECTRL_POSSEL_APORT1XCH28,
385  adcPosSelAPORT1YCH29 = _ADC_SINGLECTRL_POSSEL_APORT1YCH29,
386  adcPosSelAPORT1XCH30 = _ADC_SINGLECTRL_POSSEL_APORT1XCH30,
387  adcPosSelAPORT1YCH31 = _ADC_SINGLECTRL_POSSEL_APORT1YCH31,
388  adcPosSelAPORT2YCH0 = _ADC_SINGLECTRL_POSSEL_APORT2YCH0,
389  adcPosSelAPORT2XCH1 = _ADC_SINGLECTRL_POSSEL_APORT2XCH1,
390  adcPosSelAPORT2YCH2 = _ADC_SINGLECTRL_POSSEL_APORT2YCH2,
391  adcPosSelAPORT2XCH3 = _ADC_SINGLECTRL_POSSEL_APORT2XCH3,
392  adcPosSelAPORT2YCH4 = _ADC_SINGLECTRL_POSSEL_APORT2YCH4,
393  adcPosSelAPORT2XCH5 = _ADC_SINGLECTRL_POSSEL_APORT2XCH5,
394  adcPosSelAPORT2YCH6 = _ADC_SINGLECTRL_POSSEL_APORT2YCH6,
395  adcPosSelAPORT2XCH7 = _ADC_SINGLECTRL_POSSEL_APORT2XCH7,
396  adcPosSelAPORT2YCH8 = _ADC_SINGLECTRL_POSSEL_APORT2YCH8,
397  adcPosSelAPORT2XCH9 = _ADC_SINGLECTRL_POSSEL_APORT2XCH9,
398  adcPosSelAPORT2YCH10 = _ADC_SINGLECTRL_POSSEL_APORT2YCH10,
399  adcPosSelAPORT2XCH11 = _ADC_SINGLECTRL_POSSEL_APORT2XCH11,
400  adcPosSelAPORT2YCH12 = _ADC_SINGLECTRL_POSSEL_APORT2YCH12,
401  adcPosSelAPORT2XCH13 = _ADC_SINGLECTRL_POSSEL_APORT2XCH13,
402  adcPosSelAPORT2YCH14 = _ADC_SINGLECTRL_POSSEL_APORT2YCH14,
403  adcPosSelAPORT2XCH15 = _ADC_SINGLECTRL_POSSEL_APORT2XCH15,
404  adcPosSelAPORT2YCH16 = _ADC_SINGLECTRL_POSSEL_APORT2YCH16,
405  adcPosSelAPORT2XCH17 = _ADC_SINGLECTRL_POSSEL_APORT2XCH17,
406  adcPosSelAPORT2YCH18 = _ADC_SINGLECTRL_POSSEL_APORT2YCH18,
407  adcPosSelAPORT2XCH19 = _ADC_SINGLECTRL_POSSEL_APORT2XCH19,
408  adcPosSelAPORT2YCH20 = _ADC_SINGLECTRL_POSSEL_APORT2YCH20,
409  adcPosSelAPORT2XCH21 = _ADC_SINGLECTRL_POSSEL_APORT2XCH21,
410  adcPosSelAPORT2YCH22 = _ADC_SINGLECTRL_POSSEL_APORT2YCH22,
411  adcPosSelAPORT2XCH23 = _ADC_SINGLECTRL_POSSEL_APORT2XCH23,
412  adcPosSelAPORT2YCH24 = _ADC_SINGLECTRL_POSSEL_APORT2YCH24,
413  adcPosSelAPORT2XCH25 = _ADC_SINGLECTRL_POSSEL_APORT2XCH25,
414  adcPosSelAPORT2YCH26 = _ADC_SINGLECTRL_POSSEL_APORT2YCH26,
415  adcPosSelAPORT2XCH27 = _ADC_SINGLECTRL_POSSEL_APORT2XCH27,
416  adcPosSelAPORT2YCH28 = _ADC_SINGLECTRL_POSSEL_APORT2YCH28,
417  adcPosSelAPORT2XCH29 = _ADC_SINGLECTRL_POSSEL_APORT2XCH29,
418  adcPosSelAPORT2YCH30 = _ADC_SINGLECTRL_POSSEL_APORT2YCH30,
419  adcPosSelAPORT2XCH31 = _ADC_SINGLECTRL_POSSEL_APORT2XCH31,
420  adcPosSelAPORT3XCH0 = _ADC_SINGLECTRL_POSSEL_APORT3XCH0,
421  adcPosSelAPORT3YCH1 = _ADC_SINGLECTRL_POSSEL_APORT3YCH1,
422  adcPosSelAPORT3XCH2 = _ADC_SINGLECTRL_POSSEL_APORT3XCH2,
423  adcPosSelAPORT3YCH3 = _ADC_SINGLECTRL_POSSEL_APORT3YCH3,
424  adcPosSelAPORT3XCH4 = _ADC_SINGLECTRL_POSSEL_APORT3XCH4,
425  adcPosSelAPORT3YCH5 = _ADC_SINGLECTRL_POSSEL_APORT3YCH5,
426  adcPosSelAPORT3XCH6 = _ADC_SINGLECTRL_POSSEL_APORT3XCH6,
427  adcPosSelAPORT3YCH7 = _ADC_SINGLECTRL_POSSEL_APORT3YCH7,
428  adcPosSelAPORT3XCH8 = _ADC_SINGLECTRL_POSSEL_APORT3XCH8,
429  adcPosSelAPORT3YCH9 = _ADC_SINGLECTRL_POSSEL_APORT3YCH9,
430  adcPosSelAPORT3XCH10 = _ADC_SINGLECTRL_POSSEL_APORT3XCH10,
431  adcPosSelAPORT3YCH11 = _ADC_SINGLECTRL_POSSEL_APORT3YCH11,
432  adcPosSelAPORT3XCH12 = _ADC_SINGLECTRL_POSSEL_APORT3XCH12,
433  adcPosSelAPORT3YCH13 = _ADC_SINGLECTRL_POSSEL_APORT3YCH13,
434  adcPosSelAPORT3XCH14 = _ADC_SINGLECTRL_POSSEL_APORT3XCH14,
435  adcPosSelAPORT3YCH15 = _ADC_SINGLECTRL_POSSEL_APORT3YCH15,
436  adcPosSelAPORT3XCH16 = _ADC_SINGLECTRL_POSSEL_APORT3XCH16,
437  adcPosSelAPORT3YCH17 = _ADC_SINGLECTRL_POSSEL_APORT3YCH17,
438  adcPosSelAPORT3XCH18 = _ADC_SINGLECTRL_POSSEL_APORT3XCH18,
439  adcPosSelAPORT3YCH19 = _ADC_SINGLECTRL_POSSEL_APORT3YCH19,
440  adcPosSelAPORT3XCH20 = _ADC_SINGLECTRL_POSSEL_APORT3XCH20,
441  adcPosSelAPORT3YCH21 = _ADC_SINGLECTRL_POSSEL_APORT3YCH21,
442  adcPosSelAPORT3XCH22 = _ADC_SINGLECTRL_POSSEL_APORT3XCH22,
443  adcPosSelAPORT3YCH23 = _ADC_SINGLECTRL_POSSEL_APORT3YCH23,
444  adcPosSelAPORT3XCH24 = _ADC_SINGLECTRL_POSSEL_APORT3XCH24,
445  adcPosSelAPORT3YCH25 = _ADC_SINGLECTRL_POSSEL_APORT3YCH25,
446  adcPosSelAPORT3XCH26 = _ADC_SINGLECTRL_POSSEL_APORT3XCH26,
447  adcPosSelAPORT3YCH27 = _ADC_SINGLECTRL_POSSEL_APORT3YCH27,
448  adcPosSelAPORT3XCH28 = _ADC_SINGLECTRL_POSSEL_APORT3XCH28,
449  adcPosSelAPORT3YCH29 = _ADC_SINGLECTRL_POSSEL_APORT3YCH29,
450  adcPosSelAPORT3XCH30 = _ADC_SINGLECTRL_POSSEL_APORT3XCH30,
451  adcPosSelAPORT3YCH31 = _ADC_SINGLECTRL_POSSEL_APORT3YCH31,
452  adcPosSelAPORT4YCH0 = _ADC_SINGLECTRL_POSSEL_APORT4YCH0,
453  adcPosSelAPORT4XCH1 = _ADC_SINGLECTRL_POSSEL_APORT4XCH1,
454  adcPosSelAPORT4YCH2 = _ADC_SINGLECTRL_POSSEL_APORT4YCH2,
455  adcPosSelAPORT4XCH3 = _ADC_SINGLECTRL_POSSEL_APORT4XCH3,
456  adcPosSelAPORT4YCH4 = _ADC_SINGLECTRL_POSSEL_APORT4YCH4,
457  adcPosSelAPORT4XCH5 = _ADC_SINGLECTRL_POSSEL_APORT4XCH5,
458  adcPosSelAPORT4YCH6 = _ADC_SINGLECTRL_POSSEL_APORT4YCH6,
459  adcPosSelAPORT4XCH7 = _ADC_SINGLECTRL_POSSEL_APORT4XCH7,
460  adcPosSelAPORT4YCH8 = _ADC_SINGLECTRL_POSSEL_APORT4YCH8,
461  adcPosSelAPORT4XCH9 = _ADC_SINGLECTRL_POSSEL_APORT4XCH9,
462  adcPosSelAPORT4YCH10 = _ADC_SINGLECTRL_POSSEL_APORT4YCH10,
463  adcPosSelAPORT4XCH11 = _ADC_SINGLECTRL_POSSEL_APORT4XCH11,
464  adcPosSelAPORT4YCH12 = _ADC_SINGLECTRL_POSSEL_APORT4YCH12,
465  adcPosSelAPORT4XCH13 = _ADC_SINGLECTRL_POSSEL_APORT4XCH13,
466  adcPosSelAPORT4YCH14 = _ADC_SINGLECTRL_POSSEL_APORT4YCH14,
467  adcPosSelAPORT4XCH15 = _ADC_SINGLECTRL_POSSEL_APORT4XCH15,
468  adcPosSelAPORT4YCH16 = _ADC_SINGLECTRL_POSSEL_APORT4YCH16,
469  adcPosSelAPORT4XCH17 = _ADC_SINGLECTRL_POSSEL_APORT4XCH17,
470  adcPosSelAPORT4YCH18 = _ADC_SINGLECTRL_POSSEL_APORT4YCH18,
471  adcPosSelAPORT4XCH19 = _ADC_SINGLECTRL_POSSEL_APORT4XCH19,
472  adcPosSelAPORT4YCH20 = _ADC_SINGLECTRL_POSSEL_APORT4YCH20,
473  adcPosSelAPORT4XCH21 = _ADC_SINGLECTRL_POSSEL_APORT4XCH21,
474  adcPosSelAPORT4YCH22 = _ADC_SINGLECTRL_POSSEL_APORT4YCH22,
475  adcPosSelAPORT4XCH23 = _ADC_SINGLECTRL_POSSEL_APORT4XCH23,
476  adcPosSelAPORT4YCH24 = _ADC_SINGLECTRL_POSSEL_APORT4YCH24,
477  adcPosSelAPORT4XCH25 = _ADC_SINGLECTRL_POSSEL_APORT4XCH25,
478  adcPosSelAPORT4YCH26 = _ADC_SINGLECTRL_POSSEL_APORT4YCH26,
479  adcPosSelAPORT4XCH27 = _ADC_SINGLECTRL_POSSEL_APORT4XCH27,
480  adcPosSelAPORT4YCH28 = _ADC_SINGLECTRL_POSSEL_APORT4YCH28,
481  adcPosSelAPORT4XCH29 = _ADC_SINGLECTRL_POSSEL_APORT4XCH29,
482  adcPosSelAPORT4YCH30 = _ADC_SINGLECTRL_POSSEL_APORT4YCH30,
483  adcPosSelAPORT4XCH31 = _ADC_SINGLECTRL_POSSEL_APORT4XCH31,
484  adcPosSelAVDD = _ADC_SINGLECTRL_POSSEL_AVDD,
485  adcPosSelBU = _ADC_SINGLECTRL_POSSEL_BU,
486  adcPosSelAREG = _ADC_SINGLECTRL_POSSEL_AREG,
487  adcPosSelVREGOUTPA = _ADC_SINGLECTRL_POSSEL_VREGOUTPA,
488  adcPosSelPDBU = _ADC_SINGLECTRL_POSSEL_PDBU,
489  adcPosSelIO0 = _ADC_SINGLECTRL_POSSEL_IO0,
490  adcPosSelIO1 = _ADC_SINGLECTRL_POSSEL_IO1,
491  adcPosSelVSP = _ADC_SINGLECTRL_POSSEL_VSP,
492  adcPosSelSP0 = _ADC_SINGLECTRL_POSSEL_SP0,
493  adcPosSelTEMP = _ADC_SINGLECTRL_POSSEL_TEMP,
494  adcPosSelDAC0OUT0 = _ADC_SINGLECTRL_POSSEL_DAC0OUT0,
495  adcPosSelTESTP = _ADC_SINGLECTRL_POSSEL_TESTP,
496  adcPosSelSP1 = _ADC_SINGLECTRL_POSSEL_SP1,
497  adcPosSelSP2 = _ADC_SINGLECTRL_POSSEL_SP2,
498  adcPosSelDAC0OUT1 = _ADC_SINGLECTRL_POSSEL_DAC0OUT1,
499  adcPosSelSUBLSB = _ADC_SINGLECTRL_POSSEL_SUBLSB,
500  adcPosSelDEFAULT = _ADC_SINGLECTRL_POSSEL_DEFAULT,
501  adcPosSelVSS = _ADC_SINGLECTRL_POSSEL_VSS
502 } ADC_PosSel_TypeDef;
503 #endif
504 
505 
506 #if defined( _ADC_SINGLECTRL_NEGSEL_MASK )
507 
508 typedef enum
509 {
510  adcNegSelAPORT0XCH0 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH0,
511  adcNegSelAPORT0XCH1 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH1,
512  adcNegSelAPORT0XCH2 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH2,
513  adcNegSelAPORT0XCH3 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH3,
514  adcNegSelAPORT0XCH4 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH4,
515  adcNegSelAPORT0XCH5 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH5,
516  adcNegSelAPORT0XCH6 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH6,
517  adcNegSelAPORT0XCH7 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH7,
518  adcNegSelAPORT0XCH8 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH8,
519  adcNegSelAPORT0XCH9 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH9,
520  adcNegSelAPORT0XCH10 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH10,
521  adcNegSelAPORT0XCH11 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH11,
522  adcNegSelAPORT0XCH12 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH12,
523  adcNegSelAPORT0XCH13 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH13,
524  adcNegSelAPORT0XCH14 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH14,
525  adcNegSelAPORT0XCH15 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH15,
526  adcNegSelAPORT0YCH0 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH0,
527  adcNegSelAPORT0YCH1 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH1,
528  adcNegSelAPORT0YCH2 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH2,
529  adcNegSelAPORT0YCH3 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH3,
530  adcNegSelAPORT0YCH4 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH4,
531  adcNegSelAPORT0YCH5 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH5,
532  adcNegSelAPORT0YCH6 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH6,
533  adcNegSelAPORT0YCH7 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH7,
534  adcNegSelAPORT0YCH8 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH8,
535  adcNegSelAPORT0YCH9 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH9,
536  adcNegSelAPORT0YCH10 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH10,
537  adcNegSelAPORT0YCH11 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH11,
538  adcNegSelAPORT0YCH12 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH12,
539  adcNegSelAPORT0YCH13 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH13,
540  adcNegSelAPORT0YCH14 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH14,
541  adcNegSelAPORT0YCH15 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH15,
542  adcNegSelAPORT1XCH0 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH0,
543  adcNegSelAPORT1YCH1 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH1,
544  adcNegSelAPORT1XCH2 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH2,
545  adcNegSelAPORT1YCH3 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH3,
546  adcNegSelAPORT1XCH4 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH4,
547  adcNegSelAPORT1YCH5 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH5,
548  adcNegSelAPORT1XCH6 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH6,
549  adcNegSelAPORT1YCH7 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH7,
550  adcNegSelAPORT1XCH8 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH8,
551  adcNegSelAPORT1YCH9 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH9,
552  adcNegSelAPORT1XCH10 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH10,
553  adcNegSelAPORT1YCH11 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH11,
554  adcNegSelAPORT1XCH12 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH12,
555  adcNegSelAPORT1YCH13 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH13,
556  adcNegSelAPORT1XCH14 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH14,
557  adcNegSelAPORT1YCH15 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH15,
558  adcNegSelAPORT1XCH16 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH16,
559  adcNegSelAPORT1YCH17 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH17,
560  adcNegSelAPORT1XCH18 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH18,
561  adcNegSelAPORT1YCH19 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH19,
562  adcNegSelAPORT1XCH20 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH20,
563  adcNegSelAPORT1YCH21 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH21,
564  adcNegSelAPORT1XCH22 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH22,
565  adcNegSelAPORT1YCH23 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH23,
566  adcNegSelAPORT1XCH24 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH24,
567  adcNegSelAPORT1YCH25 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH25,
568  adcNegSelAPORT1XCH26 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH26,
569  adcNegSelAPORT1YCH27 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH27,
570  adcNegSelAPORT1XCH28 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH28,
571  adcNegSelAPORT1YCH29 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH29,
572  adcNegSelAPORT1XCH30 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH30,
573  adcNegSelAPORT1YCH31 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH31,
574  adcNegSelAPORT2YCH0 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH0,
575  adcNegSelAPORT2XCH1 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH1,
576  adcNegSelAPORT2YCH2 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH2,
577  adcNegSelAPORT2XCH3 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH3,
578  adcNegSelAPORT2YCH4 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH4,
579  adcNegSelAPORT2XCH5 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH5,
580  adcNegSelAPORT2YCH6 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH6,
581  adcNegSelAPORT2XCH7 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH7,
582  adcNegSelAPORT2YCH8 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH8,
583  adcNegSelAPORT2XCH9 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH9,
584  adcNegSelAPORT2YCH10 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH10,
585  adcNegSelAPORT2XCH11 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH11,
586  adcNegSelAPORT2YCH12 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH12,
587  adcNegSelAPORT2XCH13 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH13,
588  adcNegSelAPORT2YCH14 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH14,
589  adcNegSelAPORT2XCH15 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH15,
590  adcNegSelAPORT2YCH16 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH16,
591  adcNegSelAPORT2XCH17 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH17,
592  adcNegSelAPORT2YCH18 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH18,
593  adcNegSelAPORT2XCH19 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH19,
594  adcNegSelAPORT2YCH20 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH20,
595  adcNegSelAPORT2XCH21 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH21,
596  adcNegSelAPORT2YCH22 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH22,
597  adcNegSelAPORT2XCH23 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH23,
598  adcNegSelAPORT2YCH24 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH24,
599  adcNegSelAPORT2XCH25 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH25,
600  adcNegSelAPORT2YCH26 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH26,
601  adcNegSelAPORT2XCH27 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH27,
602  adcNegSelAPORT2YCH28 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH28,
603  adcNegSelAPORT2XCH29 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH29,
604  adcNegSelAPORT2YCH30 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH30,
605  adcNegSelAPORT2XCH31 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH31,
606  adcNegSelAPORT3XCH0 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH0,
607  adcNegSelAPORT3YCH1 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH1,
608  adcNegSelAPORT3XCH2 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH2,
609  adcNegSelAPORT3YCH3 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH3,
610  adcNegSelAPORT3XCH4 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH4,
611  adcNegSelAPORT3YCH5 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH5,
612  adcNegSelAPORT3XCH6 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH6,
613  adcNegSelAPORT3YCH7 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH7,
614  adcNegSelAPORT3XCH8 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH8,
615  adcNegSelAPORT3YCH9 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH9,
616  adcNegSelAPORT3XCH10 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH10,
617  adcNegSelAPORT3YCH11 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH11,
618  adcNegSelAPORT3XCH12 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH12,
619  adcNegSelAPORT3YCH13 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH13,
620  adcNegSelAPORT3XCH14 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH14,
621  adcNegSelAPORT3YCH15 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH15,
622  adcNegSelAPORT3XCH16 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH16,
623  adcNegSelAPORT3YCH17 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH17,
624  adcNegSelAPORT3XCH18 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH18,
625  adcNegSelAPORT3YCH19 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH19,
626  adcNegSelAPORT3XCH20 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH20,
627  adcNegSelAPORT3YCH21 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH21,
628  adcNegSelAPORT3XCH22 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH22,
629  adcNegSelAPORT3YCH23 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH23,
630  adcNegSelAPORT3XCH24 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH24,
631  adcNegSelAPORT3YCH25 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH25,
632  adcNegSelAPORT3XCH26 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH26,
633  adcNegSelAPORT3YCH27 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH27,
634  adcNegSelAPORT3XCH28 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH28,
635  adcNegSelAPORT3YCH29 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH29,
636  adcNegSelAPORT3XCH30 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH30,
637  adcNegSelAPORT3YCH31 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH31,
638  adcNegSelAPORT4YCH0 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH0,
639  adcNegSelAPORT4XCH1 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH1,
640  adcNegSelAPORT4YCH2 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH2,
641  adcNegSelAPORT4XCH3 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH3,
642  adcNegSelAPORT4YCH4 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH4,
643  adcNegSelAPORT4XCH5 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH5,
644  adcNegSelAPORT4YCH6 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH6,
645  adcNegSelAPORT4XCH7 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH7,
646  adcNegSelAPORT4YCH8 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH8,
647  adcNegSelAPORT4XCH9 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH9,
648  adcNegSelAPORT4YCH10 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH10,
649  adcNegSelAPORT4XCH11 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH11,
650  adcNegSelAPORT4YCH12 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH12,
651  adcNegSelAPORT4XCH13 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH13,
652  adcNegSelAPORT4YCH14 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH14,
653  adcNegSelAPORT4XCH15 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH15,
654  adcNegSelAPORT4YCH16 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH16,
655  adcNegSelAPORT4XCH17 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH17,
656  adcNegSelAPORT4YCH18 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH18,
657  adcNegSelAPORT4XCH19 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH19,
658  adcNegSelAPORT4YCH20 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH20,
659  adcNegSelAPORT4XCH21 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH21,
660  adcNegSelAPORT4YCH22 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH22,
661  adcNegSelAPORT4XCH23 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH23,
662  adcNegSelAPORT4YCH24 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH24,
663  adcNegSelAPORT4XCH25 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH25,
664  adcNegSelAPORT4YCH26 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH26,
665  adcNegSelAPORT4XCH27 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH27,
666  adcNegSelAPORT4YCH28 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH28,
667  adcNegSelAPORT4XCH29 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH29,
668  adcNegSelAPORT4YCH30 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH30,
669  adcNegSelAPORT4XCH31 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH31,
670  adcNegSelTESTN = _ADC_SINGLECTRL_NEGSEL_TESTN,
671  adcNegSelDEFAULT = _ADC_SINGLECTRL_NEGSEL_DEFAULT,
672  adcNegSelVSS = _ADC_SINGLECTRL_NEGSEL_VSS
673 } ADC_NegSel_TypeDef;
674 #endif
675 
676 
677 #if defined( _ADC_SCANINPUTSEL_MASK )
678  /* ADC scan input groups */
679 typedef enum
680 {
681  adcScanInputGroup0 = 0,
682  adcScanInputGroup1 = 1,
683  adcScanInputGroup2 = 2,
684  adcScanInputGroup3 = 3,
685 } ADC_ScanInputGroup_TypeDef;
686 
687  /* ADC scan alternative negative inputs */
688 typedef enum
689 {
690  adcScanNegInput1 = 1,
691  adcScanNegInput3 = 3,
692  adcScanNegInput5 = 5,
693  adcScanNegInput7 = 7,
694  adcScanNegInput8 = 8,
695  adcScanNegInput10 = 10,
696  adcScanNegInput12 = 12,
697  adcScanNegInput14 = 14,
698  adcScanNegInputDefault = 0xFF,
699 } ADC_ScanNegInput_TypeDef;
700 #endif
701 
702 
704 typedef enum
705 {
708 
711 
718 
719 
721 typedef enum
722 {
725 
726 #if defined( _ADC_CTRL_WARMUPMODE_FASTBG )
727 
729 #endif
730 
731 #if defined( _ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM )
732 
734 #endif
735 
736 #if defined( _ADC_CTRL_WARMUPMODE_KEEPINSTANDBY )
737 
739  adcWarmupKeepInStandby = _ADC_CTRL_WARMUPMODE_KEEPINSTANDBY,
740 #endif
741 
742 #if defined( _ADC_CTRL_WARMUPMODE_KEEPINSLOWACC )
743 
745  adcWarmupKeepInSlowAcq = _ADC_CTRL_WARMUPMODE_KEEPINSLOWACC,
746 #endif
747 
751 
753 
754 
755 #if defined( _ADC_CTRL_ADCCLKMODE_MASK )
756 
757 typedef enum
758 {
759  adcEm2Disabled = 0,
760  adcEm2ClockOnDemand = _ADC_CTRL_ADCCLKMODE_ASYNC | _ADC_CTRL_ASYNCCLKEN_ASNEEDED,
761  adcEm2ClockAlwaysOn = _ADC_CTRL_ADCCLKMODE_ASYNC | _ADC_CTRL_ASYNCCLKEN_ALWAYSON,
762 } ADC_EM2ClockConfig_TypeDef;
763 #endif
764 
765 
766 /*******************************************************************************
767  ******************************* STRUCTS ***********************************
768  ******************************************************************************/
769 
771 typedef struct
772 {
778 
779 #if defined( _ADC_CTRL_LPFMODE_MASK )
780 
782 #endif
783 
786 
794  uint8_t timebase;
795 
797  uint8_t prescale;
798 
800  bool tailgate;
801 
803 #if defined( _ADC_CTRL_ADCCLKMODE_MASK )
804  ADC_EM2ClockConfig_TypeDef em2ClockConfig;
805 #endif
807 
808 
810 #if defined( _ADC_CTRL_LPFMODE_MASK ) && (!defined( _ADC_CTRL_ADCCLKMODE_MASK ))
811 #define ADC_INIT_DEFAULT \
812 { \
813  adcOvsRateSel2, /* 2x oversampling (if enabled). */ \
814  adcLPFilterBypass, /* No input filter selected. */ \
815  adcWarmupNormal, /* ADC shutdown after each conversion. */ \
816  _ADC_CTRL_TIMEBASE_DEFAULT, /* Use HW default value. */ \
817  _ADC_CTRL_PRESC_DEFAULT, /* Use HW default value. */ \
818  false /* Do not use tailgate. */ \
819 }
820 #elif (!defined( _ADC_CTRL_LPFMODE_MASK )) && (!defined( _ADC_CTRL_ADCCLKMODE_MASK ))
821 #define ADC_INIT_DEFAULT \
822 { \
823  adcOvsRateSel2, /* 2x oversampling (if enabled). */ \
824  adcWarmupNormal, /* ADC shutdown after each conversion. */ \
825  _ADC_CTRL_TIMEBASE_DEFAULT, /* Use HW default value. */ \
826  _ADC_CTRL_PRESC_DEFAULT, /* Use HW default value. */ \
827  false /* Do not use tailgate. */ \
828 }
829 #elif (!defined( _ADC_CTRL_LPFMODE_MASK )) && defined( _ADC_CTRL_ADCCLKMODE_MASK )
830 #define ADC_INIT_DEFAULT \
831 { \
832  adcOvsRateSel2, /* 2x oversampling (if enabled). */ \
833  adcWarmupNormal, /* ADC shutdown after each conversion. */ \
834  _ADC_CTRL_TIMEBASE_DEFAULT, /* Use HW default value. */ \
835  _ADC_CTRL_PRESC_DEFAULT, /* Use HW default value. */ \
836  false, /* Do not use tailgate. */ \
837  adcEm2Disabled /* ADC disabled in EM2 */ \
838 }
839 #endif
840 
841 
843 typedef struct
844 {
846  int32_t scanInputSel;
847 
849  uint32_t scanInputEn;
850 
852  uint32_t scanNegSel;
854 
855 
857 typedef struct
858 {
864 
867 
873 
876 
877 #if defined( _ADC_SCANCTRL_INPUTMASK_MASK )
878 
884  uint32_t input;
885 #endif
886 
887 #if defined( _ADC_SCANINPUTSEL_MASK )
888 
892  ADC_InitScanInput_TypeDef scanInputConfig;
893 #endif
894 
896  bool diff;
897 
899  bool prsEnable;
900 
903 
905  bool rep;
906 
908 #if defined( _ADC_CTRL_SCANDMAWU_MASK )
909  bool scanDmaEm2Wu;
910 #endif
911 
912 #if defined( _ADC_SCANCTRLX_FIFOOFACT_MASK )
913 
915  bool fifoOverwrite;
916 #endif
918 
920 #if defined( _ADC_SCANCTRL_INPUTMASK_MASK )
921 #define ADC_INITSCAN_DEFAULT \
922 { \
923  adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
924  adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
925  adcRef1V25, /* 1.25V internal reference. */ \
926  adcRes12Bit, /* 12 bit resolution. */ \
927  0, /* No input selected. */ \
928  false, /* Single-ended input. */ \
929  false, /* PRS disabled. */ \
930  false, /* Right adjust. */ \
931  false, /* Deactivate conversion after one scan sequence. */ \
932 }
933 #endif
934 
935 #if defined( _ADC_SCANINPUTSEL_MASK )
936 #define ADC_INITSCAN_DEFAULT \
937 { \
938  adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
939  adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
940  adcRef1V25, /* 1.25V internal reference. */ \
941  adcRes12Bit, /* 12 bit resolution. */ \
942  0, /* Default ADC inputs */ \
943  0, /* Default input mask (all off) */ \
944  _ADC_SCANNEGSEL_RESETVALUE,/* Default negative select for positive ternimal */ \
945  false, /* Single-ended input. */ \
946  false, /* PRS disabled. */ \
947  false, /* Right adjust. */ \
948  false, /* Deactivate conversion after one scan sequence. */ \
949  false, /* No EM2 DMA wakeup from scan FIFO DVL */ \
950  false /* Discard new data on full FIFO. */ \
951 }
952 #endif
953 
954 
956 typedef struct
957 {
963 
966 
972 
975 
976 #if defined( _ADC_SINGLECTRL_INPUTSEL_MASK )
977 
982 #endif
983 
984 #if defined( _ADC_SINGLECTRL_POSSEL_MASK )
985 
986  ADC_PosSel_TypeDef posSel;
987 #endif
988 
989 #if defined( _ADC_SINGLECTRL_NEGSEL_MASK )
990 
992  ADC_NegSel_TypeDef negSel;
993 #endif
994 
996  bool diff;
997 
999  bool prsEnable;
1000 
1003 
1005  bool rep;
1006 
1007 #if defined( _ADC_CTRL_SINGLEDMAWU_MASK )
1008 
1009  bool singleDmaEm2Wu;
1010 #endif
1011 
1012 #if defined( _ADC_SINGLECTRLX_FIFOOFACT_MASK )
1013 
1015  bool fifoOverwrite;
1016 #endif
1018 
1020 #if defined( _ADC_SINGLECTRL_INPUTSEL_MASK )
1021 #define ADC_INITSINGLE_DEFAULT \
1022 { \
1023  adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
1024  adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
1025  adcRef1V25, /* 1.25V internal reference. */ \
1026  adcRes12Bit, /* 12 bit resolution. */ \
1027  adcSingleInpCh0, /* CH0 input selected. */ \
1028  false, /* Single ended input. */ \
1029  false, /* PRS disabled. */ \
1030  false, /* Right adjust. */ \
1031  false /* Deactivate conversion after one scan sequence. */ \
1032 }
1033 #else
1034 #define ADC_INITSINGLE_DEFAULT \
1035 { \
1036  adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
1037  adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
1038  adcRef1V25, /* 1.25V internal reference. */ \
1039  adcRes12Bit, /* 12 bit resolution. */ \
1040  adcPosSelAPORT0XCH0, /* Select node BUS0XCH0 as posSel */ \
1041  adcNegSelAPORT0XCH1, /* Select node BUS0XCH1 as negSel */ \
1042  false, /* Single ended input. */ \
1043  false, /* PRS disabled. */ \
1044  false, /* Right adjust. */ \
1045  false, /* Deactivate conversion after one scan sequence. */ \
1046  false, /* No EM2 DMA wakeup from single FIFO DVL */ \
1047  false /* Discard new data on full FIFO. */ \
1048 }
1049 #endif
1050 
1051 /*******************************************************************************
1052  ***************************** PROTOTYPES **********************************
1053  ******************************************************************************/
1054 
1055 /***************************************************************************/
1068 __STATIC_INLINE uint32_t ADC_DataSingleGet(ADC_TypeDef *adc)
1069 {
1070  return adc->SINGLEDATA;
1071 }
1072 
1073 
1074 /***************************************************************************/
1087 __STATIC_INLINE uint32_t ADC_DataSinglePeek(ADC_TypeDef *adc)
1088 {
1089  return adc->SINGLEDATAP;
1090 }
1091 
1092 
1093 /***************************************************************************/
1106 __STATIC_INLINE uint32_t ADC_DataScanGet(ADC_TypeDef *adc)
1107 {
1108  return adc->SCANDATA;
1109 }
1110 
1111 
1112 /***************************************************************************/
1125 __STATIC_INLINE uint32_t ADC_DataScanPeek(ADC_TypeDef *adc)
1126 {
1127  return adc->SCANDATAP;
1128 }
1129 
1130 
1131 #if defined( _ADC_SCANDATAX_MASK )
1132 uint32_t ADC_DataIdScanGet(ADC_TypeDef *adc, uint32_t *scanId);
1133 #endif
1134 
1135 void ADC_Init(ADC_TypeDef *adc, const ADC_Init_TypeDef *init);
1136 void ADC_Reset(ADC_TypeDef *adc);
1137 void ADC_InitScan(ADC_TypeDef *adc, const ADC_InitScan_TypeDef *init);
1138 
1139 #if defined( _ADC_SCANINPUTSEL_MASK )
1140 void ADC_ScanInputClear(ADC_InitScan_TypeDef *scanInit);
1141 uint32_t ADC_ScanSingleEndedInputAdd(ADC_InitScan_TypeDef *scanInit,
1142  ADC_ScanInputGroup_TypeDef inputGroup,
1143  ADC_PosSel_TypeDef singleEndedSel);
1144 uint32_t ADC_ScanDifferentialInputAdd(ADC_InitScan_TypeDef *scanInit,
1145  ADC_ScanInputGroup_TypeDef inputGroup,
1146  ADC_PosSel_TypeDef posSel,
1147  ADC_ScanNegInput_TypeDef adcScanNegInput);
1148 #endif
1149 
1150 void ADC_InitSingle(ADC_TypeDef *adc, const ADC_InitSingle_TypeDef *init);
1151 uint8_t ADC_TimebaseCalc(uint32_t hfperFreq);
1152 uint8_t ADC_PrescaleCalc(uint32_t adcFreq, uint32_t hfperFreq);
1153 
1154 
1155 /***************************************************************************/
1166 __STATIC_INLINE void ADC_IntClear(ADC_TypeDef *adc, uint32_t flags)
1167 {
1168  adc->IFC = flags;
1169 }
1170 
1171 
1172 /***************************************************************************/
1183 __STATIC_INLINE void ADC_IntDisable(ADC_TypeDef *adc, uint32_t flags)
1184 {
1185  adc->IEN &= ~flags;
1186 }
1187 
1188 
1189 /***************************************************************************/
1205 __STATIC_INLINE void ADC_IntEnable(ADC_TypeDef *adc, uint32_t flags)
1206 {
1207  adc->IEN |= flags;
1208 }
1209 
1210 
1211 /***************************************************************************/
1225 __STATIC_INLINE uint32_t ADC_IntGet(ADC_TypeDef *adc)
1226 {
1227  return adc->IF;
1228 }
1229 
1230 
1231 /***************************************************************************/
1250 __STATIC_INLINE uint32_t ADC_IntGetEnabled(ADC_TypeDef *adc)
1251 {
1252  uint32_t ien;
1253 
1254  /* Store ADCx->IEN in temporary variable in order to define explicit order
1255  * of volatile accesses. */
1256  ien = adc->IEN;
1257 
1258  /* Bitwise AND of pending and enabled interrupts */
1259  return adc->IF & ien;
1260 }
1261 
1262 
1263 /***************************************************************************/
1274 __STATIC_INLINE void ADC_IntSet(ADC_TypeDef *adc, uint32_t flags)
1275 {
1276  adc->IFS = flags;
1277 }
1278 
1279 
1280 /***************************************************************************/
1290 __STATIC_INLINE void ADC_Start(ADC_TypeDef *adc, ADC_Start_TypeDef cmd)
1291 {
1292  adc->CMD = (uint32_t)cmd;
1293 }
1294 
1295 
1299 #ifdef __cplusplus
1300 }
1301 #endif
1302 
1303 #endif /* defined(ADC_COUNT) && (ADC_COUNT > 0) */
1304 #endif /* __SILICON_LABS_EM_ADC_H__ */
__I uint32_t SINGLEDATAP
Definition: efm32gg_adc.h:54
ADC_LPFilter_TypeDef
Definition: em_adc.h:75
#define _ADC_CTRL_WARMUPMODE_KEEPADCWARM
Definition: efm32gg_adc.h:76
#define _ADC_CTRL_OVSRSEL_X2048
Definition: efm32gg_adc.h:120
#define _ADC_SINGLECTRL_INPUTSEL_VREFDIV2
Definition: efm32gg_adc.h:273
#define _ADC_SINGLECTRL_INPUTSEL_CH7
Definition: efm32gg_adc.h:268
#define _ADC_SINGLECTRL_INPUTSEL_CH5
Definition: efm32gg_adc.h:266
#define _ADC_SINGLECTRL_PRSSEL_PRSCH2
Definition: efm32gg_adc.h:347
#define _ADC_SINGLECTRL_AT_256CYCLES
Definition: efm32gg_adc.h:326
#define _ADC_CTRL_OVSRSEL_X64
Definition: efm32gg_adc.h:115
#define _ADC_SINGLECTRL_INPUTSEL_CH2CH3
Definition: efm32gg_adc.h:259
#define _ADC_SINGLECTRL_RES_8BIT
Definition: efm32gg_adc.h:245
#define _ADC_SINGLECTRL_INPUTSEL_VDDDIV3
Definition: efm32gg_adc.h:270
__STATIC_INLINE uint32_t ADC_DataSinglePeek(ADC_TypeDef *adc)
Peek single conversion result.
Definition: em_adc.h:1087
#define _ADC_SINGLECTRL_PRSSEL_PRSCH4
Definition: efm32gg_adc.h:349
#define _ADC_CTRL_OVSRSEL_X4
Definition: efm32gg_adc.h:111
uint32_t input
Definition: em_adc.h:884
#define _ADC_SINGLECTRL_REF_VDD
Definition: efm32gg_adc.h:302
#define _ADC_SINGLECTRL_INPUTSEL_CH1
Definition: efm32gg_adc.h:258
__STATIC_INLINE uint32_t ADC_DataScanPeek(ADC_TypeDef *adc)
Peek scan result.
Definition: em_adc.h:1125
#define _ADC_SINGLECTRL_INPUTSEL_TEMP
Definition: efm32gg_adc.h:269
#define _ADC_SINGLECTRL_REF_2V5
Definition: efm32gg_adc.h:301
#define _ADC_SINGLECTRL_INPUTSEL_CH0CH1
Definition: efm32gg_adc.h:257
#define _ADC_SINGLECTRL_REF_2XEXTDIFF
Definition: efm32gg_adc.h:305
#define _ADC_SINGLECTRL_INPUTSEL_CH3
Definition: efm32gg_adc.h:263
#define _ADC_SINGLECTRL_AT_2CYCLES
Definition: efm32gg_adc.h:319
void ADC_Reset(ADC_TypeDef *adc)
Reset ADC to same state as after a HW reset.
Definition: em_adc.c:996
uint8_t timebase
Definition: em_adc.h:794
#define ADC_CMD_SCANSTART
Definition: efm32gg_adc.h:149
#define _ADC_CTRL_LPFMODE_BYPASS
Definition: efm32gg_adc.h:90
#define _ADC_SINGLECTRL_REF_1V25
Definition: efm32gg_adc.h:300
#define _ADC_CTRL_OVSRSEL_X1024
Definition: efm32gg_adc.h:119
ADC_AcqTime_TypeDef acqTime
Definition: em_adc.h:965
ADC_AcqTime_TypeDef
Definition: em_adc.h:60
#define _ADC_SINGLECTRL_AT_8CYCLES
Definition: efm32gg_adc.h:321
#define _ADC_SINGLECTRL_INPUTSEL_CH6
Definition: efm32gg_adc.h:267
__STATIC_INLINE void ADC_IntClear(ADC_TypeDef *adc, uint32_t flags)
Clear one or more pending ADC interrupts.
Definition: em_adc.h:1166
#define _ADC_SINGLECTRL_PRSSEL_PRSCH0
Definition: efm32gg_adc.h:345
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
#define _ADC_SINGLECTRL_PRSSEL_PRSCH7
Definition: efm32gg_adc.h:352
#define _ADC_SINGLECTRL_RES_12BIT
Definition: efm32gg_adc.h:244
__STATIC_INLINE uint32_t ADC_DataSingleGet(ADC_TypeDef *adc)
Get single conversion result.
Definition: em_adc.h:1068
ADC_SingleInput_TypeDef input
Definition: em_adc.h:981
#define ADC_CMD_SINGLESTART
Definition: efm32gg_adc.h:139
ADC_OvsRateSel_TypeDef
Definition: em_adc.h:89
#define _ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM
Definition: efm32gg_adc.h:75
ADC_PRSSEL_TypeDef prsSel
Definition: em_adc.h:962
#define _ADC_CTRL_OVSRSEL_X8
Definition: efm32gg_adc.h:112
#define _ADC_SINGLECTRL_INPUTSEL_VDD
Definition: efm32gg_adc.h:271
__IO uint32_t IFS
Definition: efm32gg_adc.h:50
__STATIC_INLINE void ADC_IntSet(ADC_TypeDef *adc, uint32_t flags)
Set one or more pending ADC interrupts from SW.
Definition: em_adc.h:1274
#define _ADC_SINGLECTRL_AT_4CYCLES
Definition: efm32gg_adc.h:320
__IO uint32_t CMD
Definition: efm32gg_adc.h:44
ADC_SingleInput_TypeDef
Definition: em_adc.h:264
#define _ADC_CTRL_LPFMODE_DECAP
Definition: efm32gg_adc.h:91
#define _ADC_SINGLECTRL_INPUTSEL_VSS
Definition: efm32gg_adc.h:272
__STATIC_INLINE void ADC_IntEnable(ADC_TypeDef *adc, uint32_t flags)
Enable one or more ADC interrupts.
Definition: em_adc.h:1205
#define _ADC_SINGLECTRL_RES_OVS
Definition: efm32gg_adc.h:247
void ADC_Init(ADC_TypeDef *adc, const ADC_Init_TypeDef *init)
Initialize ADC.
Definition: em_adc.c:363
ADC_Res_TypeDef
Definition: em_adc.h:253
#define _ADC_SINGLECTRL_PRSSEL_PRSCH5
Definition: efm32gg_adc.h:350
#define _ADC_CTRL_OVSRSEL_X4096
Definition: efm32gg_adc.h:121
ADC_PRSSEL_TypeDef prsSel
Definition: em_adc.h:863
#define _ADC_SINGLECTRL_AT_128CYCLES
Definition: efm32gg_adc.h:325
__I uint32_t SCANDATAP
Definition: efm32gg_adc.h:55
__I uint32_t SCANDATA
Definition: efm32gg_adc.h:53
__I uint32_t SINGLEDATA
Definition: efm32gg_adc.h:52
#define _ADC_SINGLECTRL_PRSSEL_PRSCH6
Definition: efm32gg_adc.h:351
uint8_t ADC_TimebaseCalc(uint32_t hfperFreq)
Calculate timebase value in order to get a timebase providing at least 1us.
Definition: em_adc.c:1048
#define _ADC_SINGLECTRL_REF_5VDIFF
Definition: efm32gg_adc.h:303
#define _ADC_SINGLECTRL_AT_32CYCLES
Definition: efm32gg_adc.h:323
#define _ADC_SINGLECTRL_REF_2XVDD
Definition: efm32gg_adc.h:306
#define _ADC_SINGLECTRL_INPUTSEL_CH4
Definition: efm32gg_adc.h:264
#define _ADC_SINGLECTRL_PRSSEL_PRSCH1
Definition: efm32gg_adc.h:346
__I uint32_t IF
Definition: efm32gg_adc.h:49
#define _ADC_CTRL_OVSRSEL_X2
Definition: efm32gg_adc.h:110
#define _ADC_SINGLECTRL_INPUTSEL_CH4CH5
Definition: efm32gg_adc.h:261
#define _ADC_CTRL_OVSRSEL_X256
Definition: efm32gg_adc.h:117
ADC_Res_TypeDef resolution
Definition: em_adc.h:974
uint8_t prescale
Definition: em_adc.h:797
#define _ADC_SINGLECTRL_PRSSEL_PRSCH10
Definition: efm32gg_adc.h:355
__STATIC_INLINE void ADC_IntDisable(ADC_TypeDef *adc, uint32_t flags)
Disable one or more ADC interrupts.
Definition: em_adc.h:1183
void ADC_InitSingle(ADC_TypeDef *adc, const ADC_InitSingle_TypeDef *init)
Initialize single ADC sample conversion.
Definition: em_adc.c:810
#define _ADC_CTRL_OVSRSEL_X512
Definition: efm32gg_adc.h:118
__IO uint32_t IFC
Definition: efm32gg_adc.h:51
#define _ADC_SINGLECTRL_PRSSEL_PRSCH3
Definition: efm32gg_adc.h:348
ADC_Warmup_TypeDef
Definition: em_adc.h:721
__IO uint32_t IEN
Definition: efm32gg_adc.h:48
#define _ADC_SINGLECTRL_PRSSEL_PRSCH11
Definition: efm32gg_adc.h:356
#define _ADC_SINGLECTRL_RES_6BIT
Definition: efm32gg_adc.h:246
#define _ADC_SINGLECTRL_REF_EXTSINGLE
Definition: efm32gg_adc.h:304
#define _ADC_CTRL_OVSRSEL_X32
Definition: efm32gg_adc.h:114
#define _ADC_CTRL_WARMUPMODE_FASTBG
Definition: efm32gg_adc.h:74
uint8_t ADC_PrescaleCalc(uint32_t adcFreq, uint32_t hfperFreq)
Calculate prescaler value used to determine ADC clock.
Definition: em_adc.c:955
__STATIC_INLINE void ADC_Start(ADC_TypeDef *adc, ADC_Start_TypeDef cmd)
Start scan sequence and/or single conversion.
Definition: em_adc.h:1290
ADC_LPFilter_TypeDef lpfMode
Definition: em_adc.h:781
#define _ADC_CTRL_WARMUPMODE_NORMAL
Definition: efm32gg_adc.h:73
void ADC_InitScan(ADC_TypeDef *adc, const ADC_InitScan_TypeDef *init)
Initialize ADC scan sequence.
Definition: em_adc.c:679
#define _ADC_SINGLECTRL_INPUTSEL_DAC0OUT1
Definition: efm32gg_adc.h:275
__STATIC_INLINE uint32_t ADC_DataScanGet(ADC_TypeDef *adc)
Get scan result.
Definition: em_adc.h:1106
#define _ADC_SINGLECTRL_AT_64CYCLES
Definition: efm32gg_adc.h:324
#define _ADC_SINGLECTRL_AT_16CYCLES
Definition: efm32gg_adc.h:322
#define _ADC_SINGLECTRL_INPUTSEL_CH6CH7
Definition: efm32gg_adc.h:262
#define _ADC_CTRL_OVSRSEL_X128
Definition: efm32gg_adc.h:116
ADC_Ref_TypeDef reference
Definition: em_adc.h:971
#define _ADC_SINGLECTRL_INPUTSEL_CH2
Definition: efm32gg_adc.h:260
#define _ADC_SINGLECTRL_AT_1CYCLE
Definition: efm32gg_adc.h:318
#define _ADC_SINGLECTRL_INPUTSEL_DAC0OUT0
Definition: efm32gg_adc.h:274
ADC_OvsRateSel_TypeDef ovsRateSel
Definition: em_adc.h:777
#define _ADC_CTRL_OVSRSEL_X16
Definition: efm32gg_adc.h:113
#define _ADC_SINGLECTRL_INPUTSEL_CH0
Definition: efm32gg_adc.h:256
#define _ADC_SINGLECTRL_PRSSEL_PRSCH8
Definition: efm32gg_adc.h:353
#define _ADC_SINGLECTRL_PRSSEL_PRSCH9
Definition: efm32gg_adc.h:354
ADC_Start_TypeDef
Definition: em_adc.h:704
ADC_Ref_TypeDef reference
Definition: em_adc.h:872
__STATIC_INLINE uint32_t ADC_IntGet(ADC_TypeDef *adc)
Get pending ADC interrupt flags.
Definition: em_adc.h:1225
ADC_Res_TypeDef resolution
Definition: em_adc.h:875
__STATIC_INLINE uint32_t ADC_IntGetEnabled(ADC_TypeDef *adc)
Get enabled and pending ADC interrupt flags. Useful for handling more interrupt sources in the same i...
Definition: em_adc.h:1250
ADC_Ref_TypeDef
Definition: em_adc.h:189
ADC_AcqTime_TypeDef acqTime
Definition: em_adc.h:866
ADC_Warmup_TypeDef warmUpMode
Definition: em_adc.h:785
#define _ADC_CTRL_LPFMODE_RCFILT
Definition: efm32gg_adc.h:92
ADC_PRSSEL_TypeDef
Definition: em_adc.h:130