release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32G/Include/efm32g_prs.h

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00001 /**************************************************************************/
00032 /**************************************************************************/
00037 typedef struct
00038 {
00039   __IO uint32_t  SWPULSE;      
00040   __IO uint32_t  SWLEVEL;      
00042   uint32_t       RESERVED0[2]; 
00044   PRS_CH_TypeDef CH[8];        
00045 } PRS_TypeDef;                 
00047 /**************************************************************************/
00052 /* Bit fields for PRS SWPULSE */
00053 #define _PRS_SWPULSE_RESETVALUE              0x00000000UL                         
00054 #define _PRS_SWPULSE_MASK                    0x000000FFUL                         
00055 #define PRS_SWPULSE_CH0PULSE                 (0x1UL << 0)                         
00056 #define _PRS_SWPULSE_CH0PULSE_SHIFT          0                                    
00057 #define _PRS_SWPULSE_CH0PULSE_MASK           0x1UL                                
00058 #define _PRS_SWPULSE_CH0PULSE_DEFAULT        0x00000000UL                         
00059 #define PRS_SWPULSE_CH0PULSE_DEFAULT         (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0) 
00060 #define PRS_SWPULSE_CH1PULSE                 (0x1UL << 1)                         
00061 #define _PRS_SWPULSE_CH1PULSE_SHIFT          1                                    
00062 #define _PRS_SWPULSE_CH1PULSE_MASK           0x2UL                                
00063 #define _PRS_SWPULSE_CH1PULSE_DEFAULT        0x00000000UL                         
00064 #define PRS_SWPULSE_CH1PULSE_DEFAULT         (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1) 
00065 #define PRS_SWPULSE_CH2PULSE                 (0x1UL << 2)                         
00066 #define _PRS_SWPULSE_CH2PULSE_SHIFT          2                                    
00067 #define _PRS_SWPULSE_CH2PULSE_MASK           0x4UL                                
00068 #define _PRS_SWPULSE_CH2PULSE_DEFAULT        0x00000000UL                         
00069 #define PRS_SWPULSE_CH2PULSE_DEFAULT         (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2) 
00070 #define PRS_SWPULSE_CH3PULSE                 (0x1UL << 3)                         
00071 #define _PRS_SWPULSE_CH3PULSE_SHIFT          3                                    
00072 #define _PRS_SWPULSE_CH3PULSE_MASK           0x8UL                                
00073 #define _PRS_SWPULSE_CH3PULSE_DEFAULT        0x00000000UL                         
00074 #define PRS_SWPULSE_CH3PULSE_DEFAULT         (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3) 
00075 #define PRS_SWPULSE_CH4PULSE                 (0x1UL << 4)                         
00076 #define _PRS_SWPULSE_CH4PULSE_SHIFT          4                                    
00077 #define _PRS_SWPULSE_CH4PULSE_MASK           0x10UL                               
00078 #define _PRS_SWPULSE_CH4PULSE_DEFAULT        0x00000000UL                         
00079 #define PRS_SWPULSE_CH4PULSE_DEFAULT         (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4) 
00080 #define PRS_SWPULSE_CH5PULSE                 (0x1UL << 5)                         
00081 #define _PRS_SWPULSE_CH5PULSE_SHIFT          5                                    
00082 #define _PRS_SWPULSE_CH5PULSE_MASK           0x20UL                               
00083 #define _PRS_SWPULSE_CH5PULSE_DEFAULT        0x00000000UL                         
00084 #define PRS_SWPULSE_CH5PULSE_DEFAULT         (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5) 
00085 #define PRS_SWPULSE_CH6PULSE                 (0x1UL << 6)                         
00086 #define _PRS_SWPULSE_CH6PULSE_SHIFT          6                                    
00087 #define _PRS_SWPULSE_CH6PULSE_MASK           0x40UL                               
00088 #define _PRS_SWPULSE_CH6PULSE_DEFAULT        0x00000000UL                         
00089 #define PRS_SWPULSE_CH6PULSE_DEFAULT         (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6) 
00090 #define PRS_SWPULSE_CH7PULSE                 (0x1UL << 7)                         
00091 #define _PRS_SWPULSE_CH7PULSE_SHIFT          7                                    
00092 #define _PRS_SWPULSE_CH7PULSE_MASK           0x80UL                               
00093 #define _PRS_SWPULSE_CH7PULSE_DEFAULT        0x00000000UL                         
00094 #define PRS_SWPULSE_CH7PULSE_DEFAULT         (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7) 
00096 /* Bit fields for PRS SWLEVEL */
00097 #define _PRS_SWLEVEL_RESETVALUE              0x00000000UL                         
00098 #define _PRS_SWLEVEL_MASK                    0x000000FFUL                         
00099 #define PRS_SWLEVEL_CH0LEVEL                 (0x1UL << 0)                         
00100 #define _PRS_SWLEVEL_CH0LEVEL_SHIFT          0                                    
00101 #define _PRS_SWLEVEL_CH0LEVEL_MASK           0x1UL                                
00102 #define _PRS_SWLEVEL_CH0LEVEL_DEFAULT        0x00000000UL                         
00103 #define PRS_SWLEVEL_CH0LEVEL_DEFAULT         (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0) 
00104 #define PRS_SWLEVEL_CH1LEVEL                 (0x1UL << 1)                         
00105 #define _PRS_SWLEVEL_CH1LEVEL_SHIFT          1                                    
00106 #define _PRS_SWLEVEL_CH1LEVEL_MASK           0x2UL                                
00107 #define _PRS_SWLEVEL_CH1LEVEL_DEFAULT        0x00000000UL                         
00108 #define PRS_SWLEVEL_CH1LEVEL_DEFAULT         (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1) 
00109 #define PRS_SWLEVEL_CH2LEVEL                 (0x1UL << 2)                         
00110 #define _PRS_SWLEVEL_CH2LEVEL_SHIFT          2                                    
00111 #define _PRS_SWLEVEL_CH2LEVEL_MASK           0x4UL                                
00112 #define _PRS_SWLEVEL_CH2LEVEL_DEFAULT        0x00000000UL                         
00113 #define PRS_SWLEVEL_CH2LEVEL_DEFAULT         (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2) 
00114 #define PRS_SWLEVEL_CH3LEVEL                 (0x1UL << 3)                         
00115 #define _PRS_SWLEVEL_CH3LEVEL_SHIFT          3                                    
00116 #define _PRS_SWLEVEL_CH3LEVEL_MASK           0x8UL                                
00117 #define _PRS_SWLEVEL_CH3LEVEL_DEFAULT        0x00000000UL                         
00118 #define PRS_SWLEVEL_CH3LEVEL_DEFAULT         (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3) 
00119 #define PRS_SWLEVEL_CH4LEVEL                 (0x1UL << 4)                         
00120 #define _PRS_SWLEVEL_CH4LEVEL_SHIFT          4                                    
00121 #define _PRS_SWLEVEL_CH4LEVEL_MASK           0x10UL                               
00122 #define _PRS_SWLEVEL_CH4LEVEL_DEFAULT        0x00000000UL                         
00123 #define PRS_SWLEVEL_CH4LEVEL_DEFAULT         (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4) 
00124 #define PRS_SWLEVEL_CH5LEVEL                 (0x1UL << 5)                         
00125 #define _PRS_SWLEVEL_CH5LEVEL_SHIFT          5                                    
00126 #define _PRS_SWLEVEL_CH5LEVEL_MASK           0x20UL                               
00127 #define _PRS_SWLEVEL_CH5LEVEL_DEFAULT        0x00000000UL                         
00128 #define PRS_SWLEVEL_CH5LEVEL_DEFAULT         (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5) 
00129 #define PRS_SWLEVEL_CH6LEVEL                 (0x1UL << 6)                         
00130 #define _PRS_SWLEVEL_CH6LEVEL_SHIFT          6                                    
00131 #define _PRS_SWLEVEL_CH6LEVEL_MASK           0x40UL                               
00132 #define _PRS_SWLEVEL_CH6LEVEL_DEFAULT        0x00000000UL                         
00133 #define PRS_SWLEVEL_CH6LEVEL_DEFAULT         (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6) 
00134 #define PRS_SWLEVEL_CH7LEVEL                 (0x1UL << 7)                         
00135 #define _PRS_SWLEVEL_CH7LEVEL_SHIFT          7                                    
00136 #define _PRS_SWLEVEL_CH7LEVEL_MASK           0x80UL                               
00137 #define _PRS_SWLEVEL_CH7LEVEL_DEFAULT        0x00000000UL                         
00138 #define PRS_SWLEVEL_CH7LEVEL_DEFAULT         (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7) 
00140 /* Bit fields for PRS CH_CTRL */
00141 #define _PRS_CH_CTRL_RESETVALUE              0x00000000UL                             
00142 #define _PRS_CH_CTRL_MASK                    0x033F0007UL                             
00143 #define _PRS_CH_CTRL_SIGSEL_SHIFT            0                                        
00144 #define _PRS_CH_CTRL_SIGSEL_MASK             0x7UL                                    
00145 #define _PRS_CH_CTRL_SIGSEL_VCMPOUT          0x00000000UL                             
00146 #define _PRS_CH_CTRL_SIGSEL_ACMP0OUT         0x00000000UL                             
00147 #define _PRS_CH_CTRL_SIGSEL_ACMP1OUT         0x00000000UL                             
00148 #define _PRS_CH_CTRL_SIGSEL_DAC0CH0          0x00000000UL                             
00149 #define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE       0x00000000UL                             
00150 #define _PRS_CH_CTRL_SIGSEL_USART0IRTX       0x00000000UL                             
00151 #define _PRS_CH_CTRL_SIGSEL_TIMER0UF         0x00000000UL                             
00152 #define _PRS_CH_CTRL_SIGSEL_TIMER1UF         0x00000000UL                             
00153 #define _PRS_CH_CTRL_SIGSEL_TIMER2UF         0x00000000UL                             
00154 #define _PRS_CH_CTRL_SIGSEL_RTCOF            0x00000000UL                             
00155 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN0         0x00000000UL                             
00156 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN8         0x00000000UL                             
00157 #define _PRS_CH_CTRL_SIGSEL_DAC0CH1          0x00000001UL                             
00158 #define _PRS_CH_CTRL_SIGSEL_ADC0SCAN         0x00000001UL                             
00159 #define _PRS_CH_CTRL_SIGSEL_USART0TXC        0x00000001UL                             
00160 #define _PRS_CH_CTRL_SIGSEL_USART1TXC        0x00000001UL                             
00161 #define _PRS_CH_CTRL_SIGSEL_USART2TXC        0x00000001UL                             
00162 #define _PRS_CH_CTRL_SIGSEL_TIMER0OF         0x00000001UL                             
00163 #define _PRS_CH_CTRL_SIGSEL_TIMER1OF         0x00000001UL                             
00164 #define _PRS_CH_CTRL_SIGSEL_TIMER2OF         0x00000001UL                             
00165 #define _PRS_CH_CTRL_SIGSEL_RTCCOMP0         0x00000001UL                             
00166 #define _PRS_CH_CTRL_SIGSEL_UART0TXC         0x00000001UL                             
00167 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN1         0x00000001UL                             
00168 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN9         0x00000001UL                             
00169 #define _PRS_CH_CTRL_SIGSEL_USART0RXDATAV    0x00000002UL                             
00170 #define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV    0x00000002UL                             
00171 #define _PRS_CH_CTRL_SIGSEL_USART2RXDATAV    0x00000002UL                             
00172 #define _PRS_CH_CTRL_SIGSEL_TIMER0CC0        0x00000002UL                             
00173 #define _PRS_CH_CTRL_SIGSEL_TIMER1CC0        0x00000002UL                             
00174 #define _PRS_CH_CTRL_SIGSEL_TIMER2CC0        0x00000002UL                             
00175 #define _PRS_CH_CTRL_SIGSEL_RTCCOMP1         0x00000002UL                             
00176 #define _PRS_CH_CTRL_SIGSEL_UART0RXDATAV     0x00000002UL                             
00177 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN2         0x00000002UL                             
00178 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN10        0x00000002UL                             
00179 #define _PRS_CH_CTRL_SIGSEL_TIMER0CC1        0x00000003UL                             
00180 #define _PRS_CH_CTRL_SIGSEL_TIMER1CC1        0x00000003UL                             
00181 #define _PRS_CH_CTRL_SIGSEL_TIMER2CC1        0x00000003UL                             
00182 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN3         0x00000003UL                             
00183 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN11        0x00000003UL                             
00184 #define _PRS_CH_CTRL_SIGSEL_TIMER0CC2        0x00000004UL                             
00185 #define _PRS_CH_CTRL_SIGSEL_TIMER1CC2        0x00000004UL                             
00186 #define _PRS_CH_CTRL_SIGSEL_TIMER2CC2        0x00000004UL                             
00187 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN4         0x00000004UL                             
00188 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN12        0x00000004UL                             
00189 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN5         0x00000005UL                             
00190 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN13        0x00000005UL                             
00191 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN6         0x00000006UL                             
00192 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN14        0x00000006UL                             
00193 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN7         0x00000007UL                             
00194 #define _PRS_CH_CTRL_SIGSEL_GPIOPIN15        0x00000007UL                             
00195 #define PRS_CH_CTRL_SIGSEL_VCMPOUT           (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0)       
00196 #define PRS_CH_CTRL_SIGSEL_ACMP0OUT          (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0)      
00197 #define PRS_CH_CTRL_SIGSEL_ACMP1OUT          (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0)      
00198 #define PRS_CH_CTRL_SIGSEL_DAC0CH0           (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0)       
00199 #define PRS_CH_CTRL_SIGSEL_ADC0SINGLE        (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0)    
00200 #define PRS_CH_CTRL_SIGSEL_USART0IRTX        (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0)    
00201 #define PRS_CH_CTRL_SIGSEL_TIMER0UF          (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0)      
00202 #define PRS_CH_CTRL_SIGSEL_TIMER1UF          (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0)      
00203 #define PRS_CH_CTRL_SIGSEL_TIMER2UF          (_PRS_CH_CTRL_SIGSEL_TIMER2UF << 0)      
00204 #define PRS_CH_CTRL_SIGSEL_RTCOF             (_PRS_CH_CTRL_SIGSEL_RTCOF << 0)         
00205 #define PRS_CH_CTRL_SIGSEL_GPIOPIN0          (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0)      
00206 #define PRS_CH_CTRL_SIGSEL_GPIOPIN8          (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0)      
00207 #define PRS_CH_CTRL_SIGSEL_DAC0CH1           (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0)       
00208 #define PRS_CH_CTRL_SIGSEL_ADC0SCAN          (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0)      
00209 #define PRS_CH_CTRL_SIGSEL_USART0TXC         (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0)     
00210 #define PRS_CH_CTRL_SIGSEL_USART1TXC         (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0)     
00211 #define PRS_CH_CTRL_SIGSEL_USART2TXC         (_PRS_CH_CTRL_SIGSEL_USART2TXC << 0)     
00212 #define PRS_CH_CTRL_SIGSEL_TIMER0OF          (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0)      
00213 #define PRS_CH_CTRL_SIGSEL_TIMER1OF          (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0)      
00214 #define PRS_CH_CTRL_SIGSEL_TIMER2OF          (_PRS_CH_CTRL_SIGSEL_TIMER2OF << 0)      
00215 #define PRS_CH_CTRL_SIGSEL_RTCCOMP0          (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0)      
00216 #define PRS_CH_CTRL_SIGSEL_UART0TXC          (_PRS_CH_CTRL_SIGSEL_UART0TXC << 0)      
00217 #define PRS_CH_CTRL_SIGSEL_GPIOPIN1          (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0)      
00218 #define PRS_CH_CTRL_SIGSEL_GPIOPIN9          (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0)      
00219 #define PRS_CH_CTRL_SIGSEL_USART0RXDATAV     (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0) 
00220 #define PRS_CH_CTRL_SIGSEL_USART1RXDATAV     (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0) 
00221 #define PRS_CH_CTRL_SIGSEL_USART2RXDATAV     (_PRS_CH_CTRL_SIGSEL_USART2RXDATAV << 0) 
00222 #define PRS_CH_CTRL_SIGSEL_TIMER0CC0         (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0)     
00223 #define PRS_CH_CTRL_SIGSEL_TIMER1CC0         (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0)     
00224 #define PRS_CH_CTRL_SIGSEL_TIMER2CC0         (_PRS_CH_CTRL_SIGSEL_TIMER2CC0 << 0)     
00225 #define PRS_CH_CTRL_SIGSEL_RTCCOMP1          (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0)      
00226 #define PRS_CH_CTRL_SIGSEL_UART0RXDATAV      (_PRS_CH_CTRL_SIGSEL_UART0RXDATAV << 0)  
00227 #define PRS_CH_CTRL_SIGSEL_GPIOPIN2          (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0)      
00228 #define PRS_CH_CTRL_SIGSEL_GPIOPIN10         (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0)     
00229 #define PRS_CH_CTRL_SIGSEL_TIMER0CC1         (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0)     
00230 #define PRS_CH_CTRL_SIGSEL_TIMER1CC1         (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0)     
00231 #define PRS_CH_CTRL_SIGSEL_TIMER2CC1         (_PRS_CH_CTRL_SIGSEL_TIMER2CC1 << 0)     
00232 #define PRS_CH_CTRL_SIGSEL_GPIOPIN3          (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0)      
00233 #define PRS_CH_CTRL_SIGSEL_GPIOPIN11         (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0)     
00234 #define PRS_CH_CTRL_SIGSEL_TIMER0CC2         (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0)     
00235 #define PRS_CH_CTRL_SIGSEL_TIMER1CC2         (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0)     
00236 #define PRS_CH_CTRL_SIGSEL_TIMER2CC2         (_PRS_CH_CTRL_SIGSEL_TIMER2CC2 << 0)     
00237 #define PRS_CH_CTRL_SIGSEL_GPIOPIN4          (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0)      
00238 #define PRS_CH_CTRL_SIGSEL_GPIOPIN12         (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0)     
00239 #define PRS_CH_CTRL_SIGSEL_GPIOPIN5          (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0)      
00240 #define PRS_CH_CTRL_SIGSEL_GPIOPIN13         (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0)     
00241 #define PRS_CH_CTRL_SIGSEL_GPIOPIN6          (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0)      
00242 #define PRS_CH_CTRL_SIGSEL_GPIOPIN14         (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0)     
00243 #define PRS_CH_CTRL_SIGSEL_GPIOPIN7          (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0)      
00244 #define PRS_CH_CTRL_SIGSEL_GPIOPIN15         (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0)     
00245 #define _PRS_CH_CTRL_SOURCESEL_SHIFT         16                                       
00246 #define _PRS_CH_CTRL_SOURCESEL_MASK          0x3F0000UL                               
00247 #define _PRS_CH_CTRL_SOURCESEL_NONE          0x00000000UL                             
00248 #define _PRS_CH_CTRL_SOURCESEL_VCMP          0x00000001UL                             
00249 #define _PRS_CH_CTRL_SOURCESEL_ACMP0         0x00000002UL                             
00250 #define _PRS_CH_CTRL_SOURCESEL_ACMP1         0x00000003UL                             
00251 #define _PRS_CH_CTRL_SOURCESEL_DAC0          0x00000006UL                             
00252 #define _PRS_CH_CTRL_SOURCESEL_ADC0          0x00000008UL                             
00253 #define _PRS_CH_CTRL_SOURCESEL_USART0        0x00000010UL                             
00254 #define _PRS_CH_CTRL_SOURCESEL_USART1        0x00000011UL                             
00255 #define _PRS_CH_CTRL_SOURCESEL_USART2        0x00000012UL                             
00256 #define _PRS_CH_CTRL_SOURCESEL_TIMER0        0x0000001CUL                             
00257 #define _PRS_CH_CTRL_SOURCESEL_TIMER1        0x0000001DUL                             
00258 #define _PRS_CH_CTRL_SOURCESEL_TIMER2        0x0000001EUL                             
00259 #define _PRS_CH_CTRL_SOURCESEL_RTC           0x00000028UL                             
00260 #define _PRS_CH_CTRL_SOURCESEL_UART0         0x00000029UL                             
00261 #define _PRS_CH_CTRL_SOURCESEL_GPIOL         0x00000030UL                             
00262 #define _PRS_CH_CTRL_SOURCESEL_GPIOH         0x00000031UL                             
00263 #define PRS_CH_CTRL_SOURCESEL_NONE           (_PRS_CH_CTRL_SOURCESEL_NONE << 16)      
00264 #define PRS_CH_CTRL_SOURCESEL_VCMP           (_PRS_CH_CTRL_SOURCESEL_VCMP << 16)      
00265 #define PRS_CH_CTRL_SOURCESEL_ACMP0          (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16)     
00266 #define PRS_CH_CTRL_SOURCESEL_ACMP1          (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16)     
00267 #define PRS_CH_CTRL_SOURCESEL_DAC0           (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16)      
00268 #define PRS_CH_CTRL_SOURCESEL_ADC0           (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16)      
00269 #define PRS_CH_CTRL_SOURCESEL_USART0         (_PRS_CH_CTRL_SOURCESEL_USART0 << 16)    
00270 #define PRS_CH_CTRL_SOURCESEL_USART1         (_PRS_CH_CTRL_SOURCESEL_USART1 << 16)    
00271 #define PRS_CH_CTRL_SOURCESEL_USART2         (_PRS_CH_CTRL_SOURCESEL_USART2 << 16)    
00272 #define PRS_CH_CTRL_SOURCESEL_TIMER0         (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16)    
00273 #define PRS_CH_CTRL_SOURCESEL_TIMER1         (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16)    
00274 #define PRS_CH_CTRL_SOURCESEL_TIMER2         (_PRS_CH_CTRL_SOURCESEL_TIMER2 << 16)    
00275 #define PRS_CH_CTRL_SOURCESEL_RTC            (_PRS_CH_CTRL_SOURCESEL_RTC << 16)       
00276 #define PRS_CH_CTRL_SOURCESEL_UART0          (_PRS_CH_CTRL_SOURCESEL_UART0 << 16)     
00277 #define PRS_CH_CTRL_SOURCESEL_GPIOL          (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16)     
00278 #define PRS_CH_CTRL_SOURCESEL_GPIOH          (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16)     
00279 #define _PRS_CH_CTRL_EDSEL_SHIFT             24                                       
00280 #define _PRS_CH_CTRL_EDSEL_MASK              0x3000000UL                              
00281 #define _PRS_CH_CTRL_EDSEL_DEFAULT           0x00000000UL                             
00282 #define _PRS_CH_CTRL_EDSEL_OFF               0x00000000UL                             
00283 #define _PRS_CH_CTRL_EDSEL_POSEDGE           0x00000001UL                             
00284 #define _PRS_CH_CTRL_EDSEL_NEGEDGE           0x00000002UL                             
00285 #define _PRS_CH_CTRL_EDSEL_BOTHEDGES         0x00000003UL                             
00286 #define PRS_CH_CTRL_EDSEL_DEFAULT            (_PRS_CH_CTRL_EDSEL_DEFAULT << 24)       
00287 #define PRS_CH_CTRL_EDSEL_OFF                (_PRS_CH_CTRL_EDSEL_OFF << 24)           
00288 #define PRS_CH_CTRL_EDSEL_POSEDGE            (_PRS_CH_CTRL_EDSEL_POSEDGE << 24)       
00289 #define PRS_CH_CTRL_EDSEL_NEGEDGE            (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24)       
00290 #define PRS_CH_CTRL_EDSEL_BOTHEDGES          (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24)