EFM32G200F64_PRS Bit Fields
[EFM32G200F64 Bit Fields]


Defines

#define _PRS_SWPULSE_RESETVALUE   0x00000000UL
#define _PRS_SWPULSE_MASK   0x000000FFUL
#define PRS_SWPULSE_CH0PULSE   (0x1UL << 0)
#define _PRS_SWPULSE_CH0PULSE_SHIFT   0
#define _PRS_SWPULSE_CH0PULSE_MASK   0x1UL
#define _PRS_SWPULSE_CH0PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH0PULSE_DEFAULT   (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0)
#define PRS_SWPULSE_CH1PULSE   (0x1UL << 1)
#define _PRS_SWPULSE_CH1PULSE_SHIFT   1
#define _PRS_SWPULSE_CH1PULSE_MASK   0x2UL
#define _PRS_SWPULSE_CH1PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH1PULSE_DEFAULT   (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1)
#define PRS_SWPULSE_CH2PULSE   (0x1UL << 2)
#define _PRS_SWPULSE_CH2PULSE_SHIFT   2
#define _PRS_SWPULSE_CH2PULSE_MASK   0x4UL
#define _PRS_SWPULSE_CH2PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH2PULSE_DEFAULT   (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2)
#define PRS_SWPULSE_CH3PULSE   (0x1UL << 3)
#define _PRS_SWPULSE_CH3PULSE_SHIFT   3
#define _PRS_SWPULSE_CH3PULSE_MASK   0x8UL
#define _PRS_SWPULSE_CH3PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH3PULSE_DEFAULT   (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3)
#define PRS_SWPULSE_CH4PULSE   (0x1UL << 4)
#define _PRS_SWPULSE_CH4PULSE_SHIFT   4
#define _PRS_SWPULSE_CH4PULSE_MASK   0x10UL
#define _PRS_SWPULSE_CH4PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH4PULSE_DEFAULT   (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4)
#define PRS_SWPULSE_CH5PULSE   (0x1UL << 5)
#define _PRS_SWPULSE_CH5PULSE_SHIFT   5
#define _PRS_SWPULSE_CH5PULSE_MASK   0x20UL
#define _PRS_SWPULSE_CH5PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH5PULSE_DEFAULT   (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5)
#define PRS_SWPULSE_CH6PULSE   (0x1UL << 6)
#define _PRS_SWPULSE_CH6PULSE_SHIFT   6
#define _PRS_SWPULSE_CH6PULSE_MASK   0x40UL
#define _PRS_SWPULSE_CH6PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH6PULSE_DEFAULT   (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6)
#define PRS_SWPULSE_CH7PULSE   (0x1UL << 7)
#define _PRS_SWPULSE_CH7PULSE_SHIFT   7
#define _PRS_SWPULSE_CH7PULSE_MASK   0x80UL
#define _PRS_SWPULSE_CH7PULSE_DEFAULT   0x00000000UL
#define PRS_SWPULSE_CH7PULSE_DEFAULT   (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7)
#define _PRS_SWLEVEL_RESETVALUE   0x00000000UL
#define _PRS_SWLEVEL_MASK   0x000000FFUL
#define PRS_SWLEVEL_CH0LEVEL   (0x1UL << 0)
#define _PRS_SWLEVEL_CH0LEVEL_SHIFT   0
#define _PRS_SWLEVEL_CH0LEVEL_MASK   0x1UL
#define _PRS_SWLEVEL_CH0LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH0LEVEL_DEFAULT   (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0)
#define PRS_SWLEVEL_CH1LEVEL   (0x1UL << 1)
#define _PRS_SWLEVEL_CH1LEVEL_SHIFT   1
#define _PRS_SWLEVEL_CH1LEVEL_MASK   0x2UL
#define _PRS_SWLEVEL_CH1LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH1LEVEL_DEFAULT   (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1)
#define PRS_SWLEVEL_CH2LEVEL   (0x1UL << 2)
#define _PRS_SWLEVEL_CH2LEVEL_SHIFT   2
#define _PRS_SWLEVEL_CH2LEVEL_MASK   0x4UL
#define _PRS_SWLEVEL_CH2LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH2LEVEL_DEFAULT   (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2)
#define PRS_SWLEVEL_CH3LEVEL   (0x1UL << 3)
#define _PRS_SWLEVEL_CH3LEVEL_SHIFT   3
#define _PRS_SWLEVEL_CH3LEVEL_MASK   0x8UL
#define _PRS_SWLEVEL_CH3LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH3LEVEL_DEFAULT   (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3)
#define PRS_SWLEVEL_CH4LEVEL   (0x1UL << 4)
#define _PRS_SWLEVEL_CH4LEVEL_SHIFT   4
#define _PRS_SWLEVEL_CH4LEVEL_MASK   0x10UL
#define _PRS_SWLEVEL_CH4LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH4LEVEL_DEFAULT   (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4)
#define PRS_SWLEVEL_CH5LEVEL   (0x1UL << 5)
#define _PRS_SWLEVEL_CH5LEVEL_SHIFT   5
#define _PRS_SWLEVEL_CH5LEVEL_MASK   0x20UL
#define _PRS_SWLEVEL_CH5LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH5LEVEL_DEFAULT   (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5)
#define PRS_SWLEVEL_CH6LEVEL   (0x1UL << 6)
#define _PRS_SWLEVEL_CH6LEVEL_SHIFT   6
#define _PRS_SWLEVEL_CH6LEVEL_MASK   0x40UL
#define _PRS_SWLEVEL_CH6LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH6LEVEL_DEFAULT   (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6)
#define PRS_SWLEVEL_CH7LEVEL   (0x1UL << 7)
#define _PRS_SWLEVEL_CH7LEVEL_SHIFT   7
#define _PRS_SWLEVEL_CH7LEVEL_MASK   0x80UL
#define _PRS_SWLEVEL_CH7LEVEL_DEFAULT   0x00000000UL
#define PRS_SWLEVEL_CH7LEVEL_DEFAULT   (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7)
#define _PRS_CH_CTRL_RESETVALUE   0x00000000UL
#define _PRS_CH_CTRL_MASK   0x033F0007UL
#define _PRS_CH_CTRL_SIGSEL_SHIFT   0
#define _PRS_CH_CTRL_SIGSEL_MASK   0x7UL
#define _PRS_CH_CTRL_SIGSEL_VCMPOUT   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_ACMP0OUT   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_ACMP1OUT   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_DAC0CH0   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_USART0IRTX   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_TIMER0UF   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_TIMER1UF   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_RTCOF   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN0   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN8   0x00000000UL
#define _PRS_CH_CTRL_SIGSEL_DAC0CH1   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_ADC0SCAN   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_USART0TXC   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_USART1TXC   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_TIMER0OF   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_TIMER1OF   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_RTCCOMP0   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN1   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN9   0x00000001UL
#define _PRS_CH_CTRL_SIGSEL_USART0RXDATAV   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC0   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC0   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_RTCCOMP1   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN2   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN10   0x00000002UL
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC1   0x00000003UL
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC1   0x00000003UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN3   0x00000003UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN11   0x00000003UL
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC2   0x00000004UL
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC2   0x00000004UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN4   0x00000004UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN12   0x00000004UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN5   0x00000005UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN13   0x00000005UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN6   0x00000006UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN14   0x00000006UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN7   0x00000007UL
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN15   0x00000007UL
#define PRS_CH_CTRL_SIGSEL_VCMPOUT   (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0)
#define PRS_CH_CTRL_SIGSEL_ACMP0OUT   (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0)
#define PRS_CH_CTRL_SIGSEL_ACMP1OUT   (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0)
#define PRS_CH_CTRL_SIGSEL_DAC0CH0   (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0)
#define PRS_CH_CTRL_SIGSEL_ADC0SINGLE   (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0)
#define PRS_CH_CTRL_SIGSEL_USART0IRTX   (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER0UF   (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER1UF   (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0)
#define PRS_CH_CTRL_SIGSEL_RTCOF   (_PRS_CH_CTRL_SIGSEL_RTCOF << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN0   (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN8   (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0)
#define PRS_CH_CTRL_SIGSEL_DAC0CH1   (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0)
#define PRS_CH_CTRL_SIGSEL_ADC0SCAN   (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0)
#define PRS_CH_CTRL_SIGSEL_USART0TXC   (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0)
#define PRS_CH_CTRL_SIGSEL_USART1TXC   (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER0OF   (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER1OF   (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0)
#define PRS_CH_CTRL_SIGSEL_RTCCOMP0   (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN1   (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN9   (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0)
#define PRS_CH_CTRL_SIGSEL_USART0RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0)
#define PRS_CH_CTRL_SIGSEL_USART1RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER0CC0   (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER1CC0   (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0)
#define PRS_CH_CTRL_SIGSEL_RTCCOMP1   (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN2   (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN10   (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER0CC1   (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER1CC1   (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN3   (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN11   (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER0CC2   (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0)
#define PRS_CH_CTRL_SIGSEL_TIMER1CC2   (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN4   (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN12   (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN5   (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN13   (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN6   (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN14   (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN7   (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0)
#define PRS_CH_CTRL_SIGSEL_GPIOPIN15   (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0)
#define _PRS_CH_CTRL_SOURCESEL_SHIFT   16
#define _PRS_CH_CTRL_SOURCESEL_MASK   0x3F0000UL
#define _PRS_CH_CTRL_SOURCESEL_NONE   0x00000000UL
#define _PRS_CH_CTRL_SOURCESEL_VCMP   0x00000001UL
#define _PRS_CH_CTRL_SOURCESEL_ACMP0   0x00000002UL
#define _PRS_CH_CTRL_SOURCESEL_ACMP1   0x00000003UL
#define _PRS_CH_CTRL_SOURCESEL_DAC0   0x00000006UL
#define _PRS_CH_CTRL_SOURCESEL_ADC0   0x00000008UL
#define _PRS_CH_CTRL_SOURCESEL_USART0   0x00000010UL
#define _PRS_CH_CTRL_SOURCESEL_USART1   0x00000011UL
#define _PRS_CH_CTRL_SOURCESEL_TIMER0   0x0000001CUL
#define _PRS_CH_CTRL_SOURCESEL_TIMER1   0x0000001DUL
#define _PRS_CH_CTRL_SOURCESEL_RTC   0x00000028UL
#define _PRS_CH_CTRL_SOURCESEL_GPIOL   0x00000030UL
#define _PRS_CH_CTRL_SOURCESEL_GPIOH   0x00000031UL
#define PRS_CH_CTRL_SOURCESEL_NONE   (_PRS_CH_CTRL_SOURCESEL_NONE << 16)
#define PRS_CH_CTRL_SOURCESEL_VCMP   (_PRS_CH_CTRL_SOURCESEL_VCMP << 16)
#define PRS_CH_CTRL_SOURCESEL_ACMP0   (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16)
#define PRS_CH_CTRL_SOURCESEL_ACMP1   (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16)
#define PRS_CH_CTRL_SOURCESEL_DAC0   (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16)
#define PRS_CH_CTRL_SOURCESEL_ADC0   (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16)
#define PRS_CH_CTRL_SOURCESEL_USART0   (_PRS_CH_CTRL_SOURCESEL_USART0 << 16)
#define PRS_CH_CTRL_SOURCESEL_USART1   (_PRS_CH_CTRL_SOURCESEL_USART1 << 16)
#define PRS_CH_CTRL_SOURCESEL_TIMER0   (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16)
#define PRS_CH_CTRL_SOURCESEL_TIMER1   (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16)
#define PRS_CH_CTRL_SOURCESEL_RTC   (_PRS_CH_CTRL_SOURCESEL_RTC << 16)
#define PRS_CH_CTRL_SOURCESEL_GPIOL   (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16)
#define PRS_CH_CTRL_SOURCESEL_GPIOH   (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16)
#define _PRS_CH_CTRL_EDSEL_SHIFT   24
#define _PRS_CH_CTRL_EDSEL_MASK   0x3000000UL
#define _PRS_CH_CTRL_EDSEL_DEFAULT   0x00000000UL
#define _PRS_CH_CTRL_EDSEL_OFF   0x00000000UL
#define _PRS_CH_CTRL_EDSEL_POSEDGE   0x00000001UL
#define _PRS_CH_CTRL_EDSEL_NEGEDGE   0x00000002UL
#define _PRS_CH_CTRL_EDSEL_BOTHEDGES   0x00000003UL
#define PRS_CH_CTRL_EDSEL_DEFAULT   (_PRS_CH_CTRL_EDSEL_DEFAULT << 24)
#define PRS_CH_CTRL_EDSEL_OFF   (_PRS_CH_CTRL_EDSEL_OFF << 24)
#define PRS_CH_CTRL_EDSEL_POSEDGE   (_PRS_CH_CTRL_EDSEL_POSEDGE << 24)
#define PRS_CH_CTRL_EDSEL_NEGEDGE   (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24)
#define PRS_CH_CTRL_EDSEL_BOTHEDGES   (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24)

Define Documentation

#define _PRS_CH_CTRL_EDSEL_BOTHEDGES   0x00000003UL

Mode BOTHEDGES for PRS_CH_CTRL

Definition at line 2524 of file efm32g200f64.h.

#define _PRS_CH_CTRL_EDSEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_CH_CTRL

Definition at line 2520 of file efm32g200f64.h.

#define _PRS_CH_CTRL_EDSEL_MASK   0x3000000UL

Bit mask for PRS_EDSEL

Definition at line 2519 of file efm32g200f64.h.

#define _PRS_CH_CTRL_EDSEL_NEGEDGE   0x00000002UL

Mode NEGEDGE for PRS_CH_CTRL

Definition at line 2523 of file efm32g200f64.h.

#define _PRS_CH_CTRL_EDSEL_OFF   0x00000000UL

Mode OFF for PRS_CH_CTRL

Definition at line 2521 of file efm32g200f64.h.

#define _PRS_CH_CTRL_EDSEL_POSEDGE   0x00000001UL

Mode POSEDGE for PRS_CH_CTRL

Definition at line 2522 of file efm32g200f64.h.

#define _PRS_CH_CTRL_EDSEL_SHIFT   24

Shift value for PRS_EDSEL

Definition at line 2518 of file efm32g200f64.h.

#define _PRS_CH_CTRL_MASK   0x033F0007UL

Mask for PRS_CH_CTRL

Definition at line 2405 of file efm32g200f64.h.

#define _PRS_CH_CTRL_RESETVALUE   0x00000000UL

Default value for PRS_CH_CTRL

Definition at line 2404 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_ACMP0OUT   0x00000000UL

Mode ACMP0OUT for PRS_CH_CTRL

Definition at line 2409 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_ACMP1OUT   0x00000000UL

Mode ACMP1OUT for PRS_CH_CTRL

Definition at line 2410 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_ADC0SCAN   0x00000001UL

Mode ADC0SCAN for PRS_CH_CTRL

Definition at line 2420 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE   0x00000000UL

Mode ADC0SINGLE for PRS_CH_CTRL

Definition at line 2412 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_DAC0CH0   0x00000000UL

Mode DAC0CH0 for PRS_CH_CTRL

Definition at line 2411 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_DAC0CH1   0x00000001UL

Mode DAC0CH1 for PRS_CH_CTRL

Definition at line 2419 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN0   0x00000000UL

Mode GPIOPIN0 for PRS_CH_CTRL

Definition at line 2417 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN1   0x00000001UL

Mode GPIOPIN1 for PRS_CH_CTRL

Definition at line 2426 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN10   0x00000002UL

Mode GPIOPIN10 for PRS_CH_CTRL

Definition at line 2434 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN11   0x00000003UL

Mode GPIOPIN11 for PRS_CH_CTRL

Definition at line 2438 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN12   0x00000004UL

Mode GPIOPIN12 for PRS_CH_CTRL

Definition at line 2442 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN13   0x00000005UL

Mode GPIOPIN13 for PRS_CH_CTRL

Definition at line 2444 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN14   0x00000006UL

Mode GPIOPIN14 for PRS_CH_CTRL

Definition at line 2446 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN15   0x00000007UL

Mode GPIOPIN15 for PRS_CH_CTRL

Definition at line 2448 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN2   0x00000002UL

Mode GPIOPIN2 for PRS_CH_CTRL

Definition at line 2433 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN3   0x00000003UL

Mode GPIOPIN3 for PRS_CH_CTRL

Definition at line 2437 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN4   0x00000004UL

Mode GPIOPIN4 for PRS_CH_CTRL

Definition at line 2441 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN5   0x00000005UL

Mode GPIOPIN5 for PRS_CH_CTRL

Definition at line 2443 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN6   0x00000006UL

Mode GPIOPIN6 for PRS_CH_CTRL

Definition at line 2445 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN7   0x00000007UL

Mode GPIOPIN7 for PRS_CH_CTRL

Definition at line 2447 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN8   0x00000000UL

Mode GPIOPIN8 for PRS_CH_CTRL

Definition at line 2418 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN9   0x00000001UL

Mode GPIOPIN9 for PRS_CH_CTRL

Definition at line 2427 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_MASK   0x7UL

Bit mask for PRS_SIGSEL

Definition at line 2407 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_RTCCOMP0   0x00000001UL

Mode RTCCOMP0 for PRS_CH_CTRL

Definition at line 2425 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_RTCCOMP1   0x00000002UL

Mode RTCCOMP1 for PRS_CH_CTRL

Definition at line 2432 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_RTCOF   0x00000000UL

Mode RTCOF for PRS_CH_CTRL

Definition at line 2416 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_SHIFT   0

Shift value for PRS_SIGSEL

Definition at line 2406 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0CC0   0x00000002UL

Mode TIMER0CC0 for PRS_CH_CTRL

Definition at line 2430 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0CC1   0x00000003UL

Mode TIMER0CC1 for PRS_CH_CTRL

Definition at line 2435 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0CC2   0x00000004UL

Mode TIMER0CC2 for PRS_CH_CTRL

Definition at line 2439 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0OF   0x00000001UL

Mode TIMER0OF for PRS_CH_CTRL

Definition at line 2423 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0UF   0x00000000UL

Mode TIMER0UF for PRS_CH_CTRL

Definition at line 2414 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1CC0   0x00000002UL

Mode TIMER1CC0 for PRS_CH_CTRL

Definition at line 2431 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1CC1   0x00000003UL

Mode TIMER1CC1 for PRS_CH_CTRL

Definition at line 2436 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1CC2   0x00000004UL

Mode TIMER1CC2 for PRS_CH_CTRL

Definition at line 2440 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1OF   0x00000001UL

Mode TIMER1OF for PRS_CH_CTRL

Definition at line 2424 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1UF   0x00000000UL

Mode TIMER1UF for PRS_CH_CTRL

Definition at line 2415 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_USART0IRTX   0x00000000UL

Mode USART0IRTX for PRS_CH_CTRL

Definition at line 2413 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_USART0RXDATAV   0x00000002UL

Mode USART0RXDATAV for PRS_CH_CTRL

Definition at line 2428 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_USART0TXC   0x00000001UL

Mode USART0TXC for PRS_CH_CTRL

Definition at line 2421 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV   0x00000002UL

Mode USART1RXDATAV for PRS_CH_CTRL

Definition at line 2429 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_USART1TXC   0x00000001UL

Mode USART1TXC for PRS_CH_CTRL

Definition at line 2422 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SIGSEL_VCMPOUT   0x00000000UL

Mode VCMPOUT for PRS_CH_CTRL

Definition at line 2408 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_ACMP0   0x00000002UL

Mode ACMP0 for PRS_CH_CTRL

Definition at line 2494 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_ACMP1   0x00000003UL

Mode ACMP1 for PRS_CH_CTRL

Definition at line 2495 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_ADC0   0x00000008UL

Mode ADC0 for PRS_CH_CTRL

Definition at line 2497 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_DAC0   0x00000006UL

Mode DAC0 for PRS_CH_CTRL

Definition at line 2496 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_GPIOH   0x00000031UL

Mode GPIOH for PRS_CH_CTRL

Definition at line 2504 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_GPIOL   0x00000030UL

Mode GPIOL for PRS_CH_CTRL

Definition at line 2503 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_MASK   0x3F0000UL

Bit mask for PRS_SOURCESEL

Definition at line 2491 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_NONE   0x00000000UL

Mode NONE for PRS_CH_CTRL

Definition at line 2492 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_RTC   0x00000028UL

Mode RTC for PRS_CH_CTRL

Definition at line 2502 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_SHIFT   16

Shift value for PRS_SOURCESEL

Definition at line 2490 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_TIMER0   0x0000001CUL

Mode TIMER0 for PRS_CH_CTRL

Definition at line 2500 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_TIMER1   0x0000001DUL

Mode TIMER1 for PRS_CH_CTRL

Definition at line 2501 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_USART0   0x00000010UL

Mode USART0 for PRS_CH_CTRL

Definition at line 2498 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_USART1   0x00000011UL

Mode USART1 for PRS_CH_CTRL

Definition at line 2499 of file efm32g200f64.h.

#define _PRS_CH_CTRL_SOURCESEL_VCMP   0x00000001UL

Mode VCMP for PRS_CH_CTRL

Definition at line 2493 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH0LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 2365 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH0LEVEL_MASK   0x1UL

Bit mask for PRS_CH0LEVEL

Definition at line 2364 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH0LEVEL_SHIFT   0

Shift value for PRS_CH0LEVEL

Definition at line 2363 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH1LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 2370 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH1LEVEL_MASK   0x2UL

Bit mask for PRS_CH1LEVEL

Definition at line 2369 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH1LEVEL_SHIFT   1

Shift value for PRS_CH1LEVEL

Definition at line 2368 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH2LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 2375 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH2LEVEL_MASK   0x4UL

Bit mask for PRS_CH2LEVEL

Definition at line 2374 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH2LEVEL_SHIFT   2

Shift value for PRS_CH2LEVEL

Definition at line 2373 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH3LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 2380 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH3LEVEL_MASK   0x8UL

Bit mask for PRS_CH3LEVEL

Definition at line 2379 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH3LEVEL_SHIFT   3

Shift value for PRS_CH3LEVEL

Definition at line 2378 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH4LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 2385 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH4LEVEL_MASK   0x10UL

Bit mask for PRS_CH4LEVEL

Definition at line 2384 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH4LEVEL_SHIFT   4

Shift value for PRS_CH4LEVEL

Definition at line 2383 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH5LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 2390 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH5LEVEL_MASK   0x20UL

Bit mask for PRS_CH5LEVEL

Definition at line 2389 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH5LEVEL_SHIFT   5

Shift value for PRS_CH5LEVEL

Definition at line 2388 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH6LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 2395 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH6LEVEL_MASK   0x40UL

Bit mask for PRS_CH6LEVEL

Definition at line 2394 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH6LEVEL_SHIFT   6

Shift value for PRS_CH6LEVEL

Definition at line 2393 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH7LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 2400 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH7LEVEL_MASK   0x80UL

Bit mask for PRS_CH7LEVEL

Definition at line 2399 of file efm32g200f64.h.

#define _PRS_SWLEVEL_CH7LEVEL_SHIFT   7

Shift value for PRS_CH7LEVEL

Definition at line 2398 of file efm32g200f64.h.

#define _PRS_SWLEVEL_MASK   0x000000FFUL

Mask for PRS_SWLEVEL

Definition at line 2361 of file efm32g200f64.h.

#define _PRS_SWLEVEL_RESETVALUE   0x00000000UL

Default value for PRS_SWLEVEL

Definition at line 2360 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH0PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 2321 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH0PULSE_MASK   0x1UL

Bit mask for PRS_CH0PULSE

Definition at line 2320 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH0PULSE_SHIFT   0

Shift value for PRS_CH0PULSE

Definition at line 2319 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH1PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 2326 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH1PULSE_MASK   0x2UL

Bit mask for PRS_CH1PULSE

Definition at line 2325 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH1PULSE_SHIFT   1

Shift value for PRS_CH1PULSE

Definition at line 2324 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH2PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 2331 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH2PULSE_MASK   0x4UL

Bit mask for PRS_CH2PULSE

Definition at line 2330 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH2PULSE_SHIFT   2

Shift value for PRS_CH2PULSE

Definition at line 2329 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH3PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 2336 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH3PULSE_MASK   0x8UL

Bit mask for PRS_CH3PULSE

Definition at line 2335 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH3PULSE_SHIFT   3

Shift value for PRS_CH3PULSE

Definition at line 2334 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH4PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 2341 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH4PULSE_MASK   0x10UL

Bit mask for PRS_CH4PULSE

Definition at line 2340 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH4PULSE_SHIFT   4

Shift value for PRS_CH4PULSE

Definition at line 2339 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH5PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 2346 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH5PULSE_MASK   0x20UL

Bit mask for PRS_CH5PULSE

Definition at line 2345 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH5PULSE_SHIFT   5

Shift value for PRS_CH5PULSE

Definition at line 2344 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH6PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 2351 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH6PULSE_MASK   0x40UL

Bit mask for PRS_CH6PULSE

Definition at line 2350 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH6PULSE_SHIFT   6

Shift value for PRS_CH6PULSE

Definition at line 2349 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH7PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 2356 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH7PULSE_MASK   0x80UL

Bit mask for PRS_CH7PULSE

Definition at line 2355 of file efm32g200f64.h.

#define _PRS_SWPULSE_CH7PULSE_SHIFT   7

Shift value for PRS_CH7PULSE

Definition at line 2354 of file efm32g200f64.h.

#define _PRS_SWPULSE_MASK   0x000000FFUL

Mask for PRS_SWPULSE

Definition at line 2317 of file efm32g200f64.h.

#define _PRS_SWPULSE_RESETVALUE   0x00000000UL

Default value for PRS_SWPULSE

Definition at line 2316 of file efm32g200f64.h.

#define PRS_CH_CTRL_EDSEL_BOTHEDGES   (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24)

Shifted mode BOTHEDGES for PRS_CH_CTRL

Definition at line 2529 of file efm32g200f64.h.

#define PRS_CH_CTRL_EDSEL_DEFAULT   (_PRS_CH_CTRL_EDSEL_DEFAULT << 24)

Shifted mode DEFAULT for PRS_CH_CTRL

Definition at line 2525 of file efm32g200f64.h.

#define PRS_CH_CTRL_EDSEL_NEGEDGE   (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24)

Shifted mode NEGEDGE for PRS_CH_CTRL

Definition at line 2528 of file efm32g200f64.h.

#define PRS_CH_CTRL_EDSEL_OFF   (_PRS_CH_CTRL_EDSEL_OFF << 24)

Shifted mode OFF for PRS_CH_CTRL

Definition at line 2526 of file efm32g200f64.h.

#define PRS_CH_CTRL_EDSEL_POSEDGE   (_PRS_CH_CTRL_EDSEL_POSEDGE << 24)

Shifted mode POSEDGE for PRS_CH_CTRL

Definition at line 2527 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_ACMP0OUT   (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0)

Shifted mode ACMP0OUT for PRS_CH_CTRL

Definition at line 2450 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_ACMP1OUT   (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0)

Shifted mode ACMP1OUT for PRS_CH_CTRL

Definition at line 2451 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_ADC0SCAN   (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0)

Shifted mode ADC0SCAN for PRS_CH_CTRL

Definition at line 2461 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_ADC0SINGLE   (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0)

Shifted mode ADC0SINGLE for PRS_CH_CTRL

Definition at line 2453 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_DAC0CH0   (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0)

Shifted mode DAC0CH0 for PRS_CH_CTRL

Definition at line 2452 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_DAC0CH1   (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0)

Shifted mode DAC0CH1 for PRS_CH_CTRL

Definition at line 2460 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN0   (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0)

Shifted mode GPIOPIN0 for PRS_CH_CTRL

Definition at line 2458 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN1   (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0)

Shifted mode GPIOPIN1 for PRS_CH_CTRL

Definition at line 2467 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN10   (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0)

Shifted mode GPIOPIN10 for PRS_CH_CTRL

Definition at line 2475 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN11   (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0)

Shifted mode GPIOPIN11 for PRS_CH_CTRL

Definition at line 2479 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN12   (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0)

Shifted mode GPIOPIN12 for PRS_CH_CTRL

Definition at line 2483 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN13   (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0)

Shifted mode GPIOPIN13 for PRS_CH_CTRL

Definition at line 2485 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN14   (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0)

Shifted mode GPIOPIN14 for PRS_CH_CTRL

Definition at line 2487 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN15   (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0)

Shifted mode GPIOPIN15 for PRS_CH_CTRL

Definition at line 2489 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN2   (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0)

Shifted mode GPIOPIN2 for PRS_CH_CTRL

Definition at line 2474 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN3   (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0)

Shifted mode GPIOPIN3 for PRS_CH_CTRL

Definition at line 2478 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN4   (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0)

Shifted mode GPIOPIN4 for PRS_CH_CTRL

Definition at line 2482 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN5   (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0)

Shifted mode GPIOPIN5 for PRS_CH_CTRL

Definition at line 2484 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN6   (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0)

Shifted mode GPIOPIN6 for PRS_CH_CTRL

Definition at line 2486 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN7   (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0)

Shifted mode GPIOPIN7 for PRS_CH_CTRL

Definition at line 2488 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN8   (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0)

Shifted mode GPIOPIN8 for PRS_CH_CTRL

Definition at line 2459 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN9   (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0)

Shifted mode GPIOPIN9 for PRS_CH_CTRL

Definition at line 2468 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_RTCCOMP0   (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0)

Shifted mode RTCCOMP0 for PRS_CH_CTRL

Definition at line 2466 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_RTCCOMP1   (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0)

Shifted mode RTCCOMP1 for PRS_CH_CTRL

Definition at line 2473 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_RTCOF   (_PRS_CH_CTRL_SIGSEL_RTCOF << 0)

Shifted mode RTCOF for PRS_CH_CTRL

Definition at line 2457 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0CC0   (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0)

Shifted mode TIMER0CC0 for PRS_CH_CTRL

Definition at line 2471 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0CC1   (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0)

Shifted mode TIMER0CC1 for PRS_CH_CTRL

Definition at line 2476 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0CC2   (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0)

Shifted mode TIMER0CC2 for PRS_CH_CTRL

Definition at line 2480 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0OF   (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0)

Shifted mode TIMER0OF for PRS_CH_CTRL

Definition at line 2464 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0UF   (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0)

Shifted mode TIMER0UF for PRS_CH_CTRL

Definition at line 2455 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1CC0   (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0)

Shifted mode TIMER1CC0 for PRS_CH_CTRL

Definition at line 2472 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1CC1   (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0)

Shifted mode TIMER1CC1 for PRS_CH_CTRL

Definition at line 2477 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1CC2   (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0)

Shifted mode TIMER1CC2 for PRS_CH_CTRL

Definition at line 2481 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1OF   (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0)

Shifted mode TIMER1OF for PRS_CH_CTRL

Definition at line 2465 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1UF   (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0)

Shifted mode TIMER1UF for PRS_CH_CTRL

Definition at line 2456 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_USART0IRTX   (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0)

Shifted mode USART0IRTX for PRS_CH_CTRL

Definition at line 2454 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_USART0RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0)

Shifted mode USART0RXDATAV for PRS_CH_CTRL

Definition at line 2469 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_USART0TXC   (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0)

Shifted mode USART0TXC for PRS_CH_CTRL

Definition at line 2462 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_USART1RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0)

Shifted mode USART1RXDATAV for PRS_CH_CTRL

Definition at line 2470 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_USART1TXC   (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0)

Shifted mode USART1TXC for PRS_CH_CTRL

Definition at line 2463 of file efm32g200f64.h.

#define PRS_CH_CTRL_SIGSEL_VCMPOUT   (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0)

Shifted mode VCMPOUT for PRS_CH_CTRL

Definition at line 2449 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_ACMP0   (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16)

Shifted mode ACMP0 for PRS_CH_CTRL

Definition at line 2507 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_ACMP1   (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16)

Shifted mode ACMP1 for PRS_CH_CTRL

Definition at line 2508 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_ADC0   (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16)

Shifted mode ADC0 for PRS_CH_CTRL

Definition at line 2510 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_DAC0   (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16)

Shifted mode DAC0 for PRS_CH_CTRL

Definition at line 2509 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_GPIOH   (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16)

Shifted mode GPIOH for PRS_CH_CTRL

Definition at line 2517 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_GPIOL   (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16)

Shifted mode GPIOL for PRS_CH_CTRL

Definition at line 2516 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_NONE   (_PRS_CH_CTRL_SOURCESEL_NONE << 16)

Shifted mode NONE for PRS_CH_CTRL

Definition at line 2505 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_RTC   (_PRS_CH_CTRL_SOURCESEL_RTC << 16)

Shifted mode RTC for PRS_CH_CTRL

Definition at line 2515 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_TIMER0   (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16)

Shifted mode TIMER0 for PRS_CH_CTRL

Definition at line 2513 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_TIMER1   (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16)

Shifted mode TIMER1 for PRS_CH_CTRL

Definition at line 2514 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_USART0   (_PRS_CH_CTRL_SOURCESEL_USART0 << 16)

Shifted mode USART0 for PRS_CH_CTRL

Definition at line 2511 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_USART1   (_PRS_CH_CTRL_SOURCESEL_USART1 << 16)

Shifted mode USART1 for PRS_CH_CTRL

Definition at line 2512 of file efm32g200f64.h.

#define PRS_CH_CTRL_SOURCESEL_VCMP   (_PRS_CH_CTRL_SOURCESEL_VCMP << 16)

Shifted mode VCMP for PRS_CH_CTRL

Definition at line 2506 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH0LEVEL   (0x1UL << 0)

Channel 0 Software Level

Definition at line 2362 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH0LEVEL_DEFAULT   (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 2366 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH1LEVEL   (0x1UL << 1)

Channel 1 Software Level

Definition at line 2367 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH1LEVEL_DEFAULT   (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 2371 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH2LEVEL   (0x1UL << 2)

Channel 2 Software Level

Definition at line 2372 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH2LEVEL_DEFAULT   (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 2376 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH3LEVEL   (0x1UL << 3)

Channel 3 Software Level

Definition at line 2377 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH3LEVEL_DEFAULT   (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 2381 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH4LEVEL   (0x1UL << 4)

Channel 4 Software Level

Definition at line 2382 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH4LEVEL_DEFAULT   (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 2386 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH5LEVEL   (0x1UL << 5)

Channel 5 Software Level

Definition at line 2387 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH5LEVEL_DEFAULT   (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 2391 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH6LEVEL   (0x1UL << 6)

Channel 6 Software Level

Definition at line 2392 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH6LEVEL_DEFAULT   (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 2396 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH7LEVEL   (0x1UL << 7)

Channel 7 Software Level

Definition at line 2397 of file efm32g200f64.h.

#define PRS_SWLEVEL_CH7LEVEL_DEFAULT   (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 2401 of file efm32g200f64.h.

#define PRS_SWPULSE_CH0PULSE   (0x1UL << 0)

Channel 0 Pulse Generation

Definition at line 2318 of file efm32g200f64.h.

#define PRS_SWPULSE_CH0PULSE_DEFAULT   (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 2322 of file efm32g200f64.h.

#define PRS_SWPULSE_CH1PULSE   (0x1UL << 1)

Channel 1 Pulse Generation

Definition at line 2323 of file efm32g200f64.h.

#define PRS_SWPULSE_CH1PULSE_DEFAULT   (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 2327 of file efm32g200f64.h.

#define PRS_SWPULSE_CH2PULSE   (0x1UL << 2)

Channel 2 Pulse Generation

Definition at line 2328 of file efm32g200f64.h.

#define PRS_SWPULSE_CH2PULSE_DEFAULT   (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 2332 of file efm32g200f64.h.

#define PRS_SWPULSE_CH3PULSE   (0x1UL << 3)

Channel 3 Pulse Generation

Definition at line 2333 of file efm32g200f64.h.

#define PRS_SWPULSE_CH3PULSE_DEFAULT   (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 2337 of file efm32g200f64.h.

#define PRS_SWPULSE_CH4PULSE   (0x1UL << 4)

Channel 4 Pulse Generation

Definition at line 2338 of file efm32g200f64.h.

#define PRS_SWPULSE_CH4PULSE_DEFAULT   (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 2342 of file efm32g200f64.h.

#define PRS_SWPULSE_CH5PULSE   (0x1UL << 5)

Channel 5 Pulse Generation

Definition at line 2343 of file efm32g200f64.h.

#define PRS_SWPULSE_CH5PULSE_DEFAULT   (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 2347 of file efm32g200f64.h.

#define PRS_SWPULSE_CH6PULSE   (0x1UL << 6)

Channel 6 Pulse Generation

Definition at line 2348 of file efm32g200f64.h.

#define PRS_SWPULSE_CH6PULSE_DEFAULT   (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 2352 of file efm32g200f64.h.

#define PRS_SWPULSE_CH7PULSE   (0x1UL << 7)

Channel 7 Pulse Generation

Definition at line 2353 of file efm32g200f64.h.

#define PRS_SWPULSE_CH7PULSE_DEFAULT   (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 2357 of file efm32g200f64.h.