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00033
00038
00039 #define _UART_CTRL_RESETVALUE 0x00000000UL
00040 #define _UART_CTRL_MASK 0x1DFFFF7FUL
00041 #define UART_CTRL_SYNC (0x1UL << 0)
00042 #define _UART_CTRL_SYNC_SHIFT 0
00043 #define _UART_CTRL_SYNC_MASK 0x1UL
00044 #define _UART_CTRL_SYNC_DEFAULT 0x00000000UL
00045 #define UART_CTRL_SYNC_DEFAULT (_UART_CTRL_SYNC_DEFAULT << 0)
00046 #define UART_CTRL_LOOPBK (0x1UL << 1)
00047 #define _UART_CTRL_LOOPBK_SHIFT 1
00048 #define _UART_CTRL_LOOPBK_MASK 0x2UL
00049 #define _UART_CTRL_LOOPBK_DEFAULT 0x00000000UL
00050 #define UART_CTRL_LOOPBK_DEFAULT (_UART_CTRL_LOOPBK_DEFAULT << 1)
00051 #define UART_CTRL_CCEN (0x1UL << 2)
00052 #define _UART_CTRL_CCEN_SHIFT 2
00053 #define _UART_CTRL_CCEN_MASK 0x4UL
00054 #define _UART_CTRL_CCEN_DEFAULT 0x00000000UL
00055 #define UART_CTRL_CCEN_DEFAULT (_UART_CTRL_CCEN_DEFAULT << 2)
00056 #define UART_CTRL_MPM (0x1UL << 3)
00057 #define _UART_CTRL_MPM_SHIFT 3
00058 #define _UART_CTRL_MPM_MASK 0x8UL
00059 #define _UART_CTRL_MPM_DEFAULT 0x00000000UL
00060 #define UART_CTRL_MPM_DEFAULT (_UART_CTRL_MPM_DEFAULT << 3)
00061 #define UART_CTRL_MPAB (0x1UL << 4)
00062 #define _UART_CTRL_MPAB_SHIFT 4
00063 #define _UART_CTRL_MPAB_MASK 0x10UL
00064 #define _UART_CTRL_MPAB_DEFAULT 0x00000000UL
00065 #define UART_CTRL_MPAB_DEFAULT (_UART_CTRL_MPAB_DEFAULT << 4)
00066 #define _UART_CTRL_OVS_SHIFT 5
00067 #define _UART_CTRL_OVS_MASK 0x60UL
00068 #define _UART_CTRL_OVS_DEFAULT 0x00000000UL
00069 #define _UART_CTRL_OVS_X16 0x00000000UL
00070 #define _UART_CTRL_OVS_X8 0x00000001UL
00071 #define _UART_CTRL_OVS_X6 0x00000002UL
00072 #define _UART_CTRL_OVS_X4 0x00000003UL
00073 #define UART_CTRL_OVS_DEFAULT (_UART_CTRL_OVS_DEFAULT << 5)
00074 #define UART_CTRL_OVS_X16 (_UART_CTRL_OVS_X16 << 5)
00075 #define UART_CTRL_OVS_X8 (_UART_CTRL_OVS_X8 << 5)
00076 #define UART_CTRL_OVS_X6 (_UART_CTRL_OVS_X6 << 5)
00077 #define UART_CTRL_OVS_X4 (_UART_CTRL_OVS_X4 << 5)
00078 #define UART_CTRL_CLKPOL (0x1UL << 8)
00079 #define _UART_CTRL_CLKPOL_SHIFT 8
00080 #define _UART_CTRL_CLKPOL_MASK 0x100UL
00081 #define _UART_CTRL_CLKPOL_DEFAULT 0x00000000UL
00082 #define _UART_CTRL_CLKPOL_IDLELOW 0x00000000UL
00083 #define _UART_CTRL_CLKPOL_IDLEHIGH 0x00000001UL
00084 #define UART_CTRL_CLKPOL_DEFAULT (_UART_CTRL_CLKPOL_DEFAULT << 8)
00085 #define UART_CTRL_CLKPOL_IDLELOW (_UART_CTRL_CLKPOL_IDLELOW << 8)
00086 #define UART_CTRL_CLKPOL_IDLEHIGH (_UART_CTRL_CLKPOL_IDLEHIGH << 8)
00087 #define UART_CTRL_CLKPHA (0x1UL << 9)
00088 #define _UART_CTRL_CLKPHA_SHIFT 9
00089 #define _UART_CTRL_CLKPHA_MASK 0x200UL
00090 #define _UART_CTRL_CLKPHA_DEFAULT 0x00000000UL
00091 #define _UART_CTRL_CLKPHA_SAMPLELEADING 0x00000000UL
00092 #define _UART_CTRL_CLKPHA_SAMPLETRAILING 0x00000001UL
00093 #define UART_CTRL_CLKPHA_DEFAULT (_UART_CTRL_CLKPHA_DEFAULT << 9)
00094 #define UART_CTRL_CLKPHA_SAMPLELEADING (_UART_CTRL_CLKPHA_SAMPLELEADING << 9)
00095 #define UART_CTRL_CLKPHA_SAMPLETRAILING (_UART_CTRL_CLKPHA_SAMPLETRAILING << 9)
00096 #define UART_CTRL_MSBF (0x1UL << 10)
00097 #define _UART_CTRL_MSBF_SHIFT 10
00098 #define _UART_CTRL_MSBF_MASK 0x400UL
00099 #define _UART_CTRL_MSBF_DEFAULT 0x00000000UL
00100 #define UART_CTRL_MSBF_DEFAULT (_UART_CTRL_MSBF_DEFAULT << 10)
00101 #define UART_CTRL_CSMA (0x1UL << 11)
00102 #define _UART_CTRL_CSMA_SHIFT 11
00103 #define _UART_CTRL_CSMA_MASK 0x800UL
00104 #define _UART_CTRL_CSMA_DEFAULT 0x00000000UL
00105 #define _UART_CTRL_CSMA_NOACTION 0x00000000UL
00106 #define _UART_CTRL_CSMA_GOTOSLAVEMODE 0x00000001UL
00107 #define UART_CTRL_CSMA_DEFAULT (_UART_CTRL_CSMA_DEFAULT << 11)
00108 #define UART_CTRL_CSMA_NOACTION (_UART_CTRL_CSMA_NOACTION << 11)
00109 #define UART_CTRL_CSMA_GOTOSLAVEMODE (_UART_CTRL_CSMA_GOTOSLAVEMODE << 11)
00110 #define UART_CTRL_TXBIL (0x1UL << 12)
00111 #define _UART_CTRL_TXBIL_SHIFT 12
00112 #define _UART_CTRL_TXBIL_MASK 0x1000UL
00113 #define _UART_CTRL_TXBIL_DEFAULT 0x00000000UL
00114 #define _UART_CTRL_TXBIL_EMPTY 0x00000000UL
00115 #define _UART_CTRL_TXBIL_HALFFULL 0x00000001UL
00116 #define UART_CTRL_TXBIL_DEFAULT (_UART_CTRL_TXBIL_DEFAULT << 12)
00117 #define UART_CTRL_TXBIL_EMPTY (_UART_CTRL_TXBIL_EMPTY << 12)
00118 #define UART_CTRL_TXBIL_HALFFULL (_UART_CTRL_TXBIL_HALFFULL << 12)
00119 #define UART_CTRL_RXINV (0x1UL << 13)
00120 #define _UART_CTRL_RXINV_SHIFT 13
00121 #define _UART_CTRL_RXINV_MASK 0x2000UL
00122 #define _UART_CTRL_RXINV_DEFAULT 0x00000000UL
00123 #define UART_CTRL_RXINV_DEFAULT (_UART_CTRL_RXINV_DEFAULT << 13)
00124 #define UART_CTRL_TXINV (0x1UL << 14)
00125 #define _UART_CTRL_TXINV_SHIFT 14
00126 #define _UART_CTRL_TXINV_MASK 0x4000UL
00127 #define _UART_CTRL_TXINV_DEFAULT 0x00000000UL
00128 #define UART_CTRL_TXINV_DEFAULT (_UART_CTRL_TXINV_DEFAULT << 14)
00129 #define UART_CTRL_CSINV (0x1UL << 15)
00130 #define _UART_CTRL_CSINV_SHIFT 15
00131 #define _UART_CTRL_CSINV_MASK 0x8000UL
00132 #define _UART_CTRL_CSINV_DEFAULT 0x00000000UL
00133 #define UART_CTRL_CSINV_DEFAULT (_UART_CTRL_CSINV_DEFAULT << 15)
00134 #define UART_CTRL_AUTOCS (0x1UL << 16)
00135 #define _UART_CTRL_AUTOCS_SHIFT 16
00136 #define _UART_CTRL_AUTOCS_MASK 0x10000UL
00137 #define _UART_CTRL_AUTOCS_DEFAULT 0x00000000UL
00138 #define UART_CTRL_AUTOCS_DEFAULT (_UART_CTRL_AUTOCS_DEFAULT << 16)
00139 #define UART_CTRL_AUTOTRI (0x1UL << 17)
00140 #define _UART_CTRL_AUTOTRI_SHIFT 17
00141 #define _UART_CTRL_AUTOTRI_MASK 0x20000UL
00142 #define _UART_CTRL_AUTOTRI_DEFAULT 0x00000000UL
00143 #define UART_CTRL_AUTOTRI_DEFAULT (_UART_CTRL_AUTOTRI_DEFAULT << 17)
00144 #define UART_CTRL_SCMODE (0x1UL << 18)
00145 #define _UART_CTRL_SCMODE_SHIFT 18
00146 #define _UART_CTRL_SCMODE_MASK 0x40000UL
00147 #define _UART_CTRL_SCMODE_DEFAULT 0x00000000UL
00148 #define UART_CTRL_SCMODE_DEFAULT (_UART_CTRL_SCMODE_DEFAULT << 18)
00149 #define UART_CTRL_SCRETRANS (0x1UL << 19)
00150 #define _UART_CTRL_SCRETRANS_SHIFT 19
00151 #define _UART_CTRL_SCRETRANS_MASK 0x80000UL
00152 #define _UART_CTRL_SCRETRANS_DEFAULT 0x00000000UL
00153 #define UART_CTRL_SCRETRANS_DEFAULT (_UART_CTRL_SCRETRANS_DEFAULT << 19)
00154 #define UART_CTRL_SKIPPERRF (0x1UL << 20)
00155 #define _UART_CTRL_SKIPPERRF_SHIFT 20
00156 #define _UART_CTRL_SKIPPERRF_MASK 0x100000UL
00157 #define _UART_CTRL_SKIPPERRF_DEFAULT 0x00000000UL
00158 #define UART_CTRL_SKIPPERRF_DEFAULT (_UART_CTRL_SKIPPERRF_DEFAULT << 20)
00159 #define UART_CTRL_BIT8DV (0x1UL << 21)
00160 #define _UART_CTRL_BIT8DV_SHIFT 21
00161 #define _UART_CTRL_BIT8DV_MASK 0x200000UL
00162 #define _UART_CTRL_BIT8DV_DEFAULT 0x00000000UL
00163 #define UART_CTRL_BIT8DV_DEFAULT (_UART_CTRL_BIT8DV_DEFAULT << 21)
00164 #define UART_CTRL_ERRSDMA (0x1UL << 22)
00165 #define _UART_CTRL_ERRSDMA_SHIFT 22
00166 #define _UART_CTRL_ERRSDMA_MASK 0x400000UL
00167 #define _UART_CTRL_ERRSDMA_DEFAULT 0x00000000UL
00168 #define UART_CTRL_ERRSDMA_DEFAULT (_UART_CTRL_ERRSDMA_DEFAULT << 22)
00169 #define UART_CTRL_ERRSRX (0x1UL << 23)
00170 #define _UART_CTRL_ERRSRX_SHIFT 23
00171 #define _UART_CTRL_ERRSRX_MASK 0x800000UL
00172 #define _UART_CTRL_ERRSRX_DEFAULT 0x00000000UL
00173 #define UART_CTRL_ERRSRX_DEFAULT (_UART_CTRL_ERRSRX_DEFAULT << 23)
00174 #define UART_CTRL_ERRSTX (0x1UL << 24)
00175 #define _UART_CTRL_ERRSTX_SHIFT 24
00176 #define _UART_CTRL_ERRSTX_MASK 0x1000000UL
00177 #define _UART_CTRL_ERRSTX_DEFAULT 0x00000000UL
00178 #define UART_CTRL_ERRSTX_DEFAULT (_UART_CTRL_ERRSTX_DEFAULT << 24)
00179 #define _UART_CTRL_TXDELAY_SHIFT 26
00180 #define _UART_CTRL_TXDELAY_MASK 0xC000000UL
00181 #define _UART_CTRL_TXDELAY_DEFAULT 0x00000000UL
00182 #define _UART_CTRL_TXDELAY_NONE 0x00000000UL
00183 #define _UART_CTRL_TXDELAY_SINGLE 0x00000001UL
00184 #define _UART_CTRL_TXDELAY_DOUBLE 0x00000002UL
00185 #define _UART_CTRL_TXDELAY_TRIPLE 0x00000003UL
00186 #define UART_CTRL_TXDELAY_DEFAULT (_UART_CTRL_TXDELAY_DEFAULT << 26)
00187 #define UART_CTRL_TXDELAY_NONE (_UART_CTRL_TXDELAY_NONE << 26)
00188 #define UART_CTRL_TXDELAY_SINGLE (_UART_CTRL_TXDELAY_SINGLE << 26)
00189 #define UART_CTRL_TXDELAY_DOUBLE (_UART_CTRL_TXDELAY_DOUBLE << 26)
00190 #define UART_CTRL_TXDELAY_TRIPLE (_UART_CTRL_TXDELAY_TRIPLE << 26)
00191 #define UART_CTRL_BYTESWAP (0x1UL << 28)
00192 #define _UART_CTRL_BYTESWAP_SHIFT 28
00193 #define _UART_CTRL_BYTESWAP_MASK 0x10000000UL
00194 #define _UART_CTRL_BYTESWAP_DEFAULT 0x00000000UL
00195 #define UART_CTRL_BYTESWAP_DEFAULT (_UART_CTRL_BYTESWAP_DEFAULT << 28)
00197
00198 #define _UART_FRAME_RESETVALUE 0x00001005UL
00199 #define _UART_FRAME_MASK 0x0000330FUL
00200 #define _UART_FRAME_DATABITS_SHIFT 0
00201 #define _UART_FRAME_DATABITS_MASK 0xFUL
00202 #define _UART_FRAME_DATABITS_FOUR 0x00000001UL
00203 #define _UART_FRAME_DATABITS_FIVE 0x00000002UL
00204 #define _UART_FRAME_DATABITS_SIX 0x00000003UL
00205 #define _UART_FRAME_DATABITS_SEVEN 0x00000004UL
00206 #define _UART_FRAME_DATABITS_DEFAULT 0x00000005UL
00207 #define _UART_FRAME_DATABITS_EIGHT 0x00000005UL
00208 #define _UART_FRAME_DATABITS_NINE 0x00000006UL
00209 #define _UART_FRAME_DATABITS_TEN 0x00000007UL
00210 #define _UART_FRAME_DATABITS_ELEVEN 0x00000008UL
00211 #define _UART_FRAME_DATABITS_TWELVE 0x00000009UL
00212 #define _UART_FRAME_DATABITS_THIRTEEN 0x0000000AUL
00213 #define _UART_FRAME_DATABITS_FOURTEEN 0x0000000BUL
00214 #define _UART_FRAME_DATABITS_FIFTEEN 0x0000000CUL
00215 #define _UART_FRAME_DATABITS_SIXTEEN 0x0000000DUL
00216 #define UART_FRAME_DATABITS_FOUR (_UART_FRAME_DATABITS_FOUR << 0)
00217 #define UART_FRAME_DATABITS_FIVE (_UART_FRAME_DATABITS_FIVE << 0)
00218 #define UART_FRAME_DATABITS_SIX (_UART_FRAME_DATABITS_SIX << 0)
00219 #define UART_FRAME_DATABITS_SEVEN (_UART_FRAME_DATABITS_SEVEN << 0)
00220 #define UART_FRAME_DATABITS_DEFAULT (_UART_FRAME_DATABITS_DEFAULT << 0)
00221 #define UART_FRAME_DATABITS_EIGHT (_UART_FRAME_DATABITS_EIGHT << 0)
00222 #define UART_FRAME_DATABITS_NINE (_UART_FRAME_DATABITS_NINE << 0)
00223 #define UART_FRAME_DATABITS_TEN (_UART_FRAME_DATABITS_TEN << 0)
00224 #define UART_FRAME_DATABITS_ELEVEN (_UART_FRAME_DATABITS_ELEVEN << 0)
00225 #define UART_FRAME_DATABITS_TWELVE (_UART_FRAME_DATABITS_TWELVE << 0)
00226 #define UART_FRAME_DATABITS_THIRTEEN (_UART_FRAME_DATABITS_THIRTEEN << 0)
00227 #define UART_FRAME_DATABITS_FOURTEEN (_UART_FRAME_DATABITS_FOURTEEN << 0)
00228 #define UART_FRAME_DATABITS_FIFTEEN (_UART_FRAME_DATABITS_FIFTEEN << 0)
00229 #define UART_FRAME_DATABITS_SIXTEEN (_UART_FRAME_DATABITS_SIXTEEN << 0)
00230 #define _UART_FRAME_PARITY_SHIFT 8
00231 #define _UART_FRAME_PARITY_MASK 0x300UL
00232 #define _UART_FRAME_PARITY_DEFAULT 0x00000000UL
00233 #define _UART_FRAME_PARITY_NONE 0x00000000UL
00234 #define _UART_FRAME_PARITY_EVEN 0x00000002UL
00235 #define _UART_FRAME_PARITY_ODD 0x00000003UL
00236 #define UART_FRAME_PARITY_DEFAULT (_UART_FRAME_PARITY_DEFAULT << 8)
00237 #define UART_FRAME_PARITY_NONE (_UART_FRAME_PARITY_NONE << 8)
00238 #define UART_FRAME_PARITY_EVEN (_UART_FRAME_PARITY_EVEN << 8)
00239 #define UART_FRAME_PARITY_ODD (_UART_FRAME_PARITY_ODD << 8)
00240 #define _UART_FRAME_STOPBITS_SHIFT 12
00241 #define _UART_FRAME_STOPBITS_MASK 0x3000UL
00242 #define _UART_FRAME_STOPBITS_HALF 0x00000000UL
00243 #define _UART_FRAME_STOPBITS_DEFAULT 0x00000001UL
00244 #define _UART_FRAME_STOPBITS_ONE 0x00000001UL
00245 #define _UART_FRAME_STOPBITS_ONEANDAHALF 0x00000002UL
00246 #define _UART_FRAME_STOPBITS_TWO 0x00000003UL
00247 #define UART_FRAME_STOPBITS_HALF (_UART_FRAME_STOPBITS_HALF << 12)
00248 #define UART_FRAME_STOPBITS_DEFAULT (_UART_FRAME_STOPBITS_DEFAULT << 12)
00249 #define UART_FRAME_STOPBITS_ONE (_UART_FRAME_STOPBITS_ONE << 12)
00250 #define UART_FRAME_STOPBITS_ONEANDAHALF (_UART_FRAME_STOPBITS_ONEANDAHALF << 12)
00251 #define UART_FRAME_STOPBITS_TWO (_UART_FRAME_STOPBITS_TWO << 12)
00253
00254 #define _UART_TRIGCTRL_RESETVALUE 0x00000000UL
00255 #define _UART_TRIGCTRL_MASK 0x00000037UL
00256 #define _UART_TRIGCTRL_TSEL_SHIFT 0
00257 #define _UART_TRIGCTRL_TSEL_MASK 0x7UL
00258 #define _UART_TRIGCTRL_TSEL_DEFAULT 0x00000000UL
00259 #define _UART_TRIGCTRL_TSEL_PRSCH0 0x00000000UL
00260 #define _UART_TRIGCTRL_TSEL_PRSCH1 0x00000001UL
00261 #define _UART_TRIGCTRL_TSEL_PRSCH2 0x00000002UL
00262 #define _UART_TRIGCTRL_TSEL_PRSCH3 0x00000003UL
00263 #define _UART_TRIGCTRL_TSEL_PRSCH4 0x00000004UL
00264 #define _UART_TRIGCTRL_TSEL_PRSCH5 0x00000005UL
00265 #define _UART_TRIGCTRL_TSEL_PRSCH6 0x00000006UL
00266 #define _UART_TRIGCTRL_TSEL_PRSCH7 0x00000007UL
00267 #define UART_TRIGCTRL_TSEL_DEFAULT (_UART_TRIGCTRL_TSEL_DEFAULT << 0)
00268 #define UART_TRIGCTRL_TSEL_PRSCH0 (_UART_TRIGCTRL_TSEL_PRSCH0 << 0)
00269 #define UART_TRIGCTRL_TSEL_PRSCH1 (_UART_TRIGCTRL_TSEL_PRSCH1 << 0)
00270 #define UART_TRIGCTRL_TSEL_PRSCH2 (_UART_TRIGCTRL_TSEL_PRSCH2 << 0)
00271 #define UART_TRIGCTRL_TSEL_PRSCH3 (_UART_TRIGCTRL_TSEL_PRSCH3 << 0)
00272 #define UART_TRIGCTRL_TSEL_PRSCH4 (_UART_TRIGCTRL_TSEL_PRSCH4 << 0)
00273 #define UART_TRIGCTRL_TSEL_PRSCH5 (_UART_TRIGCTRL_TSEL_PRSCH5 << 0)
00274 #define UART_TRIGCTRL_TSEL_PRSCH6 (_UART_TRIGCTRL_TSEL_PRSCH6 << 0)
00275 #define UART_TRIGCTRL_TSEL_PRSCH7 (_UART_TRIGCTRL_TSEL_PRSCH7 << 0)
00276 #define UART_TRIGCTRL_RXTEN (0x1UL << 4)
00277 #define _UART_TRIGCTRL_RXTEN_SHIFT 4
00278 #define _UART_TRIGCTRL_RXTEN_MASK 0x10UL
00279 #define _UART_TRIGCTRL_RXTEN_DEFAULT 0x00000000UL
00280 #define UART_TRIGCTRL_RXTEN_DEFAULT (_UART_TRIGCTRL_RXTEN_DEFAULT << 4)
00281 #define UART_TRIGCTRL_TXTEN (0x1UL << 5)
00282 #define _UART_TRIGCTRL_TXTEN_SHIFT 5
00283 #define _UART_TRIGCTRL_TXTEN_MASK 0x20UL
00284 #define _UART_TRIGCTRL_TXTEN_DEFAULT 0x00000000UL
00285 #define UART_TRIGCTRL_TXTEN_DEFAULT (_UART_TRIGCTRL_TXTEN_DEFAULT << 5)
00287
00288 #define _UART_CMD_RESETVALUE 0x00000000UL
00289 #define _UART_CMD_MASK 0x00000FFFUL
00290 #define UART_CMD_RXEN (0x1UL << 0)
00291 #define _UART_CMD_RXEN_SHIFT 0
00292 #define _UART_CMD_RXEN_MASK 0x1UL
00293 #define _UART_CMD_RXEN_DEFAULT 0x00000000UL
00294 #define UART_CMD_RXEN_DEFAULT (_UART_CMD_RXEN_DEFAULT << 0)
00295 #define UART_CMD_RXDIS (0x1UL << 1)
00296 #define _UART_CMD_RXDIS_SHIFT 1
00297 #define _UART_CMD_RXDIS_MASK 0x2UL
00298 #define _UART_CMD_RXDIS_DEFAULT 0x00000000UL
00299 #define UART_CMD_RXDIS_DEFAULT (_UART_CMD_RXDIS_DEFAULT << 1)
00300 #define UART_CMD_TXEN (0x1UL << 2)
00301 #define _UART_CMD_TXEN_SHIFT 2
00302 #define _UART_CMD_TXEN_MASK 0x4UL
00303 #define _UART_CMD_TXEN_DEFAULT 0x00000000UL
00304 #define UART_CMD_TXEN_DEFAULT (_UART_CMD_TXEN_DEFAULT << 2)
00305 #define UART_CMD_TXDIS (0x1UL << 3)
00306 #define _UART_CMD_TXDIS_SHIFT 3
00307 #define _UART_CMD_TXDIS_MASK 0x8UL
00308 #define _UART_CMD_TXDIS_DEFAULT 0x00000000UL
00309 #define UART_CMD_TXDIS_DEFAULT (_UART_CMD_TXDIS_DEFAULT << 3)
00310 #define UART_CMD_MASTEREN (0x1UL << 4)
00311 #define _UART_CMD_MASTEREN_SHIFT 4
00312 #define _UART_CMD_MASTEREN_MASK 0x10UL
00313 #define _UART_CMD_MASTEREN_DEFAULT 0x00000000UL
00314 #define UART_CMD_MASTEREN_DEFAULT (_UART_CMD_MASTEREN_DEFAULT << 4)
00315 #define UART_CMD_MASTERDIS (0x1UL << 5)
00316 #define _UART_CMD_MASTERDIS_SHIFT 5
00317 #define _UART_CMD_MASTERDIS_MASK 0x20UL
00318 #define _UART_CMD_MASTERDIS_DEFAULT 0x00000000UL
00319 #define UART_CMD_MASTERDIS_DEFAULT (_UART_CMD_MASTERDIS_DEFAULT << 5)
00320 #define UART_CMD_RXBLOCKEN (0x1UL << 6)
00321 #define _UART_CMD_RXBLOCKEN_SHIFT 6
00322 #define _UART_CMD_RXBLOCKEN_MASK 0x40UL
00323 #define _UART_CMD_RXBLOCKEN_DEFAULT 0x00000000UL
00324 #define UART_CMD_RXBLOCKEN_DEFAULT (_UART_CMD_RXBLOCKEN_DEFAULT << 6)
00325 #define UART_CMD_RXBLOCKDIS (0x1UL << 7)
00326 #define _UART_CMD_RXBLOCKDIS_SHIFT 7
00327 #define _UART_CMD_RXBLOCKDIS_MASK 0x80UL
00328 #define _UART_CMD_RXBLOCKDIS_DEFAULT 0x00000000UL
00329 #define UART_CMD_RXBLOCKDIS_DEFAULT (_UART_CMD_RXBLOCKDIS_DEFAULT << 7)
00330 #define UART_CMD_TXTRIEN (0x1UL << 8)
00331 #define _UART_CMD_TXTRIEN_SHIFT 8
00332 #define _UART_CMD_TXTRIEN_MASK 0x100UL
00333 #define _UART_CMD_TXTRIEN_DEFAULT 0x00000000UL
00334 #define UART_CMD_TXTRIEN_DEFAULT (_UART_CMD_TXTRIEN_DEFAULT << 8)
00335 #define UART_CMD_TXTRIDIS (0x1UL << 9)
00336 #define _UART_CMD_TXTRIDIS_SHIFT 9
00337 #define _UART_CMD_TXTRIDIS_MASK 0x200UL
00338 #define _UART_CMD_TXTRIDIS_DEFAULT 0x00000000UL
00339 #define UART_CMD_TXTRIDIS_DEFAULT (_UART_CMD_TXTRIDIS_DEFAULT << 9)
00340 #define UART_CMD_CLEARTX (0x1UL << 10)
00341 #define _UART_CMD_CLEARTX_SHIFT 10
00342 #define _UART_CMD_CLEARTX_MASK 0x400UL
00343 #define _UART_CMD_CLEARTX_DEFAULT 0x00000000UL
00344 #define UART_CMD_CLEARTX_DEFAULT (_UART_CMD_CLEARTX_DEFAULT << 10)
00345 #define UART_CMD_CLEARRX (0x1UL << 11)
00346 #define _UART_CMD_CLEARRX_SHIFT 11
00347 #define _UART_CMD_CLEARRX_MASK 0x800UL
00348 #define _UART_CMD_CLEARRX_DEFAULT 0x00000000UL
00349 #define UART_CMD_CLEARRX_DEFAULT (_UART_CMD_CLEARRX_DEFAULT << 11)
00351
00352 #define _UART_STATUS_RESETVALUE 0x00000040UL
00353 #define _UART_STATUS_MASK 0x000001FFUL
00354 #define UART_STATUS_RXENS (0x1UL << 0)
00355 #define _UART_STATUS_RXENS_SHIFT 0
00356 #define _UART_STATUS_RXENS_MASK 0x1UL
00357 #define _UART_STATUS_RXENS_DEFAULT 0x00000000UL
00358 #define UART_STATUS_RXENS_DEFAULT (_UART_STATUS_RXENS_DEFAULT << 0)
00359 #define UART_STATUS_TXENS (0x1UL << 1)
00360 #define _UART_STATUS_TXENS_SHIFT 1
00361 #define _UART_STATUS_TXENS_MASK 0x2UL
00362 #define _UART_STATUS_TXENS_DEFAULT 0x00000000UL
00363 #define UART_STATUS_TXENS_DEFAULT (_UART_STATUS_TXENS_DEFAULT << 1)
00364 #define UART_STATUS_MASTER (0x1UL << 2)
00365 #define _UART_STATUS_MASTER_SHIFT 2
00366 #define _UART_STATUS_MASTER_MASK 0x4UL
00367 #define _UART_STATUS_MASTER_DEFAULT 0x00000000UL
00368 #define UART_STATUS_MASTER_DEFAULT (_UART_STATUS_MASTER_DEFAULT << 2)
00369 #define UART_STATUS_RXBLOCK (0x1UL << 3)
00370 #define _UART_STATUS_RXBLOCK_SHIFT 3
00371 #define _UART_STATUS_RXBLOCK_MASK 0x8UL
00372 #define _UART_STATUS_RXBLOCK_DEFAULT 0x00000000UL
00373 #define UART_STATUS_RXBLOCK_DEFAULT (_UART_STATUS_RXBLOCK_DEFAULT << 3)
00374 #define UART_STATUS_TXTRI (0x1UL << 4)
00375 #define _UART_STATUS_TXTRI_SHIFT 4
00376 #define _UART_STATUS_TXTRI_MASK 0x10UL
00377 #define _UART_STATUS_TXTRI_DEFAULT 0x00000000UL
00378 #define UART_STATUS_TXTRI_DEFAULT (_UART_STATUS_TXTRI_DEFAULT << 4)
00379 #define UART_STATUS_TXC (0x1UL << 5)
00380 #define _UART_STATUS_TXC_SHIFT 5
00381 #define _UART_STATUS_TXC_MASK 0x20UL
00382 #define _UART_STATUS_TXC_DEFAULT 0x00000000UL
00383 #define UART_STATUS_TXC_DEFAULT (_UART_STATUS_TXC_DEFAULT << 5)
00384 #define UART_STATUS_TXBL (0x1UL << 6)
00385 #define _UART_STATUS_TXBL_SHIFT 6
00386 #define _UART_STATUS_TXBL_MASK 0x40UL
00387 #define _UART_STATUS_TXBL_DEFAULT 0x00000001UL
00388 #define UART_STATUS_TXBL_DEFAULT (_UART_STATUS_TXBL_DEFAULT << 6)
00389 #define UART_STATUS_RXDATAV (0x1UL << 7)
00390 #define _UART_STATUS_RXDATAV_SHIFT 7
00391 #define _UART_STATUS_RXDATAV_MASK 0x80UL
00392 #define _UART_STATUS_RXDATAV_DEFAULT 0x00000000UL
00393 #define UART_STATUS_RXDATAV_DEFAULT (_UART_STATUS_RXDATAV_DEFAULT << 7)
00394 #define UART_STATUS_RXFULL (0x1UL << 8)
00395 #define _UART_STATUS_RXFULL_SHIFT 8
00396 #define _UART_STATUS_RXFULL_MASK 0x100UL
00397 #define _UART_STATUS_RXFULL_DEFAULT 0x00000000UL
00398 #define UART_STATUS_RXFULL_DEFAULT (_UART_STATUS_RXFULL_DEFAULT << 8)
00400
00401 #define _UART_CLKDIV_RESETVALUE 0x00000000UL
00402 #define _UART_CLKDIV_MASK 0x001FFFC0UL
00403 #define _UART_CLKDIV_DIV_SHIFT 6
00404 #define _UART_CLKDIV_DIV_MASK 0x1FFFC0UL
00405 #define _UART_CLKDIV_DIV_DEFAULT 0x00000000UL
00406 #define UART_CLKDIV_DIV_DEFAULT (_UART_CLKDIV_DIV_DEFAULT << 6)
00408
00409 #define _UART_RXDATAX_RESETVALUE 0x00000000UL
00410 #define _UART_RXDATAX_MASK 0x0000C1FFUL
00411 #define _UART_RXDATAX_RXDATA_SHIFT 0
00412 #define _UART_RXDATAX_RXDATA_MASK 0x1FFUL
00413 #define _UART_RXDATAX_RXDATA_DEFAULT 0x00000000UL
00414 #define UART_RXDATAX_RXDATA_DEFAULT (_UART_RXDATAX_RXDATA_DEFAULT << 0)
00415 #define UART_RXDATAX_PERR (0x1UL << 14)
00416 #define _UART_RXDATAX_PERR_SHIFT 14
00417 #define _UART_RXDATAX_PERR_MASK 0x4000UL
00418 #define _UART_RXDATAX_PERR_DEFAULT 0x00000000UL
00419 #define UART_RXDATAX_PERR_DEFAULT (_UART_RXDATAX_PERR_DEFAULT << 14)
00420 #define UART_RXDATAX_FERR (0x1UL << 15)
00421 #define _UART_RXDATAX_FERR_SHIFT 15
00422 #define _UART_RXDATAX_FERR_MASK 0x8000UL
00423 #define _UART_RXDATAX_FERR_DEFAULT 0x00000000UL
00424 #define UART_RXDATAX_FERR_DEFAULT (_UART_RXDATAX_FERR_DEFAULT << 15)
00426
00427 #define _UART_RXDATA_RESETVALUE 0x00000000UL
00428 #define _UART_RXDATA_MASK 0x000000FFUL
00429 #define _UART_RXDATA_RXDATA_SHIFT 0
00430 #define _UART_RXDATA_RXDATA_MASK 0xFFUL
00431 #define _UART_RXDATA_RXDATA_DEFAULT 0x00000000UL
00432 #define UART_RXDATA_RXDATA_DEFAULT (_UART_RXDATA_RXDATA_DEFAULT << 0)
00434
00435 #define _UART_RXDOUBLEX_RESETVALUE 0x00000000UL
00436 #define _UART_RXDOUBLEX_MASK 0xC1FFC1FFUL
00437 #define _UART_RXDOUBLEX_RXDATA0_SHIFT 0
00438 #define _UART_RXDOUBLEX_RXDATA0_MASK 0x1FFUL
00439 #define _UART_RXDOUBLEX_RXDATA0_DEFAULT 0x00000000UL
00440 #define UART_RXDOUBLEX_RXDATA0_DEFAULT (_UART_RXDOUBLEX_RXDATA0_DEFAULT << 0)
00441 #define UART_RXDOUBLEX_PERR0 (0x1UL << 14)
00442 #define _UART_RXDOUBLEX_PERR0_SHIFT 14
00443 #define _UART_RXDOUBLEX_PERR0_MASK 0x4000UL
00444 #define _UART_RXDOUBLEX_PERR0_DEFAULT 0x00000000UL
00445 #define UART_RXDOUBLEX_PERR0_DEFAULT (_UART_RXDOUBLEX_PERR0_DEFAULT << 14)
00446 #define UART_RXDOUBLEX_FERR0 (0x1UL << 15)
00447 #define _UART_RXDOUBLEX_FERR0_SHIFT 15
00448 #define _UART_RXDOUBLEX_FERR0_MASK 0x8000UL
00449 #define _UART_RXDOUBLEX_FERR0_DEFAULT 0x00000000UL
00450 #define UART_RXDOUBLEX_FERR0_DEFAULT (_UART_RXDOUBLEX_FERR0_DEFAULT << 15)
00451 #define _UART_RXDOUBLEX_RXDATA1_SHIFT 16
00452 #define _UART_RXDOUBLEX_RXDATA1_MASK 0x1FF0000UL
00453 #define _UART_RXDOUBLEX_RXDATA1_DEFAULT 0x00000000UL
00454 #define UART_RXDOUBLEX_RXDATA1_DEFAULT (_UART_RXDOUBLEX_RXDATA1_DEFAULT << 16)
00455 #define UART_RXDOUBLEX_PERR1 (0x1UL << 30)
00456 #define _UART_RXDOUBLEX_PERR1_SHIFT 30
00457 #define _UART_RXDOUBLEX_PERR1_MASK 0x40000000UL
00458 #define _UART_RXDOUBLEX_PERR1_DEFAULT 0x00000000UL
00459 #define UART_RXDOUBLEX_PERR1_DEFAULT (_UART_RXDOUBLEX_PERR1_DEFAULT << 30)
00460 #define UART_RXDOUBLEX_FERR1 (0x1UL << 31)
00461 #define _UART_RXDOUBLEX_FERR1_SHIFT 31
00462 #define _UART_RXDOUBLEX_FERR1_MASK 0x80000000UL
00463 #define _UART_RXDOUBLEX_FERR1_DEFAULT 0x00000000UL
00464 #define UART_RXDOUBLEX_FERR1_DEFAULT (_UART_RXDOUBLEX_FERR1_DEFAULT << 31)
00466
00467 #define _UART_RXDOUBLE_RESETVALUE 0x00000000UL
00468 #define _UART_RXDOUBLE_MASK 0x0000FFFFUL
00469 #define _UART_RXDOUBLE_RXDATA0_SHIFT 0
00470 #define _UART_RXDOUBLE_RXDATA0_MASK 0xFFUL
00471 #define _UART_RXDOUBLE_RXDATA0_DEFAULT 0x00000000UL
00472 #define UART_RXDOUBLE_RXDATA0_DEFAULT (_UART_RXDOUBLE_RXDATA0_DEFAULT << 0)
00473 #define _UART_RXDOUBLE_RXDATA1_SHIFT 8
00474 #define _UART_RXDOUBLE_RXDATA1_MASK 0xFF00UL
00475 #define _UART_RXDOUBLE_RXDATA1_DEFAULT 0x00000000UL
00476 #define UART_RXDOUBLE_RXDATA1_DEFAULT (_UART_RXDOUBLE_RXDATA1_DEFAULT << 8)
00478
00479 #define _UART_RXDATAXP_RESETVALUE 0x00000000UL
00480 #define _UART_RXDATAXP_MASK 0x0000C1FFUL
00481 #define _UART_RXDATAXP_RXDATAP_SHIFT 0
00482 #define _UART_RXDATAXP_RXDATAP_MASK 0x1FFUL
00483 #define _UART_RXDATAXP_RXDATAP_DEFAULT 0x00000000UL
00484 #define UART_RXDATAXP_RXDATAP_DEFAULT (_UART_RXDATAXP_RXDATAP_DEFAULT << 0)
00485 #define UART_RXDATAXP_PERRP (0x1UL << 14)
00486 #define _UART_RXDATAXP_PERRP_SHIFT 14
00487 #define _UART_RXDATAXP_PERRP_MASK 0x4000UL
00488 #define _UART_RXDATAXP_PERRP_DEFAULT 0x00000000UL
00489 #define UART_RXDATAXP_PERRP_DEFAULT (_UART_RXDATAXP_PERRP_DEFAULT << 14)
00490 #define UART_RXDATAXP_FERRP (0x1UL << 15)
00491 #define _UART_RXDATAXP_FERRP_SHIFT 15
00492 #define _UART_RXDATAXP_FERRP_MASK 0x8000UL
00493 #define _UART_RXDATAXP_FERRP_DEFAULT 0x00000000UL
00494 #define UART_RXDATAXP_FERRP_DEFAULT (_UART_RXDATAXP_FERRP_DEFAULT << 15)
00496
00497 #define _UART_RXDOUBLEXP_RESETVALUE 0x00000000UL
00498 #define _UART_RXDOUBLEXP_MASK 0xC1FFC1FFUL
00499 #define _UART_RXDOUBLEXP_RXDATAP0_SHIFT 0
00500 #define _UART_RXDOUBLEXP_RXDATAP0_MASK 0x1FFUL
00501 #define _UART_RXDOUBLEXP_RXDATAP0_DEFAULT 0x00000000UL
00502 #define UART_RXDOUBLEXP_RXDATAP0_DEFAULT (_UART_RXDOUBLEXP_RXDATAP0_DEFAULT << 0)
00503 #define UART_RXDOUBLEXP_PERRP0 (0x1UL << 14)
00504 #define _UART_RXDOUBLEXP_PERRP0_SHIFT 14
00505 #define _UART_RXDOUBLEXP_PERRP0_MASK 0x4000UL
00506 #define _UART_RXDOUBLEXP_PERRP0_DEFAULT 0x00000000UL
00507 #define UART_RXDOUBLEXP_PERRP0_DEFAULT (_UART_RXDOUBLEXP_PERRP0_DEFAULT << 14)
00508 #define UART_RXDOUBLEXP_FERRP0 (0x1UL << 15)
00509 #define _UART_RXDOUBLEXP_FERRP0_SHIFT 15
00510 #define _UART_RXDOUBLEXP_FERRP0_MASK 0x8000UL
00511 #define _UART_RXDOUBLEXP_FERRP0_DEFAULT 0x00000000UL
00512 #define UART_RXDOUBLEXP_FERRP0_DEFAULT (_UART_RXDOUBLEXP_FERRP0_DEFAULT << 15)
00513 #define _UART_RXDOUBLEXP_RXDATAP1_SHIFT 16
00514 #define _UART_RXDOUBLEXP_RXDATAP1_MASK 0x1FF0000UL
00515 #define _UART_RXDOUBLEXP_RXDATAP1_DEFAULT 0x00000000UL
00516 #define UART_RXDOUBLEXP_RXDATAP1_DEFAULT (_UART_RXDOUBLEXP_RXDATAP1_DEFAULT << 16)
00517 #define UART_RXDOUBLEXP_PERRP1 (0x1UL << 30)
00518 #define _UART_RXDOUBLEXP_PERRP1_SHIFT 30
00519 #define _UART_RXDOUBLEXP_PERRP1_MASK 0x40000000UL
00520 #define _UART_RXDOUBLEXP_PERRP1_DEFAULT 0x00000000UL
00521 #define UART_RXDOUBLEXP_PERRP1_DEFAULT (_UART_RXDOUBLEXP_PERRP1_DEFAULT << 30)
00522 #define UART_RXDOUBLEXP_FERRP1 (0x1UL << 31)
00523 #define _UART_RXDOUBLEXP_FERRP1_SHIFT 31
00524 #define _UART_RXDOUBLEXP_FERRP1_MASK 0x80000000UL
00525 #define _UART_RXDOUBLEXP_FERRP1_DEFAULT 0x00000000UL
00526 #define UART_RXDOUBLEXP_FERRP1_DEFAULT (_UART_RXDOUBLEXP_FERRP1_DEFAULT << 31)
00528
00529 #define _UART_TXDATAX_RESETVALUE 0x00000000UL
00530 #define _UART_TXDATAX_MASK 0x0000F9FFUL
00531 #define _UART_TXDATAX_TXDATAX_SHIFT 0
00532 #define _UART_TXDATAX_TXDATAX_MASK 0x1FFUL
00533 #define _UART_TXDATAX_TXDATAX_DEFAULT 0x00000000UL
00534 #define UART_TXDATAX_TXDATAX_DEFAULT (_UART_TXDATAX_TXDATAX_DEFAULT << 0)
00535 #define UART_TXDATAX_UBRXAT (0x1UL << 11)
00536 #define _UART_TXDATAX_UBRXAT_SHIFT 11
00537 #define _UART_TXDATAX_UBRXAT_MASK 0x800UL
00538 #define _UART_TXDATAX_UBRXAT_DEFAULT 0x00000000UL
00539 #define UART_TXDATAX_UBRXAT_DEFAULT (_UART_TXDATAX_UBRXAT_DEFAULT << 11)
00540 #define UART_TXDATAX_TXTRIAT (0x1UL << 12)
00541 #define _UART_TXDATAX_TXTRIAT_SHIFT 12
00542 #define _UART_TXDATAX_TXTRIAT_MASK 0x1000UL
00543 #define _UART_TXDATAX_TXTRIAT_DEFAULT 0x00000000UL
00544 #define UART_TXDATAX_TXTRIAT_DEFAULT (_UART_TXDATAX_TXTRIAT_DEFAULT << 12)
00545 #define UART_TXDATAX_TXBREAK (0x1UL << 13)
00546 #define _UART_TXDATAX_TXBREAK_SHIFT 13
00547 #define _UART_TXDATAX_TXBREAK_MASK 0x2000UL
00548 #define _UART_TXDATAX_TXBREAK_DEFAULT 0x00000000UL
00549 #define UART_TXDATAX_TXBREAK_DEFAULT (_UART_TXDATAX_TXBREAK_DEFAULT << 13)
00550 #define UART_TXDATAX_TXDISAT (0x1UL << 14)
00551 #define _UART_TXDATAX_TXDISAT_SHIFT 14
00552 #define _UART_TXDATAX_TXDISAT_MASK 0x4000UL
00553 #define _UART_TXDATAX_TXDISAT_DEFAULT 0x00000000UL
00554 #define UART_TXDATAX_TXDISAT_DEFAULT (_UART_TXDATAX_TXDISAT_DEFAULT << 14)
00555 #define UART_TXDATAX_RXENAT (0x1UL << 15)
00556 #define _UART_TXDATAX_RXENAT_SHIFT 15
00557 #define _UART_TXDATAX_RXENAT_MASK 0x8000UL
00558 #define _UART_TXDATAX_RXENAT_DEFAULT 0x00000000UL
00559 #define UART_TXDATAX_RXENAT_DEFAULT (_UART_TXDATAX_RXENAT_DEFAULT << 15)
00561
00562 #define _UART_TXDATA_RESETVALUE 0x00000000UL
00563 #define _UART_TXDATA_MASK 0x000000FFUL
00564 #define _UART_TXDATA_TXDATA_SHIFT 0
00565 #define _UART_TXDATA_TXDATA_MASK 0xFFUL
00566 #define _UART_TXDATA_TXDATA_DEFAULT 0x00000000UL
00567 #define UART_TXDATA_TXDATA_DEFAULT (_UART_TXDATA_TXDATA_DEFAULT << 0)
00569
00570 #define _UART_TXDOUBLEX_RESETVALUE 0x00000000UL
00571 #define _UART_TXDOUBLEX_MASK 0xF9FFF9FFUL
00572 #define _UART_TXDOUBLEX_TXDATA0_SHIFT 0
00573 #define _UART_TXDOUBLEX_TXDATA0_MASK 0x1FFUL
00574 #define _UART_TXDOUBLEX_TXDATA0_DEFAULT 0x00000000UL
00575 #define UART_TXDOUBLEX_TXDATA0_DEFAULT (_UART_TXDOUBLEX_TXDATA0_DEFAULT << 0)
00576 #define UART_TXDOUBLEX_UBRXAT0 (0x1UL << 11)
00577 #define _UART_TXDOUBLEX_UBRXAT0_SHIFT 11
00578 #define _UART_TXDOUBLEX_UBRXAT0_MASK 0x800UL
00579 #define _UART_TXDOUBLEX_UBRXAT0_DEFAULT 0x00000000UL
00580 #define UART_TXDOUBLEX_UBRXAT0_DEFAULT (_UART_TXDOUBLEX_UBRXAT0_DEFAULT << 11)
00581 #define UART_TXDOUBLEX_TXTRIAT0 (0x1UL << 12)
00582 #define _UART_TXDOUBLEX_TXTRIAT0_SHIFT 12
00583 #define _UART_TXDOUBLEX_TXTRIAT0_MASK 0x1000UL
00584 #define _UART_TXDOUBLEX_TXTRIAT0_DEFAULT 0x00000000UL
00585 #define UART_TXDOUBLEX_TXTRIAT0_DEFAULT (_UART_TXDOUBLEX_TXTRIAT0_DEFAULT << 12)
00586 #define UART_TXDOUBLEX_TXBREAK0 (0x1UL << 13)
00587 #define _UART_TXDOUBLEX_TXBREAK0_SHIFT 13
00588 #define _UART_TXDOUBLEX_TXBREAK0_MASK 0x2000UL
00589 #define _UART_TXDOUBLEX_TXBREAK0_DEFAULT 0x00000000UL
00590 #define UART_TXDOUBLEX_TXBREAK0_DEFAULT (_UART_TXDOUBLEX_TXBREAK0_DEFAULT << 13)
00591 #define UART_TXDOUBLEX_TXDISAT0 (0x1UL << 14)
00592 #define _UART_TXDOUBLEX_TXDISAT0_SHIFT 14
00593 #define _UART_TXDOUBLEX_TXDISAT0_MASK 0x4000UL
00594 #define _UART_TXDOUBLEX_TXDISAT0_DEFAULT 0x00000000UL
00595 #define UART_TXDOUBLEX_TXDISAT0_DEFAULT (_UART_TXDOUBLEX_TXDISAT0_DEFAULT << 14)
00596 #define UART_TXDOUBLEX_RXENAT0 (0x1UL << 15)
00597 #define _UART_TXDOUBLEX_RXENAT0_SHIFT 15
00598 #define _UART_TXDOUBLEX_RXENAT0_MASK 0x8000UL
00599 #define _UART_TXDOUBLEX_RXENAT0_DEFAULT 0x00000000UL
00600 #define UART_TXDOUBLEX_RXENAT0_DEFAULT (_UART_TXDOUBLEX_RXENAT0_DEFAULT << 15)
00601 #define _UART_TXDOUBLEX_TXDATA1_SHIFT 16
00602 #define _UART_TXDOUBLEX_TXDATA1_MASK 0x1FF0000UL
00603 #define _UART_TXDOUBLEX_TXDATA1_DEFAULT 0x00000000UL
00604 #define UART_TXDOUBLEX_TXDATA1_DEFAULT (_UART_TXDOUBLEX_TXDATA1_DEFAULT << 16)
00605 #define UART_TXDOUBLEX_UBRXAT1 (0x1UL << 27)
00606 #define _UART_TXDOUBLEX_UBRXAT1_SHIFT 27
00607 #define _UART_TXDOUBLEX_UBRXAT1_MASK 0x8000000UL
00608 #define _UART_TXDOUBLEX_UBRXAT1_DEFAULT 0x00000000UL
00609 #define UART_TXDOUBLEX_UBRXAT1_DEFAULT (_UART_TXDOUBLEX_UBRXAT1_DEFAULT << 27)
00610 #define UART_TXDOUBLEX_TXTRIAT1 (0x1UL << 28)
00611 #define _UART_TXDOUBLEX_TXTRIAT1_SHIFT 28
00612 #define _UART_TXDOUBLEX_TXTRIAT1_MASK 0x10000000UL
00613 #define _UART_TXDOUBLEX_TXTRIAT1_DEFAULT 0x00000000UL
00614 #define UART_TXDOUBLEX_TXTRIAT1_DEFAULT (_UART_TXDOUBLEX_TXTRIAT1_DEFAULT << 28)
00615 #define UART_TXDOUBLEX_TXBREAK1 (0x1UL << 29)
00616 #define _UART_TXDOUBLEX_TXBREAK1_SHIFT 29
00617 #define _UART_TXDOUBLEX_TXBREAK1_MASK 0x20000000UL
00618 #define _UART_TXDOUBLEX_TXBREAK1_DEFAULT 0x00000000UL
00619 #define UART_TXDOUBLEX_TXBREAK1_DEFAULT (_UART_TXDOUBLEX_TXBREAK1_DEFAULT << 29)
00620 #define UART_TXDOUBLEX_TXDISAT1 (0x1UL << 30)
00621 #define _UART_TXDOUBLEX_TXDISAT1_SHIFT 30
00622 #define _UART_TXDOUBLEX_TXDISAT1_MASK 0x40000000UL
00623 #define _UART_TXDOUBLEX_TXDISAT1_DEFAULT 0x00000000UL
00624 #define UART_TXDOUBLEX_TXDISAT1_DEFAULT (_UART_TXDOUBLEX_TXDISAT1_DEFAULT << 30)
00625 #define UART_TXDOUBLEX_RXENAT1 (0x1UL << 31)
00626 #define _UART_TXDOUBLEX_RXENAT1_SHIFT 31
00627 #define _UART_TXDOUBLEX_RXENAT1_MASK 0x80000000UL
00628 #define _UART_TXDOUBLEX_RXENAT1_DEFAULT 0x00000000UL
00629 #define UART_TXDOUBLEX_RXENAT1_DEFAULT (_UART_TXDOUBLEX_RXENAT1_DEFAULT << 31)
00631
00632 #define _UART_TXDOUBLE_RESETVALUE 0x00000000UL
00633 #define _UART_TXDOUBLE_MASK 0x0000FFFFUL
00634 #define _UART_TXDOUBLE_TXDATA0_SHIFT 0
00635 #define _UART_TXDOUBLE_TXDATA0_MASK 0xFFUL
00636 #define _UART_TXDOUBLE_TXDATA0_DEFAULT 0x00000000UL
00637 #define UART_TXDOUBLE_TXDATA0_DEFAULT (_UART_TXDOUBLE_TXDATA0_DEFAULT << 0)
00638 #define _UART_TXDOUBLE_TXDATA1_SHIFT 8
00639 #define _UART_TXDOUBLE_TXDATA1_MASK 0xFF00UL
00640 #define _UART_TXDOUBLE_TXDATA1_DEFAULT 0x00000000UL
00641 #define UART_TXDOUBLE_TXDATA1_DEFAULT (_UART_TXDOUBLE_TXDATA1_DEFAULT << 8)
00643
00644 #define _UART_IF_RESETVALUE 0x00000002UL
00645 #define _UART_IF_MASK 0x00001FFFUL
00646 #define UART_IF_TXC (0x1UL << 0)
00647 #define _UART_IF_TXC_SHIFT 0
00648 #define _UART_IF_TXC_MASK 0x1UL
00649 #define _UART_IF_TXC_DEFAULT 0x00000000UL
00650 #define UART_IF_TXC_DEFAULT (_UART_IF_TXC_DEFAULT << 0)
00651 #define UART_IF_TXBL (0x1UL << 1)
00652 #define _UART_IF_TXBL_SHIFT 1
00653 #define _UART_IF_TXBL_MASK 0x2UL
00654 #define _UART_IF_TXBL_DEFAULT 0x00000001UL
00655 #define UART_IF_TXBL_DEFAULT (_UART_IF_TXBL_DEFAULT << 1)
00656 #define UART_IF_RXDATAV (0x1UL << 2)
00657 #define _UART_IF_RXDATAV_SHIFT 2
00658 #define _UART_IF_RXDATAV_MASK 0x4UL
00659 #define _UART_IF_RXDATAV_DEFAULT 0x00000000UL
00660 #define UART_IF_RXDATAV_DEFAULT (_UART_IF_RXDATAV_DEFAULT << 2)
00661 #define UART_IF_RXFULL (0x1UL << 3)
00662 #define _UART_IF_RXFULL_SHIFT 3
00663 #define _UART_IF_RXFULL_MASK 0x8UL
00664 #define _UART_IF_RXFULL_DEFAULT 0x00000000UL
00665 #define UART_IF_RXFULL_DEFAULT (_UART_IF_RXFULL_DEFAULT << 3)
00666 #define UART_IF_RXOF (0x1UL << 4)
00667 #define _UART_IF_RXOF_SHIFT 4
00668 #define _UART_IF_RXOF_MASK 0x10UL
00669 #define _UART_IF_RXOF_DEFAULT 0x00000000UL
00670 #define UART_IF_RXOF_DEFAULT (_UART_IF_RXOF_DEFAULT << 4)
00671 #define UART_IF_RXUF (0x1UL << 5)
00672 #define _UART_IF_RXUF_SHIFT 5
00673 #define _UART_IF_RXUF_MASK 0x20UL
00674 #define _UART_IF_RXUF_DEFAULT 0x00000000UL
00675 #define UART_IF_RXUF_DEFAULT (_UART_IF_RXUF_DEFAULT << 5)
00676 #define UART_IF_TXOF (0x1UL << 6)
00677 #define _UART_IF_TXOF_SHIFT 6
00678 #define _UART_IF_TXOF_MASK 0x40UL
00679 #define _UART_IF_TXOF_DEFAULT 0x00000000UL
00680 #define UART_IF_TXOF_DEFAULT (_UART_IF_TXOF_DEFAULT << 6)
00681 #define UART_IF_TXUF (0x1UL << 7)
00682 #define _UART_IF_TXUF_SHIFT 7
00683 #define _UART_IF_TXUF_MASK 0x80UL
00684 #define _UART_IF_TXUF_DEFAULT 0x00000000UL
00685 #define UART_IF_TXUF_DEFAULT (_UART_IF_TXUF_DEFAULT << 7)
00686 #define UART_IF_PERR (0x1UL << 8)
00687 #define _UART_IF_PERR_SHIFT 8
00688 #define _UART_IF_PERR_MASK 0x100UL
00689 #define _UART_IF_PERR_DEFAULT 0x00000000UL
00690 #define UART_IF_PERR_DEFAULT (_UART_IF_PERR_DEFAULT << 8)
00691 #define UART_IF_FERR (0x1UL << 9)
00692 #define _UART_IF_FERR_SHIFT 9
00693 #define _UART_IF_FERR_MASK 0x200UL
00694 #define _UART_IF_FERR_DEFAULT 0x00000000UL
00695 #define UART_IF_FERR_DEFAULT (_UART_IF_FERR_DEFAULT << 9)
00696 #define UART_IF_MPAF (0x1UL << 10)
00697 #define _UART_IF_MPAF_SHIFT 10
00698 #define _UART_IF_MPAF_MASK 0x400UL
00699 #define _UART_IF_MPAF_DEFAULT 0x00000000UL
00700 #define UART_IF_MPAF_DEFAULT (_UART_IF_MPAF_DEFAULT << 10)
00701 #define UART_IF_SSM (0x1UL << 11)
00702 #define _UART_IF_SSM_SHIFT 11
00703 #define _UART_IF_SSM_MASK 0x800UL
00704 #define _UART_IF_SSM_DEFAULT 0x00000000UL
00705 #define UART_IF_SSM_DEFAULT (_UART_IF_SSM_DEFAULT << 11)
00706 #define UART_IF_CCF (0x1UL << 12)
00707 #define _UART_IF_CCF_SHIFT 12
00708 #define _UART_IF_CCF_MASK 0x1000UL
00709 #define _UART_IF_CCF_DEFAULT 0x00000000UL
00710 #define UART_IF_CCF_DEFAULT (_UART_IF_CCF_DEFAULT << 12)
00712
00713 #define _UART_IFS_RESETVALUE 0x00000000UL
00714 #define _UART_IFS_MASK 0x00001FF9UL
00715 #define UART_IFS_TXC (0x1UL << 0)
00716 #define _UART_IFS_TXC_SHIFT 0
00717 #define _UART_IFS_TXC_MASK 0x1UL
00718 #define _UART_IFS_TXC_DEFAULT 0x00000000UL
00719 #define UART_IFS_TXC_DEFAULT (_UART_IFS_TXC_DEFAULT << 0)
00720 #define UART_IFS_RXFULL (0x1UL << 3)
00721 #define _UART_IFS_RXFULL_SHIFT 3
00722 #define _UART_IFS_RXFULL_MASK 0x8UL
00723 #define _UART_IFS_RXFULL_DEFAULT 0x00000000UL
00724 #define UART_IFS_RXFULL_DEFAULT (_UART_IFS_RXFULL_DEFAULT << 3)
00725 #define UART_IFS_RXOF (0x1UL << 4)
00726 #define _UART_IFS_RXOF_SHIFT 4
00727 #define _UART_IFS_RXOF_MASK 0x10UL
00728 #define _UART_IFS_RXOF_DEFAULT 0x00000000UL
00729 #define UART_IFS_RXOF_DEFAULT (_UART_IFS_RXOF_DEFAULT << 4)
00730 #define UART_IFS_RXUF (0x1UL << 5)
00731 #define _UART_IFS_RXUF_SHIFT 5
00732 #define _UART_IFS_RXUF_MASK 0x20UL
00733 #define _UART_IFS_RXUF_DEFAULT 0x00000000UL
00734 #define UART_IFS_RXUF_DEFAULT (_UART_IFS_RXUF_DEFAULT << 5)
00735 #define UART_IFS_TXOF (0x1UL << 6)
00736 #define _UART_IFS_TXOF_SHIFT 6
00737 #define _UART_IFS_TXOF_MASK 0x40UL
00738 #define _UART_IFS_TXOF_DEFAULT 0x00000000UL
00739 #define UART_IFS_TXOF_DEFAULT (_UART_IFS_TXOF_DEFAULT << 6)
00740 #define UART_IFS_TXUF (0x1UL << 7)
00741 #define _UART_IFS_TXUF_SHIFT 7
00742 #define _UART_IFS_TXUF_MASK 0x80UL
00743 #define _UART_IFS_TXUF_DEFAULT 0x00000000UL
00744 #define UART_IFS_TXUF_DEFAULT (_UART_IFS_TXUF_DEFAULT << 7)
00745 #define UART_IFS_PERR (0x1UL << 8)
00746 #define _UART_IFS_PERR_SHIFT 8
00747 #define _UART_IFS_PERR_MASK 0x100UL
00748 #define _UART_IFS_PERR_DEFAULT 0x00000000UL
00749 #define UART_IFS_PERR_DEFAULT (_UART_IFS_PERR_DEFAULT << 8)
00750 #define UART_IFS_FERR (0x1UL << 9)
00751 #define _UART_IFS_FERR_SHIFT 9
00752 #define _UART_IFS_FERR_MASK 0x200UL
00753 #define _UART_IFS_FERR_DEFAULT 0x00000000UL
00754 #define UART_IFS_FERR_DEFAULT (_UART_IFS_FERR_DEFAULT << 9)
00755 #define UART_IFS_MPAF (0x1UL << 10)
00756 #define _UART_IFS_MPAF_SHIFT 10
00757 #define _UART_IFS_MPAF_MASK 0x400UL
00758 #define _UART_IFS_MPAF_DEFAULT 0x00000000UL
00759 #define UART_IFS_MPAF_DEFAULT (_UART_IFS_MPAF_DEFAULT << 10)
00760 #define UART_IFS_SSM (0x1UL << 11)
00761 #define _UART_IFS_SSM_SHIFT 11
00762 #define _UART_IFS_SSM_MASK 0x800UL
00763 #define _UART_IFS_SSM_DEFAULT 0x00000000UL
00764 #define UART_IFS_SSM_DEFAULT (_UART_IFS_SSM_DEFAULT << 11)
00765 #define UART_IFS_CCF (0x1UL << 12)
00766 #define _UART_IFS_CCF_SHIFT 12
00767 #define _UART_IFS_CCF_MASK 0x1000UL
00768 #define _UART_IFS_CCF_DEFAULT 0x00000000UL
00769 #define UART_IFS_CCF_DEFAULT (_UART_IFS_CCF_DEFAULT << 12)
00771
00772 #define _UART_IFC_RESETVALUE 0x00000000UL
00773 #define _UART_IFC_MASK 0x00001FF9UL
00774 #define UART_IFC_TXC (0x1UL << 0)
00775 #define _UART_IFC_TXC_SHIFT 0
00776 #define _UART_IFC_TXC_MASK 0x1UL
00777 #define _UART_IFC_TXC_DEFAULT 0x00000000UL
00778 #define UART_IFC_TXC_DEFAULT (_UART_IFC_TXC_DEFAULT << 0)
00779 #define UART_IFC_RXFULL (0x1UL << 3)
00780 #define _UART_IFC_RXFULL_SHIFT 3
00781 #define _UART_IFC_RXFULL_MASK 0x8UL
00782 #define _UART_IFC_RXFULL_DEFAULT 0x00000000UL
00783 #define UART_IFC_RXFULL_DEFAULT (_UART_IFC_RXFULL_DEFAULT << 3)
00784 #define UART_IFC_RXOF (0x1UL << 4)
00785 #define _UART_IFC_RXOF_SHIFT 4
00786 #define _UART_IFC_RXOF_MASK 0x10UL
00787 #define _UART_IFC_RXOF_DEFAULT 0x00000000UL
00788 #define UART_IFC_RXOF_DEFAULT (_UART_IFC_RXOF_DEFAULT << 4)
00789 #define UART_IFC_RXUF (0x1UL << 5)
00790 #define _UART_IFC_RXUF_SHIFT 5
00791 #define _UART_IFC_RXUF_MASK 0x20UL
00792 #define _UART_IFC_RXUF_DEFAULT 0x00000000UL
00793 #define UART_IFC_RXUF_DEFAULT (_UART_IFC_RXUF_DEFAULT << 5)
00794 #define UART_IFC_TXOF (0x1UL << 6)
00795 #define _UART_IFC_TXOF_SHIFT 6
00796 #define _UART_IFC_TXOF_MASK 0x40UL
00797 #define _UART_IFC_TXOF_DEFAULT 0x00000000UL
00798 #define UART_IFC_TXOF_DEFAULT (_UART_IFC_TXOF_DEFAULT << 6)
00799 #define UART_IFC_TXUF (0x1UL << 7)
00800 #define _UART_IFC_TXUF_SHIFT 7
00801 #define _UART_IFC_TXUF_MASK 0x80UL
00802 #define _UART_IFC_TXUF_DEFAULT 0x00000000UL
00803 #define UART_IFC_TXUF_DEFAULT (_UART_IFC_TXUF_DEFAULT << 7)
00804 #define UART_IFC_PERR (0x1UL << 8)
00805 #define _UART_IFC_PERR_SHIFT 8
00806 #define _UART_IFC_PERR_MASK 0x100UL
00807 #define _UART_IFC_PERR_DEFAULT 0x00000000UL
00808 #define UART_IFC_PERR_DEFAULT (_UART_IFC_PERR_DEFAULT << 8)
00809 #define UART_IFC_FERR (0x1UL << 9)
00810 #define _UART_IFC_FERR_SHIFT 9
00811 #define _UART_IFC_FERR_MASK 0x200UL
00812 #define _UART_IFC_FERR_DEFAULT 0x00000000UL
00813 #define UART_IFC_FERR_DEFAULT (_UART_IFC_FERR_DEFAULT << 9)
00814 #define UART_IFC_MPAF (0x1UL << 10)
00815 #define _UART_IFC_MPAF_SHIFT 10
00816 #define _UART_IFC_MPAF_MASK 0x400UL
00817 #define _UART_IFC_MPAF_DEFAULT 0x00000000UL
00818 #define UART_IFC_MPAF_DEFAULT (_UART_IFC_MPAF_DEFAULT << 10)
00819 #define UART_IFC_SSM (0x1UL << 11)
00820 #define _UART_IFC_SSM_SHIFT 11
00821 #define _UART_IFC_SSM_MASK 0x800UL
00822 #define _UART_IFC_SSM_DEFAULT 0x00000000UL
00823 #define UART_IFC_SSM_DEFAULT (_UART_IFC_SSM_DEFAULT << 11)
00824 #define UART_IFC_CCF (0x1UL << 12)
00825 #define _UART_IFC_CCF_SHIFT 12
00826 #define _UART_IFC_CCF_MASK 0x1000UL
00827 #define _UART_IFC_CCF_DEFAULT 0x00000000UL
00828 #define UART_IFC_CCF_DEFAULT (_UART_IFC_CCF_DEFAULT << 12)
00830
00831 #define _UART_IEN_RESETVALUE 0x00000000UL
00832 #define _UART_IEN_MASK 0x00001FFFUL
00833 #define UART_IEN_TXC (0x1UL << 0)
00834 #define _UART_IEN_TXC_SHIFT 0
00835 #define _UART_IEN_TXC_MASK 0x1UL
00836 #define _UART_IEN_TXC_DEFAULT 0x00000000UL
00837 #define UART_IEN_TXC_DEFAULT (_UART_IEN_TXC_DEFAULT << 0)
00838 #define UART_IEN_TXBL (0x1UL << 1)
00839 #define _UART_IEN_TXBL_SHIFT 1
00840 #define _UART_IEN_TXBL_MASK 0x2UL
00841 #define _UART_IEN_TXBL_DEFAULT 0x00000000UL
00842 #define UART_IEN_TXBL_DEFAULT (_UART_IEN_TXBL_DEFAULT << 1)
00843 #define UART_IEN_RXDATAV (0x1UL << 2)
00844 #define _UART_IEN_RXDATAV_SHIFT 2
00845 #define _UART_IEN_RXDATAV_MASK 0x4UL
00846 #define _UART_IEN_RXDATAV_DEFAULT 0x00000000UL
00847 #define UART_IEN_RXDATAV_DEFAULT (_UART_IEN_RXDATAV_DEFAULT << 2)
00848 #define UART_IEN_RXFULL (0x1UL << 3)
00849 #define _UART_IEN_RXFULL_SHIFT 3
00850 #define _UART_IEN_RXFULL_MASK 0x8UL
00851 #define _UART_IEN_RXFULL_DEFAULT 0x00000000UL
00852 #define UART_IEN_RXFULL_DEFAULT (_UART_IEN_RXFULL_DEFAULT << 3)
00853 #define UART_IEN_RXOF (0x1UL << 4)
00854 #define _UART_IEN_RXOF_SHIFT 4
00855 #define _UART_IEN_RXOF_MASK 0x10UL
00856 #define _UART_IEN_RXOF_DEFAULT 0x00000000UL
00857 #define UART_IEN_RXOF_DEFAULT (_UART_IEN_RXOF_DEFAULT << 4)
00858 #define UART_IEN_RXUF (0x1UL << 5)
00859 #define _UART_IEN_RXUF_SHIFT 5
00860 #define _UART_IEN_RXUF_MASK 0x20UL
00861 #define _UART_IEN_RXUF_DEFAULT 0x00000000UL
00862 #define UART_IEN_RXUF_DEFAULT (_UART_IEN_RXUF_DEFAULT << 5)
00863 #define UART_IEN_TXOF (0x1UL << 6)
00864 #define _UART_IEN_TXOF_SHIFT 6
00865 #define _UART_IEN_TXOF_MASK 0x40UL
00866 #define _UART_IEN_TXOF_DEFAULT 0x00000000UL
00867 #define UART_IEN_TXOF_DEFAULT (_UART_IEN_TXOF_DEFAULT << 6)
00868 #define UART_IEN_TXUF (0x1UL << 7)
00869 #define _UART_IEN_TXUF_SHIFT 7
00870 #define _UART_IEN_TXUF_MASK 0x80UL
00871 #define _UART_IEN_TXUF_DEFAULT 0x00000000UL
00872 #define UART_IEN_TXUF_DEFAULT (_UART_IEN_TXUF_DEFAULT << 7)
00873 #define UART_IEN_PERR (0x1UL << 8)
00874 #define _UART_IEN_PERR_SHIFT 8
00875 #define _UART_IEN_PERR_MASK 0x100UL
00876 #define _UART_IEN_PERR_DEFAULT 0x00000000UL
00877 #define UART_IEN_PERR_DEFAULT (_UART_IEN_PERR_DEFAULT << 8)
00878 #define UART_IEN_FERR (0x1UL << 9)
00879 #define _UART_IEN_FERR_SHIFT 9
00880 #define _UART_IEN_FERR_MASK 0x200UL
00881 #define _UART_IEN_FERR_DEFAULT 0x00000000UL
00882 #define UART_IEN_FERR_DEFAULT (_UART_IEN_FERR_DEFAULT << 9)
00883 #define UART_IEN_MPAF (0x1UL << 10)
00884 #define _UART_IEN_MPAF_SHIFT 10
00885 #define _UART_IEN_MPAF_MASK 0x400UL
00886 #define _UART_IEN_MPAF_DEFAULT 0x00000000UL
00887 #define UART_IEN_MPAF_DEFAULT (_UART_IEN_MPAF_DEFAULT << 10)
00888 #define UART_IEN_SSM (0x1UL << 11)
00889 #define _UART_IEN_SSM_SHIFT 11
00890 #define _UART_IEN_SSM_MASK 0x800UL
00891 #define _UART_IEN_SSM_DEFAULT 0x00000000UL
00892 #define UART_IEN_SSM_DEFAULT (_UART_IEN_SSM_DEFAULT << 11)
00893 #define UART_IEN_CCF (0x1UL << 12)
00894 #define _UART_IEN_CCF_SHIFT 12
00895 #define _UART_IEN_CCF_MASK 0x1000UL
00896 #define _UART_IEN_CCF_DEFAULT 0x00000000UL
00897 #define UART_IEN_CCF_DEFAULT (_UART_IEN_CCF_DEFAULT << 12)
00899
00900 #define _UART_IRCTRL_RESETVALUE 0x00000000UL
00901 #define _UART_IRCTRL_MASK 0x000000FFUL
00902 #define UART_IRCTRL_IREN (0x1UL << 0)
00903 #define _UART_IRCTRL_IREN_SHIFT 0
00904 #define _UART_IRCTRL_IREN_MASK 0x1UL
00905 #define _UART_IRCTRL_IREN_DEFAULT 0x00000000UL
00906 #define UART_IRCTRL_IREN_DEFAULT (_UART_IRCTRL_IREN_DEFAULT << 0)
00907 #define _UART_IRCTRL_IRPW_SHIFT 1
00908 #define _UART_IRCTRL_IRPW_MASK 0x6UL
00909 #define _UART_IRCTRL_IRPW_DEFAULT 0x00000000UL
00910 #define _UART_IRCTRL_IRPW_ONE 0x00000000UL
00911 #define _UART_IRCTRL_IRPW_TWO 0x00000001UL
00912 #define _UART_IRCTRL_IRPW_THREE 0x00000002UL
00913 #define _UART_IRCTRL_IRPW_FOUR 0x00000003UL
00914 #define UART_IRCTRL_IRPW_DEFAULT (_UART_IRCTRL_IRPW_DEFAULT << 1)
00915 #define UART_IRCTRL_IRPW_ONE (_UART_IRCTRL_IRPW_ONE << 1)
00916 #define UART_IRCTRL_IRPW_TWO (_UART_IRCTRL_IRPW_TWO << 1)
00917 #define UART_IRCTRL_IRPW_THREE (_UART_IRCTRL_IRPW_THREE << 1)
00918 #define UART_IRCTRL_IRPW_FOUR (_UART_IRCTRL_IRPW_FOUR << 1)
00919 #define UART_IRCTRL_IRFILT (0x1UL << 3)
00920 #define _UART_IRCTRL_IRFILT_SHIFT 3
00921 #define _UART_IRCTRL_IRFILT_MASK 0x8UL
00922 #define _UART_IRCTRL_IRFILT_DEFAULT 0x00000000UL
00923 #define UART_IRCTRL_IRFILT_DEFAULT (_UART_IRCTRL_IRFILT_DEFAULT << 3)
00924 #define _UART_IRCTRL_IRPRSSEL_SHIFT 4
00925 #define _UART_IRCTRL_IRPRSSEL_MASK 0x70UL
00926 #define _UART_IRCTRL_IRPRSSEL_DEFAULT 0x00000000UL
00927 #define _UART_IRCTRL_IRPRSSEL_PRSCH0 0x00000000UL
00928 #define _UART_IRCTRL_IRPRSSEL_PRSCH1 0x00000001UL
00929 #define _UART_IRCTRL_IRPRSSEL_PRSCH2 0x00000002UL
00930 #define _UART_IRCTRL_IRPRSSEL_PRSCH3 0x00000003UL
00931 #define _UART_IRCTRL_IRPRSSEL_PRSCH4 0x00000004UL
00932 #define _UART_IRCTRL_IRPRSSEL_PRSCH5 0x00000005UL
00933 #define _UART_IRCTRL_IRPRSSEL_PRSCH6 0x00000006UL
00934 #define _UART_IRCTRL_IRPRSSEL_PRSCH7 0x00000007UL
00935 #define UART_IRCTRL_IRPRSSEL_DEFAULT (_UART_IRCTRL_IRPRSSEL_DEFAULT << 4)
00936 #define UART_IRCTRL_IRPRSSEL_PRSCH0 (_UART_IRCTRL_IRPRSSEL_PRSCH0 << 4)
00937 #define UART_IRCTRL_IRPRSSEL_PRSCH1 (_UART_IRCTRL_IRPRSSEL_PRSCH1 << 4)
00938 #define UART_IRCTRL_IRPRSSEL_PRSCH2 (_UART_IRCTRL_IRPRSSEL_PRSCH2 << 4)
00939 #define UART_IRCTRL_IRPRSSEL_PRSCH3 (_UART_IRCTRL_IRPRSSEL_PRSCH3 << 4)
00940 #define UART_IRCTRL_IRPRSSEL_PRSCH4 (_UART_IRCTRL_IRPRSSEL_PRSCH4 << 4)
00941 #define UART_IRCTRL_IRPRSSEL_PRSCH5 (_UART_IRCTRL_IRPRSSEL_PRSCH5 << 4)
00942 #define UART_IRCTRL_IRPRSSEL_PRSCH6 (_UART_IRCTRL_IRPRSSEL_PRSCH6 << 4)
00943 #define UART_IRCTRL_IRPRSSEL_PRSCH7 (_UART_IRCTRL_IRPRSSEL_PRSCH7 << 4)
00944 #define UART_IRCTRL_IRPRSEN (0x1UL << 7)
00945 #define _UART_IRCTRL_IRPRSEN_SHIFT 7
00946 #define _UART_IRCTRL_IRPRSEN_MASK 0x80UL
00947 #define _UART_IRCTRL_IRPRSEN_DEFAULT 0x00000000UL
00948 #define UART_IRCTRL_IRPRSEN_DEFAULT (_UART_IRCTRL_IRPRSEN_DEFAULT << 7)
00950
00951 #define _UART_ROUTE_RESETVALUE 0x00000000UL
00952 #define _UART_ROUTE_MASK 0x0000030FUL
00953 #define UART_ROUTE_RXPEN (0x1UL << 0)
00954 #define _UART_ROUTE_RXPEN_SHIFT 0
00955 #define _UART_ROUTE_RXPEN_MASK 0x1UL
00956 #define _UART_ROUTE_RXPEN_DEFAULT 0x00000000UL
00957 #define UART_ROUTE_RXPEN_DEFAULT (_UART_ROUTE_RXPEN_DEFAULT << 0)
00958 #define UART_ROUTE_TXPEN (0x1UL << 1)
00959 #define _UART_ROUTE_TXPEN_SHIFT 1
00960 #define _UART_ROUTE_TXPEN_MASK 0x2UL
00961 #define _UART_ROUTE_TXPEN_DEFAULT 0x00000000UL
00962 #define UART_ROUTE_TXPEN_DEFAULT (_UART_ROUTE_TXPEN_DEFAULT << 1)
00963 #define UART_ROUTE_CSPEN (0x1UL << 2)
00964 #define _UART_ROUTE_CSPEN_SHIFT 2
00965 #define _UART_ROUTE_CSPEN_MASK 0x4UL
00966 #define _UART_ROUTE_CSPEN_DEFAULT 0x00000000UL
00967 #define UART_ROUTE_CSPEN_DEFAULT (_UART_ROUTE_CSPEN_DEFAULT << 2)
00968 #define UART_ROUTE_CLKPEN (0x1UL << 3)
00969 #define _UART_ROUTE_CLKPEN_SHIFT 3
00970 #define _UART_ROUTE_CLKPEN_MASK 0x8UL
00971 #define _UART_ROUTE_CLKPEN_DEFAULT 0x00000000UL
00972 #define UART_ROUTE_CLKPEN_DEFAULT (_UART_ROUTE_CLKPEN_DEFAULT << 3)
00973 #define _UART_ROUTE_LOCATION_SHIFT 8
00974 #define _UART_ROUTE_LOCATION_MASK 0x300UL
00975 #define _UART_ROUTE_LOCATION_LOC0 0x00000000UL
00976 #define _UART_ROUTE_LOCATION_DEFAULT 0x00000000UL
00977 #define _UART_ROUTE_LOCATION_LOC1 0x00000001UL
00978 #define _UART_ROUTE_LOCATION_LOC2 0x00000002UL
00979 #define _UART_ROUTE_LOCATION_LOC3 0x00000003UL
00980 #define UART_ROUTE_LOCATION_LOC0 (_UART_ROUTE_LOCATION_LOC0 << 8)
00981 #define UART_ROUTE_LOCATION_DEFAULT (_UART_ROUTE_LOCATION_DEFAULT << 8)
00982 #define UART_ROUTE_LOCATION_LOC1 (_UART_ROUTE_LOCATION_LOC1 << 8)
00983 #define UART_ROUTE_LOCATION_LOC2 (_UART_ROUTE_LOCATION_LOC2 << 8)
00984 #define UART_ROUTE_LOCATION_LOC3 (_UART_ROUTE_LOCATION_LOC3 << 8)