00001
00016 #ifndef __SILICON_LABS_DMADRV_H__
00017 #define __SILICON_LABS_DMADRV_H__
00018
00019 #include "em_device.h"
00020 #include "ecode.h"
00021
00023 #if defined( DMA_PRESENT ) && ( DMA_COUNT == 1 )
00024 #define EMDRV_DMADRV_UDMA
00025 #include "em_dma.h"
00026 #elif defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 )
00027 #define EMDRV_DMADRV_LDMA
00028 #include "em_ldma.h"
00029 #else
00030 #error "No valid DMA engine defined."
00031 #endif
00032
00033
00034 #include "dmadrv_config.h"
00035
00036 #ifdef __cplusplus
00037 extern "C" {
00038 #endif
00039
00040
00045
00053 #define ECODE_EMDRV_DMADRV_OK ( ECODE_OK ) ///< Success return value.
00054 #define ECODE_EMDRV_DMADRV_PARAM_ERROR ( ECODE_EMDRV_DMADRV_BASE | 0x00000001 ) ///< Illegal input parameter.
00055 #define ECODE_EMDRV_DMADRV_NOT_INITIALIZED ( ECODE_EMDRV_DMADRV_BASE | 0x00000002 ) ///< DMA is not initialized.
00056 #define ECODE_EMDRV_DMADRV_ALREADY_INITIALIZED ( ECODE_EMDRV_DMADRV_BASE | 0x00000003 ) ///< DMA has already been initialized.
00057 #define ECODE_EMDRV_DMADRV_CHANNELS_EXHAUSTED ( ECODE_EMDRV_DMADRV_BASE | 0x00000004 ) ///< No DMA channels available.
00058 #define ECODE_EMDRV_DMADRV_IN_USE ( ECODE_EMDRV_DMADRV_BASE | 0x00000005 ) ///< DMA is in use.
00059 #define ECODE_EMDRV_DMADRV_ALREADY_FREED ( ECODE_EMDRV_DMADRV_BASE | 0x00000006 ) ///< DMA channel was free.
00060 #define ECODE_EMDRV_DMADRV_CH_NOT_ALLOCATED ( ECODE_EMDRV_DMADRV_BASE | 0x00000007 ) ///< The channel is not reserved.
00061
00062
00083 typedef bool (*DMADRV_Callback_t)( unsigned int channel,
00084 unsigned int sequenceNo,
00085 void *userParam );
00086
00087 #if defined( DMA_PRESENT ) && ( DMA_COUNT == 1 )
00088
00090 #define DMADRV_MAX_XFER_COUNT ((int)((_DMA_CTRL_N_MINUS_1_MASK >> _DMA_CTRL_N_MINUS_1_SHIFT) + 1))
00091
00092 #ifdef DOXY_DOC_ONLY
00093 #include "../Device/SiliconLabs/EFM32GG/Include/efm32gg_dmareq.h"
00094 #endif
00095
00097 typedef enum
00098 {
00099 dmadrvPeripheralSignal_NONE = 0,
00100 #if defined( DMAREQ_ADC0_SCAN )
00101 dmadrvPeripheralSignal_ADC0_SCAN = DMAREQ_ADC0_SCAN,
00102 #endif
00103 #if defined( DMAREQ_ADC0_SINGLE )
00104 dmadrvPeripheralSignal_ADC0_SINGLE = DMAREQ_ADC0_SINGLE,
00105 #endif
00106 #if defined( DMAREQ_AES_DATARD )
00107 dmadrvPeripheralSignal_AES_DATARD = DMAREQ_AES_DATARD,
00108 #endif
00109 #if defined( DMAREQ_AES_DATAWR )
00110 dmadrvPeripheralSignal_AES_DATAWR = DMAREQ_AES_DATAWR,
00111 #endif
00112 #if defined( DMAREQ_AES_KEYWR )
00113 dmadrvPeripheralSignal_AES_KEYWR = DMAREQ_AES_KEYWR,
00114 #endif
00115 #if defined( DMAREQ_AES_XORDATAWR )
00116 dmadrvPeripheralSignal_AES_XORDATAWR = DMAREQ_AES_XORDATAWR,
00117 #endif
00118 #if defined( DMAREQ_DAC0_CH0 )
00119 dmadrvPeripheralSignal_DAC0_CH0 = DMAREQ_DAC0_CH0,
00120 #endif
00121 #if defined( DMAREQ_DAC0_CH1 )
00122 dmadrvPeripheralSignal_DAC0_CH1 = DMAREQ_DAC0_CH1,
00123 #endif
00124 #if defined( DMAREQ_EBI_DDEMPTY )
00125 dmadrvPeripheralSignal_EBI_DDEMPTY = DMAREQ_EBI_DDEMPTY,
00126 #endif
00127 #if defined( DMAREQ_EBI_PXL0EMPTY )
00128 dmadrvPeripheralSignal_EBI_PXL0EMPTY = DMAREQ_EBI_PXL0EMPTY,
00129 #endif
00130 #if defined( DMAREQ_EBI_PXL1EMPTY )
00131 dmadrvPeripheralSignal_EBI_PXL1EMPTY = DMAREQ_EBI_PXL1EMPTY,
00132 #endif
00133 #if defined( DMAREQ_EBI_PXLFULL )
00134 dmadrvPeripheralSignal_EBI_PXLFULL = DMAREQ_EBI_PXLFULL,
00135 #endif
00136 #if defined( DMAREQ_I2C0_RXDATAV )
00137 dmadrvPeripheralSignal_I2C0_RXDATAV = DMAREQ_I2C0_RXDATAV,
00138 #endif
00139 #if defined( DMAREQ_I2C0_TXBL )
00140 dmadrvPeripheralSignal_I2C0_TXBL = DMAREQ_I2C0_TXBL,
00141 #endif
00142 #if defined( DMAREQ_I2C1_RXDATAV )
00143 dmadrvPeripheralSignal_I2C1_RXDATAV = DMAREQ_I2C1_RXDATAV,
00144 #endif
00145 #if defined( DMAREQ_I2C1_TXBL )
00146 dmadrvPeripheralSignal_I2C1_TXBL = DMAREQ_I2C1_TXBL,
00147 #endif
00148 #if defined( DMAREQ_LESENSE_BUFDATAV )
00149 dmadrvPeripheralSignal_LESENSE_BUFDATAV = DMAREQ_LESENSE_BUFDATAV,
00150 #endif
00151 #if defined( DMAREQ_LEUART0_RXDATAV )
00152 dmadrvPeripheralSignal_LEUART0_RXDATAV = DMAREQ_LEUART0_RXDATAV,
00153 #endif
00154 #if defined( DMAREQ_LEUART0_TXBL )
00155 dmadrvPeripheralSignal_LEUART0_TXBL = DMAREQ_LEUART0_TXBL,
00156 #endif
00157 #if defined( DMAREQ_LEUART0_TXEMPTY )
00158 dmadrvPeripheralSignal_LEUART0_TXEMPTY = DMAREQ_LEUART0_TXEMPTY,
00159 #endif
00160 #if defined( DMAREQ_LEUART1_RXDATAV )
00161 dmadrvPeripheralSignal_LEUART1_RXDATAV = DMAREQ_LEUART1_RXDATAV,
00162 #endif
00163 #if defined( DMAREQ_LEUART1_TXBL )
00164 dmadrvPeripheralSignal_LEUART1_TXBL = DMAREQ_LEUART1_TXBL,
00165 #endif
00166 #if defined( DMAREQ_LEUART1_TXEMPTY )
00167 dmadrvPeripheralSignal_LEUART1_TXEMPTY = DMAREQ_LEUART1_TXEMPTY,
00168 #endif
00169 #if defined( DMAREQ_MSC_WDATA )
00170 dmadrvPeripheralSignal_MSC_WDATA = DMAREQ_MSC_WDATA,
00171 #endif
00172 #if defined( DMAREQ_TIMER0_CC0 )
00173 dmadrvPeripheralSignal_TIMER0_CC0 = DMAREQ_TIMER0_CC0,
00174 #endif
00175 #if defined( DMAREQ_TIMER0_CC1 )
00176 dmadrvPeripheralSignal_TIMER0_CC1 = DMAREQ_TIMER0_CC1,
00177 #endif
00178 #if defined( DMAREQ_TIMER0_CC2 )
00179 dmadrvPeripheralSignal_TIMER0_CC2 = DMAREQ_TIMER0_CC2,
00180 #endif
00181 #if defined( DMAREQ_TIMER0_UFOF )
00182 dmadrvPeripheralSignal_TIMER0_UFOF = DMAREQ_TIMER0_UFOF,
00183 #endif
00184 #if defined( DMAREQ_TIMER1_CC0 )
00185 dmadrvPeripheralSignal_TIMER1_CC0 = DMAREQ_TIMER1_CC0,
00186 #endif
00187 #if defined( DMAREQ_TIMER1_CC1 )
00188 dmadrvPeripheralSignal_TIMER1_CC1 = DMAREQ_TIMER1_CC1,
00189 #endif
00190 #if defined( DMAREQ_TIMER1_CC2 )
00191 dmadrvPeripheralSignal_TIMER1_CC2 = DMAREQ_TIMER1_CC2,
00192 #endif
00193 #if defined( DMAREQ_TIMER1_UFOF )
00194 dmadrvPeripheralSignal_TIMER1_UFOF = DMAREQ_TIMER1_UFOF,
00195 #endif
00196 #if defined( DMAREQ_TIMER2_CC0 )
00197 dmadrvPeripheralSignal_TIMER2_CC0 = DMAREQ_TIMER2_CC0,
00198 #endif
00199 #if defined( DMAREQ_TIMER2_CC1 )
00200 dmadrvPeripheralSignal_TIMER2_CC1 = DMAREQ_TIMER2_CC1,
00201 #endif
00202 #if defined( DMAREQ_TIMER2_CC2 )
00203 dmadrvPeripheralSignal_TIMER2_CC2 = DMAREQ_TIMER2_CC2,
00204 #endif
00205 #if defined( DMAREQ_TIMER2_UFOF )
00206 dmadrvPeripheralSignal_TIMER2_UFOF = DMAREQ_TIMER2_UFOF,
00207 #endif
00208 #if defined( DMAREQ_TIMER3_CC0 )
00209 dmadrvPeripheralSignal_TIMER3_CC0 = DMAREQ_TIMER3_CC0,
00210 #endif
00211 #if defined( DMAREQ_TIMER3_CC1 )
00212 dmadrvPeripheralSignal_TIMER3_CC1 = DMAREQ_TIMER3_CC1,
00213 #endif
00214 #if defined( DMAREQ_TIMER3_CC2 )
00215 dmadrvPeripheralSignal_TIMER3_CC2 = DMAREQ_TIMER3_CC2,
00216 #endif
00217 #if defined( DMAREQ_TIMER3_UFOF )
00218 dmadrvPeripheralSignal_TIMER3_UFOF = DMAREQ_TIMER3_UFOF,
00219 #endif
00220 #if defined( DMAREQ_UART0_RXDATAV )
00221 dmadrvPeripheralSignal_UART0_RXDATAV = DMAREQ_UART0_RXDATAV,
00222 #endif
00223 #if defined( DMAREQ_UART0_TXBL )
00224 dmadrvPeripheralSignal_UART0_TXBL = DMAREQ_UART0_TXBL,
00225 #endif
00226 #if defined( DMAREQ_UART0_TXEMPTY )
00227 dmadrvPeripheralSignal_UART0_TXEMPTY = DMAREQ_UART0_TXEMPTY,
00228 #endif
00229 #if defined( DMAREQ_UART1_RXDATAV )
00230 dmadrvPeripheralSignal_UART1_RXDATAV = DMAREQ_UART1_RXDATAV,
00231 #endif
00232 #if defined( DMAREQ_UART1_TXBL )
00233 dmadrvPeripheralSignal_UART1_TXBL = DMAREQ_UART1_TXBL,
00234 #endif
00235 #if defined( DMAREQ_UART1_TXEMPTY )
00236 dmadrvPeripheralSignal_UART1_TXEMPTY = DMAREQ_UART1_TXEMPTY,
00237 #endif
00238 #if defined( DMAREQ_USART0_RXDATAV )
00239 dmadrvPeripheralSignal_USART0_RXDATAV = DMAREQ_USART0_RXDATAV,
00240 #endif
00241 #if defined( DMAREQ_USART0_TXBL )
00242 dmadrvPeripheralSignal_USART0_TXBL = DMAREQ_USART0_TXBL,
00243 #endif
00244 #if defined( DMAREQ_USART0_TXEMPTY )
00245 dmadrvPeripheralSignal_USART0_TXEMPTY = DMAREQ_USART0_TXEMPTY,
00246 #endif
00247 #if defined( DMAREQ_USARTRF0_RXDATAV )
00248 dmadrvPeripheralSignal_USARTRF0_RXDATAV = DMAREQ_USARTRF0_RXDATAV,
00249 #endif
00250 #if defined( DMAREQ_USARTRF0_TXBL )
00251 dmadrvPeripheralSignal_USARTRF0_TXBL = DMAREQ_USARTRF0_TXBL,
00252 #endif
00253 #if defined( DMAREQ_USARTRF0_TXEMPTY )
00254 dmadrvPeripheralSignal_USARTRF0_TXEMPTY = DMAREQ_USARTRF0_TXEMPTY,
00255 #endif
00256 #if defined( DMAREQ_USART1_RXDATAV )
00257 dmadrvPeripheralSignal_USART1_RXDATAV = DMAREQ_USART1_RXDATAV,
00258 #endif
00259 #if defined( DMAREQ_USART1_RXDATAVRIGHT )
00260 dmadrvPeripheralSignal_USART1_RXDATAVRIGHT = DMAREQ_USART1_RXDATAVRIGHT,
00261 #endif
00262 #if defined( DMAREQ_USART1_TXBL )
00263 dmadrvPeripheralSignal_USART1_TXBL = DMAREQ_USART1_TXBL,
00264 #endif
00265 #if defined( DMAREQ_USART1_TXBLRIGHT )
00266 dmadrvPeripheralSignal_USART1_TXBLRIGHT = DMAREQ_USART1_TXBLRIGHT,
00267 #endif
00268 #if defined( DMAREQ_USART1_TXEMPTY )
00269 dmadrvPeripheralSignal_USART1_TXEMPTY = DMAREQ_USART1_TXEMPTY,
00270 #endif
00271 #if defined( DMAREQ_USART2_RXDATAV )
00272 dmadrvPeripheralSignal_USART2_RXDATAV = DMAREQ_USART2_RXDATAV,
00273 #endif
00274 #if defined( DMAREQ_USART2_RXDATAVRIGHT )
00275 dmadrvPeripheralSignal_USART2_RXDATAVRIGHT = DMAREQ_USART2_RXDATAVRIGHT,
00276 #endif
00277 #if defined( DMAREQ_USART2_TXBL )
00278 dmadrvPeripheralSignal_USART2_TXBL = DMAREQ_USART2_TXBL,
00279 #endif
00280 #if defined( DMAREQ_USART2_TXBLRIGHT )
00281 dmadrvPeripheralSignal_USART2_TXBLRIGHT = DMAREQ_USART2_TXBLRIGHT,
00282 #endif
00283 #if defined( DMAREQ_USART2_TXEMPTY )
00284 dmadrvPeripheralSignal_USART2_TXEMPTY = DMAREQ_USART2_TXEMPTY,
00285 #endif
00286 #ifdef DOXY_DOC_ONLY
00287 } DMADRV_Peripheralsignal_t;
00288 #else
00289 } DMADRV_PeripheralSignal_t;
00290 #endif
00291
00293 typedef enum
00294 {
00295 dmadrvDataSize1 = dmaDataSize1,
00296 dmadrvDataSize2 = dmaDataSize2,
00297 dmadrvDataSize4 = dmaDataSize4
00298 #ifdef DOXY_DOC_ONLY
00299 } DMADRV_Datasize_t;
00300 #else
00301 } DMADRV_DataSize_t;
00302 #endif
00303
00304 #endif // defined( DMA_PRESENT ) && ( DMA_COUNT == 1 )
00305
00306 #if defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 )
00307
00309 #define DMADRV_MAX_XFER_COUNT ((int)((_LDMA_CH_CTRL_XFERCNT_MASK >> _LDMA_CH_CTRL_XFERCNT_SHIFT) + 1))
00310
00311 #ifdef DOXY_DOC_ONLY
00312 #include "../Device/SiliconLabs/EFR32MG1P/Include/efr32mg1p_ldma.h"
00313 #endif
00314
00316 typedef enum
00317 {
00318 dmadrvPeripheralSignal_NONE = LDMA_CH_MUXSEL_SOURCESEL_NONE,
00319 #if defined( LDMA_CH_MUXSEL_SIGSEL_ADC0SCAN )
00320 dmadrvPeripheralSignal_ADC0_SCAN = LDMA_CH_MUXSEL_SIGSEL_ADC0SCAN | LDMA_CH_MUXSEL_SOURCESEL_ADC0,
00321 #endif
00322 #if defined( LDMA_CH_MUXSEL_SIGSEL_ADC0SINGLE )
00323 dmadrvPeripheralSignal_ADC0_SINGLE = LDMA_CH_MUXSEL_SIGSEL_ADC0SINGLE | LDMA_CH_MUXSEL_SOURCESEL_ADC0,
00324 #endif
00325 #if defined( LDMA_CH_MUXSEL_SIGSEL_AGCRSSI )
00326 dmadrvPeripheralSignal_AGC_RSSI = LDMA_CH_MUXSEL_SIGSEL_AGCRSSI | LDMA_CH_MUXSEL_SOURCESEL_AGC,
00327 #endif
00328 #if defined( LDMA_CH_MUXSEL_SIGSEL_CRYPTODATA0RD )
00329 dmadrvPeripheralSignal_CRYPTO_DATA0RD = LDMA_CH_MUXSEL_SIGSEL_CRYPTODATA0RD | LDMA_CH_MUXSEL_SOURCESEL_CRYPTO,
00330 #endif
00331 #if defined( LDMA_CH_MUXSEL_SIGSEL_CRYPTODATA0WR )
00332 dmadrvPeripheralSignal_CRYPTO_DATA0WR = LDMA_CH_MUXSEL_SIGSEL_CRYPTODATA0WR | LDMA_CH_MUXSEL_SOURCESEL_CRYPTO,
00333 #endif
00334 #if defined( LDMA_CH_MUXSEL_SIGSEL_CRYPTODATA0XWR )
00335 dmadrvPeripheralSignal_CRYPTO_DATA0XWR = LDMA_CH_MUXSEL_SIGSEL_CRYPTODATA0XWR | LDMA_CH_MUXSEL_SOURCESEL_CRYPTO,
00336 #endif
00337 #if defined( LDMA_CH_MUXSEL_SIGSEL_CRYPTODATA1RD )
00338 dmadrvPeripheralSignal_CRYPTO_DATA1RD = LDMA_CH_MUXSEL_SIGSEL_CRYPTODATA1RD | LDMA_CH_MUXSEL_SOURCESEL_CRYPTO,
00339 #endif
00340 #if defined( LDMA_CH_MUXSEL_SIGSEL_CRYPTODATA1WR )
00341 dmadrvPeripheralSignal_CRYPTO_DATA1WR = LDMA_CH_MUXSEL_SIGSEL_CRYPTODATA1WR | LDMA_CH_MUXSEL_SOURCESEL_CRYPTO,
00342 #endif
00343 #if defined( LDMA_CH_MUXSEL_SIGSEL_I2C0RXDATAV )
00344 dmadrvPeripheralSignal_I2C0_RXDATAV = LDMA_CH_MUXSEL_SIGSEL_I2C0RXDATAV | LDMA_CH_MUXSEL_SOURCESEL_I2C0,
00345 #endif
00346 #if defined( LDMA_CH_MUXSEL_SIGSEL_I2C0TXBL )
00347 dmadrvPeripheralSignal_I2C0_TXBL = LDMA_CH_MUXSEL_SIGSEL_I2C0TXBL | LDMA_CH_MUXSEL_SOURCESEL_I2C0,
00348 #endif
00349 #if defined( LDMA_CH_MUXSEL_SIGSEL_LEUART0RXDATAV )
00350 dmadrvPeripheralSignal_LEUART0_RXDATAV = LDMA_CH_MUXSEL_SIGSEL_LEUART0RXDATAV | LDMA_CH_MUXSEL_SOURCESEL_LEUART0,
00351 #endif
00352 #if defined( LDMA_CH_MUXSEL_SIGSEL_LEUART0TXBL )
00353 dmadrvPeripheralSignal_LEUART0_TXBL = LDMA_CH_MUXSEL_SIGSEL_LEUART0TXBL | LDMA_CH_MUXSEL_SOURCESEL_LEUART0,
00354 #endif
00355 #if defined( LDMA_CH_MUXSEL_SIGSEL_LEUART0TXEMPTY )
00356 dmadrvPeripheralSignal_LEUART0_TXEMPTY = LDMA_CH_MUXSEL_SIGSEL_LEUART0TXEMPTY | LDMA_CH_MUXSEL_SOURCESEL_LEUART0,
00357 #endif
00358 #if defined( LDMA_CH_MUXSEL_SIGSEL_MODEMDEBUG )
00359 dmadrvPeripheralSignal_MODEM_DEBUG = LDMA_CH_MUXSEL_SIGSEL_MODEMDEBUG | LDMA_CH_MUXSEL_SOURCESEL_MODEM,
00360 #endif
00361 #if defined( LDMA_CH_MUXSEL_SIGSEL_MSCWDATA )
00362 dmadrvPeripheralSignal_MSC_WDATA = LDMA_CH_MUXSEL_SIGSEL_MSCWDATA | LDMA_CH_MUXSEL_SOURCESEL_MSC,
00363 #endif
00364 #if defined( LDMA_CH_MUXSEL_SIGSEL_PROTIMERBOF )
00365 dmadrvPeripheralSignal_PROTIMER_BOF = LDMA_CH_MUXSEL_SIGSEL_PROTIMERBOF | LDMA_CH_MUXSEL_SOURCESEL_PROTIMER,
00366 #endif
00367 #if defined( LDMA_CH_MUXSEL_SIGSEL_PROTIMERCC0 )
00368 dmadrvPeripheralSignal_PROTIMER_CC0 = LDMA_CH_MUXSEL_SIGSEL_PROTIMERCC0 | LDMA_CH_MUXSEL_SOURCESEL_PROTIMER,
00369 #endif
00370 #if defined( LDMA_CH_MUXSEL_SIGSEL_PROTIMERCC1 )
00371 dmadrvPeripheralSignal_PROTIMER_CC1 = LDMA_CH_MUXSEL_SIGSEL_PROTIMERCC1 | LDMA_CH_MUXSEL_SOURCESEL_PROTIMER,
00372 #endif
00373 #if defined( LDMA_CH_MUXSEL_SIGSEL_PROTIMERCC2 )
00374 dmadrvPeripheralSignal_PROTIMER_CC2 = LDMA_CH_MUXSEL_SIGSEL_PROTIMERCC2 | LDMA_CH_MUXSEL_SOURCESEL_PROTIMER,
00375 #endif
00376 #if defined( LDMA_CH_MUXSEL_SIGSEL_PROTIMERCC3 )
00377 dmadrvPeripheralSignal_PROTIMER_CC3 = LDMA_CH_MUXSEL_SIGSEL_PROTIMERCC3 | LDMA_CH_MUXSEL_SOURCESEL_PROTIMER,
00378 #endif
00379 #if defined( LDMA_CH_MUXSEL_SIGSEL_PROTIMERCC4 )
00380 dmadrvPeripheralSignal_PROTIMER_CC4 = LDMA_CH_MUXSEL_SIGSEL_PROTIMERCC4 | LDMA_CH_MUXSEL_SOURCESEL_PROTIMER,
00381 #endif
00382 #if defined( LDMA_CH_MUXSEL_SIGSEL_PROTIMERPOF )
00383 dmadrvPeripheralSignal_PROTIMER_POF = LDMA_CH_MUXSEL_SIGSEL_PROTIMERPOF | LDMA_CH_MUXSEL_SOURCESEL_PROTIMER,
00384 #endif
00385 #if defined( LDMA_CH_MUXSEL_SIGSEL_PROTIMERWOF )
00386 dmadrvPeripheralSignal_PROTIMER_WOF = LDMA_CH_MUXSEL_SIGSEL_PROTIMERWOF | LDMA_CH_MUXSEL_SOURCESEL_PROTIMER,
00387 #endif
00388 #if defined( LDMA_CH_MUXSEL_SIGSEL_PRSREQ0 )
00389 dmadrvPeripheralSignal_PRS_REQ0 = LDMA_CH_MUXSEL_SIGSEL_PRSREQ0 | LDMA_CH_MUXSEL_SOURCESEL_PRS,
00390 #endif
00391 #if defined( LDMA_CH_MUXSEL_SIGSEL_PRSREQ1 )
00392 dmadrvPeripheralSignal_PRS_REQ1 = LDMA_CH_MUXSEL_SIGSEL_PRSREQ1 | LDMA_CH_MUXSEL_SOURCESEL_PRS,
00393 #endif
00394 #if defined( LDMA_CH_MUXSEL_SIGSEL_TIMER0CC0 )
00395 dmadrvPeripheralSignal_TIMER0_CC0 = LDMA_CH_MUXSEL_SIGSEL_TIMER0CC0 | LDMA_CH_MUXSEL_SOURCESEL_TIMER0,
00396 #endif
00397 #if defined( LDMA_CH_MUXSEL_SIGSEL_TIMER0CC1 )
00398 dmadrvPeripheralSignal_TIMER0_CC1 = LDMA_CH_MUXSEL_SIGSEL_TIMER0CC1 | LDMA_CH_MUXSEL_SOURCESEL_TIMER0,
00399 #endif
00400 #if defined( LDMA_CH_MUXSEL_SIGSEL_TIMER0CC2 )
00401 dmadrvPeripheralSignal_TIMER0_CC2 = LDMA_CH_MUXSEL_SIGSEL_TIMER0CC2 | LDMA_CH_MUXSEL_SOURCESEL_TIMER0,
00402 #endif
00403 #if defined( LDMA_CH_MUXSEL_SIGSEL_TIMER0UFOF )
00404 dmadrvPeripheralSignal_TIMER0_UFOF = LDMA_CH_MUXSEL_SIGSEL_TIMER0UFOF | LDMA_CH_MUXSEL_SOURCESEL_TIMER0,
00405 #endif
00406 #if defined( LDMA_CH_MUXSEL_SIGSEL_TIMER1CC0 )
00407 dmadrvPeripheralSignal_TIMER1_CC0 = LDMA_CH_MUXSEL_SIGSEL_TIMER1CC0 | LDMA_CH_MUXSEL_SOURCESEL_TIMER1,
00408 #endif
00409 #if defined( LDMA_CH_MUXSEL_SIGSEL_TIMER1CC1 )
00410 dmadrvPeripheralSignal_TIMER1_CC1 = LDMA_CH_MUXSEL_SIGSEL_TIMER1CC1 | LDMA_CH_MUXSEL_SOURCESEL_TIMER1,
00411 #endif
00412 #if defined( LDMA_CH_MUXSEL_SIGSEL_TIMER1CC2 )
00413 dmadrvPeripheralSignal_TIMER1_CC2 = LDMA_CH_MUXSEL_SIGSEL_TIMER1CC2 | LDMA_CH_MUXSEL_SOURCESEL_TIMER1,
00414 #endif
00415 #if defined( LDMA_CH_MUXSEL_SIGSEL_TIMER1CC3 )
00416 dmadrvPeripheralSignal_TIMER1_CC3 = LDMA_CH_MUXSEL_SIGSEL_TIMER1CC3 | LDMA_CH_MUXSEL_SOURCESEL_TIMER1,
00417 #endif
00418 #if defined( LDMA_CH_MUXSEL_SIGSEL_TIMER1UFOF )
00419 dmadrvPeripheralSignal_TIMER1_UFOF = LDMA_CH_MUXSEL_SIGSEL_TIMER1UFOF | LDMA_CH_MUXSEL_SOURCESEL_TIMER1,
00420 #endif
00421 #if defined( LDMA_CH_MUXSEL_SIGSEL_USART0RXDATAV )
00422 dmadrvPeripheralSignal_USART0_RXDATAV = LDMA_CH_MUXSEL_SIGSEL_USART0RXDATAV | LDMA_CH_MUXSEL_SOURCESEL_USART0,
00423 #endif
00424 #if defined( LDMA_CH_MUXSEL_SIGSEL_USART0TXBL )
00425 dmadrvPeripheralSignal_USART0_TXBL = LDMA_CH_MUXSEL_SIGSEL_USART0TXBL | LDMA_CH_MUXSEL_SOURCESEL_USART0,
00426 #endif
00427 #if defined( LDMA_CH_MUXSEL_SIGSEL_USART0TXEMPTY )
00428 dmadrvPeripheralSignal_USART0_TXEMPTY = LDMA_CH_MUXSEL_SIGSEL_USART0TXEMPTY | LDMA_CH_MUXSEL_SOURCESEL_USART0,
00429 #endif
00430 #if defined( LDMA_CH_MUXSEL_SIGSEL_USART1RXDATAV )
00431 dmadrvPeripheralSignal_USART1_RXDATAV = LDMA_CH_MUXSEL_SIGSEL_USART1RXDATAV | LDMA_CH_MUXSEL_SOURCESEL_USART1,
00432 #endif
00433 #if defined( LDMA_CH_MUXSEL_SIGSEL_USART1RXDATAVRIGHT )
00434 dmadrvPeripheralSignal_USART1_RXDATAVRIGHT = LDMA_CH_MUXSEL_SIGSEL_USART1RXDATAVRIGHT | LDMA_CH_MUXSEL_SOURCESEL_USART1,
00435 #endif
00436 #if defined( LDMA_CH_MUXSEL_SIGSEL_USART1TXBL )
00437 dmadrvPeripheralSignal_USART1_TXBL = LDMA_CH_MUXSEL_SIGSEL_USART1TXBL | LDMA_CH_MUXSEL_SOURCESEL_USART1,
00438 #endif
00439 #if defined( LDMA_CH_MUXSEL_SIGSEL_USART1TXBLRIGHT )
00440 dmadrvPeripheralSignal_USART1_TXBLRIGHT = LDMA_CH_MUXSEL_SIGSEL_USART1TXBLRIGHT | LDMA_CH_MUXSEL_SOURCESEL_USART1,
00441 #endif
00442 #if defined( LDMA_CH_MUXSEL_SIGSEL_USART1TXEMPTY )
00443 dmadrvPeripheralSignal_USART1_TXEMPTY = LDMA_CH_MUXSEL_SIGSEL_USART1TXEMPTY | LDMA_CH_MUXSEL_SOURCESEL_USART1
00444 #endif
00445 } DMADRV_PeripheralSignal_t;
00446
00448 typedef enum
00449 {
00450 dmadrvDataSize1 = ldmaCtrlSizeByte,
00451 dmadrvDataSize2 = ldmaCtrlSizeHalf,
00452 dmadrvDataSize4 = ldmaCtrlSizeWord
00453 } DMADRV_DataSize_t;
00454
00455 #endif
00456
00457 Ecode_t DMADRV_AllocateChannel( unsigned int *channelId, void *capabilities );
00458 Ecode_t DMADRV_DeInit( void );
00459 Ecode_t DMADRV_FreeChannel( unsigned int channelId );
00460 Ecode_t DMADRV_Init( void );
00461
00462 #if !defined( EMDRV_DMADRV_USE_NATIVE_API ) || defined( DOXY_DOC_ONLY )
00463 Ecode_t DMADRV_MemoryPeripheral( unsigned int channelId,
00464 DMADRV_PeripheralSignal_t
00465 peripheralSignal,
00466 void *dst,
00467 void *src,
00468 bool srcInc,
00469 int len,
00470 DMADRV_DataSize_t size,
00471 DMADRV_Callback_t callback,
00472 void *cbUserParam );
00473 Ecode_t DMADRV_PeripheralMemory( unsigned int channelId,
00474 DMADRV_PeripheralSignal_t
00475 peripheralSignal,
00476 void *dst,
00477 void *src,
00478 bool dstInc,
00479 int len,
00480 DMADRV_DataSize_t size,
00481 DMADRV_Callback_t callback,
00482 void *cbUserParam );
00483 Ecode_t DMADRV_MemoryPeripheralPingPong(
00484 unsigned int channelId,
00485 DMADRV_PeripheralSignal_t
00486 peripheralSignal,
00487 void *dst,
00488 void *src0,
00489 void *src1,
00490 bool srcInc,
00491 int len,
00492 DMADRV_DataSize_t size,
00493 DMADRV_Callback_t callback,
00494 void *cbUserParam );
00495 Ecode_t DMADRV_PeripheralMemoryPingPong(
00496 unsigned int channelId,
00497 DMADRV_PeripheralSignal_t
00498 peripheralSignal,
00499 void *dst0,
00500 void *dst1,
00501 void *src,
00502 bool dstInc,
00503 int len,
00504 DMADRV_DataSize_t size,
00505 DMADRV_Callback_t callback,
00506 void *cbUserParam );
00507 #endif
00508
00509 #if defined( EMDRV_DMADRV_LDMA ) && defined( EMDRV_DMADRV_USE_NATIVE_API )
00510
00511 Ecode_t DMADRV_LdmaStartTransfer(
00512 int channelId,
00513 LDMA_TransferCfg_t *transfer,
00514 LDMA_Descriptor_t *descriptor,
00515 DMADRV_Callback_t callback,
00516 void *cbUserParam );
00517
00518 #endif
00519
00520 Ecode_t DMADRV_StopTransfer( unsigned int channelId );
00521 Ecode_t DMADRV_TransferActive( unsigned int channelId, bool *active );
00522 Ecode_t DMADRV_TransferCompletePending( unsigned int channelId, bool *pending );
00523 Ecode_t DMADRV_TransferDone( unsigned int channelId, bool *done );
00524 Ecode_t DMADRV_TransferRemainingCount( unsigned int channelId,
00525 int *remaining );
00526
00530 #ifdef __cplusplus
00531 }
00532 #endif
00533
00534 #endif