release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32G/Include/efm32g800f128.h

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00001 /**************************************************************************/
00034 #ifndef __SILICON_LABS_EFM32G800F128_H__
00035 #define __SILICON_LABS_EFM32G800F128_H__
00036 
00037 #ifdef __cplusplus
00038 extern "C" {
00039 #endif
00040 
00041 /**************************************************************************/
00046 /**************************************************************************/
00052 typedef enum IRQn
00053 {
00054 /******  Cortex-M3 Processor Exceptions Numbers *******************************************/
00055   NonMaskableInt_IRQn   = -14,              
00056   HardFault_IRQn        = -13,              
00057   MemoryManagement_IRQn = -12,              
00058   BusFault_IRQn         = -11,              
00059   UsageFault_IRQn       = -10,              
00060   SVCall_IRQn           = -5,               
00061   DebugMonitor_IRQn     = -4,               
00062   PendSV_IRQn           = -2,               
00063   SysTick_IRQn          = -1,               
00065 /******  EFM32G Peripheral Interrupt Numbers **********************************************/
00066   DMA_IRQn              = 0,  
00067   GPIO_EVEN_IRQn        = 1,  
00068   TIMER0_IRQn           = 2,  
00069   USART0_RX_IRQn        = 3,  
00070   USART0_TX_IRQn        = 4,  
00071   ACMP0_IRQn            = 5,  
00072   ADC0_IRQn             = 6,  
00073   DAC0_IRQn             = 7,  
00074   I2C0_IRQn             = 8,  
00075   GPIO_ODD_IRQn         = 9,  
00076   TIMER1_IRQn           = 10, 
00077   TIMER2_IRQn           = 11, 
00078   USART1_RX_IRQn        = 12, 
00079   USART1_TX_IRQn        = 13, 
00080   USART2_RX_IRQn        = 14, 
00081   USART2_TX_IRQn        = 15, 
00082   UART0_RX_IRQn         = 16, 
00083   UART0_TX_IRQn         = 17, 
00084   LEUART0_IRQn          = 18, 
00085   LEUART1_IRQn          = 19, 
00086   LETIMER0_IRQn         = 20, 
00087   PCNT0_IRQn            = 21, 
00088   PCNT1_IRQn            = 22, 
00089   PCNT2_IRQn            = 23, 
00090   RTC_IRQn              = 24, 
00091   CMU_IRQn              = 25, 
00092   VCMP_IRQn             = 26, 
00093   LCD_IRQn              = 27, 
00094   MSC_IRQn              = 28, 
00095   AES_IRQn              = 29, 
00096 } IRQn_Type;
00097 
00098 /**************************************************************************/
00103 #define __MPU_PRESENT             1 
00104 #define __NVIC_PRIO_BITS          3 
00105 #define __Vendor_SysTickConfig    0 
00109 /**************************************************************************/
00115 #define _EFM32_GECKO_FAMILY             1 
00116 #define _EFM_DEVICE                       
00117 #define _SILICON_LABS_32B_PLATFORM_1      
00118 #define _SILICON_LABS_32B_PLATFORM      1 
00120 /* If part number is not defined as compiler option, define it */
00121 #if !defined(EFM32G800F128)
00122 #define EFM32G800F128    1 
00123 #endif
00124 
00126 #define PART_NUMBER          "EFM32G800F128" 
00129 #define FLASH_MEM_BASE       ((uint32_t) 0x0UL)        
00130 #define FLASH_MEM_SIZE       ((uint32_t) 0x10000000UL) 
00131 #define FLASH_MEM_END        ((uint32_t) 0xFFFFFFFUL)  
00132 #define FLASH_MEM_BITS       ((uint32_t) 0x28UL)       
00133 #define AES_MEM_BASE         ((uint32_t) 0x400E0000UL) 
00134 #define AES_MEM_SIZE         ((uint32_t) 0x400UL)      
00135 #define AES_MEM_END          ((uint32_t) 0x400E03FFUL) 
00136 #define AES_MEM_BITS         ((uint32_t) 0x10UL)       
00137 #define PER_MEM_BASE         ((uint32_t) 0x40000000UL) 
00138 #define PER_MEM_SIZE         ((uint32_t) 0xE0000UL)    
00139 #define PER_MEM_END          ((uint32_t) 0x400DFFFFUL) 
00140 #define PER_MEM_BITS         ((uint32_t) 0x20UL)       
00141 #define RAM_MEM_BASE         ((uint32_t) 0x20000000UL) 
00142 #define RAM_MEM_SIZE         ((uint32_t) 0x8000UL)     
00143 #define RAM_MEM_END          ((uint32_t) 0x20007FFFUL) 
00144 #define RAM_MEM_BITS         ((uint32_t) 0x15UL)       
00145 #define RAM_CODE_MEM_BASE    ((uint32_t) 0x10000000UL) 
00146 #define RAM_CODE_MEM_SIZE    ((uint32_t) 0x4000UL)     
00147 #define RAM_CODE_MEM_END     ((uint32_t) 0x10003FFFUL) 
00148 #define RAM_CODE_MEM_BITS    ((uint32_t) 0x14UL)       
00149 #define EBI_MEM_BASE         ((uint32_t) 0x80000000UL) 
00150 #define EBI_MEM_SIZE         ((uint32_t) 0x10000000UL) 
00151 #define EBI_MEM_END          ((uint32_t) 0x8FFFFFFFUL) 
00152 #define EBI_MEM_BITS         ((uint32_t) 0x28UL)       
00155 #define BITBAND_PER_BASE     ((uint32_t) 0x42000000UL) 
00156 #define BITBAND_RAM_BASE     ((uint32_t) 0x22000000UL) 
00159 #define FLASH_BASE           (0x00000000UL) 
00160 #define FLASH_SIZE           (0x00020000UL) 
00161 #define FLASH_PAGE_SIZE      512            
00162 #define SRAM_BASE            (0x20000000UL) 
00163 #define SRAM_SIZE            (0x00004000UL) 
00164 #define __CM3_REV            0x200          
00165 #define PRS_CHAN_COUNT       8              
00166 #define DMA_CHAN_COUNT       8              
00169 #define AFCHAN_MAX           79
00170 #define AFCHANLOC_MAX        4
00171 
00172 #define AFACHAN_MAX          37
00173 
00174 /* Part number capabilities */
00175 
00176 #define TIMER_PRESENT         
00177 #define TIMER_COUNT         3 
00178 #define USART_PRESENT         
00179 #define USART_COUNT         3 
00180 #define UART_PRESENT          
00181 #define UART_COUNT          1 
00182 #define LEUART_PRESENT        
00183 #define LEUART_COUNT        2 
00184 #define LETIMER_PRESENT       
00185 #define LETIMER_COUNT       1 
00186 #define PCNT_PRESENT          
00187 #define PCNT_COUNT          3 
00188 #define ACMP_PRESENT          
00189 #define ACMP_COUNT          2 
00190 #define DAC_PRESENT           
00191 #define DAC_COUNT           1 
00192 #define ADC_PRESENT           
00193 #define ADC_COUNT           1 
00194 #define I2C_PRESENT           
00195 #define I2C_COUNT           1 
00196 #define AES_PRESENT
00197 #define AES_COUNT           1
00198 #define DMA_PRESENT
00199 #define DMA_COUNT           1
00200 #define LE_PRESENT
00201 #define LE_COUNT            1
00202 #define MSC_PRESENT
00203 #define MSC_COUNT           1
00204 #define EMU_PRESENT
00205 #define EMU_COUNT           1
00206 #define RMU_PRESENT
00207 #define RMU_COUNT           1
00208 #define CMU_PRESENT
00209 #define CMU_COUNT           1
00210 #define EBI_PRESENT
00211 #define EBI_COUNT           1
00212 #define RTC_PRESENT
00213 #define RTC_COUNT           1
00214 #define PRS_PRESENT
00215 #define PRS_COUNT           1
00216 #define GPIO_PRESENT
00217 #define GPIO_COUNT          1
00218 #define VCMP_PRESENT
00219 #define VCMP_COUNT          1
00220 #define LCD_PRESENT
00221 #define LCD_COUNT           1
00222 #define HFXTAL_PRESENT
00223 #define HFXTAL_COUNT        1
00224 #define LFXTAL_PRESENT
00225 #define LFXTAL_COUNT        1
00226 #define WDOG_PRESENT
00227 #define WDOG_COUNT          1
00228 #define DBG_PRESENT
00229 #define DBG_COUNT           1
00230 #define BOOTLOADER_PRESENT
00231 #define BOOTLOADER_COUNT    1
00232 #define ANALOG_PRESENT
00233 #define ANALOG_COUNT        1
00234 
00235 #include "core_cm3.h"      /* Cortex-M3 processor and core peripherals */
00236 #include "system_efm32g.h" /* System Header */
00237 
00240 /**************************************************************************/
00246 #include "efm32g_aes.h"
00247 #include "efm32g_dma_ch.h"
00248 #include "efm32g_dma.h"
00249 #include "efm32g_msc.h"
00250 #include "efm32g_emu.h"
00251 #include "efm32g_rmu.h"
00252 #include "efm32g_cmu.h"
00253 #include "efm32g_ebi.h"
00254 #include "efm32g_timer_cc.h"
00255 #include "efm32g_timer.h"
00256 #include "efm32g_usart.h"
00257 #include "efm32g_leuart.h"
00258 #include "efm32g_rtc.h"
00259 #include "efm32g_letimer.h"
00260 #include "efm32g_pcnt.h"
00261 #include "efm32g_acmp.h"
00262 #include "efm32g_prs_ch.h"
00263 #include "efm32g_prs.h"
00264 #include "efm32g_dac.h"
00265 #include "efm32g_gpio_p.h"
00266 #include "efm32g_gpio.h"
00267 #include "efm32g_vcmp.h"
00268 #include "efm32g_adc.h"
00269 #include "efm32g_i2c.h"
00270 #include "efm32g_lcd.h"
00271 #include "efm32g_wdog.h"
00272 #include "efm32g_dma_descriptor.h"
00273 #include "efm32g_devinfo.h"
00274 #include "efm32g_romtable.h"
00275 #include "efm32g_calibrate.h"
00276 
00279 /**************************************************************************/
00284 #define AES_BASE          (0x400E0000UL) 
00285 #define DMA_BASE          (0x400C2000UL) 
00286 #define MSC_BASE          (0x400C0000UL) 
00287 #define EMU_BASE          (0x400C6000UL) 
00288 #define RMU_BASE          (0x400CA000UL) 
00289 #define CMU_BASE          (0x400C8000UL) 
00290 #define EBI_BASE          (0x40008000UL) 
00291 #define TIMER0_BASE       (0x40010000UL) 
00292 #define TIMER1_BASE       (0x40010400UL) 
00293 #define TIMER2_BASE       (0x40010800UL) 
00294 #define USART0_BASE       (0x4000C000UL) 
00295 #define USART1_BASE       (0x4000C400UL) 
00296 #define USART2_BASE       (0x4000C800UL) 
00297 #define UART0_BASE        (0x4000E000UL) 
00298 #define LEUART0_BASE      (0x40084000UL) 
00299 #define LEUART1_BASE      (0x40084400UL) 
00300 #define RTC_BASE          (0x40080000UL) 
00301 #define LETIMER0_BASE     (0x40082000UL) 
00302 #define PCNT0_BASE        (0x40086000UL) 
00303 #define PCNT1_BASE        (0x40086400UL) 
00304 #define PCNT2_BASE        (0x40086800UL) 
00305 #define ACMP0_BASE        (0x40001000UL) 
00306 #define ACMP1_BASE        (0x40001400UL) 
00307 #define PRS_BASE          (0x400CC000UL) 
00308 #define DAC0_BASE         (0x40004000UL) 
00309 #define GPIO_BASE         (0x40006000UL) 
00310 #define VCMP_BASE         (0x40000000UL) 
00311 #define ADC0_BASE         (0x40002000UL) 
00312 #define I2C0_BASE         (0x4000A000UL) 
00313 #define LCD_BASE          (0x4008A000UL) 
00314 #define WDOG_BASE         (0x40088000UL) 
00315 #define CALIBRATE_BASE    (0x0FE08000UL) 
00316 #define DEVINFO_BASE      (0x0FE081B0UL) 
00317 #define ROMTABLE_BASE     (0xE00FFFD0UL) 
00318 #define LOCKBITS_BASE     (0x0FE04000UL) 
00319 #define USERDATA_BASE     (0x0FE00000UL) 
00323 /**************************************************************************/
00328 #define AES          ((AES_TypeDef *) AES_BASE)             
00329 #define DMA          ((DMA_TypeDef *) DMA_BASE)             
00330 #define MSC          ((MSC_TypeDef *) MSC_BASE)             
00331 #define EMU          ((EMU_TypeDef *) EMU_BASE)             
00332 #define RMU          ((RMU_TypeDef *) RMU_BASE)             
00333 #define CMU          ((CMU_TypeDef *) CMU_BASE)             
00334 #define EBI          ((EBI_TypeDef *) EBI_BASE)             
00335 #define TIMER0       ((TIMER_TypeDef *) TIMER0_BASE)        
00336 #define TIMER1       ((TIMER_TypeDef *) TIMER1_BASE)        
00337 #define TIMER2       ((TIMER_TypeDef *) TIMER2_BASE)        
00338 #define USART0       ((USART_TypeDef *) USART0_BASE)        
00339 #define USART1       ((USART_TypeDef *) USART1_BASE)        
00340 #define USART2       ((USART_TypeDef *) USART2_BASE)        
00341 #define UART0        ((USART_TypeDef *) UART0_BASE)         
00342 #define LEUART0      ((LEUART_TypeDef *) LEUART0_BASE)      
00343 #define LEUART1      ((LEUART_TypeDef *) LEUART1_BASE)      
00344 #define RTC          ((RTC_TypeDef *) RTC_BASE)             
00345 #define LETIMER0     ((LETIMER_TypeDef *) LETIMER0_BASE)    
00346 #define PCNT0        ((PCNT_TypeDef *) PCNT0_BASE)          
00347 #define PCNT1        ((PCNT_TypeDef *) PCNT1_BASE)          
00348 #define PCNT2        ((PCNT_TypeDef *) PCNT2_BASE)          
00349 #define ACMP0        ((ACMP_TypeDef *) ACMP0_BASE)          
00350 #define ACMP1        ((ACMP_TypeDef *) ACMP1_BASE)          
00351 #define PRS          ((PRS_TypeDef *) PRS_BASE)             
00352 #define DAC0         ((DAC_TypeDef *) DAC0_BASE)            
00353 #define GPIO         ((GPIO_TypeDef *) GPIO_BASE)           
00354 #define VCMP         ((VCMP_TypeDef *) VCMP_BASE)           
00355 #define ADC0         ((ADC_TypeDef *) ADC0_BASE)            
00356 #define I2C0         ((I2C_TypeDef *) I2C0_BASE)            
00357 #define LCD          ((LCD_TypeDef *) LCD_BASE)             
00358 #define WDOG         ((WDOG_TypeDef *) WDOG_BASE)           
00359 #define CALIBRATE    ((CALIBRATE_TypeDef *) CALIBRATE_BASE) 
00360 #define DEVINFO      ((DEVINFO_TypeDef *) DEVINFO_BASE)     
00361 #define ROMTABLE     ((ROMTABLE_TypeDef *) ROMTABLE_BASE)   
00365 /**************************************************************************/
00370 #include "efm32g_prs_signals.h"
00371 #include "efm32g_dmareq.h"
00372 #include "efm32g_dmactrl.h"
00373 #include "efm32g_uart.h"
00374 
00375 /**************************************************************************/
00379 #define MSC_UNLOCK_CODE      0x1B71 
00380 #define EMU_UNLOCK_CODE      0xADE8 
00381 #define CMU_UNLOCK_CODE      0x580E 
00382 #define TIMER_UNLOCK_CODE    0xCE80 
00383 #define GPIO_UNLOCK_CODE     0xA534 
00389 /**************************************************************************/
00394 #include "efm32g_af_ports.h"
00395 #include "efm32g_af_pins.h"
00396 
00399 /**************************************************************************/
00412 #define SET_BIT_FIELD(REG, MASK, VALUE, OFFSET) \
00413   REG = ((REG) &~(MASK)) | (((VALUE) << (OFFSET)) & (MASK));
00414 
00419 #ifdef __cplusplus
00420 }
00421 #endif
00422 #endif /* __SILICON_LABS_EFM32G800F128_H__ */