em_i2c.h
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00034 #ifndef __SILICON_LABS_EM_I2C_H_
00035 #define __SILICON_LABS_EM_I2C_H_
00036
00037 #include "em_device.h"
00038 #if defined(I2C_COUNT) && (I2C_COUNT > 0)
00039
00040 #include <stdbool.h>
00041
00042 #ifdef __cplusplus
00043 extern "C" {
00044 #endif
00045
00046
00051
00056
00057
00058
00059
00072 #if defined(_EFM32_GECKO_FAMILY) || defined(_EFM32_TINY_FAMILY) \
00073 || defined(_EFM32_ZERO_FAMILY) || defined(_EFM32_HAPPY_FAMILY)
00074 #define I2C_FREQ_STANDARD_MAX 93000
00075
00076 #elif defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
00077 #define I2C_FREQ_STANDARD_MAX 92000
00078
00079 #else
00080 #error "Unknown device family."
00081 #endif
00082
00093 #define I2C_FREQ_FAST_MAX 392157
00094
00095
00106 #define I2C_FREQ_FASTPLUS_MAX 987167
00107
00108
00118 #define I2C_FLAG_WRITE 0x0001
00119
00129 #define I2C_FLAG_READ 0x0002
00130
00142 #define I2C_FLAG_WRITE_READ 0x0004
00143
00153 #define I2C_FLAG_WRITE_WRITE 0x0008
00154
00156 #define I2C_FLAG_10BIT_ADDR 0x0010
00157
00158
00159
00160
00161
00162
00164 typedef enum
00165 {
00166 i2cClockHLRStandard = _I2C_CTRL_CLHR_STANDARD,
00167 i2cClockHLRAsymetric = _I2C_CTRL_CLHR_ASYMMETRIC,
00168 i2cClockHLRFast = _I2C_CTRL_CLHR_FAST
00169 } I2C_ClockHLR_TypeDef;
00170
00171
00173 typedef enum
00174 {
00175
00176 i2cTransferInProgress = 1,
00178
00179 i2cTransferDone = 0,
00181
00182 i2cTransferNack = -1,
00183 i2cTransferBusErr = -2,
00184 i2cTransferArbLost = -3,
00185 i2cTransferUsageFault = -4,
00186 i2cTransferSwFault = -5
00187 } I2C_TransferReturn_TypeDef;
00188
00189
00190
00191
00192
00193
00195 typedef struct
00196 {
00198 bool enable;
00199
00201 bool master;
00202
00208 uint32_t refFreq;
00209
00214 uint32_t freq;
00215
00217 I2C_ClockHLR_TypeDef clhr;
00218 } I2C_Init_TypeDef;
00219
00221 #define I2C_INIT_DEFAULT \
00222 { true, \
00223 true, \
00224 0, \
00225 I2C_FREQ_STANDARD_MAX, \
00226 \
00227 i2cClockHLRStandard \
00228 }
00229
00230
00245 typedef struct
00246 {
00255 uint16_t addr;
00256
00258 uint16_t flags;
00259
00264 struct
00265 {
00267 uint8_t *data;
00268
00276 uint16_t len;
00277 } buf[2];
00278 } I2C_TransferSeq_TypeDef;
00279
00280
00281
00282
00283
00284
00285 uint32_t I2C_BusFreqGet(I2C_TypeDef *i2c);
00286 void I2C_BusFreqSet(I2C_TypeDef *i2c,
00287 uint32_t refFreq,
00288 uint32_t freq,
00289 I2C_ClockHLR_TypeDef type);
00290 void I2C_Enable(I2C_TypeDef *i2c, bool enable);
00291 void I2C_Init(I2C_TypeDef *i2c, const I2C_Init_TypeDef *init);
00292
00293
00304 __STATIC_INLINE void I2C_IntClear(I2C_TypeDef *i2c, uint32_t flags)
00305 {
00306 i2c->IFC = flags;
00307 }
00308
00309
00310
00321 __STATIC_INLINE void I2C_IntDisable(I2C_TypeDef *i2c, uint32_t flags)
00322 {
00323 i2c->IEN &= ~(flags);
00324 }
00325
00326
00327
00343 __STATIC_INLINE void I2C_IntEnable(I2C_TypeDef *i2c, uint32_t flags)
00344 {
00345 i2c->IEN |= flags;
00346 }
00347
00348
00349
00363 __STATIC_INLINE uint32_t I2C_IntGet(I2C_TypeDef *i2c)
00364 {
00365 return(i2c->IF);
00366 }
00367
00368
00369
00380 __STATIC_INLINE void I2C_IntSet(I2C_TypeDef *i2c, uint32_t flags)
00381 {
00382 i2c->IFS = flags;
00383 }
00384
00385 void I2C_Reset(I2C_TypeDef *i2c);
00386
00387
00404 __STATIC_INLINE uint8_t I2C_SlaveAddressGet(I2C_TypeDef *i2c)
00405 {
00406 return((uint8_t)(i2c->SADDR));
00407 }
00408
00409
00410
00427 __STATIC_INLINE void I2C_SlaveAddressSet(I2C_TypeDef *i2c, uint8_t addr)
00428 {
00429 i2c->SADDR = (uint32_t)addr & 0xfe;
00430 }
00431
00432
00433
00456 __STATIC_INLINE uint8_t I2C_SlaveAddressMaskGet(I2C_TypeDef *i2c)
00457 {
00458 return((uint8_t)(i2c->SADDRMASK));
00459 }
00460
00461
00462
00485 __STATIC_INLINE void I2C_SlaveAddressMaskSet(I2C_TypeDef *i2c, uint8_t mask)
00486 {
00487 i2c->SADDRMASK = (uint32_t)mask & 0xfe;
00488 }
00489
00490
00491 I2C_TransferReturn_TypeDef I2C_Transfer(I2C_TypeDef *i2c);
00492 I2C_TransferReturn_TypeDef I2C_TransferInit(I2C_TypeDef *i2c,
00493 I2C_TransferSeq_TypeDef *seq);
00494
00498 #ifdef __cplusplus
00499 }
00500 #endif
00501
00502 #endif
00503 #endif