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Data Structures | |
struct | PRS_TypeDef |
Defines | |
#define | _PRS_SWPULSE_RESETVALUE 0x00000000UL |
#define | _PRS_SWPULSE_MASK 0x000000FFUL |
#define | PRS_SWPULSE_CH0PULSE (0x1UL << 0) |
#define | _PRS_SWPULSE_CH0PULSE_SHIFT 0 |
#define | _PRS_SWPULSE_CH0PULSE_MASK 0x1UL |
#define | _PRS_SWPULSE_CH0PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH0PULSE_DEFAULT (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0) |
#define | PRS_SWPULSE_CH1PULSE (0x1UL << 1) |
#define | _PRS_SWPULSE_CH1PULSE_SHIFT 1 |
#define | _PRS_SWPULSE_CH1PULSE_MASK 0x2UL |
#define | _PRS_SWPULSE_CH1PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH1PULSE_DEFAULT (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1) |
#define | PRS_SWPULSE_CH2PULSE (0x1UL << 2) |
#define | _PRS_SWPULSE_CH2PULSE_SHIFT 2 |
#define | _PRS_SWPULSE_CH2PULSE_MASK 0x4UL |
#define | _PRS_SWPULSE_CH2PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH2PULSE_DEFAULT (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2) |
#define | PRS_SWPULSE_CH3PULSE (0x1UL << 3) |
#define | _PRS_SWPULSE_CH3PULSE_SHIFT 3 |
#define | _PRS_SWPULSE_CH3PULSE_MASK 0x8UL |
#define | _PRS_SWPULSE_CH3PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH3PULSE_DEFAULT (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3) |
#define | PRS_SWPULSE_CH4PULSE (0x1UL << 4) |
#define | _PRS_SWPULSE_CH4PULSE_SHIFT 4 |
#define | _PRS_SWPULSE_CH4PULSE_MASK 0x10UL |
#define | _PRS_SWPULSE_CH4PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH4PULSE_DEFAULT (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4) |
#define | PRS_SWPULSE_CH5PULSE (0x1UL << 5) |
#define | _PRS_SWPULSE_CH5PULSE_SHIFT 5 |
#define | _PRS_SWPULSE_CH5PULSE_MASK 0x20UL |
#define | _PRS_SWPULSE_CH5PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH5PULSE_DEFAULT (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5) |
#define | PRS_SWPULSE_CH6PULSE (0x1UL << 6) |
#define | _PRS_SWPULSE_CH6PULSE_SHIFT 6 |
#define | _PRS_SWPULSE_CH6PULSE_MASK 0x40UL |
#define | _PRS_SWPULSE_CH6PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH6PULSE_DEFAULT (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6) |
#define | PRS_SWPULSE_CH7PULSE (0x1UL << 7) |
#define | _PRS_SWPULSE_CH7PULSE_SHIFT 7 |
#define | _PRS_SWPULSE_CH7PULSE_MASK 0x80UL |
#define | _PRS_SWPULSE_CH7PULSE_DEFAULT 0x00000000UL |
#define | PRS_SWPULSE_CH7PULSE_DEFAULT (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7) |
#define | _PRS_SWLEVEL_RESETVALUE 0x00000000UL |
#define | _PRS_SWLEVEL_MASK 0x000000FFUL |
#define | PRS_SWLEVEL_CH0LEVEL (0x1UL << 0) |
#define | _PRS_SWLEVEL_CH0LEVEL_SHIFT 0 |
#define | _PRS_SWLEVEL_CH0LEVEL_MASK 0x1UL |
#define | _PRS_SWLEVEL_CH0LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH0LEVEL_DEFAULT (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0) |
#define | PRS_SWLEVEL_CH1LEVEL (0x1UL << 1) |
#define | _PRS_SWLEVEL_CH1LEVEL_SHIFT 1 |
#define | _PRS_SWLEVEL_CH1LEVEL_MASK 0x2UL |
#define | _PRS_SWLEVEL_CH1LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH1LEVEL_DEFAULT (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1) |
#define | PRS_SWLEVEL_CH2LEVEL (0x1UL << 2) |
#define | _PRS_SWLEVEL_CH2LEVEL_SHIFT 2 |
#define | _PRS_SWLEVEL_CH2LEVEL_MASK 0x4UL |
#define | _PRS_SWLEVEL_CH2LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH2LEVEL_DEFAULT (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2) |
#define | PRS_SWLEVEL_CH3LEVEL (0x1UL << 3) |
#define | _PRS_SWLEVEL_CH3LEVEL_SHIFT 3 |
#define | _PRS_SWLEVEL_CH3LEVEL_MASK 0x8UL |
#define | _PRS_SWLEVEL_CH3LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH3LEVEL_DEFAULT (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3) |
#define | PRS_SWLEVEL_CH4LEVEL (0x1UL << 4) |
#define | _PRS_SWLEVEL_CH4LEVEL_SHIFT 4 |
#define | _PRS_SWLEVEL_CH4LEVEL_MASK 0x10UL |
#define | _PRS_SWLEVEL_CH4LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH4LEVEL_DEFAULT (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4) |
#define | PRS_SWLEVEL_CH5LEVEL (0x1UL << 5) |
#define | _PRS_SWLEVEL_CH5LEVEL_SHIFT 5 |
#define | _PRS_SWLEVEL_CH5LEVEL_MASK 0x20UL |
#define | _PRS_SWLEVEL_CH5LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH5LEVEL_DEFAULT (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5) |
#define | PRS_SWLEVEL_CH6LEVEL (0x1UL << 6) |
#define | _PRS_SWLEVEL_CH6LEVEL_SHIFT 6 |
#define | _PRS_SWLEVEL_CH6LEVEL_MASK 0x40UL |
#define | _PRS_SWLEVEL_CH6LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH6LEVEL_DEFAULT (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6) |
#define | PRS_SWLEVEL_CH7LEVEL (0x1UL << 7) |
#define | _PRS_SWLEVEL_CH7LEVEL_SHIFT 7 |
#define | _PRS_SWLEVEL_CH7LEVEL_MASK 0x80UL |
#define | _PRS_SWLEVEL_CH7LEVEL_DEFAULT 0x00000000UL |
#define | PRS_SWLEVEL_CH7LEVEL_DEFAULT (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7) |
#define | _PRS_CH_CTRL_RESETVALUE 0x00000000UL |
#define | _PRS_CH_CTRL_MASK 0x033F0007UL |
#define | _PRS_CH_CTRL_SIGSEL_SHIFT 0 |
#define | _PRS_CH_CTRL_SIGSEL_MASK 0x7UL |
#define | _PRS_CH_CTRL_SIGSEL_VCMPOUT 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_ACMP0OUT 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_ACMP1OUT 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_DAC0CH0 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_ADC0SINGLE 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_USART0IRTX 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER0UF 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER1UF 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER2UF 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_RTCOF 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN0 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN8 0x00000000UL |
#define | _PRS_CH_CTRL_SIGSEL_DAC0CH1 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_ADC0SCAN 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_USART0TXC 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_USART1TXC 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_USART2TXC 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER0OF 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER1OF 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER2OF 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_RTCCOMP0 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_UART0TXC 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN1 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN9 0x00000001UL |
#define | _PRS_CH_CTRL_SIGSEL_USART0RXDATAV 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_USART1RXDATAV 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_USART2RXDATAV 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER0CC0 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER1CC0 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER2CC0 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_RTCCOMP1 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_UART0RXDATAV 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN2 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN10 0x00000002UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER0CC1 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER1CC1 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER2CC1 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN3 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN11 0x00000003UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER0CC2 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER1CC2 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_TIMER2CC2 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN4 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN12 0x00000004UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN5 0x00000005UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN13 0x00000005UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN6 0x00000006UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN14 0x00000006UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN7 0x00000007UL |
#define | _PRS_CH_CTRL_SIGSEL_GPIOPIN15 0x00000007UL |
#define | PRS_CH_CTRL_SIGSEL_VCMPOUT (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0) |
#define | PRS_CH_CTRL_SIGSEL_ACMP0OUT (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0) |
#define | PRS_CH_CTRL_SIGSEL_ACMP1OUT (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0) |
#define | PRS_CH_CTRL_SIGSEL_DAC0CH0 (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_ADC0SINGLE (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART0IRTX (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER0UF (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER1UF (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER2UF (_PRS_CH_CTRL_SIGSEL_TIMER2UF << 0) |
#define | PRS_CH_CTRL_SIGSEL_RTCOF (_PRS_CH_CTRL_SIGSEL_RTCOF << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN0 (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN8 (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0) |
#define | PRS_CH_CTRL_SIGSEL_DAC0CH1 (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_ADC0SCAN (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART0TXC (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART1TXC (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART2TXC (_PRS_CH_CTRL_SIGSEL_USART2TXC << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER0OF (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER1OF (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER2OF (_PRS_CH_CTRL_SIGSEL_TIMER2OF << 0) |
#define | PRS_CH_CTRL_SIGSEL_RTCCOMP0 (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_UART0TXC (_PRS_CH_CTRL_SIGSEL_UART0TXC << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN1 (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN9 (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART0RXDATAV (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART1RXDATAV (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0) |
#define | PRS_CH_CTRL_SIGSEL_USART2RXDATAV (_PRS_CH_CTRL_SIGSEL_USART2RXDATAV << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER0CC0 (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER1CC0 (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER2CC0 (_PRS_CH_CTRL_SIGSEL_TIMER2CC0 << 0) |
#define | PRS_CH_CTRL_SIGSEL_RTCCOMP1 (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_UART0RXDATAV (_PRS_CH_CTRL_SIGSEL_UART0RXDATAV << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN2 (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN10 (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER0CC1 (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER1CC1 (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER2CC1 (_PRS_CH_CTRL_SIGSEL_TIMER2CC1 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN3 (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN11 (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER0CC2 (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER1CC2 (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0) |
#define | PRS_CH_CTRL_SIGSEL_TIMER2CC2 (_PRS_CH_CTRL_SIGSEL_TIMER2CC2 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN4 (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN12 (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN5 (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN13 (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN6 (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN14 (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN7 (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0) |
#define | PRS_CH_CTRL_SIGSEL_GPIOPIN15 (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0) |
#define | _PRS_CH_CTRL_SOURCESEL_SHIFT 16 |
#define | _PRS_CH_CTRL_SOURCESEL_MASK 0x3F0000UL |
#define | _PRS_CH_CTRL_SOURCESEL_NONE 0x00000000UL |
#define | _PRS_CH_CTRL_SOURCESEL_VCMP 0x00000001UL |
#define | _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL |
#define | _PRS_CH_CTRL_SOURCESEL_ACMP1 0x00000003UL |
#define | _PRS_CH_CTRL_SOURCESEL_DAC0 0x00000006UL |
#define | _PRS_CH_CTRL_SOURCESEL_ADC0 0x00000008UL |
#define | _PRS_CH_CTRL_SOURCESEL_USART0 0x00000010UL |
#define | _PRS_CH_CTRL_SOURCESEL_USART1 0x00000011UL |
#define | _PRS_CH_CTRL_SOURCESEL_USART2 0x00000012UL |
#define | _PRS_CH_CTRL_SOURCESEL_TIMER0 0x0000001CUL |
#define | _PRS_CH_CTRL_SOURCESEL_TIMER1 0x0000001DUL |
#define | _PRS_CH_CTRL_SOURCESEL_TIMER2 0x0000001EUL |
#define | _PRS_CH_CTRL_SOURCESEL_RTC 0x00000028UL |
#define | _PRS_CH_CTRL_SOURCESEL_UART0 0x00000029UL |
#define | _PRS_CH_CTRL_SOURCESEL_GPIOL 0x00000030UL |
#define | _PRS_CH_CTRL_SOURCESEL_GPIOH 0x00000031UL |
#define | PRS_CH_CTRL_SOURCESEL_NONE (_PRS_CH_CTRL_SOURCESEL_NONE << 16) |
#define | PRS_CH_CTRL_SOURCESEL_VCMP (_PRS_CH_CTRL_SOURCESEL_VCMP << 16) |
#define | PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_ACMP1 (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_DAC0 (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_ADC0 (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_USART0 (_PRS_CH_CTRL_SOURCESEL_USART0 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_USART1 (_PRS_CH_CTRL_SOURCESEL_USART1 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_USART2 (_PRS_CH_CTRL_SOURCESEL_USART2 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_TIMER0 (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_TIMER1 (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_TIMER2 (_PRS_CH_CTRL_SOURCESEL_TIMER2 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_RTC (_PRS_CH_CTRL_SOURCESEL_RTC << 16) |
#define | PRS_CH_CTRL_SOURCESEL_UART0 (_PRS_CH_CTRL_SOURCESEL_UART0 << 16) |
#define | PRS_CH_CTRL_SOURCESEL_GPIOL (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16) |
#define | PRS_CH_CTRL_SOURCESEL_GPIOH (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16) |
#define | _PRS_CH_CTRL_EDSEL_SHIFT 24 |
#define | _PRS_CH_CTRL_EDSEL_MASK 0x3000000UL |
#define | _PRS_CH_CTRL_EDSEL_DEFAULT 0x00000000UL |
#define | _PRS_CH_CTRL_EDSEL_OFF 0x00000000UL |
#define | _PRS_CH_CTRL_EDSEL_POSEDGE 0x00000001UL |
#define | _PRS_CH_CTRL_EDSEL_NEGEDGE 0x00000002UL |
#define | _PRS_CH_CTRL_EDSEL_BOTHEDGES 0x00000003UL |
#define | PRS_CH_CTRL_EDSEL_DEFAULT (_PRS_CH_CTRL_EDSEL_DEFAULT << 24) |
#define | PRS_CH_CTRL_EDSEL_OFF (_PRS_CH_CTRL_EDSEL_OFF << 24) |
#define | PRS_CH_CTRL_EDSEL_POSEDGE (_PRS_CH_CTRL_EDSEL_POSEDGE << 24) |
#define | PRS_CH_CTRL_EDSEL_NEGEDGE (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24) |
#define | PRS_CH_CTRL_EDSEL_BOTHEDGES (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24) |
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1. The origin of this software must not be misrepresented; you must not claim that you wrote the original software.
2. Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
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Definition in file efm32g_prs.h.