EFM32 Gecko Software Documentation  efm32g-doc-4.2.1
em_usart.h
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1 /***************************************************************************/
35 #ifndef __SILICON_LABS_EM_USART_H__
36 #define __SILICON_LABS_EM_USART_H__
37 
38 #include "em_device.h"
39 #if defined(USART_COUNT) && (USART_COUNT > 0)
40 
41 #include <stdbool.h>
42 
43 #ifdef __cplusplus
44 extern "C" {
45 #endif
46 
47 /***************************************************************************/
52 /***************************************************************************/
58 /*******************************************************************************
59  ******************************** ENUMS ************************************
60  ******************************************************************************/
61 
63 typedef enum
64 {
79 
80 
82 typedef enum
83 {
85  usartDisable = 0x0,
86 
89 
92 
96 
97 
99 typedef enum
100 {
106 
107 
109 typedef enum
110 {
115 
116 
118 typedef enum
119 {
125 
126 
128 typedef enum
129 {
132 
135 
138 
142 
143 
145 typedef enum
146 {
149 
152 
155 
159 
160 
162 typedef enum
163 {
168 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH4)
170 #endif
171 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH5)
173 #endif
174 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH6)
176 #endif
177 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH7)
179 #endif
181 
182 #if defined(_USART_I2SCTRL_MASK)
183 
184 typedef enum
185 {
186  usartI2sFormatW32D32 = USART_I2SCTRL_FORMAT_W32D32,
187  usartI2sFormatW32D24M = USART_I2SCTRL_FORMAT_W32D24M,
188  usartI2sFormatW32D24 = USART_I2SCTRL_FORMAT_W32D24,
189  usartI2sFormatW32D16 = USART_I2SCTRL_FORMAT_W32D16,
190  usartI2sFormatW32D8 = USART_I2SCTRL_FORMAT_W32D8,
191  usartI2sFormatW16D16 = USART_I2SCTRL_FORMAT_W16D16,
192  usartI2sFormatW16D8 = USART_I2SCTRL_FORMAT_W16D8,
193  usartI2sFormatW8D8 = USART_I2SCTRL_FORMAT_W8D8
194 } USART_I2sFormat_TypeDef;
195 
197 typedef enum
198 {
199  usartI2sJustifyLeft = USART_I2SCTRL_JUSTIFY_LEFT,
200  usartI2sJustifyRight = USART_I2SCTRL_JUSTIFY_RIGHT
201 } USART_I2sJustify_TypeDef;
202 #endif
203 
204 #if defined(_USART_INPUT_MASK)
205 
206 typedef enum
207 {
208  usartPrsRxCh0 = USART_INPUT_RXPRSSEL_PRSCH0,
209  usartPrsRxCh1 = USART_INPUT_RXPRSSEL_PRSCH1,
210  usartPrsRxCh2 = USART_INPUT_RXPRSSEL_PRSCH2,
211  usartPrsRxCh3 = USART_INPUT_RXPRSSEL_PRSCH3,
213 #if defined(USART_INPUT_RXPRSSEL_PRSCH7)
214  usartPrsRxCh4 = USART_INPUT_RXPRSSEL_PRSCH4,
215  usartPrsRxCh5 = USART_INPUT_RXPRSSEL_PRSCH5,
216  usartPrsRxCh6 = USART_INPUT_RXPRSSEL_PRSCH6,
217  usartPrsRxCh7 = USART_INPUT_RXPRSSEL_PRSCH7,
218 #endif
219 
220 #if defined(USART_INPUT_RXPRSSEL_PRSCH11)
221  usartPrsRxCh8 = USART_INPUT_RXPRSSEL_PRSCH8,
222  usartPrsRxCh9 = USART_INPUT_RXPRSSEL_PRSCH9,
223  usartPrsRxCh10 = USART_INPUT_RXPRSSEL_PRSCH10,
224  usartPrsRxCh11 = USART_INPUT_RXPRSSEL_PRSCH11
225 #endif
226 } USART_PrsRxCh_TypeDef;
227 #endif
228 
230 typedef enum
231 {
237 #if defined(USART_TRIGCTRL_TSEL_PRSCH7)
242 #endif
244 
245 /*******************************************************************************
246  ******************************* STRUCTS ***********************************
247  ******************************************************************************/
248 
250 typedef struct
251 {
254 
259  uint32_t refFreq;
260 
262  uint32_t baudrate;
263 
266 
270 
273 
276 
277 #if defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
278 
279  bool mvdis;
280 
282  bool prsRxEnable;
283 
285  USART_PrsRxCh_TypeDef prsRxCh;
286 #endif
287 #if defined(_USART_TIMING_CSHOLD_MASK)
288 
289  bool autoCsEnable;
291  uint8_t autoCsHold;
293  uint8_t autoCsSetup;
294 #endif
296 
298 typedef struct
299 {
300 #if defined(USART_TRIGCTRL_AUTOTXTEN)
301 
302  bool autoTxTriggerEnable;
303 #endif
304 
311 
313 #if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
314 #define USART_INITASYNC_DEFAULT \
315 { \
316  usartEnable, /* Enable RX/TX when init completed. */ \
317  0, /* Use current configured reference clock for configuring baudrate. */ \
318  115200, /* 115200 bits/s. */ \
319  usartOVS16, /* 16x oversampling. */ \
320  usartDatabits8, /* 8 databits. */ \
321  usartNoParity, /* No parity. */ \
322  usartStopbits1, /* 1 stopbit. */ \
323  false, /* Do not disable majority vote. */ \
324  false, /* Not USART PRS input mode. */ \
325  usartPrsRxCh0, /* PRS channel 0. */ \
326  false, /* Auto CS functionality enable/disable switch */ \
327  0, /* Auto CS Hold cycles */ \
328  0 /* Auto CS Setup cycles */ \
329 }
330 #elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
331 #define USART_INITASYNC_DEFAULT \
332 { \
333  usartEnable, /* Enable RX/TX when init completed. */ \
334  0, /* Use current configured reference clock for configuring baudrate. */ \
335  115200, /* 115200 bits/s. */ \
336  usartOVS16, /* 16x oversampling. */ \
337  usartDatabits8, /* 8 databits. */ \
338  usartNoParity, /* No parity. */ \
339  usartStopbits1, /* 1 stopbit. */ \
340  false, /* Do not disable majority vote. */ \
341  false, /* Not USART PRS input mode. */ \
342  usartPrsRxCh0 /* PRS channel 0. */ \
343 }
344 #else
345 #define USART_INITASYNC_DEFAULT \
346 { \
347  usartEnable, /* Enable RX/TX when init completed. */ \
348  0, /* Use current configured reference clock for configuring baudrate. */ \
349  115200, /* 115200 bits/s. */ \
350  usartOVS16, /* 16x oversampling. */ \
351  usartDatabits8, /* 8 databits. */ \
352  usartNoParity, /* No parity. */ \
353  usartStopbits1 /* 1 stopbit. */ \
354 }
355 #endif
356 
358 #if defined(USART_TRIGCTRL_AUTOTXTEN)
359 #define USART_INITPRSTRIGGER_DEFAULT \
360 { \
361  false, /* Do not enable autoTX triggering. */ \
362  false, /* Do not enable receive triggering. */ \
363  false, /* Do not enable transmit triggering. */ \
364  usartPrsTriggerCh0 /* Set default channel to zero. */ \
365 }
366 #else
367 #define USART_INITPRSTRIGGER_DEFAULT \
368 { \
369  false, /* Do not enable receive triggering. */ \
370  false, /* Do not enable transmit triggering. */ \
371  usartPrsTriggerCh0 /* Set default channel to zero. */ \
372 }
373 #endif
374 
376 typedef struct
377 {
380 
385  uint32_t refFreq;
386 
388  uint32_t baudrate;
389 
392 
394  bool master;
395 
397  bool msbf;
398 
401 
402 #if defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)
403 
404  bool prsRxEnable;
405 
407  USART_PrsRxCh_TypeDef prsRxCh;
408 
411  bool autoTx;
412 #endif
413 #if defined(_USART_TIMING_CSHOLD_MASK)
414 
415  bool autoCsEnable;
417  uint8_t autoCsHold;
419  uint8_t autoCsSetup;
420 #endif
422 
424 #if defined(_USART_TIMING_CSHOLD_MASK)
425 #define USART_INITSYNC_DEFAULT \
426 { \
427  usartEnable, /* Enable RX/TX when init completed. */ \
428  0, /* Use current configured reference clock for configuring baudrate. */ \
429  1000000, /* 1 Mbits/s. */ \
430  usartDatabits8, /* 8 databits. */ \
431  true, /* Master mode. */ \
432  false, /* Send least significant bit first. */ \
433  usartClockMode0, /* Clock idle low, sample on rising edge. */ \
434  false, /* Not USART PRS input mode. */ \
435  usartPrsRxCh0, /* PRS channel 0. */ \
436  false, /* No AUTOTX mode. */ \
437  false, /* No AUTOCS mode */ \
438  0, /* Auto CS Hold cycles */ \
439  0 /* Auto CS Setup cycles */ \
440 }
441 #elif defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)
442 #define USART_INITSYNC_DEFAULT \
443 { \
444  usartEnable, /* Enable RX/TX when init completed. */ \
445  0, /* Use current configured reference clock for configuring baudrate. */ \
446  1000000, /* 1 Mbits/s. */ \
447  usartDatabits8, /* 8 databits. */ \
448  true, /* Master mode. */ \
449  false, /* Send least significant bit first. */ \
450  usartClockMode0, /* Clock idle low, sample on rising edge. */ \
451  false, /* Not USART PRS input mode. */ \
452  usartPrsRxCh0, /* PRS channel 0. */ \
453  false /* No AUTOTX mode. */ \
454 }
455 #else
456 #define USART_INITSYNC_DEFAULT \
457 { \
458  usartEnable, /* Enable RX/TX when init completed. */ \
459  0, /* Use current configured reference clock for configuring baudrate. */ \
460  1000000, /* 1 Mbits/s. */ \
461  usartDatabits8, /* 8 databits. */ \
462  true, /* Master mode. */ \
463  false, /* Send least significant bit first. */ \
464  usartClockMode0 /* Clock idle low, sample on rising edge. */ \
465 }
466 #endif
467 
468 
470 typedef struct
471 {
474 
476  bool irRxInv;
477 
479  bool irFilt;
480 
484 
487  bool irPrsEn;
488 
493 
494 
496 #define USART_INITIRDA_DEFAULT \
497 { \
498  { \
499  usartEnable, /* Enable RX/TX when init completed. */ \
500  0, /* Use current configured reference clock for configuring baudrate. */ \
501  115200, /* 115200 bits/s. */ \
502  usartOVS16, /* 16x oversampling. */ \
503  usartDatabits8, /* 8 databits. */ \
504  usartEvenParity, /* Even parity. */ \
505  usartStopbits1 /* 1 stopbit. */ \
506  }, \
507  false, /* Rx invert disabled. */ \
508  false, /* Filtering disabled. */ \
509  usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
510  false, /* Routing to PRS is disabled. */ \
511  usartIrDAPrsCh0 /* PRS channel 0. */ \
512 }
513 
514 
515 #if defined(_USART_I2SCTRL_MASK)
516 
517 typedef struct
518 {
521 
523  USART_I2sFormat_TypeDef format;
524 
528  bool delay;
529 
531  bool dmaSplit;
532 
534  USART_I2sJustify_TypeDef justify;
535 
537  bool mono;
538 } USART_InitI2s_TypeDef;
539 
540 
542 #define USART_INITI2S_DEFAULT \
543 { \
544  { \
545  usartEnableTx, /* Enable TX when init completed. */ \
546  0, /* Use current configured reference clock for configuring baudrate. */ \
547  1000000, /* Baudrate 1M bits/s. */ \
548  usartDatabits16, /* 16 databits. */ \
549  true, /* Operate as I2S master. */ \
550  true, /* Most significant bit first. */ \
551  usartClockMode0, /* Clock idle low, sample on rising edge. */ \
552  false, /* Don't enable USARTRx via PRS. */ \
553  usartPrsRxCh0, /* PRS channel selection (dummy). */ \
554  false /* Disable AUTOTX mode. */ \
555  }, \
556  usartI2sFormatW16D16, /* 16-bit word, 16-bit data */ \
557  true, /* Delay on I2S data. */ \
558  false, /* No DMA split. */ \
559  usartI2sJustifyLeft, /* Data is left-justified within the frame */ \
560  false /* Stereo mode. */ \
561 }
562 #endif
563 
564 /*******************************************************************************
565  ***************************** PROTOTYPES **********************************
566  ******************************************************************************/
567 
569  uint32_t refFreq,
570  uint32_t baudrate,
571  USART_OVS_TypeDef ovs);
572 uint32_t USART_BaudrateCalc(uint32_t refFreq,
573  uint32_t clkdiv,
574  bool syncmode,
575  USART_OVS_TypeDef ovs);
576 uint32_t USART_BaudrateGet(USART_TypeDef *usart);
578  uint32_t refFreq,
579  uint32_t baudrate);
580 void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable);
581 
582 void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init);
583 void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init);
584 #if defined(USART0) || ((USART_COUNT == 1) && defined(USART1))
585 void USART_InitIrDA(const USART_InitIrDA_TypeDef *init);
586 #endif
587 
588 #if defined(_USART_I2SCTRL_MASK)
589 void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init);
590 #endif
592 
593 
594 /***************************************************************************/
605 __STATIC_INLINE void USART_IntClear(USART_TypeDef *usart, uint32_t flags)
606 {
607  usart->IFC = flags;
608 }
609 
610 
611 /***************************************************************************/
622 __STATIC_INLINE void USART_IntDisable(USART_TypeDef *usart, uint32_t flags)
623 {
624  usart->IEN &= ~flags;
625 }
626 
627 
628 /***************************************************************************/
644 __STATIC_INLINE void USART_IntEnable(USART_TypeDef *usart, uint32_t flags)
645 {
646  usart->IEN |= flags;
647 }
648 
649 
650 /***************************************************************************/
664 __STATIC_INLINE uint32_t USART_IntGet(USART_TypeDef *usart)
665 {
666  return usart->IF;
667 }
668 
669 
670 /***************************************************************************/
689 __STATIC_INLINE uint32_t USART_IntGetEnabled(USART_TypeDef *usart)
690 {
691  uint32_t ien;
692 
693  /* Store USARTx->IEN in temporary variable in order to define explicit order
694  * of volatile accesses. */
695  ien = usart->IEN;
696 
697  /* Bitwise AND of pending and enabled interrupts */
698  return usart->IF & ien;
699 }
700 
701 
702 /***************************************************************************/
713 __STATIC_INLINE void USART_IntSet(USART_TypeDef *usart, uint32_t flags)
714 {
715  usart->IFS = flags;
716 }
717 
718 
719 /***************************************************************************/
730 __STATIC_INLINE uint32_t USART_StatusGet(USART_TypeDef *usart)
731 {
732  return usart->STATUS;
733 }
734 
735 void USART_Reset(USART_TypeDef *usart);
736 uint8_t USART_Rx(USART_TypeDef *usart);
737 uint16_t USART_RxDouble(USART_TypeDef *usart);
738 uint32_t USART_RxDoubleExt(USART_TypeDef *usart);
739 uint16_t USART_RxExt(USART_TypeDef *usart);
740 
741 
742 /***************************************************************************/
770 __STATIC_INLINE uint8_t USART_RxDataGet(USART_TypeDef *usart)
771 {
772  return (uint8_t)usart->RXDATA;
773 }
774 
775 
776 /***************************************************************************/
808 __STATIC_INLINE uint16_t USART_RxDoubleGet(USART_TypeDef *usart)
809 {
810  return (uint16_t)usart->RXDOUBLE;
811 }
812 
813 
814 /***************************************************************************/
844 __STATIC_INLINE uint32_t USART_RxDoubleXGet(USART_TypeDef *usart)
845 {
846  return usart->RXDOUBLEX;
847 }
848 
849 
850 /***************************************************************************/
879 __STATIC_INLINE uint16_t USART_RxDataXGet(USART_TypeDef *usart)
880 {
881  return (uint16_t)usart->RXDATAX;
882 }
883 
884 uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data);
885 void USART_Tx(USART_TypeDef *usart, uint8_t data);
886 void USART_TxDouble(USART_TypeDef *usart, uint16_t data);
887 void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data);
888 void USART_TxExt(USART_TypeDef *usart, uint16_t data);
889 
890 
894 #ifdef __cplusplus
895 }
896 #endif
897 
898 #endif /* defined(USART_COUNT) && (USART_COUNT > 0) */
899 #endif /* __SILICON_LABS_EM_USART_H__ */
#define USART_TRIGCTRL_TSEL_PRSCH1
Definition: efm32g_usart.h:303
#define USART_CTRL_OVS_X16
Definition: efm32g_usart.h:108
USART_Stopbits_TypeDef stopbits
Definition: em_usart.h:275
__STATIC_INLINE uint32_t USART_IntGetEnabled(USART_TypeDef *usart)
Get enabled and pending USART interrupt flags. Useful for handling more interrupt sources in the same...
Definition: em_usart.h:689
void USART_Tx(USART_TypeDef *usart, uint8_t data)
Transmit one 4-9 bit frame.
Definition: em_usart.c:1104
#define USART_IRCTRL_IRPRSSEL_PRSCH7
Definition: efm32g_usart.h:977
#define USART_FRAME_DATABITS_EIGHT
Definition: efm32g_usart.h:255
#define USART_IRCTRL_IRPRSSEL_PRSCH0
Definition: efm32g_usart.h:970
USART_PrsTriggerCh_TypeDef prsTriggerChannel
Definition: em_usart.h:309
#define USART_IRCTRL_IRPRSSEL_PRSCH1
Definition: efm32g_usart.h:971
#define USART_TRIGCTRL_TSEL_PRSCH2
Definition: efm32g_usart.h:304
#define USART_FRAME_STOPBITS_ONEANDAHALF
Definition: efm32g_usart.h:284
void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init)
Init USART for synchronous mode.
Definition: em_usart.c:654
#define USART_TRIGCTRL_TSEL_PRSCH7
Definition: efm32g_usart.h:309
#define USART_CMD_TXEN
Definition: efm32g_usart.h:334
USART_OVS_TypeDef oversampling
Definition: em_usart.h:265
__STATIC_INLINE void USART_IntClear(USART_TypeDef *usart, uint32_t flags)
Clear one or more pending USART interrupts.
Definition: em_usart.h:605
void USART_BaudrateSyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate)
Configure USART operating in synchronous mode to use a given baudrate (or as close as possible to spe...
Definition: em_usart.c:472
__I uint32_t RXDOUBLE
Definition: efm32g_usart.h:52
USART_Databits_TypeDef databits
Definition: em_usart.h:269
#define USART_IRCTRL_IRPRSSEL_PRSCH3
Definition: efm32g_usart.h:973
uint8_t USART_Rx(USART_TypeDef *usart)
Receive one 4-8 bit frame, (or part of 10-16 bit frame).
Definition: em_usart.c:943
#define USART_FRAME_DATABITS_FOURTEEN
Definition: efm32g_usart.h:261
USART_InitAsync_TypeDef async
Definition: em_usart.h:473
void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data)
Transmit two 4-9 bit frames, or one 10-16 bit frame with extended control.
Definition: em_usart.c:1176
USART_Stopbits_TypeDef
Definition: em_usart.h:118
USART_IrDAPw_Typedef
Definition: em_usart.h:145
uint32_t USART_RxDoubleExt(USART_TypeDef *usart)
Receive two 4-9 bit frames, or one 10-16 bit frame with extended information.
Definition: em_usart.c:1009
uint32_t USART_BaudrateCalc(uint32_t refFreq, uint32_t clkdiv, bool syncmode, USART_OVS_TypeDef ovs)
Calculate baudrate for USART/UART given reference frequency, clock division and oversampling rate (if...
Definition: em_usart.c:293
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
#define USART_FRAME_DATABITS_SIXTEEN
Definition: efm32g_usart.h:263
USART_IrDAPw_Typedef irPw
Definition: em_usart.h:483
USART_Parity_TypeDef parity
Definition: em_usart.h:272
USART_ClockMode_TypeDef
Definition: em_usart.h:128
#define USART_IRCTRL_IRPW_FOUR
Definition: efm32g_usart.h:952
__STATIC_INLINE void USART_IntEnable(USART_TypeDef *usart, uint32_t flags)
Enable one or more USART interrupts.
Definition: em_usart.h:644
#define USART_IRCTRL_IRPW_THREE
Definition: efm32g_usart.h:951
USART_Enable_TypeDef enable
Definition: em_usart.h:253
#define USART_IRCTRL_IRPRSSEL_PRSCH4
Definition: efm32g_usart.h:974
__I uint32_t IF
Definition: efm32g_usart.h:59
__IO uint32_t IFS
Definition: efm32g_usart.h:60
__IO uint32_t IFC
Definition: efm32g_usart.h:61
#define USART_CTRL_CLKPOL_IDLELOW
Definition: efm32g_usart.h:119
USART_PrsTriggerCh_TypeDef
Definition: em_usart.h:230
#define USART_IRCTRL_IRPW_ONE
Definition: efm32g_usart.h:949
#define USART_FRAME_DATABITS_SEVEN
Definition: efm32g_usart.h:253
void USART_InitIrDA(const USART_InitIrDA_TypeDef *init)
Init USART0 for asynchronous IrDA mode.
Definition: em_usart.c:735
#define USART_CTRL_CLKPHA_SAMPLETRAILING
Definition: efm32g_usart.h:129
__STATIC_INLINE uint32_t USART_IntGet(USART_TypeDef *usart)
Get pending USART interrupt flags.
Definition: em_usart.h:664
#define USART_IRCTRL_IRPRSSEL_PRSCH2
Definition: efm32g_usart.h:972
USART_IrDAPrsSel_Typedef
Definition: em_usart.h:162
#define USART_FRAME_STOPBITS_TWO
Definition: efm32g_usart.h:285
#define USART_CTRL_OVS_X6
Definition: efm32g_usart.h:110
uint16_t USART_RxExt(USART_TypeDef *usart)
Receive one 4-9 bit frame, (or part of 10-16 bit frame) with extended information.
Definition: em_usart.c:1042
__STATIC_INLINE void USART_IntSet(USART_TypeDef *usart, uint32_t flags)
Set one or more pending USART interrupts from SW.
Definition: em_usart.h:713
__I uint32_t RXDATA
Definition: efm32g_usart.h:50
__STATIC_INLINE uint16_t USART_RxDoubleGet(USART_TypeDef *usart)
Receive two 4-8 bit frames, or one 10-16 bit frame.
Definition: em_usart.h:808
#define USART_FRAME_DATABITS_FIFTEEN
Definition: efm32g_usart.h:262
#define USART_TRIGCTRL_TSEL_PRSCH5
Definition: efm32g_usart.h:307
__STATIC_INLINE uint32_t USART_RxDoubleXGet(USART_TypeDef *usart)
Receive two 4-9 bit frames, or one 10-16 bit frame with extended information.
Definition: em_usart.h:844
#define USART_TRIGCTRL_TSEL_PRSCH6
Definition: efm32g_usart.h:308
USART_IrDAPrsSel_Typedef irPrsSel
Definition: em_usart.h:491
USART_Databits_TypeDef
Definition: em_usart.h:63
#define USART_TRIGCTRL_TSEL_PRSCH3
Definition: efm32g_usart.h:305
__I uint32_t RXDATAX
Definition: efm32g_usart.h:49
#define USART_TRIGCTRL_TSEL_PRSCH0
Definition: efm32g_usart.h:302
__IO uint32_t IEN
Definition: efm32g_usart.h:62
#define USART_FRAME_STOPBITS_HALF
Definition: efm32g_usart.h:281
USART_ClockMode_TypeDef clockMode
Definition: em_usart.h:400
#define USART_FRAME_PARITY_ODD
Definition: efm32g_usart.h:273
#define USART_CTRL_CLKPOL_IDLEHIGH
Definition: efm32g_usart.h:120
__STATIC_INLINE uint32_t USART_StatusGet(USART_TypeDef *usart)
Get USART STATUS register.
Definition: em_usart.h:730
#define USART_FRAME_DATABITS_THIRTEEN
Definition: efm32g_usart.h:260
USART_Enable_TypeDef enable
Definition: em_usart.h:379
#define USART_FRAME_STOPBITS_ONE
Definition: efm32g_usart.h:283
void USART_TxExt(USART_TypeDef *usart, uint16_t data)
Transmit one 4-9 bit frame with extended control.
Definition: em_usart.c:1204
USART_Databits_TypeDef databits
Definition: em_usart.h:391
__STATIC_INLINE void USART_IntDisable(USART_TypeDef *usart, uint32_t flags)
Disable one or more USART interrupts.
Definition: em_usart.h:622
__I uint32_t STATUS
Definition: efm32g_usart.h:47
void USART_Reset(USART_TypeDef *usart)
Reset USART/UART to same state as after a HW reset.
Definition: em_usart.c:876
__I uint32_t RXDOUBLEX
Definition: efm32g_usart.h:51
uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data)
Perform one 8 bit frame SPI transfer.
Definition: em_usart.c:1070
#define USART_FRAME_DATABITS_TWELVE
Definition: efm32g_usart.h:259
#define USART_FRAME_DATABITS_FOUR
Definition: efm32g_usart.h:250
#define USART_CTRL_OVS_X4
Definition: efm32g_usart.h:111
USART_OVS_TypeDef
Definition: em_usart.h:99
#define USART_TRIGCTRL_TSEL_PRSCH4
Definition: efm32g_usart.h:306
#define USART_CMD_RXEN
Definition: efm32g_usart.h:324
USART_Enable_TypeDef
Definition: em_usart.h:82
__STATIC_INLINE uint16_t USART_RxDataXGet(USART_TypeDef *usart)
Receive one 4-9 bit frame, (or part of 10-16 bit frame) with extended information.
Definition: em_usart.h:879
#define USART_IRCTRL_IRPW_TWO
Definition: efm32g_usart.h:950
void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable)
Enable/disable USART/UART receiver and/or transmitter.
Definition: em_usart.c:541
void USART_InitPrsTrigger(USART_TypeDef *usart, const USART_PrsTriggerInit_TypeDef *init)
Initialize automatic transmissions using PRS channel as trigger.
Definition: em_usart.c:836
#define USART_FRAME_PARITY_NONE
Definition: efm32g_usart.h:271
#define USART_CTRL_CLKPHA_SAMPLELEADING
Definition: efm32g_usart.h:128
void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init)
Init USART/UART for normal asynchronous mode.
Definition: em_usart.c:583
#define USART_FRAME_PARITY_EVEN
Definition: efm32g_usart.h:272
uint16_t USART_RxDouble(USART_TypeDef *usart)
Receive two 4-8 bit frames, or one 10-16 bit frame.
Definition: em_usart.c:976
USART_Parity_TypeDef
Definition: em_usart.h:109
#define USART_FRAME_DATABITS_SIX
Definition: efm32g_usart.h:252
uint32_t USART_BaudrateGet(USART_TypeDef *usart)
Get current baudrate for USART/UART.
Definition: em_usart.c:423
#define USART_IRCTRL_IRPRSSEL_PRSCH6
Definition: efm32g_usart.h:976
#define USART_CTRL_OVS_X8
Definition: efm32g_usart.h:109
#define USART_FRAME_DATABITS_ELEVEN
Definition: efm32g_usart.h:258
#define USART_FRAME_DATABITS_FIVE
Definition: efm32g_usart.h:251
#define USART_FRAME_DATABITS_NINE
Definition: efm32g_usart.h:256
#define USART_FRAME_DATABITS_TEN
Definition: efm32g_usart.h:257
__STATIC_INLINE uint8_t USART_RxDataGet(USART_TypeDef *usart)
Receive one 4-8 bit frame, (or part of 10-16 bit frame).
Definition: em_usart.h:770
void USART_TxDouble(USART_TypeDef *usart, uint16_t data)
Transmit two 4-9 bit frames, or one 10-16 bit frame.
Definition: em_usart.c:1140
#define USART_IRCTRL_IRPRSSEL_PRSCH5
Definition: efm32g_usart.h:975
void USART_BaudrateAsyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate, USART_OVS_TypeDef ovs)
Configure USART/UART operating in asynchronous mode to use a given baudrate (or as close as possible ...
Definition: em_usart.c:162