EFM32 Gecko Software Documentation  efm32g-doc-4.2.1
em_i2c.h
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1 /***************************************************************************/
33 #ifndef __SILICON_LABS_EM_I2C_H__
34 #define __SILICON_LABS_EM_I2C_H__
35 
36 #include "em_device.h"
37 #if defined(I2C_COUNT) && (I2C_COUNT > 0)
38 
39 #include <stdbool.h>
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 /***************************************************************************/
50 /***************************************************************************/
55 /*******************************************************************************
56  ******************************* DEFINES ***********************************
57  ******************************************************************************/
58 
71 #if defined(_EFM32_GECKO_FAMILY) || defined(_EFM32_TINY_FAMILY) \
72  || defined(_EFM32_ZERO_FAMILY) || defined(_EFM32_HAPPY_FAMILY)
73 #define I2C_FREQ_STANDARD_MAX 93000
74 #elif defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
75 #define I2C_FREQ_STANDARD_MAX 92000
76 #elif defined(_SILICON_LABS_32B_PLATFORM_2)
77 // None of the chips on this platform has been characterized on this parameter.
78 // Use same value as on Wonder until further notice.
79 #define I2C_FREQ_STANDARD_MAX 92000
80 #else
81 #error "Unknown device family."
82 #endif
83 
94 #define I2C_FREQ_FAST_MAX 392157
95 
96 
107 #define I2C_FREQ_FASTPLUS_MAX 987167
108 
109 
119 #define I2C_FLAG_WRITE 0x0001
120 
130 #define I2C_FLAG_READ 0x0002
131 
143 #define I2C_FLAG_WRITE_READ 0x0004
144 
154 #define I2C_FLAG_WRITE_WRITE 0x0008
155 
157 #define I2C_FLAG_10BIT_ADDR 0x0010
158 
159 
160 /*******************************************************************************
161  ******************************** ENUMS ************************************
162  ******************************************************************************/
163 
165 typedef enum
166 {
171 
172 
174 typedef enum
175 {
176  /* In progress code (>0) */
179  /* Complete code (=0) */
182  /* Transfer error codes (<0) */
189 
190 
191 /*******************************************************************************
192  ******************************* STRUCTS ***********************************
193  ******************************************************************************/
194 
196 typedef struct
197 {
199  bool enable;
200 
202  bool master;
203 
209  uint32_t refFreq;
210 
215  uint32_t freq;
216 
220 
222 #define I2C_INIT_DEFAULT \
223 { \
224  true, /* Enable when init done */ \
225  true, /* Set to master mode */ \
226  0, /* Use currently configured reference clock */ \
227  I2C_FREQ_STANDARD_MAX, /* Set to standard rate assuring being */ \
228  /* within I2C spec */ \
229  i2cClockHLRStandard /* Set to use 4:4 low/high duty cycle */ \
230 }
231 
232 
247 typedef struct
248 {
257  uint16_t addr;
258 
260  uint16_t flags;
261 
266  struct
267  {
269  uint8_t *data;
270 
278  uint16_t len;
279  } buf[2];
281 
282 
283 /*******************************************************************************
284  ***************************** PROTOTYPES **********************************
285  ******************************************************************************/
286 
287 uint32_t I2C_BusFreqGet(I2C_TypeDef *i2c);
288 void I2C_BusFreqSet(I2C_TypeDef *i2c,
289  uint32_t freqRef,
290  uint32_t freqScl,
291  I2C_ClockHLR_TypeDef i2cMode);
292 void I2C_Enable(I2C_TypeDef *i2c, bool enable);
293 void I2C_Init(I2C_TypeDef *i2c, const I2C_Init_TypeDef *init);
294 
295 /***************************************************************************/
306 __STATIC_INLINE void I2C_IntClear(I2C_TypeDef *i2c, uint32_t flags)
307 {
308  i2c->IFC = flags;
309 }
310 
311 
312 /***************************************************************************/
323 __STATIC_INLINE void I2C_IntDisable(I2C_TypeDef *i2c, uint32_t flags)
324 {
325  i2c->IEN &= ~(flags);
326 }
327 
328 
329 /***************************************************************************/
345 __STATIC_INLINE void I2C_IntEnable(I2C_TypeDef *i2c, uint32_t flags)
346 {
347  i2c->IEN |= flags;
348 }
349 
350 
351 /***************************************************************************/
365 __STATIC_INLINE uint32_t I2C_IntGet(I2C_TypeDef *i2c)
366 {
367  return i2c->IF;
368 }
369 
370 
371 /***************************************************************************/
388 __STATIC_INLINE uint32_t I2C_IntGetEnabled(I2C_TypeDef *i2c)
389 {
390  uint32_t ien;
391 
392  ien = i2c->IEN;
393  return i2c->IF & ien;
394 }
395 
396 
397 /***************************************************************************/
408 __STATIC_INLINE void I2C_IntSet(I2C_TypeDef *i2c, uint32_t flags)
409 {
410  i2c->IFS = flags;
411 }
412 
413 void I2C_Reset(I2C_TypeDef *i2c);
414 
415 /***************************************************************************/
432 __STATIC_INLINE uint8_t I2C_SlaveAddressGet(I2C_TypeDef *i2c)
433 {
434  return ((uint8_t)(i2c->SADDR));
435 }
436 
437 
438 /***************************************************************************/
455 __STATIC_INLINE void I2C_SlaveAddressSet(I2C_TypeDef *i2c, uint8_t addr)
456 {
457  i2c->SADDR = (uint32_t)addr & 0xfe;
458 }
459 
460 
461 /***************************************************************************/
484 __STATIC_INLINE uint8_t I2C_SlaveAddressMaskGet(I2C_TypeDef *i2c)
485 {
486  return ((uint8_t)(i2c->SADDRMASK));
487 }
488 
489 
490 /***************************************************************************/
513 __STATIC_INLINE void I2C_SlaveAddressMaskSet(I2C_TypeDef *i2c, uint8_t mask)
514 {
515  i2c->SADDRMASK = (uint32_t)mask & 0xfe;
516 }
517 
518 
522 
526 #ifdef __cplusplus
527 }
528 #endif
529 
530 #endif /* defined(I2C_COUNT) && (I2C_COUNT > 0) */
531 #endif /* __SILICON_LABS_EM_I2C_H__ */
__I uint32_t IF
Definition: efm32g_i2c.h:53
#define _I2C_CTRL_CLHR_STANDARD
Definition: efm32g_i2c.h:106
#define _I2C_CTRL_CLHR_FAST
Definition: efm32g_i2c.h:108
I2C_TransferReturn_TypeDef I2C_TransferInit(I2C_TypeDef *i2c, I2C_TransferSeq_TypeDef *seq)
Prepare and start an I2C transfer (single master mode only).
Definition: em_i2c.c:803
__STATIC_INLINE void I2C_SlaveAddressMaskSet(I2C_TypeDef *i2c, uint8_t mask)
Set slave address mask used for I2C peripheral (when operating in slave mode).
Definition: em_i2c.h:513
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
void I2C_Enable(I2C_TypeDef *i2c, bool enable)
Enable/disable I2C.
Definition: em_i2c.c:331
I2C_TransferReturn_TypeDef
Definition: em_i2c.h:174
__STATIC_INLINE void I2C_IntSet(I2C_TypeDef *i2c, uint32_t flags)
Set one or more pending I2C interrupts from SW.
Definition: em_i2c.h:408
void I2C_Reset(I2C_TypeDef *i2c)
Reset I2C to same state as after a HW reset.
Definition: em_i2c.c:376
__IO uint32_t IEN
Definition: efm32g_i2c.h:56
I2C_ClockHLR_TypeDef clhr
Definition: em_i2c.h:218
void I2C_Init(I2C_TypeDef *i2c, const I2C_Init_TypeDef *init)
Initialize I2C.
Definition: em_i2c.c:349
__STATIC_INLINE uint32_t I2C_IntGet(I2C_TypeDef *i2c)
Get pending I2C interrupt flags.
Definition: em_i2c.h:365
__STATIC_INLINE uint32_t I2C_IntGetEnabled(I2C_TypeDef *i2c)
Get enabled and pending I2C interrupt flags. Useful for handling more interrupt sources in the same i...
Definition: em_i2c.h:388
__STATIC_INLINE void I2C_IntClear(I2C_TypeDef *i2c, uint32_t flags)
Clear one or more pending I2C interrupts.
Definition: em_i2c.h:306
__STATIC_INLINE void I2C_SlaveAddressSet(I2C_TypeDef *i2c, uint8_t addr)
Set slave address to use for I2C peripheral (when operating in slave mode).
Definition: em_i2c.h:455
__STATIC_INLINE uint8_t I2C_SlaveAddressGet(I2C_TypeDef *i2c)
Get slave address used for I2C peripheral (when operating in slave mode).
Definition: em_i2c.h:432
uint32_t freq
Definition: em_i2c.h:215
void I2C_BusFreqSet(I2C_TypeDef *i2c, uint32_t freqRef, uint32_t freqScl, I2C_ClockHLR_TypeDef i2cMode)
Set I2C bus frequency.
Definition: em_i2c.c:223
__IO uint32_t IFS
Definition: efm32g_i2c.h:54
Master mode transfer message structure used to define a complete I2C transfer sequence (from start to...
Definition: em_i2c.h:247
uint32_t refFreq
Definition: em_i2c.h:209
__STATIC_INLINE void I2C_IntEnable(I2C_TypeDef *i2c, uint32_t flags)
Enable one or more I2C interrupts.
Definition: em_i2c.h:345
__STATIC_INLINE uint8_t I2C_SlaveAddressMaskGet(I2C_TypeDef *i2c)
Get slave address mask used for I2C peripheral (when operating in slave mode).
Definition: em_i2c.h:484
__IO uint32_t SADDR
Definition: efm32g_i2c.h:48
__IO uint32_t SADDRMASK
Definition: efm32g_i2c.h:49
I2C_ClockHLR_TypeDef
Definition: em_i2c.h:165
__STATIC_INLINE void I2C_IntDisable(I2C_TypeDef *i2c, uint32_t flags)
Disable one or more I2C interrupts.
Definition: em_i2c.h:323
#define _I2C_CTRL_CLHR_ASYMMETRIC
Definition: efm32g_i2c.h:107
__IO uint32_t IFC
Definition: efm32g_i2c.h:55
uint32_t I2C_BusFreqGet(I2C_TypeDef *i2c)
Get current configured I2C bus frequency.
Definition: em_i2c.c:170
uint16_t addr
Address to use after (repeated) start.
Definition: em_i2c.h:257
I2C_TransferReturn_TypeDef I2C_Transfer(I2C_TypeDef *i2c)
Continue an initiated I2C transfer (single master mode only).
Definition: em_i2c.c:424