EFM32 Gecko Software Documentation  efm32g-doc-4.2.1
em_msc.h
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1 /***************************************************************************/
33 #ifndef __SILICON_LABS_EM_MSC_H__
34 #define __SILICON_LABS_EM_MSC_H__
35 
36 #include "em_device.h"
37 #if defined(MSC_COUNT) && (MSC_COUNT > 0)
38 
39 #include <stdint.h>
40 #include <stdbool.h>
41 #include "em_bus.h"
42 
43 #ifdef __cplusplus
44 extern "C" {
45 #endif
46 
47 /***************************************************************************/
52 /***************************************************************************/
58 /*******************************************************************************
59  ************************* DEFINES *****************************************
60  ******************************************************************************/
61 
72 #define MSC_PROGRAM_TIMEOUT 10000000ul
73 
86 #if defined( DOXY_DOC_ONLY )
87 #define EM_MSC_RUN_FROM_FLASH
88 #else
89 //#define EM_MSC_RUN_FROM_FLASH
90 #endif
91 
92 /*******************************************************************************
93  ************************* TYPEDEFS ****************************************
94  ******************************************************************************/
95 
97 typedef enum
98 {
105 
106 
107 #if defined( _MSC_READCTRL_BUSSTRATEGY_MASK )
108 
109 typedef enum
110 {
111  mscBusStrategyCPU = MSC_READCTRL_BUSSTRATEGY_CPU,
112  mscBusStrategyDMA = MSC_READCTRL_BUSSTRATEGY_DMA,
113  mscBusStrategyDMAEM1 = MSC_READCTRL_BUSSTRATEGY_DMAEM1,
114  mscBusStrategyNone = MSC_READCTRL_BUSSTRATEGY_NONE
115 } MSC_BusStrategy_Typedef;
116 #endif
117 
119 typedef struct
120 {
121  bool scbtEn;
122  bool prefetchEn;
123  bool ifcDis;
124  bool aiDis;
125  bool iccDis;
126  bool useHprot;
128 
130 #define MSC_EXECCONFIG_DEFAULT \
131 { \
132  false, \
133  true, \
134  false, \
135  false, \
136  false, \
137  false, \
138 }
139 
141 /* Legacy type names */
142 #define mscBusStrategy_Typedef MSC_BusStrategy_Typedef
143 #define msc_Return_TypeDef MSC_Status_TypeDef
144 
146 /*******************************************************************************
147  ************************* PROTOTYPES **************************************
148  ******************************************************************************/
149 
150 void MSC_Init(void);
151 void MSC_Deinit(void);
152 #if !defined( _EFM32_GECKO_FAMILY )
153 void MSC_ExecConfigSet(MSC_ExecConfig_TypeDef *execConfig);
154 #endif
155 
156 /***************************************************************************/
164 __STATIC_INLINE void MSC_IntClear(uint32_t flags)
165 {
166  MSC->IFC = flags;
167 }
168 
169 /***************************************************************************/
177 __STATIC_INLINE void MSC_IntDisable(uint32_t flags)
178 {
179  MSC->IEN &= ~(flags);
180 }
181 
182 
183 /***************************************************************************/
196 __STATIC_INLINE void MSC_IntEnable(uint32_t flags)
197 {
198  MSC->IEN |= flags;
199 }
200 
201 
202 /***************************************************************************/
213 __STATIC_INLINE uint32_t MSC_IntGet(void)
214 {
215  return(MSC->IF);
216 }
217 
218 
219 /***************************************************************************/
233 __STATIC_INLINE uint32_t MSC_IntGetEnabled(void)
234 {
235  uint32_t ien;
236 
237  ien = MSC->IEN;
238  return MSC->IF & ien;
239 }
240 
241 
242 /***************************************************************************/
250 __STATIC_INLINE void MSC_IntSet(uint32_t flags)
251 {
252  MSC->IFS = flags;
253 }
254 
255 
256 #if defined( MSC_IF_CHOF ) && defined( MSC_IF_CMOF )
257 /***************************************************************************/
264 __STATIC_INLINE void MSC_StartCacheMeasurement(void)
265 {
266  /* Clear CMOF and CHOF to catch these later */
267  MSC->IFC = MSC_IF_CHOF | MSC_IF_CMOF;
268 
269  /* Start performance counters */
270 #if defined( _MSC_CACHECMD_MASK )
271  MSC->CACHECMD = MSC_CACHECMD_STARTPC;
272 #else
273  MSC->CMD = MSC_CMD_STARTPC;
274 #endif
275 }
276 
277 
278 /***************************************************************************/
325 __STATIC_INLINE int32_t MSC_GetCacheMeasurement(void)
326 {
327  int32_t total;
328  /* Stop the counter before computing the hit-rate */
329 #if defined( _MSC_CACHECMD_MASK )
330  MSC->CACHECMD = MSC_CACHECMD_STOPPC;
331 #else
332  MSC->CMD = MSC_CMD_STOPPC;
333 #endif
334 
335  /* Check for overflows in performance counters */
336  if (MSC->IF & (MSC_IF_CHOF | MSC_IF_CMOF))
337  return -2;
338 
339  /* Because the hits and misses are volatile, we need to split this up into
340  * two statements to avoid a compiler warning regarding the order of volatile
341  * accesses. */
342  total = MSC->CACHEHITS;
343  total += MSC->CACHEMISSES;
344 
345  /* To avoid a division by zero. */
346  if (total == 0)
347  return -1;
348 
349  return (MSC->CACHEHITS * 100) / total;
350 }
351 
352 
353 /***************************************************************************/
357 __STATIC_INLINE void MSC_FlushCache(void)
358 {
359 #if defined( _MSC_CACHECMD_MASK )
360  MSC->CACHECMD = MSC_CACHECMD_INVCACHE;
361 #else
362  MSC->CMD = MSC_CMD_INVCACHE;
363 #endif
364 }
365 
366 
367 /***************************************************************************/
373 __STATIC_INLINE void MSC_EnableCache(bool enable)
374 {
375  BUS_RegBitWrite(&(MSC->READCTRL), _MSC_READCTRL_IFCDIS_SHIFT, !enable);
376 }
377 
378 
379 #if defined( MSC_READCTRL_ICCDIS )
380 /***************************************************************************/
386 __STATIC_INLINE void MSC_EnableCacheIRQs(bool enable)
387 {
388  BUS_RegBitWrite(&(MSC->READCTRL), _MSC_READCTRL_ICCDIS_SHIFT, !enable);
389 }
390 #endif
391 
392 
393 /***************************************************************************/
399 __STATIC_INLINE void MSC_EnableAutoCacheFlush(bool enable)
400 {
401  BUS_RegBitWrite(&(MSC->READCTRL), _MSC_READCTRL_AIDIS_SHIFT, !enable);
402 }
403 #endif /* defined( MSC_IF_CHOF ) && defined( MSC_IF_CMOF ) */
404 
405 
406 #if defined( _MSC_READCTRL_BUSSTRATEGY_MASK )
407 /***************************************************************************/
413 __STATIC_INLINE void MSC_BusStrategy(mscBusStrategy_Typedef mode)
414 {
415  MSC->READCTRL = (MSC->READCTRL & ~(_MSC_READCTRL_BUSSTRATEGY_MASK)) | mode;
416 }
417 #endif
418 
419 #if defined(EM_MSC_RUN_FROM_FLASH)
420 #define MSC_FUNC_PREFIX
421 #define MSC_FUNC_POSTFIX
422 #elif defined(__CC_ARM)
423 #define MSC_FUNC_PREFIX
424 #define MSC_FUNC_POSTFIX
425 #elif defined(__ICCARM__)
426 #define MSC_FUNC_PREFIX __ramfunc
427 #define MSC_FUNC_POSTFIX
428 #elif defined(__GNUC__) && defined(__CROSSWORKS_ARM)
429 #define MSC_FUNC_PREFIX
430 #define MSC_FUNC_POSTFIX __attribute__ ((section(".fast")))
431 #elif defined(__GNUC__)
432 #define MSC_FUNC_PREFIX
433 #define MSC_FUNC_POSTFIX __attribute__ ((section(".ram")))
434 #endif
435 
436 
437 MSC_FUNC_PREFIX MSC_Status_TypeDef
438  MSC_WriteWord(uint32_t *address,
439  void const *data,
440  uint32_t numBytes) MSC_FUNC_POSTFIX;
441 
442 #if !defined( _EFM32_GECKO_FAMILY )
443 MSC_FUNC_PREFIX MSC_Status_TypeDef
444  MSC_WriteWordFast(uint32_t *address,
445  void const *data,
446  uint32_t numBytes) MSC_FUNC_POSTFIX;
447 
448 #endif
449 
450 MSC_FUNC_PREFIX MSC_Status_TypeDef
451  MSC_ErasePage(uint32_t *startAddress) MSC_FUNC_POSTFIX;
452 
453 #if defined( _MSC_MASSLOCK_MASK )
454 MSC_FUNC_PREFIX MSC_Status_TypeDef MSC_MassErase(void) MSC_FUNC_POSTFIX;
455 #endif
456 
460 #ifdef __cplusplus
461 }
462 #endif
463 
464 #endif /* defined(MSC_COUNT) && (MSC_COUNT > 0) */
465 #endif /* __SILICON_LABS_EM_MSC_H__ */
__STATIC_INLINE uint32_t MSC_IntGetEnabled(void)
Get enabled and pending MSC interrupt flags. Useful for handling more interrupt sources in the same i...
Definition: em_msc.h:233
RAM and peripheral bit-field set and clear API.
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
void MSC_Init(void)
Enables the flash controller for writing.
Definition: em_msc.c:101
void MSC_Deinit(void)
Disables the flash controller for writing.
Definition: em_msc.c:153
__STATIC_INLINE void MSC_IntSet(uint32_t flags)
Set one or more pending MSC interrupts from SW.
Definition: em_msc.h:250
#define MSC
MSC_FUNC_PREFIX MSC_Status_TypeDef MSC_ErasePage(uint32_t *startAddress) MSC_FUNC_POSTFIX
Erases a page in flash memory.
Definition: em_msc.c:637
__STATIC_INLINE void MSC_IntEnable(uint32_t flags)
Enable one or more MSC interrupts.
Definition: em_msc.h:196
__STATIC_INLINE uint32_t MSC_IntGet(void)
Get pending MSC interrupt flags.
Definition: em_msc.h:213
__STATIC_INLINE void MSC_IntClear(uint32_t flags)
Clear one or more pending MSC interrupts.
Definition: em_msc.h:164
MSC_Status_TypeDef
Definition: em_msc.h:97
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
Definition: em_bus.h:146
__STATIC_INLINE void MSC_IntDisable(uint32_t flags)
Disable one or more MSC interrupts.
Definition: em_msc.h:177
MSC_FUNC_PREFIX MSC_Status_TypeDef MSC_WriteWord(uint32_t *address, void const *data, uint32_t numBytes) MSC_FUNC_POSTFIX
Writes data to flash memory. This function is interrupt safe, but slower than MSC_WriteWordFast(), which writes to flash with interrupts disabled. Write data must be aligned to words and contain a number of bytes that is divisable by four.
Definition: em_msc.c:738