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efm32g_adc.h
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1
/**************************************************************************/
32
/**************************************************************************/
36
/**************************************************************************/
41
typedef
struct
42
{
43
__IO
uint32_t
CTRL
;
44
__IO
uint32_t
CMD
;
45
__I uint32_t
STATUS
;
46
__IO
uint32_t
SINGLECTRL
;
47
__IO
uint32_t
SCANCTRL
;
48
__IO
uint32_t
IEN
;
49
__I uint32_t
IF
;
50
__IO
uint32_t
IFS
;
51
__IO
uint32_t
IFC
;
52
__I uint32_t
SINGLEDATA
;
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__I uint32_t
SCANDATA
;
54
__I uint32_t
SINGLEDATAP
;
55
__I uint32_t
SCANDATAP
;
56
__IO
uint32_t
CAL
;
57
uint32_t RESERVED0[1];
58
__IO
uint32_t
BIASPROG
;
59
}
ADC_TypeDef
;
61
/**************************************************************************/
66
/* Bit fields for ADC CTRL */
67
#define _ADC_CTRL_RESETVALUE 0x001F0000UL
68
#define _ADC_CTRL_MASK 0x0F1F7F3BUL
69
#define _ADC_CTRL_WARMUPMODE_SHIFT 0
70
#define _ADC_CTRL_WARMUPMODE_MASK 0x3UL
71
#define _ADC_CTRL_WARMUPMODE_DEFAULT 0x00000000UL
72
#define _ADC_CTRL_WARMUPMODE_NORMAL 0x00000000UL
73
#define _ADC_CTRL_WARMUPMODE_FASTBG 0x00000001UL
74
#define _ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM 0x00000002UL
75
#define _ADC_CTRL_WARMUPMODE_KEEPADCWARM 0x00000003UL
76
#define ADC_CTRL_WARMUPMODE_DEFAULT (_ADC_CTRL_WARMUPMODE_DEFAULT << 0)
77
#define ADC_CTRL_WARMUPMODE_NORMAL (_ADC_CTRL_WARMUPMODE_NORMAL << 0)
78
#define ADC_CTRL_WARMUPMODE_FASTBG (_ADC_CTRL_WARMUPMODE_FASTBG << 0)
79
#define ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM (_ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM << 0)
80
#define ADC_CTRL_WARMUPMODE_KEEPADCWARM (_ADC_CTRL_WARMUPMODE_KEEPADCWARM << 0)
81
#define ADC_CTRL_TAILGATE (0x1UL << 3)
82
#define _ADC_CTRL_TAILGATE_SHIFT 3
83
#define _ADC_CTRL_TAILGATE_MASK 0x8UL
84
#define _ADC_CTRL_TAILGATE_DEFAULT 0x00000000UL
85
#define ADC_CTRL_TAILGATE_DEFAULT (_ADC_CTRL_TAILGATE_DEFAULT << 3)
86
#define _ADC_CTRL_LPFMODE_SHIFT 4
87
#define _ADC_CTRL_LPFMODE_MASK 0x30UL
88
#define _ADC_CTRL_LPFMODE_DEFAULT 0x00000000UL
89
#define _ADC_CTRL_LPFMODE_BYPASS 0x00000000UL
90
#define _ADC_CTRL_LPFMODE_DECAP 0x00000001UL
91
#define _ADC_CTRL_LPFMODE_RCFILT 0x00000002UL
92
#define ADC_CTRL_LPFMODE_DEFAULT (_ADC_CTRL_LPFMODE_DEFAULT << 4)
93
#define ADC_CTRL_LPFMODE_BYPASS (_ADC_CTRL_LPFMODE_BYPASS << 4)
94
#define ADC_CTRL_LPFMODE_DECAP (_ADC_CTRL_LPFMODE_DECAP << 4)
95
#define ADC_CTRL_LPFMODE_RCFILT (_ADC_CTRL_LPFMODE_RCFILT << 4)
96
#define _ADC_CTRL_PRESC_SHIFT 8
97
#define _ADC_CTRL_PRESC_MASK 0x7F00UL
98
#define _ADC_CTRL_PRESC_DEFAULT 0x00000000UL
99
#define _ADC_CTRL_PRESC_NODIVISION 0x00000000UL
100
#define ADC_CTRL_PRESC_DEFAULT (_ADC_CTRL_PRESC_DEFAULT << 8)
101
#define ADC_CTRL_PRESC_NODIVISION (_ADC_CTRL_PRESC_NODIVISION << 8)
102
#define _ADC_CTRL_TIMEBASE_SHIFT 16
103
#define _ADC_CTRL_TIMEBASE_MASK 0x1F0000UL
104
#define _ADC_CTRL_TIMEBASE_DEFAULT 0x0000001FUL
105
#define ADC_CTRL_TIMEBASE_DEFAULT (_ADC_CTRL_TIMEBASE_DEFAULT << 16)
106
#define _ADC_CTRL_OVSRSEL_SHIFT 24
107
#define _ADC_CTRL_OVSRSEL_MASK 0xF000000UL
108
#define _ADC_CTRL_OVSRSEL_DEFAULT 0x00000000UL
109
#define _ADC_CTRL_OVSRSEL_X2 0x00000000UL
110
#define _ADC_CTRL_OVSRSEL_X4 0x00000001UL
111
#define _ADC_CTRL_OVSRSEL_X8 0x00000002UL
112
#define _ADC_CTRL_OVSRSEL_X16 0x00000003UL
113
#define _ADC_CTRL_OVSRSEL_X32 0x00000004UL
114
#define _ADC_CTRL_OVSRSEL_X64 0x00000005UL
115
#define _ADC_CTRL_OVSRSEL_X128 0x00000006UL
116
#define _ADC_CTRL_OVSRSEL_X256 0x00000007UL
117
#define _ADC_CTRL_OVSRSEL_X512 0x00000008UL
118
#define _ADC_CTRL_OVSRSEL_X1024 0x00000009UL
119
#define _ADC_CTRL_OVSRSEL_X2048 0x0000000AUL
120
#define _ADC_CTRL_OVSRSEL_X4096 0x0000000BUL
121
#define ADC_CTRL_OVSRSEL_DEFAULT (_ADC_CTRL_OVSRSEL_DEFAULT << 24)
122
#define ADC_CTRL_OVSRSEL_X2 (_ADC_CTRL_OVSRSEL_X2 << 24)
123
#define ADC_CTRL_OVSRSEL_X4 (_ADC_CTRL_OVSRSEL_X4 << 24)
124
#define ADC_CTRL_OVSRSEL_X8 (_ADC_CTRL_OVSRSEL_X8 << 24)
125
#define ADC_CTRL_OVSRSEL_X16 (_ADC_CTRL_OVSRSEL_X16 << 24)
126
#define ADC_CTRL_OVSRSEL_X32 (_ADC_CTRL_OVSRSEL_X32 << 24)
127
#define ADC_CTRL_OVSRSEL_X64 (_ADC_CTRL_OVSRSEL_X64 << 24)
128
#define ADC_CTRL_OVSRSEL_X128 (_ADC_CTRL_OVSRSEL_X128 << 24)
129
#define ADC_CTRL_OVSRSEL_X256 (_ADC_CTRL_OVSRSEL_X256 << 24)
130
#define ADC_CTRL_OVSRSEL_X512 (_ADC_CTRL_OVSRSEL_X512 << 24)
131
#define ADC_CTRL_OVSRSEL_X1024 (_ADC_CTRL_OVSRSEL_X1024 << 24)
132
#define ADC_CTRL_OVSRSEL_X2048 (_ADC_CTRL_OVSRSEL_X2048 << 24)
133
#define ADC_CTRL_OVSRSEL_X4096 (_ADC_CTRL_OVSRSEL_X4096 << 24)
135
/* Bit fields for ADC CMD */
136
#define _ADC_CMD_RESETVALUE 0x00000000UL
137
#define _ADC_CMD_MASK 0x0000000FUL
138
#define ADC_CMD_SINGLESTART (0x1UL << 0)
139
#define _ADC_CMD_SINGLESTART_SHIFT 0
140
#define _ADC_CMD_SINGLESTART_MASK 0x1UL
141
#define _ADC_CMD_SINGLESTART_DEFAULT 0x00000000UL
142
#define ADC_CMD_SINGLESTART_DEFAULT (_ADC_CMD_SINGLESTART_DEFAULT << 0)
143
#define ADC_CMD_SINGLESTOP (0x1UL << 1)
144
#define _ADC_CMD_SINGLESTOP_SHIFT 1
145
#define _ADC_CMD_SINGLESTOP_MASK 0x2UL
146
#define _ADC_CMD_SINGLESTOP_DEFAULT 0x00000000UL
147
#define ADC_CMD_SINGLESTOP_DEFAULT (_ADC_CMD_SINGLESTOP_DEFAULT << 1)
148
#define ADC_CMD_SCANSTART (0x1UL << 2)
149
#define _ADC_CMD_SCANSTART_SHIFT 2
150
#define _ADC_CMD_SCANSTART_MASK 0x4UL
151
#define _ADC_CMD_SCANSTART_DEFAULT 0x00000000UL
152
#define ADC_CMD_SCANSTART_DEFAULT (_ADC_CMD_SCANSTART_DEFAULT << 2)
153
#define ADC_CMD_SCANSTOP (0x1UL << 3)
154
#define _ADC_CMD_SCANSTOP_SHIFT 3
155
#define _ADC_CMD_SCANSTOP_MASK 0x8UL
156
#define _ADC_CMD_SCANSTOP_DEFAULT 0x00000000UL
157
#define ADC_CMD_SCANSTOP_DEFAULT (_ADC_CMD_SCANSTOP_DEFAULT << 3)
159
/* Bit fields for ADC STATUS */
160
#define _ADC_STATUS_RESETVALUE 0x00000000UL
161
#define _ADC_STATUS_MASK 0x07031303UL
162
#define ADC_STATUS_SINGLEACT (0x1UL << 0)
163
#define _ADC_STATUS_SINGLEACT_SHIFT 0
164
#define _ADC_STATUS_SINGLEACT_MASK 0x1UL
165
#define _ADC_STATUS_SINGLEACT_DEFAULT 0x00000000UL
166
#define ADC_STATUS_SINGLEACT_DEFAULT (_ADC_STATUS_SINGLEACT_DEFAULT << 0)
167
#define ADC_STATUS_SCANACT (0x1UL << 1)
168
#define _ADC_STATUS_SCANACT_SHIFT 1
169
#define _ADC_STATUS_SCANACT_MASK 0x2UL
170
#define _ADC_STATUS_SCANACT_DEFAULT 0x00000000UL
171
#define ADC_STATUS_SCANACT_DEFAULT (_ADC_STATUS_SCANACT_DEFAULT << 1)
172
#define ADC_STATUS_SINGLEREFWARM (0x1UL << 8)
173
#define _ADC_STATUS_SINGLEREFWARM_SHIFT 8
174
#define _ADC_STATUS_SINGLEREFWARM_MASK 0x100UL
175
#define _ADC_STATUS_SINGLEREFWARM_DEFAULT 0x00000000UL
176
#define ADC_STATUS_SINGLEREFWARM_DEFAULT (_ADC_STATUS_SINGLEREFWARM_DEFAULT << 8)
177
#define ADC_STATUS_SCANREFWARM (0x1UL << 9)
178
#define _ADC_STATUS_SCANREFWARM_SHIFT 9
179
#define _ADC_STATUS_SCANREFWARM_MASK 0x200UL
180
#define _ADC_STATUS_SCANREFWARM_DEFAULT 0x00000000UL
181
#define ADC_STATUS_SCANREFWARM_DEFAULT (_ADC_STATUS_SCANREFWARM_DEFAULT << 9)
182
#define ADC_STATUS_WARM (0x1UL << 12)
183
#define _ADC_STATUS_WARM_SHIFT 12
184
#define _ADC_STATUS_WARM_MASK 0x1000UL
185
#define _ADC_STATUS_WARM_DEFAULT 0x00000000UL
186
#define ADC_STATUS_WARM_DEFAULT (_ADC_STATUS_WARM_DEFAULT << 12)
187
#define ADC_STATUS_SINGLEDV (0x1UL << 16)
188
#define _ADC_STATUS_SINGLEDV_SHIFT 16
189
#define _ADC_STATUS_SINGLEDV_MASK 0x10000UL
190
#define _ADC_STATUS_SINGLEDV_DEFAULT 0x00000000UL
191
#define ADC_STATUS_SINGLEDV_DEFAULT (_ADC_STATUS_SINGLEDV_DEFAULT << 16)
192
#define ADC_STATUS_SCANDV (0x1UL << 17)
193
#define _ADC_STATUS_SCANDV_SHIFT 17
194
#define _ADC_STATUS_SCANDV_MASK 0x20000UL
195
#define _ADC_STATUS_SCANDV_DEFAULT 0x00000000UL
196
#define ADC_STATUS_SCANDV_DEFAULT (_ADC_STATUS_SCANDV_DEFAULT << 17)
197
#define _ADC_STATUS_SCANDATASRC_SHIFT 24
198
#define _ADC_STATUS_SCANDATASRC_MASK 0x7000000UL
199
#define _ADC_STATUS_SCANDATASRC_DEFAULT 0x00000000UL
200
#define _ADC_STATUS_SCANDATASRC_CH0 0x00000000UL
201
#define _ADC_STATUS_SCANDATASRC_CH1 0x00000001UL
202
#define _ADC_STATUS_SCANDATASRC_CH2 0x00000002UL
203
#define _ADC_STATUS_SCANDATASRC_CH3 0x00000003UL
204
#define _ADC_STATUS_SCANDATASRC_CH4 0x00000004UL
205
#define _ADC_STATUS_SCANDATASRC_CH5 0x00000005UL
206
#define _ADC_STATUS_SCANDATASRC_CH6 0x00000006UL
207
#define _ADC_STATUS_SCANDATASRC_CH7 0x00000007UL
208
#define ADC_STATUS_SCANDATASRC_DEFAULT (_ADC_STATUS_SCANDATASRC_DEFAULT << 24)
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#define ADC_STATUS_SCANDATASRC_CH0 (_ADC_STATUS_SCANDATASRC_CH0 << 24)
210
#define ADC_STATUS_SCANDATASRC_CH1 (_ADC_STATUS_SCANDATASRC_CH1 << 24)
211
#define ADC_STATUS_SCANDATASRC_CH2 (_ADC_STATUS_SCANDATASRC_CH2 << 24)
212
#define ADC_STATUS_SCANDATASRC_CH3 (_ADC_STATUS_SCANDATASRC_CH3 << 24)
213
#define ADC_STATUS_SCANDATASRC_CH4 (_ADC_STATUS_SCANDATASRC_CH4 << 24)
214
#define ADC_STATUS_SCANDATASRC_CH5 (_ADC_STATUS_SCANDATASRC_CH5 << 24)
215
#define ADC_STATUS_SCANDATASRC_CH6 (_ADC_STATUS_SCANDATASRC_CH6 << 24)
216
#define ADC_STATUS_SCANDATASRC_CH7 (_ADC_STATUS_SCANDATASRC_CH7 << 24)
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/* Bit fields for ADC SINGLECTRL */
219
#define _ADC_SINGLECTRL_RESETVALUE 0x00000000UL
220
#define _ADC_SINGLECTRL_MASK 0x71F70F37UL
221
#define ADC_SINGLECTRL_REP (0x1UL << 0)
222
#define _ADC_SINGLECTRL_REP_SHIFT 0
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#define _ADC_SINGLECTRL_REP_MASK 0x1UL
224
#define _ADC_SINGLECTRL_REP_DEFAULT 0x00000000UL
225
#define ADC_SINGLECTRL_REP_DEFAULT (_ADC_SINGLECTRL_REP_DEFAULT << 0)
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#define ADC_SINGLECTRL_DIFF (0x1UL << 1)
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#define _ADC_SINGLECTRL_DIFF_SHIFT 1
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#define _ADC_SINGLECTRL_DIFF_MASK 0x2UL
229
#define _ADC_SINGLECTRL_DIFF_DEFAULT 0x00000000UL
230
#define ADC_SINGLECTRL_DIFF_DEFAULT (_ADC_SINGLECTRL_DIFF_DEFAULT << 1)
231
#define ADC_SINGLECTRL_ADJ (0x1UL << 2)
232
#define _ADC_SINGLECTRL_ADJ_SHIFT 2
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#define _ADC_SINGLECTRL_ADJ_MASK 0x4UL
234
#define _ADC_SINGLECTRL_ADJ_DEFAULT 0x00000000UL
235
#define _ADC_SINGLECTRL_ADJ_RIGHT 0x00000000UL
236
#define _ADC_SINGLECTRL_ADJ_LEFT 0x00000001UL
237
#define ADC_SINGLECTRL_ADJ_DEFAULT (_ADC_SINGLECTRL_ADJ_DEFAULT << 2)
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#define ADC_SINGLECTRL_ADJ_RIGHT (_ADC_SINGLECTRL_ADJ_RIGHT << 2)
239
#define ADC_SINGLECTRL_ADJ_LEFT (_ADC_SINGLECTRL_ADJ_LEFT << 2)
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#define _ADC_SINGLECTRL_RES_SHIFT 4
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#define _ADC_SINGLECTRL_RES_MASK 0x30UL
242
#define _ADC_SINGLECTRL_RES_DEFAULT 0x00000000UL
243
#define _ADC_SINGLECTRL_RES_12BIT 0x00000000UL
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#define _ADC_SINGLECTRL_RES_8BIT 0x00000001UL
245
#define _ADC_SINGLECTRL_RES_6BIT 0x00000002UL
246
#define _ADC_SINGLECTRL_RES_OVS 0x00000003UL
247
#define ADC_SINGLECTRL_RES_DEFAULT (_ADC_SINGLECTRL_RES_DEFAULT << 4)
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#define ADC_SINGLECTRL_RES_12BIT (_ADC_SINGLECTRL_RES_12BIT << 4)
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#define ADC_SINGLECTRL_RES_8BIT (_ADC_SINGLECTRL_RES_8BIT << 4)
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#define ADC_SINGLECTRL_RES_6BIT (_ADC_SINGLECTRL_RES_6BIT << 4)
251
#define ADC_SINGLECTRL_RES_OVS (_ADC_SINGLECTRL_RES_OVS << 4)
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#define _ADC_SINGLECTRL_INPUTSEL_SHIFT 8
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#define _ADC_SINGLECTRL_INPUTSEL_MASK 0xF00UL
254
#define _ADC_SINGLECTRL_INPUTSEL_DEFAULT 0x00000000UL
255
#define _ADC_SINGLECTRL_INPUTSEL_CH0 0x00000000UL
256
#define _ADC_SINGLECTRL_INPUTSEL_CH0CH1 0x00000000UL
257
#define _ADC_SINGLECTRL_INPUTSEL_CH1 0x00000001UL
258
#define _ADC_SINGLECTRL_INPUTSEL_CH2CH3 0x00000001UL
259
#define _ADC_SINGLECTRL_INPUTSEL_CH2 0x00000002UL
260
#define _ADC_SINGLECTRL_INPUTSEL_CH4CH5 0x00000002UL
261
#define _ADC_SINGLECTRL_INPUTSEL_CH6CH7 0x00000003UL
262
#define _ADC_SINGLECTRL_INPUTSEL_CH3 0x00000003UL
263
#define _ADC_SINGLECTRL_INPUTSEL_CH4 0x00000004UL
264
#define _ADC_SINGLECTRL_INPUTSEL_DIFF0 0x00000004UL
265
#define _ADC_SINGLECTRL_INPUTSEL_CH5 0x00000005UL
266
#define _ADC_SINGLECTRL_INPUTSEL_CH6 0x00000006UL
267
#define _ADC_SINGLECTRL_INPUTSEL_CH7 0x00000007UL
268
#define _ADC_SINGLECTRL_INPUTSEL_TEMP 0x00000008UL
269
#define _ADC_SINGLECTRL_INPUTSEL_VDDDIV3 0x00000009UL
270
#define _ADC_SINGLECTRL_INPUTSEL_VDD 0x0000000AUL
271
#define _ADC_SINGLECTRL_INPUTSEL_VSS 0x0000000BUL
272
#define _ADC_SINGLECTRL_INPUTSEL_VREFDIV2 0x0000000CUL
273
#define _ADC_SINGLECTRL_INPUTSEL_DAC0OUT0 0x0000000DUL
274
#define _ADC_SINGLECTRL_INPUTSEL_DAC0OUT1 0x0000000EUL
275
#define ADC_SINGLECTRL_INPUTSEL_DEFAULT (_ADC_SINGLECTRL_INPUTSEL_DEFAULT << 8)
276
#define ADC_SINGLECTRL_INPUTSEL_CH0 (_ADC_SINGLECTRL_INPUTSEL_CH0 << 8)
277
#define ADC_SINGLECTRL_INPUTSEL_CH0CH1 (_ADC_SINGLECTRL_INPUTSEL_CH0CH1 << 8)
278
#define ADC_SINGLECTRL_INPUTSEL_CH1 (_ADC_SINGLECTRL_INPUTSEL_CH1 << 8)
279
#define ADC_SINGLECTRL_INPUTSEL_CH2CH3 (_ADC_SINGLECTRL_INPUTSEL_CH2CH3 << 8)
280
#define ADC_SINGLECTRL_INPUTSEL_CH2 (_ADC_SINGLECTRL_INPUTSEL_CH2 << 8)
281
#define ADC_SINGLECTRL_INPUTSEL_CH4CH5 (_ADC_SINGLECTRL_INPUTSEL_CH4CH5 << 8)
282
#define ADC_SINGLECTRL_INPUTSEL_CH6CH7 (_ADC_SINGLECTRL_INPUTSEL_CH6CH7 << 8)
283
#define ADC_SINGLECTRL_INPUTSEL_CH3 (_ADC_SINGLECTRL_INPUTSEL_CH3 << 8)
284
#define ADC_SINGLECTRL_INPUTSEL_CH4 (_ADC_SINGLECTRL_INPUTSEL_CH4 << 8)
285
#define ADC_SINGLECTRL_INPUTSEL_DIFF0 (_ADC_SINGLECTRL_INPUTSEL_DIFF0 << 8)
286
#define ADC_SINGLECTRL_INPUTSEL_CH5 (_ADC_SINGLECTRL_INPUTSEL_CH5 << 8)
287
#define ADC_SINGLECTRL_INPUTSEL_CH6 (_ADC_SINGLECTRL_INPUTSEL_CH6 << 8)
288
#define ADC_SINGLECTRL_INPUTSEL_CH7 (_ADC_SINGLECTRL_INPUTSEL_CH7 << 8)
289
#define ADC_SINGLECTRL_INPUTSEL_TEMP (_ADC_SINGLECTRL_INPUTSEL_TEMP << 8)
290
#define ADC_SINGLECTRL_INPUTSEL_VDDDIV3 (_ADC_SINGLECTRL_INPUTSEL_VDDDIV3 << 8)
291
#define ADC_SINGLECTRL_INPUTSEL_VDD (_ADC_SINGLECTRL_INPUTSEL_VDD << 8)
292
#define ADC_SINGLECTRL_INPUTSEL_VSS (_ADC_SINGLECTRL_INPUTSEL_VSS << 8)
293
#define ADC_SINGLECTRL_INPUTSEL_VREFDIV2 (_ADC_SINGLECTRL_INPUTSEL_VREFDIV2 << 8)
294
#define ADC_SINGLECTRL_INPUTSEL_DAC0OUT0 (_ADC_SINGLECTRL_INPUTSEL_DAC0OUT0 << 8)
295
#define ADC_SINGLECTRL_INPUTSEL_DAC0OUT1 (_ADC_SINGLECTRL_INPUTSEL_DAC0OUT1 << 8)
296
#define _ADC_SINGLECTRL_REF_SHIFT 16
297
#define _ADC_SINGLECTRL_REF_MASK 0x70000UL
298
#define _ADC_SINGLECTRL_REF_DEFAULT 0x00000000UL
299
#define _ADC_SINGLECTRL_REF_1V25 0x00000000UL
300
#define _ADC_SINGLECTRL_REF_2V5 0x00000001UL
301
#define _ADC_SINGLECTRL_REF_VDD 0x00000002UL
302
#define _ADC_SINGLECTRL_REF_5VDIFF 0x00000003UL
303
#define _ADC_SINGLECTRL_REF_EXTSINGLE 0x00000004UL
304
#define _ADC_SINGLECTRL_REF_2XEXTDIFF 0x00000005UL
305
#define _ADC_SINGLECTRL_REF_2XVDD 0x00000006UL
306
#define ADC_SINGLECTRL_REF_DEFAULT (_ADC_SINGLECTRL_REF_DEFAULT << 16)
307
#define ADC_SINGLECTRL_REF_1V25 (_ADC_SINGLECTRL_REF_1V25 << 16)
308
#define ADC_SINGLECTRL_REF_2V5 (_ADC_SINGLECTRL_REF_2V5 << 16)
309
#define ADC_SINGLECTRL_REF_VDD (_ADC_SINGLECTRL_REF_VDD << 16)
310
#define ADC_SINGLECTRL_REF_5VDIFF (_ADC_SINGLECTRL_REF_5VDIFF << 16)
311
#define ADC_SINGLECTRL_REF_EXTSINGLE (_ADC_SINGLECTRL_REF_EXTSINGLE << 16)
312
#define ADC_SINGLECTRL_REF_2XEXTDIFF (_ADC_SINGLECTRL_REF_2XEXTDIFF << 16)
313
#define ADC_SINGLECTRL_REF_2XVDD (_ADC_SINGLECTRL_REF_2XVDD << 16)
314
#define _ADC_SINGLECTRL_AT_SHIFT 20
315
#define _ADC_SINGLECTRL_AT_MASK 0xF00000UL
316
#define _ADC_SINGLECTRL_AT_DEFAULT 0x00000000UL
317
#define _ADC_SINGLECTRL_AT_1CYCLE 0x00000000UL
318
#define _ADC_SINGLECTRL_AT_2CYCLES 0x00000001UL
319
#define _ADC_SINGLECTRL_AT_4CYCLES 0x00000002UL
320
#define _ADC_SINGLECTRL_AT_8CYCLES 0x00000003UL
321
#define _ADC_SINGLECTRL_AT_16CYCLES 0x00000004UL
322
#define _ADC_SINGLECTRL_AT_32CYCLES 0x00000005UL
323
#define _ADC_SINGLECTRL_AT_64CYCLES 0x00000006UL
324
#define _ADC_SINGLECTRL_AT_128CYCLES 0x00000007UL
325
#define _ADC_SINGLECTRL_AT_256CYCLES 0x00000008UL
326
#define ADC_SINGLECTRL_AT_DEFAULT (_ADC_SINGLECTRL_AT_DEFAULT << 20)
327
#define ADC_SINGLECTRL_AT_1CYCLE (_ADC_SINGLECTRL_AT_1CYCLE << 20)
328
#define ADC_SINGLECTRL_AT_2CYCLES (_ADC_SINGLECTRL_AT_2CYCLES << 20)
329
#define ADC_SINGLECTRL_AT_4CYCLES (_ADC_SINGLECTRL_AT_4CYCLES << 20)
330
#define ADC_SINGLECTRL_AT_8CYCLES (_ADC_SINGLECTRL_AT_8CYCLES << 20)
331
#define ADC_SINGLECTRL_AT_16CYCLES (_ADC_SINGLECTRL_AT_16CYCLES << 20)
332
#define ADC_SINGLECTRL_AT_32CYCLES (_ADC_SINGLECTRL_AT_32CYCLES << 20)
333
#define ADC_SINGLECTRL_AT_64CYCLES (_ADC_SINGLECTRL_AT_64CYCLES << 20)
334
#define ADC_SINGLECTRL_AT_128CYCLES (_ADC_SINGLECTRL_AT_128CYCLES << 20)
335
#define ADC_SINGLECTRL_AT_256CYCLES (_ADC_SINGLECTRL_AT_256CYCLES << 20)
336
#define ADC_SINGLECTRL_PRSEN (0x1UL << 24)
337
#define _ADC_SINGLECTRL_PRSEN_SHIFT 24
338
#define _ADC_SINGLECTRL_PRSEN_MASK 0x1000000UL
339
#define _ADC_SINGLECTRL_PRSEN_DEFAULT 0x00000000UL
340
#define ADC_SINGLECTRL_PRSEN_DEFAULT (_ADC_SINGLECTRL_PRSEN_DEFAULT << 24)
341
#define _ADC_SINGLECTRL_PRSSEL_SHIFT 28
342
#define _ADC_SINGLECTRL_PRSSEL_MASK 0x70000000UL
343
#define _ADC_SINGLECTRL_PRSSEL_DEFAULT 0x00000000UL
344
#define _ADC_SINGLECTRL_PRSSEL_PRSCH0 0x00000000UL
345
#define _ADC_SINGLECTRL_PRSSEL_PRSCH1 0x00000001UL
346
#define _ADC_SINGLECTRL_PRSSEL_PRSCH2 0x00000002UL
347
#define _ADC_SINGLECTRL_PRSSEL_PRSCH3 0x00000003UL
348
#define _ADC_SINGLECTRL_PRSSEL_PRSCH4 0x00000004UL
349
#define _ADC_SINGLECTRL_PRSSEL_PRSCH5 0x00000005UL
350
#define _ADC_SINGLECTRL_PRSSEL_PRSCH6 0x00000006UL
351
#define _ADC_SINGLECTRL_PRSSEL_PRSCH7 0x00000007UL
352
#define ADC_SINGLECTRL_PRSSEL_DEFAULT (_ADC_SINGLECTRL_PRSSEL_DEFAULT << 28)
353
#define ADC_SINGLECTRL_PRSSEL_PRSCH0 (_ADC_SINGLECTRL_PRSSEL_PRSCH0 << 28)
354
#define ADC_SINGLECTRL_PRSSEL_PRSCH1 (_ADC_SINGLECTRL_PRSSEL_PRSCH1 << 28)
355
#define ADC_SINGLECTRL_PRSSEL_PRSCH2 (_ADC_SINGLECTRL_PRSSEL_PRSCH2 << 28)
356
#define ADC_SINGLECTRL_PRSSEL_PRSCH3 (_ADC_SINGLECTRL_PRSSEL_PRSCH3 << 28)
357
#define ADC_SINGLECTRL_PRSSEL_PRSCH4 (_ADC_SINGLECTRL_PRSSEL_PRSCH4 << 28)
358
#define ADC_SINGLECTRL_PRSSEL_PRSCH5 (_ADC_SINGLECTRL_PRSSEL_PRSCH5 << 28)
359
#define ADC_SINGLECTRL_PRSSEL_PRSCH6 (_ADC_SINGLECTRL_PRSSEL_PRSCH6 << 28)
360
#define ADC_SINGLECTRL_PRSSEL_PRSCH7 (_ADC_SINGLECTRL_PRSSEL_PRSCH7 << 28)
362
/* Bit fields for ADC SCANCTRL */
363
#define _ADC_SCANCTRL_RESETVALUE 0x00000000UL
364
#define _ADC_SCANCTRL_MASK 0x71F7FF37UL
365
#define ADC_SCANCTRL_REP (0x1UL << 0)
366
#define _ADC_SCANCTRL_REP_SHIFT 0
367
#define _ADC_SCANCTRL_REP_MASK 0x1UL
368
#define _ADC_SCANCTRL_REP_DEFAULT 0x00000000UL
369
#define ADC_SCANCTRL_REP_DEFAULT (_ADC_SCANCTRL_REP_DEFAULT << 0)
370
#define ADC_SCANCTRL_DIFF (0x1UL << 1)
371
#define _ADC_SCANCTRL_DIFF_SHIFT 1
372
#define _ADC_SCANCTRL_DIFF_MASK 0x2UL
373
#define _ADC_SCANCTRL_DIFF_DEFAULT 0x00000000UL
374
#define ADC_SCANCTRL_DIFF_DEFAULT (_ADC_SCANCTRL_DIFF_DEFAULT << 1)
375
#define ADC_SCANCTRL_ADJ (0x1UL << 2)
376
#define _ADC_SCANCTRL_ADJ_SHIFT 2
377
#define _ADC_SCANCTRL_ADJ_MASK 0x4UL
378
#define _ADC_SCANCTRL_ADJ_DEFAULT 0x00000000UL
379
#define _ADC_SCANCTRL_ADJ_RIGHT 0x00000000UL
380
#define _ADC_SCANCTRL_ADJ_LEFT 0x00000001UL
381
#define ADC_SCANCTRL_ADJ_DEFAULT (_ADC_SCANCTRL_ADJ_DEFAULT << 2)
382
#define ADC_SCANCTRL_ADJ_RIGHT (_ADC_SCANCTRL_ADJ_RIGHT << 2)
383
#define ADC_SCANCTRL_ADJ_LEFT (_ADC_SCANCTRL_ADJ_LEFT << 2)
384
#define _ADC_SCANCTRL_RES_SHIFT 4
385
#define _ADC_SCANCTRL_RES_MASK 0x30UL
386
#define _ADC_SCANCTRL_RES_DEFAULT 0x00000000UL
387
#define _ADC_SCANCTRL_RES_12BIT 0x00000000UL
388
#define _ADC_SCANCTRL_RES_8BIT 0x00000001UL
389
#define _ADC_SCANCTRL_RES_6BIT 0x00000002UL
390
#define _ADC_SCANCTRL_RES_OVS 0x00000003UL
391
#define ADC_SCANCTRL_RES_DEFAULT (_ADC_SCANCTRL_RES_DEFAULT << 4)
392
#define ADC_SCANCTRL_RES_12BIT (_ADC_SCANCTRL_RES_12BIT << 4)
393
#define ADC_SCANCTRL_RES_8BIT (_ADC_SCANCTRL_RES_8BIT << 4)
394
#define ADC_SCANCTRL_RES_6BIT (_ADC_SCANCTRL_RES_6BIT << 4)
395
#define ADC_SCANCTRL_RES_OVS (_ADC_SCANCTRL_RES_OVS << 4)
396
#define _ADC_SCANCTRL_INPUTMASK_SHIFT 8
397
#define _ADC_SCANCTRL_INPUTMASK_MASK 0xFF00UL
398
#define _ADC_SCANCTRL_INPUTMASK_DEFAULT 0x00000000UL
399
#define _ADC_SCANCTRL_INPUTMASK_CH0 0x00000001UL
400
#define _ADC_SCANCTRL_INPUTMASK_CH0CH1 0x00000001UL
401
#define _ADC_SCANCTRL_INPUTMASK_CH1 0x00000002UL
402
#define _ADC_SCANCTRL_INPUTMASK_CH2CH3 0x00000002UL
403
#define _ADC_SCANCTRL_INPUTMASK_CH2 0x00000004UL
404
#define _ADC_SCANCTRL_INPUTMASK_CH4CH5 0x00000004UL
405
#define _ADC_SCANCTRL_INPUTMASK_CH6CH7 0x00000008UL
406
#define _ADC_SCANCTRL_INPUTMASK_CH3 0x00000008UL
407
#define _ADC_SCANCTRL_INPUTMASK_CH4 0x00000010UL
408
#define _ADC_SCANCTRL_INPUTMASK_CH5 0x00000020UL
409
#define _ADC_SCANCTRL_INPUTMASK_CH6 0x00000040UL
410
#define _ADC_SCANCTRL_INPUTMASK_CH7 0x00000080UL
411
#define ADC_SCANCTRL_INPUTMASK_DEFAULT (_ADC_SCANCTRL_INPUTMASK_DEFAULT << 8)
412
#define ADC_SCANCTRL_INPUTMASK_CH0 (_ADC_SCANCTRL_INPUTMASK_CH0 << 8)
413
#define ADC_SCANCTRL_INPUTMASK_CH0CH1 (_ADC_SCANCTRL_INPUTMASK_CH0CH1 << 8)
414
#define ADC_SCANCTRL_INPUTMASK_CH1 (_ADC_SCANCTRL_INPUTMASK_CH1 << 8)
415
#define ADC_SCANCTRL_INPUTMASK_CH2CH3 (_ADC_SCANCTRL_INPUTMASK_CH2CH3 << 8)
416
#define ADC_SCANCTRL_INPUTMASK_CH2 (_ADC_SCANCTRL_INPUTMASK_CH2 << 8)
417
#define ADC_SCANCTRL_INPUTMASK_CH4CH5 (_ADC_SCANCTRL_INPUTMASK_CH4CH5 << 8)
418
#define ADC_SCANCTRL_INPUTMASK_CH6CH7 (_ADC_SCANCTRL_INPUTMASK_CH6CH7 << 8)
419
#define ADC_SCANCTRL_INPUTMASK_CH3 (_ADC_SCANCTRL_INPUTMASK_CH3 << 8)
420
#define ADC_SCANCTRL_INPUTMASK_CH4 (_ADC_SCANCTRL_INPUTMASK_CH4 << 8)
421
#define ADC_SCANCTRL_INPUTMASK_CH5 (_ADC_SCANCTRL_INPUTMASK_CH5 << 8)
422
#define ADC_SCANCTRL_INPUTMASK_CH6 (_ADC_SCANCTRL_INPUTMASK_CH6 << 8)
423
#define ADC_SCANCTRL_INPUTMASK_CH7 (_ADC_SCANCTRL_INPUTMASK_CH7 << 8)
424
#define _ADC_SCANCTRL_REF_SHIFT 16
425
#define _ADC_SCANCTRL_REF_MASK 0x70000UL
426
#define _ADC_SCANCTRL_REF_DEFAULT 0x00000000UL
427
#define _ADC_SCANCTRL_REF_1V25 0x00000000UL
428
#define _ADC_SCANCTRL_REF_2V5 0x00000001UL
429
#define _ADC_SCANCTRL_REF_VDD 0x00000002UL
430
#define _ADC_SCANCTRL_REF_5VDIFF 0x00000003UL
431
#define _ADC_SCANCTRL_REF_EXTSINGLE 0x00000004UL
432
#define _ADC_SCANCTRL_REF_2XEXTDIFF 0x00000005UL
433
#define _ADC_SCANCTRL_REF_2XVDD 0x00000006UL
434
#define ADC_SCANCTRL_REF_DEFAULT (_ADC_SCANCTRL_REF_DEFAULT << 16)
435
#define ADC_SCANCTRL_REF_1V25 (_ADC_SCANCTRL_REF_1V25 << 16)
436
#define ADC_SCANCTRL_REF_2V5 (_ADC_SCANCTRL_REF_2V5 << 16)
437
#define ADC_SCANCTRL_REF_VDD (_ADC_SCANCTRL_REF_VDD << 16)
438
#define ADC_SCANCTRL_REF_5VDIFF (_ADC_SCANCTRL_REF_5VDIFF << 16)
439
#define ADC_SCANCTRL_REF_EXTSINGLE (_ADC_SCANCTRL_REF_EXTSINGLE << 16)
440
#define ADC_SCANCTRL_REF_2XEXTDIFF (_ADC_SCANCTRL_REF_2XEXTDIFF << 16)
441
#define ADC_SCANCTRL_REF_2XVDD (_ADC_SCANCTRL_REF_2XVDD << 16)
442
#define _ADC_SCANCTRL_AT_SHIFT 20
443
#define _ADC_SCANCTRL_AT_MASK 0xF00000UL
444
#define _ADC_SCANCTRL_AT_DEFAULT 0x00000000UL
445
#define _ADC_SCANCTRL_AT_1CYCLE 0x00000000UL
446
#define _ADC_SCANCTRL_AT_2CYCLES 0x00000001UL
447
#define _ADC_SCANCTRL_AT_4CYCLES 0x00000002UL
448
#define _ADC_SCANCTRL_AT_8CYCLES 0x00000003UL
449
#define _ADC_SCANCTRL_AT_16CYCLES 0x00000004UL
450
#define _ADC_SCANCTRL_AT_32CYCLES 0x00000005UL
451
#define _ADC_SCANCTRL_AT_64CYCLES 0x00000006UL
452
#define _ADC_SCANCTRL_AT_128CYCLES 0x00000007UL
453
#define _ADC_SCANCTRL_AT_256CYCLES 0x00000008UL
454
#define ADC_SCANCTRL_AT_DEFAULT (_ADC_SCANCTRL_AT_DEFAULT << 20)
455
#define ADC_SCANCTRL_AT_1CYCLE (_ADC_SCANCTRL_AT_1CYCLE << 20)
456
#define ADC_SCANCTRL_AT_2CYCLES (_ADC_SCANCTRL_AT_2CYCLES << 20)
457
#define ADC_SCANCTRL_AT_4CYCLES (_ADC_SCANCTRL_AT_4CYCLES << 20)
458
#define ADC_SCANCTRL_AT_8CYCLES (_ADC_SCANCTRL_AT_8CYCLES << 20)
459
#define ADC_SCANCTRL_AT_16CYCLES (_ADC_SCANCTRL_AT_16CYCLES << 20)
460
#define ADC_SCANCTRL_AT_32CYCLES (_ADC_SCANCTRL_AT_32CYCLES << 20)
461
#define ADC_SCANCTRL_AT_64CYCLES (_ADC_SCANCTRL_AT_64CYCLES << 20)
462
#define ADC_SCANCTRL_AT_128CYCLES (_ADC_SCANCTRL_AT_128CYCLES << 20)
463
#define ADC_SCANCTRL_AT_256CYCLES (_ADC_SCANCTRL_AT_256CYCLES << 20)
464
#define ADC_SCANCTRL_PRSEN (0x1UL << 24)
465
#define _ADC_SCANCTRL_PRSEN_SHIFT 24
466
#define _ADC_SCANCTRL_PRSEN_MASK 0x1000000UL
467
#define _ADC_SCANCTRL_PRSEN_DEFAULT 0x00000000UL
468
#define ADC_SCANCTRL_PRSEN_DEFAULT (_ADC_SCANCTRL_PRSEN_DEFAULT << 24)
469
#define _ADC_SCANCTRL_PRSSEL_SHIFT 28
470
#define _ADC_SCANCTRL_PRSSEL_MASK 0x70000000UL
471
#define _ADC_SCANCTRL_PRSSEL_DEFAULT 0x00000000UL
472
#define _ADC_SCANCTRL_PRSSEL_PRSCH0 0x00000000UL
473
#define _ADC_SCANCTRL_PRSSEL_PRSCH1 0x00000001UL
474
#define _ADC_SCANCTRL_PRSSEL_PRSCH2 0x00000002UL
475
#define _ADC_SCANCTRL_PRSSEL_PRSCH3 0x00000003UL
476
#define _ADC_SCANCTRL_PRSSEL_PRSCH4 0x00000004UL
477
#define _ADC_SCANCTRL_PRSSEL_PRSCH5 0x00000005UL
478
#define _ADC_SCANCTRL_PRSSEL_PRSCH6 0x00000006UL
479
#define _ADC_SCANCTRL_PRSSEL_PRSCH7 0x00000007UL
480
#define ADC_SCANCTRL_PRSSEL_DEFAULT (_ADC_SCANCTRL_PRSSEL_DEFAULT << 28)
481
#define ADC_SCANCTRL_PRSSEL_PRSCH0 (_ADC_SCANCTRL_PRSSEL_PRSCH0 << 28)
482
#define ADC_SCANCTRL_PRSSEL_PRSCH1 (_ADC_SCANCTRL_PRSSEL_PRSCH1 << 28)
483
#define ADC_SCANCTRL_PRSSEL_PRSCH2 (_ADC_SCANCTRL_PRSSEL_PRSCH2 << 28)
484
#define ADC_SCANCTRL_PRSSEL_PRSCH3 (_ADC_SCANCTRL_PRSSEL_PRSCH3 << 28)
485
#define ADC_SCANCTRL_PRSSEL_PRSCH4 (_ADC_SCANCTRL_PRSSEL_PRSCH4 << 28)
486
#define ADC_SCANCTRL_PRSSEL_PRSCH5 (_ADC_SCANCTRL_PRSSEL_PRSCH5 << 28)
487
#define ADC_SCANCTRL_PRSSEL_PRSCH6 (_ADC_SCANCTRL_PRSSEL_PRSCH6 << 28)
488
#define ADC_SCANCTRL_PRSSEL_PRSCH7 (_ADC_SCANCTRL_PRSSEL_PRSCH7 << 28)
490
/* Bit fields for ADC IEN */
491
#define _ADC_IEN_RESETVALUE 0x00000000UL
492
#define _ADC_IEN_MASK 0x00000303UL
493
#define ADC_IEN_SINGLE (0x1UL << 0)
494
#define _ADC_IEN_SINGLE_SHIFT 0
495
#define _ADC_IEN_SINGLE_MASK 0x1UL
496
#define _ADC_IEN_SINGLE_DEFAULT 0x00000000UL
497
#define ADC_IEN_SINGLE_DEFAULT (_ADC_IEN_SINGLE_DEFAULT << 0)
498
#define ADC_IEN_SCAN (0x1UL << 1)
499
#define _ADC_IEN_SCAN_SHIFT 1
500
#define _ADC_IEN_SCAN_MASK 0x2UL
501
#define _ADC_IEN_SCAN_DEFAULT 0x00000000UL
502
#define ADC_IEN_SCAN_DEFAULT (_ADC_IEN_SCAN_DEFAULT << 1)
503
#define ADC_IEN_SINGLEOF (0x1UL << 8)
504
#define _ADC_IEN_SINGLEOF_SHIFT 8
505
#define _ADC_IEN_SINGLEOF_MASK 0x100UL
506
#define _ADC_IEN_SINGLEOF_DEFAULT 0x00000000UL
507
#define ADC_IEN_SINGLEOF_DEFAULT (_ADC_IEN_SINGLEOF_DEFAULT << 8)
508
#define ADC_IEN_SCANOF (0x1UL << 9)
509
#define _ADC_IEN_SCANOF_SHIFT 9
510
#define _ADC_IEN_SCANOF_MASK 0x200UL
511
#define _ADC_IEN_SCANOF_DEFAULT 0x00000000UL
512
#define ADC_IEN_SCANOF_DEFAULT (_ADC_IEN_SCANOF_DEFAULT << 9)
514
/* Bit fields for ADC IF */
515
#define _ADC_IF_RESETVALUE 0x00000000UL
516
#define _ADC_IF_MASK 0x00000303UL
517
#define ADC_IF_SINGLE (0x1UL << 0)
518
#define _ADC_IF_SINGLE_SHIFT 0
519
#define _ADC_IF_SINGLE_MASK 0x1UL
520
#define _ADC_IF_SINGLE_DEFAULT 0x00000000UL
521
#define ADC_IF_SINGLE_DEFAULT (_ADC_IF_SINGLE_DEFAULT << 0)
522
#define ADC_IF_SCAN (0x1UL << 1)
523
#define _ADC_IF_SCAN_SHIFT 1
524
#define _ADC_IF_SCAN_MASK 0x2UL
525
#define _ADC_IF_SCAN_DEFAULT 0x00000000UL
526
#define ADC_IF_SCAN_DEFAULT (_ADC_IF_SCAN_DEFAULT << 1)
527
#define ADC_IF_SINGLEOF (0x1UL << 8)
528
#define _ADC_IF_SINGLEOF_SHIFT 8
529
#define _ADC_IF_SINGLEOF_MASK 0x100UL
530
#define _ADC_IF_SINGLEOF_DEFAULT 0x00000000UL
531
#define ADC_IF_SINGLEOF_DEFAULT (_ADC_IF_SINGLEOF_DEFAULT << 8)
532
#define ADC_IF_SCANOF (0x1UL << 9)
533
#define _ADC_IF_SCANOF_SHIFT 9
534
#define _ADC_IF_SCANOF_MASK 0x200UL
535
#define _ADC_IF_SCANOF_DEFAULT 0x00000000UL
536
#define ADC_IF_SCANOF_DEFAULT (_ADC_IF_SCANOF_DEFAULT << 9)
538
/* Bit fields for ADC IFS */
539
#define _ADC_IFS_RESETVALUE 0x00000000UL
540
#define _ADC_IFS_MASK 0x00000303UL
541
#define ADC_IFS_SINGLE (0x1UL << 0)
542
#define _ADC_IFS_SINGLE_SHIFT 0
543
#define _ADC_IFS_SINGLE_MASK 0x1UL
544
#define _ADC_IFS_SINGLE_DEFAULT 0x00000000UL
545
#define ADC_IFS_SINGLE_DEFAULT (_ADC_IFS_SINGLE_DEFAULT << 0)
546
#define ADC_IFS_SCAN (0x1UL << 1)
547
#define _ADC_IFS_SCAN_SHIFT 1
548
#define _ADC_IFS_SCAN_MASK 0x2UL
549
#define _ADC_IFS_SCAN_DEFAULT 0x00000000UL
550
#define ADC_IFS_SCAN_DEFAULT (_ADC_IFS_SCAN_DEFAULT << 1)
551
#define ADC_IFS_SINGLEOF (0x1UL << 8)
552
#define _ADC_IFS_SINGLEOF_SHIFT 8
553
#define _ADC_IFS_SINGLEOF_MASK 0x100UL
554
#define _ADC_IFS_SINGLEOF_DEFAULT 0x00000000UL
555
#define ADC_IFS_SINGLEOF_DEFAULT (_ADC_IFS_SINGLEOF_DEFAULT << 8)
556
#define ADC_IFS_SCANOF (0x1UL << 9)
557
#define _ADC_IFS_SCANOF_SHIFT 9
558
#define _ADC_IFS_SCANOF_MASK 0x200UL
559
#define _ADC_IFS_SCANOF_DEFAULT 0x00000000UL
560
#define ADC_IFS_SCANOF_DEFAULT (_ADC_IFS_SCANOF_DEFAULT << 9)
562
/* Bit fields for ADC IFC */
563
#define _ADC_IFC_RESETVALUE 0x00000000UL
564
#define _ADC_IFC_MASK 0x00000303UL
565
#define ADC_IFC_SINGLE (0x1UL << 0)
566
#define _ADC_IFC_SINGLE_SHIFT 0
567
#define _ADC_IFC_SINGLE_MASK 0x1UL
568
#define _ADC_IFC_SINGLE_DEFAULT 0x00000000UL
569
#define ADC_IFC_SINGLE_DEFAULT (_ADC_IFC_SINGLE_DEFAULT << 0)
570
#define ADC_IFC_SCAN (0x1UL << 1)
571
#define _ADC_IFC_SCAN_SHIFT 1
572
#define _ADC_IFC_SCAN_MASK 0x2UL
573
#define _ADC_IFC_SCAN_DEFAULT 0x00000000UL
574
#define ADC_IFC_SCAN_DEFAULT (_ADC_IFC_SCAN_DEFAULT << 1)
575
#define ADC_IFC_SINGLEOF (0x1UL << 8)
576
#define _ADC_IFC_SINGLEOF_SHIFT 8
577
#define _ADC_IFC_SINGLEOF_MASK 0x100UL
578
#define _ADC_IFC_SINGLEOF_DEFAULT 0x00000000UL
579
#define ADC_IFC_SINGLEOF_DEFAULT (_ADC_IFC_SINGLEOF_DEFAULT << 8)
580
#define ADC_IFC_SCANOF (0x1UL << 9)
581
#define _ADC_IFC_SCANOF_SHIFT 9
582
#define _ADC_IFC_SCANOF_MASK 0x200UL
583
#define _ADC_IFC_SCANOF_DEFAULT 0x00000000UL
584
#define ADC_IFC_SCANOF_DEFAULT (_ADC_IFC_SCANOF_DEFAULT << 9)
586
/* Bit fields for ADC SINGLEDATA */
587
#define _ADC_SINGLEDATA_RESETVALUE 0x00000000UL
588
#define _ADC_SINGLEDATA_MASK 0xFFFFFFFFUL
589
#define _ADC_SINGLEDATA_DATA_SHIFT 0
590
#define _ADC_SINGLEDATA_DATA_MASK 0xFFFFFFFFUL
591
#define _ADC_SINGLEDATA_DATA_DEFAULT 0x00000000UL
592
#define ADC_SINGLEDATA_DATA_DEFAULT (_ADC_SINGLEDATA_DATA_DEFAULT << 0)
594
/* Bit fields for ADC SCANDATA */
595
#define _ADC_SCANDATA_RESETVALUE 0x00000000UL
596
#define _ADC_SCANDATA_MASK 0xFFFFFFFFUL
597
#define _ADC_SCANDATA_DATA_SHIFT 0
598
#define _ADC_SCANDATA_DATA_MASK 0xFFFFFFFFUL
599
#define _ADC_SCANDATA_DATA_DEFAULT 0x00000000UL
600
#define ADC_SCANDATA_DATA_DEFAULT (_ADC_SCANDATA_DATA_DEFAULT << 0)
602
/* Bit fields for ADC SINGLEDATAP */
603
#define _ADC_SINGLEDATAP_RESETVALUE 0x00000000UL
604
#define _ADC_SINGLEDATAP_MASK 0xFFFFFFFFUL
605
#define _ADC_SINGLEDATAP_DATAP_SHIFT 0
606
#define _ADC_SINGLEDATAP_DATAP_MASK 0xFFFFFFFFUL
607
#define _ADC_SINGLEDATAP_DATAP_DEFAULT 0x00000000UL
608
#define ADC_SINGLEDATAP_DATAP_DEFAULT (_ADC_SINGLEDATAP_DATAP_DEFAULT << 0)
610
/* Bit fields for ADC SCANDATAP */
611
#define _ADC_SCANDATAP_RESETVALUE 0x00000000UL
612
#define _ADC_SCANDATAP_MASK 0xFFFFFFFFUL
613
#define _ADC_SCANDATAP_DATAP_SHIFT 0
614
#define _ADC_SCANDATAP_DATAP_MASK 0xFFFFFFFFUL
615
#define _ADC_SCANDATAP_DATAP_DEFAULT 0x00000000UL
616
#define ADC_SCANDATAP_DATAP_DEFAULT (_ADC_SCANDATAP_DATAP_DEFAULT << 0)
618
/* Bit fields for ADC CAL */
619
#define _ADC_CAL_RESETVALUE 0x3F003F00UL
620
#define _ADC_CAL_MASK 0x7F7F7F7FUL
621
#define _ADC_CAL_SINGLEOFFSET_SHIFT 0
622
#define _ADC_CAL_SINGLEOFFSET_MASK 0x7FUL
623
#define _ADC_CAL_SINGLEOFFSET_DEFAULT 0x00000000UL
624
#define ADC_CAL_SINGLEOFFSET_DEFAULT (_ADC_CAL_SINGLEOFFSET_DEFAULT << 0)
625
#define _ADC_CAL_SINGLEGAIN_SHIFT 8
626
#define _ADC_CAL_SINGLEGAIN_MASK 0x7F00UL
627
#define _ADC_CAL_SINGLEGAIN_DEFAULT 0x0000003FUL
628
#define ADC_CAL_SINGLEGAIN_DEFAULT (_ADC_CAL_SINGLEGAIN_DEFAULT << 8)
629
#define _ADC_CAL_SCANOFFSET_SHIFT 16
630
#define _ADC_CAL_SCANOFFSET_MASK 0x7F0000UL
631
#define _ADC_CAL_SCANOFFSET_DEFAULT 0x00000000UL
632
#define ADC_CAL_SCANOFFSET_DEFAULT (_ADC_CAL_SCANOFFSET_DEFAULT << 16)
633
#define _ADC_CAL_SCANGAIN_SHIFT 24
634
#define _ADC_CAL_SCANGAIN_MASK 0x7F000000UL
635
#define _ADC_CAL_SCANGAIN_DEFAULT 0x0000003FUL
636
#define ADC_CAL_SCANGAIN_DEFAULT (_ADC_CAL_SCANGAIN_DEFAULT << 24)
638
/* Bit fields for ADC BIASPROG */
639
#define _ADC_BIASPROG_RESETVALUE 0x00000747UL
640
#define _ADC_BIASPROG_MASK 0x00000F4FUL
641
#define _ADC_BIASPROG_BIASPROG_SHIFT 0
642
#define _ADC_BIASPROG_BIASPROG_MASK 0xFUL
643
#define _ADC_BIASPROG_BIASPROG_DEFAULT 0x00000007UL
644
#define ADC_BIASPROG_BIASPROG_DEFAULT (_ADC_BIASPROG_BIASPROG_DEFAULT << 0)
645
#define ADC_BIASPROG_HALFBIAS (0x1UL << 6)
646
#define _ADC_BIASPROG_HALFBIAS_SHIFT 6
647
#define _ADC_BIASPROG_HALFBIAS_MASK 0x40UL
648
#define _ADC_BIASPROG_HALFBIAS_DEFAULT 0x00000001UL
649
#define ADC_BIASPROG_HALFBIAS_DEFAULT (_ADC_BIASPROG_HALFBIAS_DEFAULT << 6)
650
#define _ADC_BIASPROG_COMPBIAS_SHIFT 8
651
#define _ADC_BIASPROG_COMPBIAS_MASK 0xF00UL
652
#define _ADC_BIASPROG_COMPBIAS_DEFAULT 0x00000007UL
653
#define ADC_BIASPROG_COMPBIAS_DEFAULT (_ADC_BIASPROG_COMPBIAS_DEFAULT << 8)
ADC_TypeDef::SINGLEDATAP
__I uint32_t SINGLEDATAP
Definition:
efm32g_adc.h:54
__IO
#define __IO
Definition:
bsp_dk_bcreg_3201.h:53
ADC_TypeDef
Definition:
efm32g_adc.h:41
ADC_TypeDef::BIASPROG
__IO uint32_t BIASPROG
Definition:
efm32g_adc.h:58
ADC_TypeDef::SINGLECTRL
__IO uint32_t SINGLECTRL
Definition:
efm32g_adc.h:46
ADC_TypeDef::IFS
__IO uint32_t IFS
Definition:
efm32g_adc.h:50
ADC_TypeDef::CMD
__IO uint32_t CMD
Definition:
efm32g_adc.h:44
ADC_TypeDef::SCANCTRL
__IO uint32_t SCANCTRL
Definition:
efm32g_adc.h:47
ADC_TypeDef::SCANDATAP
__I uint32_t SCANDATAP
Definition:
efm32g_adc.h:55
ADC_TypeDef::SCANDATA
__I uint32_t SCANDATA
Definition:
efm32g_adc.h:53
ADC_TypeDef::SINGLEDATA
__I uint32_t SINGLEDATA
Definition:
efm32g_adc.h:52
ADC_TypeDef::IF
__I uint32_t IF
Definition:
efm32g_adc.h:49
ADC_TypeDef::STATUS
__I uint32_t STATUS
Definition:
efm32g_adc.h:45
ADC_TypeDef::IFC
__IO uint32_t IFC
Definition:
efm32g_adc.h:51
ADC_TypeDef::IEN
__IO uint32_t IEN
Definition:
efm32g_adc.h:48
ADC_TypeDef::CTRL
__IO uint32_t CTRL
Definition:
efm32g_adc.h:43
ADC_TypeDef::CAL
__IO uint32_t CAL
Definition:
efm32g_adc.h:56
Device
SiliconLabs
EFM32G
Include
efm32g_adc.h
Generated on Tue Dec 8 2015 15:35:29 for EFM32 Gecko Software Documentation by
1.8.10