EFM32 Gecko Software Documentation  efm32g-doc-4.2.1
em_rmu.c
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1 /***************************************************************************/
34 #include "em_rmu.h"
35 #if defined(RMU_COUNT) && (RMU_COUNT > 0)
36 
37 #include "em_common.h"
38 #include "em_emu.h"
39 #include "em_bus.h"
40 
41 /***************************************************************************/
46 /***************************************************************************/
52 /*******************************************************************************
53  ***************************** DEFINES *********************************
54  ******************************************************************************/
55 
58 /* Reset cause "don't care" definitions.
59  1's mark the bits that must be zero, zeros are "don't cares". */
60 #if (_RMU_RSTCAUSE_MASK == 0x0000007FUL)
61 #define RMU_RSTCAUSE_PORST_XMASK (0x00000000)
62 #define RMU_RSTCAUSE_BODUNREGRST_XMASK (0x00000081)
63 #define RMU_RSTCAUSE_BODREGRST_XMASK (0x00000091)
64 #define RMU_RSTCAUSE_EXTRST_XMASK (0x00000001)
65 #define RMU_RSTCAUSE_WDOGRST_XMASK (0x00000003)
66 #define RMU_RSTCAUSE_LOCKUPRST_XMASK (0x0000EFDF)
67 #define RMU_RSTCAUSE_SYSREQRST_XMASK (0x0000EF9F)
68 #define NUM_RSTCAUSES (7)
69 
70 #elif (_RMU_RSTCAUSE_MASK == 0x000007FFUL)
71 #define RMU_RSTCAUSE_PORST_XMASK (0x00000000)
72 #define RMU_RSTCAUSE_BODUNREGRST_XMASK (0x00000081)
73 #define RMU_RSTCAUSE_BODREGRST_XMASK (0x00000091)
74 #define RMU_RSTCAUSE_EXTRST_XMASK (0x00000001)
75 #define RMU_RSTCAUSE_WDOGRST_XMASK (0x00000003)
76 #define RMU_RSTCAUSE_LOCKUPRST_XMASK (0x0000EFDF)
77 #define RMU_RSTCAUSE_SYSREQRST_XMASK (0x0000EF9F)
78 #define RMU_RSTCAUSE_EM4RST_XMASK (0x00000719)
79 #define RMU_RSTCAUSE_EM4WURST_XMASK (0x00000619)
80 #define RMU_RSTCAUSE_BODAVDD0_XMASK (0x0000041F)
81 #define RMU_RSTCAUSE_BODAVDD1_XMASK (0x0000021F)
82 #define NUM_RSTCAUSES (11)
83 
84 #elif (_RMU_RSTCAUSE_MASK == 0x0000FFFFUL)
85 #define RMU_RSTCAUSE_PORST_XMASK (0x00000000)
86 #define RMU_RSTCAUSE_BODUNREGRST_XMASK (0x00000081)
87 #define RMU_RSTCAUSE_BODREGRST_XMASK (0x00000091)
88 #define RMU_RSTCAUSE_EXTRST_XMASK (0x00000001)
89 #define RMU_RSTCAUSE_WDOGRST_XMASK (0x00000003)
90 #define RMU_RSTCAUSE_LOCKUPRST_XMASK (0x0000EFDF)
91 #define RMU_RSTCAUSE_SYSREQRST_XMASK (0x0000EF9F)
92 #define RMU_RSTCAUSE_EM4RST_XMASK (0x00000719)
93 #define RMU_RSTCAUSE_EM4WURST_XMASK (0x00000619)
94 #define RMU_RSTCAUSE_BODAVDD0_XMASK (0x0000041F)
95 #define RMU_RSTCAUSE_BODAVDD1_XMASK (0x0000021F)
96 #define RMU_RSTCAUSE_BUBODVDDDREG_XMASK (0x00000001)
97 #define RMU_RSTCAUSE_BUBODBUVIN_XMASK (0x00000001)
98 #define RMU_RSTCAUSE_BUBODUNREG_XMASK (0x00000001)
99 #define RMU_RSTCAUSE_BUBODREG_XMASK (0x00000001)
100 #define RMU_RSTCAUSE_BUMODERST_XMASK (0x00000001)
101 #define NUM_RSTCAUSES (16)
102 
103 #elif ((_RMU_RSTCAUSE_MASK & 0x0FFFFFFF) == 0x00010F1DUL)
104 #define RMU_RSTCAUSE_PORST_XMASK (0x00000000)
105 #define RMU_RSTCAUSE_BODAVDD_XMASK (0x00000001)
106 #define RMU_RSTCAUSE_BODDVDD_XMASK (0x00000003)
107 #define RMU_RSTCAUSE_BODREGRST_XMASK (0x0000000F)
108 #define RMU_RSTCAUSE_EXTRST_XMASK (0x0000000F)
109 #define RMU_RSTCAUSE_LOCKUPRST_XMASK (0x0000001F)
110 #define RMU_RSTCAUSE_SYSREQRST_XMASK (0x0000001F)
111 #define RMU_RSTCAUSE_WDOGRST_XMASK (0x0000001F)
112 #define RMU_RSTCAUSE_EM4RST_XMASK (0x00000003)
113 #define NUM_RSTCAUSES (9)
114 
115 #else
116 #warning "RMU_RSTCAUSE XMASKs are not defined for this family."
117 #endif
118 
119 /*******************************************************************************
120  ******************************* STRUCTS ***********************************
121  ******************************************************************************/
122 
124 typedef struct
125 {
126  uint32_t resetCauseMask;
127  uint32_t dontCareMask;
128 } RMU_ResetCauseMasks_Typedef;
129 
130 
131 /*******************************************************************************
132  ******************************* TYPEDEFS **********************************
133  ******************************************************************************/
134 
136 static const RMU_ResetCauseMasks_Typedef resetCauseMasks[NUM_RSTCAUSES] =
137  {
138  { RMU_RSTCAUSE_PORST, RMU_RSTCAUSE_PORST_XMASK },
139 #if defined(RMU_RSTCAUSE_BODUNREGRST)
140  { RMU_RSTCAUSE_BODUNREGRST, RMU_RSTCAUSE_BODUNREGRST_XMASK },
141 #endif
142 #if defined(RMU_RSTCAUSE_BODREGRST)
143  { RMU_RSTCAUSE_BODREGRST, RMU_RSTCAUSE_BODREGRST_XMASK },
144 #endif
145 #if defined(RMU_RSTCAUSE_AVDDBOD)
146  { RMU_RSTCAUSE_AVDDBOD, RMU_RSTCAUSE_BODAVDD_XMASK },
147 #endif
148 #if defined(RMU_RSTCAUSE_DVDDBOD)
149  { RMU_RSTCAUSE_DVDDBOD, RMU_RSTCAUSE_BODDVDD_XMASK },
150 #endif
151 #if defined(RMU_RSTCAUSE_DECBOD)
152  { RMU_RSTCAUSE_DECBOD, RMU_RSTCAUSE_BODREGRST_XMASK },
153 #endif
154  { RMU_RSTCAUSE_EXTRST, RMU_RSTCAUSE_EXTRST_XMASK },
155  { RMU_RSTCAUSE_WDOGRST, RMU_RSTCAUSE_WDOGRST_XMASK },
156  { RMU_RSTCAUSE_LOCKUPRST, RMU_RSTCAUSE_LOCKUPRST_XMASK },
157  { RMU_RSTCAUSE_SYSREQRST, RMU_RSTCAUSE_SYSREQRST_XMASK },
158 #if defined(RMU_RSTCAUSE_EM4RST)
159  { RMU_RSTCAUSE_EM4RST, RMU_RSTCAUSE_EM4RST_XMASK },
160 #endif
161 #if defined(RMU_RSTCAUSE_EM4WURST)
162  { RMU_RSTCAUSE_EM4WURST, RMU_RSTCAUSE_EM4WURST_XMASK },
163 #endif
164 #if defined(RMU_RSTCAUSE_BODAVDD0)
165  { RMU_RSTCAUSE_BODAVDD0, RMU_RSTCAUSE_BODAVDD0_XMASK },
166 #endif
167 #if defined(RMU_RSTCAUSE_BODAVDD1)
168  { RMU_RSTCAUSE_BODAVDD1, RMU_RSTCAUSE_BODAVDD1_XMASK },
169 #endif
170 #if defined(BU_PRESENT)
171  { RMU_RSTCAUSE_BUBODVDDDREG, RMU_RSTCAUSE_BUBODVDDDREG_XMASK },
172  { RMU_RSTCAUSE_BUBODBUVIN, RMU_RSTCAUSE_BUBODBUVIN_XMASK },
173  { RMU_RSTCAUSE_BUBODUNREG, RMU_RSTCAUSE_BUBODUNREG_XMASK },
174  { RMU_RSTCAUSE_BUBODREG, RMU_RSTCAUSE_BUBODREG_XMASK },
175  { RMU_RSTCAUSE_BUMODERST, RMU_RSTCAUSE_BUMODERST_XMASK },
176 #endif
177  };
178 
179 
180 /*******************************************************************************
181  ******************************** TEST ********************************
182  ******************************************************************************/
183 #if defined(EMLIB_REGRESSION_TEST)
184 /* Test variable that replaces the RSTCAUSE cause register when testing
185  the RMU_ResetCauseGet function. */
186 extern uint32_t rstCause;
187 #endif
188 
189 
192 /*******************************************************************************
193  ************************** GLOBAL FUNCTIONS *******************************
194  ******************************************************************************/
195 
196 /***************************************************************************/
205 {
206  /* Note that the RMU supports bit-band access, but not peripheral bit-field set/clear */
207 #if defined(_RMU_CTRL_PINRMODE_MASK)
208  uint32_t val;
209 #endif
210  uint32_t shift;
211 
212  shift = EFM32_CTZ((uint32_t)reset);
213 #if defined(_RMU_CTRL_PINRMODE_MASK)
214  val = (uint32_t)mode << shift;
215  RMU->CTRL = (RMU->CTRL & ~reset) | val;
216 #else
217  BUS_RegBitWrite(&RMU->CTRL, (uint32_t)shift, mode ? 1 : 0);
218 #endif
219 }
220 
221 
222 /***************************************************************************/
232 {
233  RMU->CMD = RMU_CMD_RCCLR;
234 
235 #if defined(EMU_AUXCTRL_HRCCLR)
236  {
237  uint32_t locked;
238 
239  /* Clear some reset causes not cleared with RMU CMD register */
240  /* (If EMU registers locked, they must be unlocked first) */
241  locked = EMU->LOCK & EMU_LOCK_LOCKKEY_LOCKED;
242  if (locked)
243  {
244  EMU_Unlock();
245  }
246 
249 
250  if (locked)
251  {
252  EMU_Lock();
253  }
254  }
255 #endif
256 }
257 
258 
259 /***************************************************************************/
273 uint32_t RMU_ResetCauseGet(void)
274 {
275 #if !defined(EMLIB_REGRESSION_TEST)
276  uint32_t rstCause = RMU->RSTCAUSE;
277 #endif
278  uint32_t validRstCause = 0;
279  uint32_t i;
280 
281  for (i = 0; i < NUM_RSTCAUSES; i++)
282  {
283  /* Checks to see if rstCause matches a RSTCAUSE and is not excluded by the X-mask */
284  if ((rstCause & resetCauseMasks[i].resetCauseMask)
285  && !(rstCause & resetCauseMasks[i].dontCareMask))
286  {
287  /* Adds the reset-cause to list of real reset-causes */
288  validRstCause |= resetCauseMasks[i].resetCauseMask;
289  }
290  }
291  return validRstCause;
292 }
293 
294 
297 #endif /* defined(RMU_COUNT) && (RMU_COUNT > 0) */
uint32_t RMU_ResetCauseGet(void)
Get the cause of the last reset.
Definition: em_rmu.c:273
RMU_Reset_TypeDef
Definition: em_rmu.h:75
RAM and peripheral bit-field set and clear API.
#define _EMU_AUXCTRL_HRCCLR_SHIFT
Definition: efm32g_emu.h:111
#define RMU_RSTCAUSE_SYSREQRST
Definition: efm32g_rmu.h:95
#define EMU
Emlib general purpose utilities.
__STATIC_INLINE void EMU_Unlock(void)
Unlock the EMU so that writing to locked registers again is possible.
Definition: em_emu.h:660
__STATIC_INLINE void EMU_Lock(void)
Lock the EMU in order to protect its registers against unintended modification.
Definition: em_emu.h:650
__STATIC_INLINE uint32_t EFM32_CTZ(uint32_t value)
Count trailing number of zero's.
Definition: em_common.h:121
#define RMU
void RMU_ResetControl(RMU_Reset_TypeDef reset, RMU_ResetMode_TypeDef mode)
Disable/enable reset for various peripherals and signal sources.
Definition: em_rmu.c:204
RMU_ResetMode_TypeDef
Definition: em_rmu.h:61
#define RMU_RSTCAUSE_PORST
Definition: efm32g_rmu.h:65
#define RMU_RSTCAUSE_LOCKUPRST
Definition: efm32g_rmu.h:90
#define EMU_LOCK_LOCKKEY_LOCKED
Definition: efm32g_emu.h:104
Reset Management Unit (RMU) peripheral API.
Energy management unit (EMU) peripheral API.
#define RMU_RSTCAUSE_BODREGRST
Definition: efm32g_rmu.h:75
#define RMU_CMD_RCCLR
Definition: efm32g_rmu.h:104
#define RMU_RSTCAUSE_EXTRST
Definition: efm32g_rmu.h:80
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
Definition: em_bus.h:146
#define RMU_RSTCAUSE_WDOGRST
Definition: efm32g_rmu.h:85
void RMU_ResetCauseClear(void)
Clear the reset cause register.
Definition: em_rmu.c:231
#define RMU_RSTCAUSE_BODUNREGRST
Definition: efm32g_rmu.h:70