00001
00016 #ifndef __SILICON_LABS_SPIDRV_H__
00017 #define __SILICON_LABS_SPIDRV_H__
00018
00019 #include "em_device.h"
00020 #include "em_cmu.h"
00021
00022 #include "ecode.h"
00023 #include "spidrv_config.h"
00024 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
00025 #include "rtcdriver.h"
00026 #endif
00027 #include "dmadrv.h"
00028
00029 #ifdef __cplusplus
00030 extern "C" {
00031 #endif
00032
00033
00038
00046 #define ECODE_EMDRV_SPIDRV_OK ( ECODE_OK ) ///< Success return value.
00047 #define ECODE_EMDRV_SPIDRV_ILLEGAL_HANDLE ( ECODE_EMDRV_SPIDRV_BASE | 0x00000001 ) ///< Illegal SPI handle.
00048 #define ECODE_EMDRV_SPIDRV_PARAM_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000002 ) ///< Illegal input parameter.
00049 #define ECODE_EMDRV_SPIDRV_BUSY ( ECODE_EMDRV_SPIDRV_BASE | 0x00000003 ) ///< The SPI port is busy.
00050 #define ECODE_EMDRV_SPIDRV_TIMER_ALLOC_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000004 ) ///< Unable to allocated timeout timer.
00051 #define ECODE_EMDRV_SPIDRV_TIMEOUT ( ECODE_EMDRV_SPIDRV_BASE | 0x00000005 ) ///< SPI transfer timeout.
00052 #define ECODE_EMDRV_SPIDRV_IDLE ( ECODE_EMDRV_SPIDRV_BASE | 0x00000006 ) ///< No SPI transfer in progress.
00053 #define ECODE_EMDRV_SPIDRV_ABORTED ( ECODE_EMDRV_SPIDRV_BASE | 0x00000007 ) ///< SPI transfer has been aborted.
00054 #define ECODE_EMDRV_SPIDRV_MODE_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000008 ) ///< SPI master used slave API or vica versa.
00055 #define ECODE_EMDRV_SPIDRV_DMA_ALLOC_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000009 ) ///< Unable to allocated DMA channels.
00056
00058 typedef enum SPIDRV_Type
00059 {
00060 spidrvMaster = 0,
00061 spidrvSlave = 1
00062 } SPIDRV_Type_t;
00063
00065 typedef enum SPIDRV_BitOrder
00066 {
00067 spidrvBitOrderLsbFirst = 0,
00068 spidrvBitOrderMsbFirst = 1
00069 } SPIDRV_BitOrder_t;
00070
00072 typedef enum SPIDRV_ClockMode
00073 {
00074 spidrvClockMode0 = 0,
00075 spidrvClockMode1 = 1,
00076 spidrvClockMode2 = 2,
00077 spidrvClockMode3 = 3
00078 } SPIDRV_ClockMode_t;
00079
00081 typedef enum SPIDRV_CsControl
00082 {
00083 spidrvCsControlAuto = 0,
00084 spidrvCsControlApplication = 1
00085 } SPIDRV_CsControl_t;
00086
00088 typedef enum SPIDRV_SlaveStart
00089 {
00090 spidrvSlaveStartImmediate = 0,
00091 spidrvSlaveStartDelayed = 1
00092 } SPIDRV_SlaveStart_t;
00093
00094 struct SPIDRV_HandleData;
00095
00096
00117 typedef void (*SPIDRV_Callback_t)( struct SPIDRV_HandleData *handle,
00118 Ecode_t transferStatus,
00119 int itemsTransferred );
00120
00126 typedef struct SPIDRV_Init
00127 {
00128 USART_TypeDef *port;
00129 #if defined( _USART_ROUTELOC0_MASK )
00130 uint8_t portLocationTx;
00131 uint8_t portLocationRx;
00132 uint8_t portLocationClk;
00133 uint8_t portLocationCs;
00134 #else
00135 uint8_t portLocation;
00136 #endif
00137 uint32_t bitRate;
00138 uint32_t frameLength;
00139 uint32_t dummyTxValue;
00140 SPIDRV_Type_t type;
00141 SPIDRV_BitOrder_t bitOrder;
00142 SPIDRV_ClockMode_t clockMode;
00143 SPIDRV_CsControl_t csControl;
00144 SPIDRV_SlaveStart_t slaveStartMode;
00145 } SPIDRV_Init_t;
00146
00151 typedef struct SPIDRV_HandleData
00152 {
00154 SPIDRV_Init_t initData;
00155 unsigned int txDMACh;
00156 unsigned int rxDMACh;
00157 DMADRV_PeripheralSignal_t txDMASignal;
00158 DMADRV_PeripheralSignal_t rxDMASignal;
00159 SPIDRV_Callback_t userCallback;
00160 uint32_t dummyRx;
00161 int transferCount;
00162 int remaining;
00163 int csPort;
00164 int csPin;
00165 Ecode_t transferStatus;
00166 volatile enum { spidrvStateIdle = 0, spidrvStateTransferring = 1 } state;
00167 CMU_Clock_TypeDef usartClock;
00168 volatile bool blockingCompleted;
00169
00170 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
00171 RTCDRV_TimerID_t timer;
00172 #endif
00173
00174 } SPIDRV_HandleData_t;
00175
00177 typedef SPIDRV_HandleData_t * SPIDRV_Handle_t;
00178
00179 #if defined( _USART_ROUTELOC0_MASK )
00180
00181 #define SPIDRV_MASTER_USART0 \
00182 { \
00183 USART0, \
00184 _USART_ROUTELOC0_TXLOC_LOC0, \
00185 _USART_ROUTELOC0_RXLOC_LOC0, \
00186 _USART_ROUTELOC0_CLKLOC_LOC2, \
00187 _USART_ROUTELOC0_CSLOC_LOC2, \
00188 1000000, \
00189 8, \
00190 0, \
00191 spidrvMaster, \
00192 spidrvBitOrderMsbFirst, \
00193 spidrvClockMode0, \
00194 spidrvCsControlAuto, \
00195 spidrvSlaveStartImmediate \
00196 }
00197
00199 #define SPIDRV_MASTER_USART1 \
00200 { \
00201 USART1, \
00202 _USART_ROUTELOC0_TXLOC_LOC17, \
00203 _USART_ROUTELOC0_RXLOC_LOC17, \
00204 _USART_ROUTELOC0_CLKLOC_LOC17, \
00205 _USART_ROUTELOC0_CSLOC_LOC17, \
00206 1000000, \
00207 8, \
00208 0, \
00209 spidrvMaster, \
00210 spidrvBitOrderMsbFirst, \
00211 spidrvClockMode0, \
00212 spidrvCsControlAuto, \
00213 spidrvSlaveStartImmediate \
00214 }
00215
00217 #define SPIDRV_MASTER_USART2 \
00218 { \
00219 USART2, \
00220 _USART_ROUTELOC0_TXLOC_LOC0, \
00221 _USART_ROUTELOC0_RXLOC_LOC0, \
00222 _USART_ROUTELOC0_CLKLOC_LOC0, \
00223 _USART_ROUTELOC0_CSLOC_LOC0, \
00224 1000000, \
00225 8, \
00226 0, \
00227 spidrvMaster, \
00228 spidrvBitOrderMsbFirst, \
00229 spidrvClockMode0, \
00230 spidrvCsControlAuto, \
00231 spidrvSlaveStartImmediate \
00232 }
00233
00234 #define SPIDRV_MASTER_USARTRF0 \
00235 { \
00236 USARTRF0, \
00237 _USART_ROUTELOC0_TXLOC_LOC0, \
00238 _USART_ROUTELOC0_RXLOC_LOC0, \
00239 _USART_ROUTELOC0_CLKLOC_LOC2, \
00240 _USART_ROUTELOC0_CSLOC_LOC2, \
00241 1000000, \
00242 8, \
00243 0, \
00244 spidrvMaster, \
00245 spidrvBitOrderMsbFirst, \
00246 spidrvClockMode0, \
00247 spidrvCsControlAuto, \
00248 spidrvSlaveStartImmediate \
00249 }
00250
00252 #define SPIDRV_SLAVE_USART0 \
00253 { \
00254 USART0, \
00255 _USART_ROUTELOC0_TXLOC_LOC0, \
00256 _USART_ROUTELOC0_RXLOC_LOC0, \
00257 _USART_ROUTELOC0_CLKLOC_LOC2, \
00258 _USART_ROUTELOC0_CSLOC_LOC2, \
00259 0, \
00260 8, \
00261 0, \
00262 spidrvSlave, \
00263 spidrvBitOrderMsbFirst, \
00264 spidrvClockMode0, \
00265 spidrvCsControlAuto, \
00266 spidrvSlaveStartImmediate \
00267 }
00268
00270 #define SPIDRV_SLAVE_USART1 \
00271 { \
00272 USART1, \
00273 _USART_ROUTELOC0_TXLOC_LOC17, \
00274 _USART_ROUTELOC0_RXLOC_LOC17, \
00275 _USART_ROUTELOC0_CLKLOC_LOC17, \
00276 _USART_ROUTELOC0_CSLOC_LOC17, \
00277 0, \
00278 8, \
00279 0, \
00280 spidrvSlave, \
00281 spidrvBitOrderMsbFirst, \
00282 spidrvClockMode0, \
00283 spidrvCsControlAuto, \
00284 spidrvSlaveStartImmediate \
00285 }
00286
00288 #define SPIDRV_SLAVE_USART2 \
00289 { \
00290 USART2, \
00291 _USART_ROUTELOC0_TXLOC_LOC0, \
00292 _USART_ROUTELOC0_RXLOC_LOC0, \
00293 _USART_ROUTELOC0_CLKLOC_LOC0, \
00294 _USART_ROUTELOC0_CSLOC_LOC0, \
00295 0, \
00296 8, \
00297 0, \
00298 spidrvSlave, \
00299 spidrvBitOrderMsbFirst, \
00300 spidrvClockMode0, \
00301 spidrvCsControlAuto, \
00302 spidrvSlaveStartImmediate \
00303 }
00304
00306 #define SPIDRV_SLAVE_USARTRF0 \
00307 { \
00308 USARTRF0, \
00309 _USART_ROUTELOC0_TXLOC_LOC0, \
00310 _USART_ROUTELOC0_RXLOC_LOC0, \
00311 _USART_ROUTELOC0_CLKLOC_LOC2, \
00312 _USART_ROUTELOC0_CSLOC_LOC2, \
00313 0, \
00314 8, \
00315 0, \
00316 spidrvSlave, \
00317 spidrvBitOrderMsbFirst, \
00318 spidrvClockMode0, \
00319 spidrvCsControlAuto, \
00320 spidrvSlaveStartImmediate \
00321 }
00322 #else
00323
00325 #define SPIDRV_MASTER_USART0 \
00326 { \
00327 USART0, \
00328 _USART_ROUTE_LOCATION_LOC1, \
00329 1000000, \
00330 8, \
00331 0, \
00332 spidrvMaster, \
00333 spidrvBitOrderMsbFirst, \
00334 spidrvClockMode0, \
00335 spidrvCsControlAuto, \
00336 spidrvSlaveStartImmediate \
00337 }
00338
00340 #define SPIDRV_MASTER_USART1 \
00341 { \
00342 USART1, \
00343 _USART_ROUTE_LOCATION_LOC1, \
00344 1000000, \
00345 8, \
00346 0, \
00347 spidrvMaster, \
00348 spidrvBitOrderMsbFirst, \
00349 spidrvClockMode0, \
00350 spidrvCsControlAuto, \
00351 spidrvSlaveStartImmediate \
00352 }
00353
00355 #if defined( _EZR32_LEOPARD_FAMILY ) || defined( _EZR32_WONDER_FAMILY )
00356 #define SPIDRV_MASTER_USART2 \
00357 { \
00358 USART2, \
00359 _USART_ROUTE_LOCATION_LOC1, \
00360 1000000, \
00361 8, \
00362 0, \
00363 spidrvMaster, \
00364 spidrvBitOrderMsbFirst, \
00365 spidrvClockMode0, \
00366 spidrvCsControlAuto, \
00367 spidrvSlaveStartImmediate \
00368 }
00369 #else
00370 #define SPIDRV_MASTER_USART2 \
00371 { \
00372 USART2, \
00373 _USART_ROUTE_LOCATION_LOC0, \
00374 1000000, \
00375 8, \
00376 0, \
00377 spidrvMaster, \
00378 spidrvBitOrderMsbFirst, \
00379 spidrvClockMode0, \
00380 spidrvCsControlAuto, \
00381 spidrvSlaveStartImmediate \
00382 }
00383 #endif
00384
00386 #define SPIDRV_MASTER_USARTRF0 \
00387 { \
00388 USARTRF0, \
00389 _USART_ROUTE_LOCATION_LOC1, \
00390 1000000, \
00391 8, \
00392 0, \
00393 spidrvMaster, \
00394 spidrvBitOrderMsbFirst, \
00395 spidrvClockMode0, \
00396 spidrvCsControlAuto, \
00397 spidrvSlaveStartImmediate \
00398 }
00399
00401 #define SPIDRV_SLAVE_USART0 \
00402 { \
00403 USART0, \
00404 _USART_ROUTE_LOCATION_LOC1, \
00405 0, \
00406 8, \
00407 0, \
00408 spidrvSlave, \
00409 spidrvBitOrderMsbFirst, \
00410 spidrvClockMode0, \
00411 spidrvCsControlAuto, \
00412 spidrvSlaveStartImmediate \
00413 }
00414
00416 #define SPIDRV_SLAVE_USART1 \
00417 { \
00418 USART1, \
00419 _USART_ROUTE_LOCATION_LOC1, \
00420 0, \
00421 8, \
00422 0, \
00423 spidrvSlave, \
00424 spidrvBitOrderMsbFirst, \
00425 spidrvClockMode0, \
00426 spidrvCsControlAuto, \
00427 spidrvSlaveStartImmediate \
00428 }
00429
00431 #if defined( _EZR32_LEOPARD_FAMILY ) || defined( _EZR32_WONDER_FAMILY )
00432 #define SPIDRV_SLAVE_USART2 \
00433 { \
00434 USART2, \
00435 _USART_ROUTE_LOCATION_LOC1, \
00436 0, \
00437 8, \
00438 0, \
00439 spidrvSlave, \
00440 spidrvBitOrderMsbFirst, \
00441 spidrvClockMode0, \
00442 spidrvCsControlAuto, \
00443 spidrvSlaveStartImmediate \
00444 }
00445 #else
00446 #define SPIDRV_SLAVE_USART2 \
00447 { \
00448 USART2, \
00449 _USART_ROUTE_LOCATION_LOC0, \
00450 0, \
00451 8, \
00452 0, \
00453 spidrvSlave, \
00454 spidrvBitOrderMsbFirst, \
00455 spidrvClockMode0, \
00456 spidrvCsControlAuto, \
00457 spidrvSlaveStartImmediate \
00458 }
00459 #endif
00460
00462 #define SPIDRV_SLAVE_USARTRF0 \
00463 { \
00464 USARTRF0, \
00465 _USART_ROUTE_LOCATION_LOC1, \
00466 0, \
00467 8, \
00468 0, \
00469 spidrvSlave, \
00470 spidrvBitOrderMsbFirst, \
00471 spidrvClockMode0, \
00472 spidrvCsControlAuto, \
00473 spidrvSlaveStartImmediate \
00474 }
00475 #endif
00476
00477 Ecode_t SPIDRV_AbortTransfer( SPIDRV_Handle_t handle );
00478
00479 Ecode_t SPIDRV_DeInit( SPIDRV_Handle_t handle );
00480
00481 Ecode_t SPIDRV_GetBitrate( SPIDRV_Handle_t handle,
00482 uint32_t *bitRate );
00483
00484 Ecode_t SPIDRV_GetFramelength( SPIDRV_Handle_t handle,
00485 uint32_t *frameLength );
00486
00487 Ecode_t SPIDRV_GetTransferStatus( SPIDRV_Handle_t handle,
00488 int *itemsTransferred,
00489 int *itemsRemaining );
00490
00491 Ecode_t SPIDRV_Init( SPIDRV_Handle_t handle,
00492 SPIDRV_Init_t *initData );
00493
00494 Ecode_t SPIDRV_MReceive( SPIDRV_Handle_t handle,
00495 void *buffer,
00496 int count,
00497 SPIDRV_Callback_t callback );
00498
00499 Ecode_t SPIDRV_MReceiveB( SPIDRV_Handle_t handle,
00500 void *buffer,
00501 int count );
00502
00503 Ecode_t SPIDRV_MTransfer( SPIDRV_Handle_t handle,
00504 const void *txBuffer,
00505 void *rxBuffer,
00506 int count,
00507 SPIDRV_Callback_t callback );
00508
00509 Ecode_t SPIDRV_MTransferB( SPIDRV_Handle_t handle,
00510 const void *txBuffer,
00511 void *rxBuffer,
00512 int count );
00513
00514 Ecode_t SPIDRV_MTransferSingleItemB( SPIDRV_Handle_t handle,
00515 uint32_t txValue,
00516 void *rxValue );
00517
00518 Ecode_t SPIDRV_MTransmit( SPIDRV_Handle_t handle,
00519 const void *buffer,
00520 int count,
00521 SPIDRV_Callback_t callback );
00522
00523 Ecode_t SPIDRV_MTransmitB( SPIDRV_Handle_t handle,
00524 const void *buffer,
00525 int count );
00526
00527 Ecode_t SPIDRV_SetBitrate( SPIDRV_Handle_t handle,
00528 uint32_t bitRate );
00529
00530 Ecode_t SPIDRV_SetFramelength( SPIDRV_Handle_t handle,
00531 uint32_t frameLength );
00532
00533 Ecode_t SPIDRV_SReceive( SPIDRV_Handle_t handle,
00534 void *buffer,
00535 int count,
00536 SPIDRV_Callback_t callback,
00537 int timeoutMs );
00538
00539 Ecode_t SPIDRV_SReceiveB( SPIDRV_Handle_t handle,
00540 void *buffer,
00541 int count,
00542 int timeoutMs );
00543
00544 Ecode_t SPIDRV_STransfer( SPIDRV_Handle_t handle,
00545 const void *txBuffer,
00546 void *rxBuffer,
00547 int count,
00548 SPIDRV_Callback_t callback,
00549 int timeoutMs );
00550
00551 Ecode_t SPIDRV_STransferB( SPIDRV_Handle_t handle,
00552 const void *txBuffer,
00553 void *rxBuffer,
00554 int count,
00555 int timeoutMs );
00556
00557 Ecode_t SPIDRV_STransmit( SPIDRV_Handle_t handle,
00558 const void *buffer,
00559 int count,
00560 SPIDRV_Callback_t callback,
00561 int timeoutMs );
00562
00563 Ecode_t SPIDRV_STransmitB( SPIDRV_Handle_t handle,
00564 const void *buffer,
00565 int count,
00566 int timeoutMs );
00567
00571 #ifdef __cplusplus
00572 }
00573 #endif
00574
00575 #endif