Defines | |
#define | AES_BASE (0x400E0000UL) |
#define | DMA_BASE (0x400C2000UL) |
#define | MSC_BASE (0x400C0000UL) |
#define | EMU_BASE (0x400C6000UL) |
#define | RMU_BASE (0x400CA000UL) |
#define | CMU_BASE (0x400C8000UL) |
#define | TIMER0_BASE (0x40010000UL) |
#define | TIMER1_BASE (0x40010400UL) |
#define | TIMER2_BASE (0x40010800UL) |
#define | ACMP0_BASE (0x40001000UL) |
#define | USART0_BASE (0x4000C000UL) |
#define | USART1_BASE (0x4000C400UL) |
#define | PRS_BASE (0x400CC000UL) |
#define | IDAC0_BASE (0x40004000UL) |
#define | GPIO_BASE (0x40006000UL) |
#define | VCMP_BASE (0x40000000UL) |
#define | ADC0_BASE (0x40002000UL) |
#define | LEUART0_BASE (0x40084000UL) |
#define | PCNT0_BASE (0x40086000UL) |
#define | I2C0_BASE (0x4000A000UL) |
#define | RTC_BASE (0x40080000UL) |
#define | WDOG_BASE (0x40088000UL) |
#define | MTB_BASE (0xF0040000UL) |
#define | CALIBRATE_BASE (0x0FE08000UL) |
#define | DEVINFO_BASE (0x0FE081B0UL) |
#define | ROMTABLE_BASE (0xF00FFFD0UL) |
#define | LOCKBITS_BASE (0x0FE04000UL) |
#define | USERDATA_BASE (0x0FE00000UL) |
#define ACMP0_BASE (0x40001000UL) |
ACMP0 base address
Definition at line 345 of file efm32hg222f64.h.
#define ADC0_BASE (0x40002000UL) |
ADC0 base address
Definition at line 352 of file efm32hg222f64.h.
#define AES_BASE (0x400E0000UL) |
AES base address
Definition at line 336 of file efm32hg222f64.h.
#define CALIBRATE_BASE (0x0FE08000UL) |
CALIBRATE base address
Definition at line 359 of file efm32hg222f64.h.
#define CMU_BASE (0x400C8000UL) |
CMU base address
Definition at line 341 of file efm32hg222f64.h.
#define DEVINFO_BASE (0x0FE081B0UL) |
DEVINFO base address
Definition at line 360 of file efm32hg222f64.h.
#define DMA_BASE (0x400C2000UL) |
DMA base address
Definition at line 337 of file efm32hg222f64.h.
#define EMU_BASE (0x400C6000UL) |
EMU base address
Definition at line 339 of file efm32hg222f64.h.
#define GPIO_BASE (0x40006000UL) |
GPIO base address
Definition at line 350 of file efm32hg222f64.h.
#define I2C0_BASE (0x4000A000UL) |
I2C0 base address
Definition at line 355 of file efm32hg222f64.h.
#define IDAC0_BASE (0x40004000UL) |
IDAC0 base address
Definition at line 349 of file efm32hg222f64.h.
#define LEUART0_BASE (0x40084000UL) |
LEUART0 base address
Definition at line 353 of file efm32hg222f64.h.
#define LOCKBITS_BASE (0x0FE04000UL) |
Lock-bits page base address
Definition at line 362 of file efm32hg222f64.h.
#define MSC_BASE (0x400C0000UL) |
MSC base address
Definition at line 338 of file efm32hg222f64.h.
#define MTB_BASE (0xF0040000UL) |
MTB base address
Definition at line 358 of file efm32hg222f64.h.
#define PCNT0_BASE (0x40086000UL) |
PCNT0 base address
Definition at line 354 of file efm32hg222f64.h.
#define PRS_BASE (0x400CC000UL) |
PRS base address
Definition at line 348 of file efm32hg222f64.h.
#define RMU_BASE (0x400CA000UL) |
RMU base address
Definition at line 340 of file efm32hg222f64.h.
#define ROMTABLE_BASE (0xF00FFFD0UL) |
ROMTABLE base address
Definition at line 361 of file efm32hg222f64.h.
#define RTC_BASE (0x40080000UL) |
RTC base address
Definition at line 356 of file efm32hg222f64.h.
#define TIMER0_BASE (0x40010000UL) |
TIMER0 base address
Definition at line 342 of file efm32hg222f64.h.
#define TIMER1_BASE (0x40010400UL) |
TIMER1 base address
Definition at line 343 of file efm32hg222f64.h.
#define TIMER2_BASE (0x40010800UL) |
TIMER2 base address
Definition at line 344 of file efm32hg222f64.h.
#define USART0_BASE (0x4000C000UL) |
USART0 base address
Definition at line 346 of file efm32hg222f64.h.
#define USART1_BASE (0x4000C400UL) |
USART1 base address
Definition at line 347 of file efm32hg222f64.h.
#define USERDATA_BASE (0x0FE00000UL) |
User data page base address
Definition at line 363 of file efm32hg222f64.h.
#define VCMP_BASE (0x40000000UL) |
VCMP base address
Definition at line 351 of file efm32hg222f64.h.
#define WDOG_BASE (0x40088000UL) |
WDOG base address
Definition at line 357 of file efm32hg222f64.h.