release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32HG/Include/efm32hg_msc.h

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00001 /**************************************************************************/
00032 /**************************************************************************/
00037 typedef struct
00038 {
00039   __IO uint32_t CTRL;         
00040   __IO uint32_t READCTRL;     
00041   __IO uint32_t WRITECTRL;    
00042   __IO uint32_t WRITECMD;     
00043   __IO uint32_t ADDRB;        
00045   uint32_t      RESERVED0[1]; 
00046   __IO uint32_t WDATA;        
00047   __I uint32_t  STATUS;       
00049   uint32_t      RESERVED1[3]; 
00050   __I uint32_t  IF;           
00051   __IO uint32_t IFS;          
00052   __IO uint32_t IFC;          
00053   __IO uint32_t IEN;          
00054   __IO uint32_t LOCK;         
00055   __IO uint32_t CMD;          
00056   __I uint32_t  CACHEHITS;    
00057   __I uint32_t  CACHEMISSES;  
00058   uint32_t      RESERVED2[1]; 
00059   __IO uint32_t TIMEBASE;     
00060   __IO uint32_t MASSLOCK;     
00061   __IO uint32_t IRQLATENCY;   
00062 } MSC_TypeDef;                
00064 /**************************************************************************/
00069 /* Bit fields for MSC CTRL */
00070 #define _MSC_CTRL_RESETVALUE                    0x00000001UL                       
00071 #define _MSC_CTRL_MASK                          0x00000001UL                       
00072 #define MSC_CTRL_BUSFAULT                       (0x1UL << 0)                       
00073 #define _MSC_CTRL_BUSFAULT_SHIFT                0                                  
00074 #define _MSC_CTRL_BUSFAULT_MASK                 0x1UL                              
00075 #define _MSC_CTRL_BUSFAULT_GENERATE             0x00000000UL                       
00076 #define _MSC_CTRL_BUSFAULT_DEFAULT              0x00000001UL                       
00077 #define _MSC_CTRL_BUSFAULT_IGNORE               0x00000001UL                       
00078 #define MSC_CTRL_BUSFAULT_GENERATE              (_MSC_CTRL_BUSFAULT_GENERATE << 0) 
00079 #define MSC_CTRL_BUSFAULT_DEFAULT               (_MSC_CTRL_BUSFAULT_DEFAULT << 0)  
00080 #define MSC_CTRL_BUSFAULT_IGNORE                (_MSC_CTRL_BUSFAULT_IGNORE << 0)   
00082 /* Bit fields for MSC READCTRL */
00083 #define _MSC_READCTRL_RESETVALUE                0x00000001UL                        
00084 #define _MSC_READCTRL_MASK                      0x0000009FUL                        
00085 #define _MSC_READCTRL_MODE_SHIFT                0                                   
00086 #define _MSC_READCTRL_MODE_MASK                 0x7UL                               
00087 #define _MSC_READCTRL_MODE_WS0                  0x00000000UL                        
00088 #define _MSC_READCTRL_MODE_DEFAULT              0x00000001UL                        
00089 #define _MSC_READCTRL_MODE_WS1                  0x00000001UL                        
00090 #define MSC_READCTRL_MODE_WS0                   (_MSC_READCTRL_MODE_WS0 << 0)       
00091 #define MSC_READCTRL_MODE_DEFAULT               (_MSC_READCTRL_MODE_DEFAULT << 0)   
00092 #define MSC_READCTRL_MODE_WS1                   (_MSC_READCTRL_MODE_WS1 << 0)       
00093 #define MSC_READCTRL_IFCDIS                     (0x1UL << 3)                        
00094 #define _MSC_READCTRL_IFCDIS_SHIFT              3                                   
00095 #define _MSC_READCTRL_IFCDIS_MASK               0x8UL                               
00096 #define _MSC_READCTRL_IFCDIS_DEFAULT            0x00000000UL                        
00097 #define MSC_READCTRL_IFCDIS_DEFAULT             (_MSC_READCTRL_IFCDIS_DEFAULT << 3) 
00098 #define MSC_READCTRL_AIDIS                      (0x1UL << 4)                        
00099 #define _MSC_READCTRL_AIDIS_SHIFT               4                                   
00100 #define _MSC_READCTRL_AIDIS_MASK                0x10UL                              
00101 #define _MSC_READCTRL_AIDIS_DEFAULT             0x00000000UL                        
00102 #define MSC_READCTRL_AIDIS_DEFAULT              (_MSC_READCTRL_AIDIS_DEFAULT << 4)  
00103 #define MSC_READCTRL_RAMCEN                     (0x1UL << 7)                        
00104 #define _MSC_READCTRL_RAMCEN_SHIFT              7                                   
00105 #define _MSC_READCTRL_RAMCEN_MASK               0x80UL                              
00106 #define _MSC_READCTRL_RAMCEN_DEFAULT            0x00000000UL                        
00107 #define MSC_READCTRL_RAMCEN_DEFAULT             (_MSC_READCTRL_RAMCEN_DEFAULT << 7) 
00109 /* Bit fields for MSC WRITECTRL */
00110 #define _MSC_WRITECTRL_RESETVALUE               0x00000000UL                                
00111 #define _MSC_WRITECTRL_MASK                     0x00000003UL                                
00112 #define MSC_WRITECTRL_WREN                      (0x1UL << 0)                                
00113 #define _MSC_WRITECTRL_WREN_SHIFT               0                                           
00114 #define _MSC_WRITECTRL_WREN_MASK                0x1UL                                       
00115 #define _MSC_WRITECTRL_WREN_DEFAULT             0x00000000UL                                
00116 #define MSC_WRITECTRL_WREN_DEFAULT              (_MSC_WRITECTRL_WREN_DEFAULT << 0)          
00117 #define MSC_WRITECTRL_IRQERASEABORT             (0x1UL << 1)                                
00118 #define _MSC_WRITECTRL_IRQERASEABORT_SHIFT      1                                           
00119 #define _MSC_WRITECTRL_IRQERASEABORT_MASK       0x2UL                                       
00120 #define _MSC_WRITECTRL_IRQERASEABORT_DEFAULT    0x00000000UL                                
00121 #define MSC_WRITECTRL_IRQERASEABORT_DEFAULT     (_MSC_WRITECTRL_IRQERASEABORT_DEFAULT << 1) 
00123 /* Bit fields for MSC WRITECMD */
00124 #define _MSC_WRITECMD_RESETVALUE                0x00000000UL                             
00125 #define _MSC_WRITECMD_MASK                      0x0000113FUL                             
00126 #define MSC_WRITECMD_LADDRIM                    (0x1UL << 0)                             
00127 #define _MSC_WRITECMD_LADDRIM_SHIFT             0                                        
00128 #define _MSC_WRITECMD_LADDRIM_MASK              0x1UL                                    
00129 #define _MSC_WRITECMD_LADDRIM_DEFAULT           0x00000000UL                             
00130 #define MSC_WRITECMD_LADDRIM_DEFAULT            (_MSC_WRITECMD_LADDRIM_DEFAULT << 0)     
00131 #define MSC_WRITECMD_ERASEPAGE                  (0x1UL << 1)                             
00132 #define _MSC_WRITECMD_ERASEPAGE_SHIFT           1                                        
00133 #define _MSC_WRITECMD_ERASEPAGE_MASK            0x2UL                                    
00134 #define _MSC_WRITECMD_ERASEPAGE_DEFAULT         0x00000000UL                             
00135 #define MSC_WRITECMD_ERASEPAGE_DEFAULT          (_MSC_WRITECMD_ERASEPAGE_DEFAULT << 1)   
00136 #define MSC_WRITECMD_WRITEEND                   (0x1UL << 2)                             
00137 #define _MSC_WRITECMD_WRITEEND_SHIFT            2                                        
00138 #define _MSC_WRITECMD_WRITEEND_MASK             0x4UL                                    
00139 #define _MSC_WRITECMD_WRITEEND_DEFAULT          0x00000000UL                             
00140 #define MSC_WRITECMD_WRITEEND_DEFAULT           (_MSC_WRITECMD_WRITEEND_DEFAULT << 2)    
00141 #define MSC_WRITECMD_WRITEONCE                  (0x1UL << 3)                             
00142 #define _MSC_WRITECMD_WRITEONCE_SHIFT           3                                        
00143 #define _MSC_WRITECMD_WRITEONCE_MASK            0x8UL                                    
00144 #define _MSC_WRITECMD_WRITEONCE_DEFAULT         0x00000000UL                             
00145 #define MSC_WRITECMD_WRITEONCE_DEFAULT          (_MSC_WRITECMD_WRITEONCE_DEFAULT << 3)   
00146 #define MSC_WRITECMD_WRITETRIG                  (0x1UL << 4)                             
00147 #define _MSC_WRITECMD_WRITETRIG_SHIFT           4                                        
00148 #define _MSC_WRITECMD_WRITETRIG_MASK            0x10UL                                   
00149 #define _MSC_WRITECMD_WRITETRIG_DEFAULT         0x00000000UL                             
00150 #define MSC_WRITECMD_WRITETRIG_DEFAULT          (_MSC_WRITECMD_WRITETRIG_DEFAULT << 4)   
00151 #define MSC_WRITECMD_ERASEABORT                 (0x1UL << 5)                             
00152 #define _MSC_WRITECMD_ERASEABORT_SHIFT          5                                        
00153 #define _MSC_WRITECMD_ERASEABORT_MASK           0x20UL                                   
00154 #define _MSC_WRITECMD_ERASEABORT_DEFAULT        0x00000000UL                             
00155 #define MSC_WRITECMD_ERASEABORT_DEFAULT         (_MSC_WRITECMD_ERASEABORT_DEFAULT << 5)  
00156 #define MSC_WRITECMD_ERASEMAIN0                 (0x1UL << 8)                             
00157 #define _MSC_WRITECMD_ERASEMAIN0_SHIFT          8                                        
00158 #define _MSC_WRITECMD_ERASEMAIN0_MASK           0x100UL                                  
00159 #define _MSC_WRITECMD_ERASEMAIN0_DEFAULT        0x00000000UL                             
00160 #define MSC_WRITECMD_ERASEMAIN0_DEFAULT         (_MSC_WRITECMD_ERASEMAIN0_DEFAULT << 8)  
00161 #define MSC_WRITECMD_CLEARWDATA                 (0x1UL << 12)                            
00162 #define _MSC_WRITECMD_CLEARWDATA_SHIFT          12                                       
00163 #define _MSC_WRITECMD_CLEARWDATA_MASK           0x1000UL                                 
00164 #define _MSC_WRITECMD_CLEARWDATA_DEFAULT        0x00000000UL                             
00165 #define MSC_WRITECMD_CLEARWDATA_DEFAULT         (_MSC_WRITECMD_CLEARWDATA_DEFAULT << 12) 
00167 /* Bit fields for MSC ADDRB */
00168 #define _MSC_ADDRB_RESETVALUE                   0x00000000UL                    
00169 #define _MSC_ADDRB_MASK                         0xFFFFFFFFUL                    
00170 #define _MSC_ADDRB_ADDRB_SHIFT                  0                               
00171 #define _MSC_ADDRB_ADDRB_MASK                   0xFFFFFFFFUL                    
00172 #define _MSC_ADDRB_ADDRB_DEFAULT                0x00000000UL                    
00173 #define MSC_ADDRB_ADDRB_DEFAULT                 (_MSC_ADDRB_ADDRB_DEFAULT << 0) 
00175 /* Bit fields for MSC WDATA */
00176 #define _MSC_WDATA_RESETVALUE                   0x00000000UL                    
00177 #define _MSC_WDATA_MASK                         0xFFFFFFFFUL                    
00178 #define _MSC_WDATA_WDATA_SHIFT                  0                               
00179 #define _MSC_WDATA_WDATA_MASK                   0xFFFFFFFFUL                    
00180 #define _MSC_WDATA_WDATA_DEFAULT                0x00000000UL                    
00181 #define MSC_WDATA_WDATA_DEFAULT                 (_MSC_WDATA_WDATA_DEFAULT << 0) 
00183 /* Bit fields for MSC STATUS */
00184 #define _MSC_STATUS_RESETVALUE                  0x00000008UL                            
00185 #define _MSC_STATUS_MASK                        0x0000007FUL                            
00186 #define MSC_STATUS_BUSY                         (0x1UL << 0)                            
00187 #define _MSC_STATUS_BUSY_SHIFT                  0                                       
00188 #define _MSC_STATUS_BUSY_MASK                   0x1UL                                   
00189 #define _MSC_STATUS_BUSY_DEFAULT                0x00000000UL                            
00190 #define MSC_STATUS_BUSY_DEFAULT                 (_MSC_STATUS_BUSY_DEFAULT << 0)         
00191 #define MSC_STATUS_LOCKED                       (0x1UL << 1)                            
00192 #define _MSC_STATUS_LOCKED_SHIFT                1                                       
00193 #define _MSC_STATUS_LOCKED_MASK                 0x2UL                                   
00194 #define _MSC_STATUS_LOCKED_DEFAULT              0x00000000UL                            
00195 #define MSC_STATUS_LOCKED_DEFAULT               (_MSC_STATUS_LOCKED_DEFAULT << 1)       
00196 #define MSC_STATUS_INVADDR                      (0x1UL << 2)                            
00197 #define _MSC_STATUS_INVADDR_SHIFT               2                                       
00198 #define _MSC_STATUS_INVADDR_MASK                0x4UL                                   
00199 #define _MSC_STATUS_INVADDR_DEFAULT             0x00000000UL                            
00200 #define MSC_STATUS_INVADDR_DEFAULT              (_MSC_STATUS_INVADDR_DEFAULT << 2)      
00201 #define MSC_STATUS_WDATAREADY                   (0x1UL << 3)                            
00202 #define _MSC_STATUS_WDATAREADY_SHIFT            3                                       
00203 #define _MSC_STATUS_WDATAREADY_MASK             0x8UL                                   
00204 #define _MSC_STATUS_WDATAREADY_DEFAULT          0x00000001UL                            
00205 #define MSC_STATUS_WDATAREADY_DEFAULT           (_MSC_STATUS_WDATAREADY_DEFAULT << 3)   
00206 #define MSC_STATUS_WORDTIMEOUT                  (0x1UL << 4)                            
00207 #define _MSC_STATUS_WORDTIMEOUT_SHIFT           4                                       
00208 #define _MSC_STATUS_WORDTIMEOUT_MASK            0x10UL                                  
00209 #define _MSC_STATUS_WORDTIMEOUT_DEFAULT         0x00000000UL                            
00210 #define MSC_STATUS_WORDTIMEOUT_DEFAULT          (_MSC_STATUS_WORDTIMEOUT_DEFAULT << 4)  
00211 #define MSC_STATUS_ERASEABORTED                 (0x1UL << 5)                            
00212 #define _MSC_STATUS_ERASEABORTED_SHIFT          5                                       
00213 #define _MSC_STATUS_ERASEABORTED_MASK           0x20UL                                  
00214 #define _MSC_STATUS_ERASEABORTED_DEFAULT        0x00000000UL                            
00215 #define MSC_STATUS_ERASEABORTED_DEFAULT         (_MSC_STATUS_ERASEABORTED_DEFAULT << 5) 
00216 #define MSC_STATUS_PCRUNNING                    (0x1UL << 6)                            
00217 #define _MSC_STATUS_PCRUNNING_SHIFT             6                                       
00218 #define _MSC_STATUS_PCRUNNING_MASK              0x40UL                                  
00219 #define _MSC_STATUS_PCRUNNING_DEFAULT           0x00000000UL                            
00220 #define MSC_STATUS_PCRUNNING_DEFAULT            (_MSC_STATUS_PCRUNNING_DEFAULT << 6)    
00222 /* Bit fields for MSC IF */
00223 #define _MSC_IF_RESETVALUE                      0x00000000UL                 
00224 #define _MSC_IF_MASK                            0x0000000FUL                 
00225 #define MSC_IF_ERASE                            (0x1UL << 0)                 
00226 #define _MSC_IF_ERASE_SHIFT                     0                            
00227 #define _MSC_IF_ERASE_MASK                      0x1UL                        
00228 #define _MSC_IF_ERASE_DEFAULT                   0x00000000UL                 
00229 #define MSC_IF_ERASE_DEFAULT                    (_MSC_IF_ERASE_DEFAULT << 0) 
00230 #define MSC_IF_WRITE                            (0x1UL << 1)                 
00231 #define _MSC_IF_WRITE_SHIFT                     1                            
00232 #define _MSC_IF_WRITE_MASK                      0x2UL                        
00233 #define _MSC_IF_WRITE_DEFAULT                   0x00000000UL                 
00234 #define MSC_IF_WRITE_DEFAULT                    (_MSC_IF_WRITE_DEFAULT << 1) 
00235 #define MSC_IF_CHOF                             (0x1UL << 2)                 
00236 #define _MSC_IF_CHOF_SHIFT                      2                            
00237 #define _MSC_IF_CHOF_MASK                       0x4UL                        
00238 #define _MSC_IF_CHOF_DEFAULT                    0x00000000UL                 
00239 #define MSC_IF_CHOF_DEFAULT                     (_MSC_IF_CHOF_DEFAULT << 2)  
00240 #define MSC_IF_CMOF                             (0x1UL << 3)                 
00241 #define _MSC_IF_CMOF_SHIFT                      3                            
00242 #define _MSC_IF_CMOF_MASK                       0x8UL                        
00243 #define _MSC_IF_CMOF_DEFAULT                    0x00000000UL                 
00244 #define MSC_IF_CMOF_DEFAULT                     (_MSC_IF_CMOF_DEFAULT << 3)  
00246 /* Bit fields for MSC IFS */
00247 #define _MSC_IFS_RESETVALUE                     0x00000000UL                  
00248 #define _MSC_IFS_MASK                           0x0000000FUL                  
00249 #define MSC_IFS_ERASE                           (0x1UL << 0)                  
00250 #define _MSC_IFS_ERASE_SHIFT                    0                             
00251 #define _MSC_IFS_ERASE_MASK                     0x1UL                         
00252 #define _MSC_IFS_ERASE_DEFAULT                  0x00000000UL                  
00253 #define MSC_IFS_ERASE_DEFAULT                   (_MSC_IFS_ERASE_DEFAULT << 0) 
00254 #define MSC_IFS_WRITE                           (0x1UL << 1)                  
00255 #define _MSC_IFS_WRITE_SHIFT                    1                             
00256 #define _MSC_IFS_WRITE_MASK                     0x2UL                         
00257 #define _MSC_IFS_WRITE_DEFAULT                  0x00000000UL                  
00258 #define MSC_IFS_WRITE_DEFAULT                   (_MSC_IFS_WRITE_DEFAULT << 1) 
00259 #define MSC_IFS_CHOF                            (0x1UL << 2)                  
00260 #define _MSC_IFS_CHOF_SHIFT                     2                             
00261 #define _MSC_IFS_CHOF_MASK                      0x4UL                         
00262 #define _MSC_IFS_CHOF_DEFAULT                   0x00000000UL                  
00263 #define MSC_IFS_CHOF_DEFAULT                    (_MSC_IFS_CHOF_DEFAULT << 2)  
00264 #define MSC_IFS_CMOF                            (0x1UL << 3)                  
00265 #define _MSC_IFS_CMOF_SHIFT                     3                             
00266 #define _MSC_IFS_CMOF_MASK                      0x8UL                         
00267 #define _MSC_IFS_CMOF_DEFAULT                   0x00000000UL                  
00268 #define MSC_IFS_CMOF_DEFAULT                    (_MSC_IFS_CMOF_DEFAULT << 3)  
00270 /* Bit fields for MSC IFC */
00271 #define _MSC_IFC_RESETVALUE                     0x00000000UL                  
00272 #define _MSC_IFC_MASK                           0x0000000FUL                  
00273 #define MSC_IFC_ERASE                           (0x1UL << 0)                  
00274 #define _MSC_IFC_ERASE_SHIFT                    0                             
00275 #define _MSC_IFC_ERASE_MASK                     0x1UL                         
00276 #define _MSC_IFC_ERASE_DEFAULT                  0x00000000UL                  
00277 #define MSC_IFC_ERASE_DEFAULT                   (_MSC_IFC_ERASE_DEFAULT << 0) 
00278 #define MSC_IFC_WRITE                           (0x1UL << 1)                  
00279 #define _MSC_IFC_WRITE_SHIFT                    1                             
00280 #define _MSC_IFC_WRITE_MASK                     0x2UL                         
00281 #define _MSC_IFC_WRITE_DEFAULT                  0x00000000UL                  
00282 #define MSC_IFC_WRITE_DEFAULT                   (_MSC_IFC_WRITE_DEFAULT << 1) 
00283 #define MSC_IFC_CHOF                            (0x1UL << 2)                  
00284 #define _MSC_IFC_CHOF_SHIFT                     2                             
00285 #define _MSC_IFC_CHOF_MASK                      0x4UL                         
00286 #define _MSC_IFC_CHOF_DEFAULT                   0x00000000UL                  
00287 #define MSC_IFC_CHOF_DEFAULT                    (_MSC_IFC_CHOF_DEFAULT << 2)  
00288 #define MSC_IFC_CMOF                            (0x1UL << 3)                  
00289 #define _MSC_IFC_CMOF_SHIFT                     3                             
00290 #define _MSC_IFC_CMOF_MASK                      0x8UL                         
00291 #define _MSC_IFC_CMOF_DEFAULT                   0x00000000UL                  
00292 #define MSC_IFC_CMOF_DEFAULT                    (_MSC_IFC_CMOF_DEFAULT << 3)  
00294 /* Bit fields for MSC IEN */
00295 #define _MSC_IEN_RESETVALUE                     0x00000000UL                  
00296 #define _MSC_IEN_MASK                           0x0000000FUL                  
00297 #define MSC_IEN_ERASE                           (0x1UL << 0)                  
00298 #define _MSC_IEN_ERASE_SHIFT                    0                             
00299 #define _MSC_IEN_ERASE_MASK                     0x1UL                         
00300 #define _MSC_IEN_ERASE_DEFAULT                  0x00000000UL                  
00301 #define MSC_IEN_ERASE_DEFAULT                   (_MSC_IEN_ERASE_DEFAULT << 0) 
00302 #define MSC_IEN_WRITE                           (0x1UL << 1)                  
00303 #define _MSC_IEN_WRITE_SHIFT                    1                             
00304 #define _MSC_IEN_WRITE_MASK                     0x2UL                         
00305 #define _MSC_IEN_WRITE_DEFAULT                  0x00000000UL                  
00306 #define MSC_IEN_WRITE_DEFAULT                   (_MSC_IEN_WRITE_DEFAULT << 1) 
00307 #define MSC_IEN_CHOF                            (0x1UL << 2)                  
00308 #define _MSC_IEN_CHOF_SHIFT                     2                             
00309 #define _MSC_IEN_CHOF_MASK                      0x4UL                         
00310 #define _MSC_IEN_CHOF_DEFAULT                   0x00000000UL                  
00311 #define MSC_IEN_CHOF_DEFAULT                    (_MSC_IEN_CHOF_DEFAULT << 2)  
00312 #define MSC_IEN_CMOF                            (0x1UL << 3)                  
00313 #define _MSC_IEN_CMOF_SHIFT                     3                             
00314 #define _MSC_IEN_CMOF_MASK                      0x8UL                         
00315 #define _MSC_IEN_CMOF_DEFAULT                   0x00000000UL                  
00316 #define MSC_IEN_CMOF_DEFAULT                    (_MSC_IEN_CMOF_DEFAULT << 3)  
00318 /* Bit fields for MSC LOCK */
00319 #define _MSC_LOCK_RESETVALUE                    0x00000000UL                      
00320 #define _MSC_LOCK_MASK                          0x0000FFFFUL                      
00321 #define _MSC_LOCK_LOCKKEY_SHIFT                 0                                 
00322 #define _MSC_LOCK_LOCKKEY_MASK                  0xFFFFUL                          
00323 #define _MSC_LOCK_LOCKKEY_DEFAULT               0x00000000UL                      
00324 #define _MSC_LOCK_LOCKKEY_LOCK                  0x00000000UL                      
00325 #define _MSC_LOCK_LOCKKEY_UNLOCKED              0x00000000UL                      
00326 #define _MSC_LOCK_LOCKKEY_LOCKED                0x00000001UL                      
00327 #define _MSC_LOCK_LOCKKEY_UNLOCK                0x00001B71UL                      
00328 #define MSC_LOCK_LOCKKEY_DEFAULT                (_MSC_LOCK_LOCKKEY_DEFAULT << 0)  
00329 #define MSC_LOCK_LOCKKEY_LOCK                   (_MSC_LOCK_LOCKKEY_LOCK << 0)     
00330 #define MSC_LOCK_LOCKKEY_UNLOCKED               (_MSC_LOCK_LOCKKEY_UNLOCKED << 0) 
00331 #define MSC_LOCK_LOCKKEY_LOCKED                 (_MSC_LOCK_LOCKKEY_LOCKED << 0)   
00332 #define MSC_LOCK_LOCKKEY_UNLOCK                 (_MSC_LOCK_LOCKKEY_UNLOCK << 0)   
00334 /* Bit fields for MSC CMD */
00335 #define _MSC_CMD_RESETVALUE                     0x00000000UL                     
00336 #define _MSC_CMD_MASK                           0x00000007UL                     
00337 #define MSC_CMD_INVCACHE                        (0x1UL << 0)                     
00338 #define _MSC_CMD_INVCACHE_SHIFT                 0                                
00339 #define _MSC_CMD_INVCACHE_MASK                  0x1UL                            
00340 #define _MSC_CMD_INVCACHE_DEFAULT               0x00000000UL                     
00341 #define MSC_CMD_INVCACHE_DEFAULT                (_MSC_CMD_INVCACHE_DEFAULT << 0) 
00342 #define MSC_CMD_STARTPC                         (0x1UL << 1)                     
00343 #define _MSC_CMD_STARTPC_SHIFT                  1                                
00344 #define _MSC_CMD_STARTPC_MASK                   0x2UL                            
00345 #define _MSC_CMD_STARTPC_DEFAULT                0x00000000UL                     
00346 #define MSC_CMD_STARTPC_DEFAULT                 (_MSC_CMD_STARTPC_DEFAULT << 1)  
00347 #define MSC_CMD_STOPPC                          (0x1UL << 2)                     
00348 #define _MSC_CMD_STOPPC_SHIFT                   2                                
00349 #define _MSC_CMD_STOPPC_MASK                    0x4UL                            
00350 #define _MSC_CMD_STOPPC_DEFAULT                 0x00000000UL                     
00351 #define MSC_CMD_STOPPC_DEFAULT                  (_MSC_CMD_STOPPC_DEFAULT << 2)   
00353 /* Bit fields for MSC CACHEHITS */
00354 #define _MSC_CACHEHITS_RESETVALUE               0x00000000UL                            
00355 #define _MSC_CACHEHITS_MASK                     0x000FFFFFUL                            
00356 #define _MSC_CACHEHITS_CACHEHITS_SHIFT          0                                       
00357 #define _MSC_CACHEHITS_CACHEHITS_MASK           0xFFFFFUL                               
00358 #define _MSC_CACHEHITS_CACHEHITS_DEFAULT        0x00000000UL                            
00359 #define MSC_CACHEHITS_CACHEHITS_DEFAULT         (_MSC_CACHEHITS_CACHEHITS_DEFAULT << 0) 
00361 /* Bit fields for MSC CACHEMISSES */
00362 #define _MSC_CACHEMISSES_RESETVALUE             0x00000000UL                                
00363 #define _MSC_CACHEMISSES_MASK                   0x000FFFFFUL                                
00364 #define _MSC_CACHEMISSES_CACHEMISSES_SHIFT      0                                           
00365 #define _MSC_CACHEMISSES_CACHEMISSES_MASK       0xFFFFFUL                                   
00366 #define _MSC_CACHEMISSES_CACHEMISSES_DEFAULT    0x00000000UL                                
00367 #define MSC_CACHEMISSES_CACHEMISSES_DEFAULT     (_MSC_CACHEMISSES_CACHEMISSES_DEFAULT << 0) 
00369 /* Bit fields for MSC TIMEBASE */
00370 #define _MSC_TIMEBASE_RESETVALUE                0x00000010UL                         
00371 #define _MSC_TIMEBASE_MASK                      0x0001003FUL                         
00372 #define _MSC_TIMEBASE_BASE_SHIFT                0                                    
00373 #define _MSC_TIMEBASE_BASE_MASK                 0x3FUL                               
00374 #define _MSC_TIMEBASE_BASE_DEFAULT              0x00000010UL                         
00375 #define MSC_TIMEBASE_BASE_DEFAULT               (_MSC_TIMEBASE_BASE_DEFAULT << 0)    
00376 #define MSC_TIMEBASE_PERIOD                     (0x1UL << 16)                        
00377 #define _MSC_TIMEBASE_PERIOD_SHIFT              16                                   
00378 #define _MSC_TIMEBASE_PERIOD_MASK               0x10000UL                            
00379 #define _MSC_TIMEBASE_PERIOD_DEFAULT            0x00000000UL                         
00380 #define _MSC_TIMEBASE_PERIOD_1US                0x00000000UL                         
00381 #define _MSC_TIMEBASE_PERIOD_5US                0x00000001UL                         
00382 #define MSC_TIMEBASE_PERIOD_DEFAULT             (_MSC_TIMEBASE_PERIOD_DEFAULT << 16) 
00383 #define MSC_TIMEBASE_PERIOD_1US                 (_MSC_TIMEBASE_PERIOD_1US << 16)     
00384 #define MSC_TIMEBASE_PERIOD_5US                 (_MSC_TIMEBASE_PERIOD_5US << 16)     
00386 /* Bit fields for MSC MASSLOCK */
00387 #define _MSC_MASSLOCK_RESETVALUE                0x00000001UL                          
00388 #define _MSC_MASSLOCK_MASK                      0x0000FFFFUL                          
00389 #define _MSC_MASSLOCK_LOCKKEY_SHIFT             0                                     
00390 #define _MSC_MASSLOCK_LOCKKEY_MASK              0xFFFFUL                              
00391 #define _MSC_MASSLOCK_LOCKKEY_LOCK              0x00000000UL                          
00392 #define _MSC_MASSLOCK_LOCKKEY_UNLOCKED          0x00000000UL                          
00393 #define _MSC_MASSLOCK_LOCKKEY_DEFAULT           0x00000001UL                          
00394 #define _MSC_MASSLOCK_LOCKKEY_LOCKED            0x00000001UL                          
00395 #define _MSC_MASSLOCK_LOCKKEY_UNLOCK            0x0000631AUL                          
00396 #define MSC_MASSLOCK_LOCKKEY_LOCK               (_MSC_MASSLOCK_LOCKKEY_LOCK << 0)     
00397 #define MSC_MASSLOCK_LOCKKEY_UNLOCKED           (_MSC_MASSLOCK_LOCKKEY_UNLOCKED << 0) 
00398 #define MSC_MASSLOCK_LOCKKEY_DEFAULT            (_MSC_MASSLOCK_LOCKKEY_DEFAULT << 0)  
00399 #define MSC_MASSLOCK_LOCKKEY_LOCKED             (_MSC_MASSLOCK_LOCKKEY_LOCKED << 0)   
00400 #define MSC_MASSLOCK_LOCKKEY_UNLOCK             (_MSC_MASSLOCK_LOCKKEY_UNLOCK << 0)   
00402 /* Bit fields for MSC IRQLATENCY */
00403 #define _MSC_IRQLATENCY_RESETVALUE              0x00000000UL                              
00404 #define _MSC_IRQLATENCY_MASK                    0x000000FFUL                              
00405 #define _MSC_IRQLATENCY_IRQLATENCY_SHIFT        0                                         
00406 #define _MSC_IRQLATENCY_IRQLATENCY_MASK         0xFFUL                                    
00407 #define _MSC_IRQLATENCY_IRQLATENCY_DEFAULT      0x00000000UL                              
00408 #define MSC_IRQLATENCY_IRQLATENCY_DEFAULT       (_MSC_IRQLATENCY_IRQLATENCY_DEFAULT << 0)