34 #ifndef EFM32HG322F64_H
35 #define EFM32HG322F64_H
90 #define __MPU_PRESENT 0
91 #define __VTOR_PRESENT 1
92 #define __NVIC_PRIO_BITS 2
93 #define __Vendor_SysTickConfig 0
103 #define _EFM32_HAPPY_FAMILY 1
105 #define _SILICON_LABS_32B_PLATFORM_1
106 #define _SILICON_LABS_32B_PLATFORM 1
109 #if !defined(EFM32HG322F64)
110 #define EFM32HG322F64 1
114 #define PART_NUMBER "EFM32HG322F64"
117 #define FLASH_MEM_BASE ((uint32_t) 0x0UL)
118 #define FLASH_MEM_SIZE ((uint32_t) 0x10000000UL)
119 #define FLASH_MEM_END ((uint32_t) 0xFFFFFFFUL)
120 #define FLASH_MEM_BITS ((uint32_t) 0x28UL)
121 #define AES_MEM_BASE ((uint32_t) 0x400E0000UL)
122 #define AES_MEM_SIZE ((uint32_t) 0x400UL)
123 #define AES_MEM_END ((uint32_t) 0x400E03FFUL)
124 #define AES_MEM_BITS ((uint32_t) 0x10UL)
125 #define USBC_MEM_BASE ((uint32_t) 0x40100000UL)
126 #define USBC_MEM_SIZE ((uint32_t) 0x40000UL)
127 #define USBC_MEM_END ((uint32_t) 0x4013FFFFUL)
128 #define USBC_MEM_BITS ((uint32_t) 0x18UL)
129 #define PER_MEM_BASE ((uint32_t) 0x40000000UL)
130 #define PER_MEM_SIZE ((uint32_t) 0xE0000UL)
131 #define PER_MEM_END ((uint32_t) 0x400DFFFFUL)
132 #define PER_MEM_BITS ((uint32_t) 0x20UL)
133 #define RAM_MEM_BASE ((uint32_t) 0x20000000UL)
134 #define RAM_MEM_SIZE ((uint32_t) 0x40000UL)
135 #define RAM_MEM_END ((uint32_t) 0x2003FFFFUL)
136 #define RAM_MEM_BITS ((uint32_t) 0x18UL)
137 #define DEVICE_MEM_BASE ((uint32_t) 0xF0040000UL)
138 #define DEVICE_MEM_SIZE ((uint32_t) 0x1000UL)
139 #define DEVICE_MEM_END ((uint32_t) 0xF0040FFFUL)
140 #define DEVICE_MEM_BITS ((uint32_t) 0x12UL)
141 #define RAM_CODE_MEM_BASE ((uint32_t) 0x10000000UL)
142 #define RAM_CODE_MEM_SIZE ((uint32_t) 0x20000UL)
143 #define RAM_CODE_MEM_END ((uint32_t) 0x1001FFFFUL)
144 #define RAM_CODE_MEM_BITS ((uint32_t) 0x17UL)
147 #define FLASH_BASE (0x00000000UL)
148 #define FLASH_SIZE (0x00010000UL)
149 #define FLASH_PAGE_SIZE 1024
150 #define SRAM_BASE (0x20000000UL)
151 #define SRAM_SIZE (0x00002000UL)
152 #define __CM0PLUS_REV 0x001
153 #define PRS_CHAN_COUNT 6
154 #define DMA_CHAN_COUNT 6
157 #define AFCHAN_MAX 42
158 #define AFCHANLOC_MAX 7
160 #define AFACHAN_MAX 27
164 #define TIMER_PRESENT
165 #define TIMER_COUNT 3
168 #define USART_PRESENT
169 #define USART_COUNT 2
174 #define LEUART_PRESENT
175 #define LEUART_COUNT 1
188 #define USBLE_PRESENT
189 #define USBLE_COUNT 1
208 #define HFXTAL_PRESENT
209 #define HFXTAL_COUNT 1
210 #define LFXTAL_PRESENT
211 #define LFXTAL_COUNT 1
212 #define USHFRCO_PRESENT
213 #define USHFRCO_COUNT 1
220 #define BOOTLOADER_PRESENT
221 #define BOOTLOADER_COUNT 1
222 #define ANALOG_PRESENT
223 #define ANALOG_COUNT 1
227 #define ARM_MATH_CM0PLUS
228 #include "arm_math.h"
229 #include "core_cm0plus.h"
277 #define AES_BASE (0x400E0000UL)
278 #define DMA_BASE (0x400C2000UL)
279 #define USB_BASE (0x400C4000UL)
280 #define MSC_BASE (0x400C0000UL)
281 #define EMU_BASE (0x400C6000UL)
282 #define RMU_BASE (0x400CA000UL)
283 #define CMU_BASE (0x400C8000UL)
284 #define TIMER0_BASE (0x40010000UL)
285 #define TIMER1_BASE (0x40010400UL)
286 #define TIMER2_BASE (0x40010800UL)
287 #define ACMP0_BASE (0x40001000UL)
288 #define USART0_BASE (0x4000C000UL)
289 #define USART1_BASE (0x4000C400UL)
290 #define PRS_BASE (0x400CC000UL)
291 #define IDAC0_BASE (0x40004000UL)
292 #define GPIO_BASE (0x40006000UL)
293 #define VCMP_BASE (0x40000000UL)
294 #define ADC0_BASE (0x40002000UL)
295 #define LEUART0_BASE (0x40084000UL)
296 #define PCNT0_BASE (0x40086000UL)
297 #define I2C0_BASE (0x4000A000UL)
298 #define RTC_BASE (0x40080000UL)
299 #define WDOG_BASE (0x40088000UL)
300 #define MTB_BASE (0xF0040000UL)
301 #define CALIBRATE_BASE (0x0FE08000UL)
302 #define DEVINFO_BASE (0x0FE081B0UL)
303 #define ROMTABLE_BASE (0xF00FFFD0UL)
304 #define LOCKBITS_BASE (0x0FE04000UL)
305 #define USERDATA_BASE (0x0FE00000UL)
314 #define AES ((AES_TypeDef *) AES_BASE)
315 #define DMA ((DMA_TypeDef *) DMA_BASE)
316 #define USB ((USB_TypeDef *) USB_BASE)
317 #define MSC ((MSC_TypeDef *) MSC_BASE)
318 #define EMU ((EMU_TypeDef *) EMU_BASE)
319 #define RMU ((RMU_TypeDef *) RMU_BASE)
320 #define CMU ((CMU_TypeDef *) CMU_BASE)
321 #define TIMER0 ((TIMER_TypeDef *) TIMER0_BASE)
322 #define TIMER1 ((TIMER_TypeDef *) TIMER1_BASE)
323 #define TIMER2 ((TIMER_TypeDef *) TIMER2_BASE)
324 #define ACMP0 ((ACMP_TypeDef *) ACMP0_BASE)
325 #define USART0 ((USART_TypeDef *) USART0_BASE)
326 #define USART1 ((USART_TypeDef *) USART1_BASE)
327 #define PRS ((PRS_TypeDef *) PRS_BASE)
328 #define IDAC0 ((IDAC_TypeDef *) IDAC0_BASE)
329 #define GPIO ((GPIO_TypeDef *) GPIO_BASE)
330 #define VCMP ((VCMP_TypeDef *) VCMP_BASE)
331 #define ADC0 ((ADC_TypeDef *) ADC0_BASE)
332 #define LEUART0 ((LEUART_TypeDef *) LEUART0_BASE)
333 #define PCNT0 ((PCNT_TypeDef *) PCNT0_BASE)
334 #define I2C0 ((I2C_TypeDef *) I2C0_BASE)
335 #define RTC ((RTC_TypeDef *) RTC_BASE)
336 #define WDOG ((WDOG_TypeDef *) WDOG_BASE)
337 #define MTB ((MTB_TypeDef *) MTB_BASE)
338 #define CALIBRATE ((CALIBRATE_TypeDef *) CALIBRATE_BASE)
339 #define DEVINFO ((DEVINFO_TypeDef *) DEVINFO_BASE)
340 #define ROMTABLE ((ROMTABLE_TypeDef *) ROMTABLE_BASE)
349 #include "efm32hg_prs_signals.h"
357 #define MSC_UNLOCK_CODE 0x1B71
358 #define EMU_UNLOCK_CODE 0xADE8
359 #define CMU_UNLOCK_CODE 0x580E
360 #define TIMER_UNLOCK_CODE 0xCE80
361 #define GPIO_UNLOCK_CODE 0xA534
372 #include "efm32hg_af_ports.h"
390 #define SET_BIT_FIELD(REG, MASK, VALUE, OFFSET) \
391 REG = ((REG) &~(MASK)) | (((VALUE) << (OFFSET)) & (MASK));
EFM32HG_ADC register and bit field definitions.
EFM32HG_ROMTABLE register and bit field definitions.
EFM32HG_IDAC register and bit field definitions.
EFM32HG_TIMER register and bit field definitions.
CMSIS Cortex-M System Layer for EFM32 devices.
EFM32HG_USART register and bit field definitions.
EFM32HG_AES register and bit field definitions.
EFM32HG_PCNT register and bit field definitions.
EFM32HG_DMA_CH register and bit field definitions.
EFM32HG_DEVINFO register and bit field definitions.
EFM32HG_WDOG register and bit field definitions.
EFM32HG_ACMP register and bit field definitions.
EFM32HG_DMA register and bit field definitions.
EFM32HG_USB register and bit field definitions.
EFM32HG_TIMER_CC register and bit field definitions.
EFM32HG_MSC register and bit field definitions.
EFM32HG_DMAREQ register and bit field definitions.
EFM32HG_USB_DOEP register and bit field definitions.
EFM32HG_RMU register and bit field definitions.
EFM32HG_GPIO_P register and bit field definitions.
EFM32HG_MTB register and bit field definitions.
EFM32HG_PRS_CH register and bit field definitions.
EFM32HG_RTC register and bit field definitions.
EFM32HG_CALIBRATE register and bit field definitions.
EFM32HG_LEUART register and bit field definitions.
EFM32HG_EMU register and bit field definitions.
EFM32HG_CMU register and bit field definitions.
EFM32HG_PRS register and bit field definitions.
EFM32HG_GPIO register and bit field definitions.
EFM32HG_VCMP register and bit field definitions.
EFM32HG_USB_DIEP register and bit field definitions.
EFM32HG_DMACTRL register and bit field definitions.
EFM32HG_I2C register and bit field definitions.
EFM32HG_DMA_DESCRIPTOR register and bit field definitions.
EFM32HG_AF_PINS register and bit field definitions.