34 #ifndef __SILICON_LABS_EM_GPIO_H__
35 #define __SILICON_LABS_EM_GPIO_H__
38 #if defined(GPIO_COUNT) && (GPIO_COUNT > 0)
63 #if defined( _EFM32_TINY_FAMILY ) || defined( _EFM32_ZERO_FAMILY )
65 #define _GPIO_PORT_A_PIN_COUNT 14
66 #define _GPIO_PORT_B_PIN_COUNT 10
67 #define _GPIO_PORT_C_PIN_COUNT 16
68 #define _GPIO_PORT_D_PIN_COUNT 9
69 #define _GPIO_PORT_E_PIN_COUNT 12
70 #define _GPIO_PORT_F_PIN_COUNT 6
72 #define _GPIO_PORT_A_PIN_MASK 0xF77F
73 #define _GPIO_PORT_B_PIN_MASK 0x79F8
74 #define _GPIO_PORT_C_PIN_MASK 0xFFFF
75 #define _GPIO_PORT_D_PIN_MASK 0x01FF
76 #define _GPIO_PORT_E_PIN_MASK 0xFFF0
77 #define _GPIO_PORT_F_PIN_MASK 0x003F
79 #elif defined( _EFM32_HAPPY_FAMILY )
81 #define _GPIO_PORT_A_PIN_COUNT 6
82 #define _GPIO_PORT_B_PIN_COUNT 5
83 #define _GPIO_PORT_C_PIN_COUNT 12
84 #define _GPIO_PORT_D_PIN_COUNT 4
85 #define _GPIO_PORT_E_PIN_COUNT 4
86 #define _GPIO_PORT_F_PIN_COUNT 6
88 #define _GPIO_PORT_A_PIN_MASK 0x0707
89 #define _GPIO_PORT_B_PIN_MASK 0x6980
90 #define _GPIO_PORT_C_PIN_MASK 0xEF1F
91 #define _GPIO_PORT_D_PIN_MASK 0x00F0
92 #define _GPIO_PORT_E_PIN_MASK 0x3C00
93 #define _GPIO_PORT_F_PIN_MASK 0x003F
95 #elif defined( _EFM32_GIANT_FAMILY ) \
96 || defined( _EFM32_WONDER_FAMILY )
98 #define _GPIO_PORT_A_PIN_COUNT 16
99 #define _GPIO_PORT_B_PIN_COUNT 16
100 #define _GPIO_PORT_C_PIN_COUNT 16
101 #define _GPIO_PORT_D_PIN_COUNT 16
102 #define _GPIO_PORT_E_PIN_COUNT 16
103 #define _GPIO_PORT_F_PIN_COUNT 13
105 #define _GPIO_PORT_A_PIN_MASK 0xFFFF
106 #define _GPIO_PORT_B_PIN_MASK 0xFFFF
107 #define _GPIO_PORT_C_PIN_MASK 0xFFFF
108 #define _GPIO_PORT_D_PIN_MASK 0xFFFF
109 #define _GPIO_PORT_E_PIN_MASK 0xFFFF
110 #define _GPIO_PORT_F_PIN_MASK 0x1FFF
112 #elif defined( _EFM32_GECKO_FAMILY )
114 #define _GPIO_PORT_A_PIN_COUNT 16
115 #define _GPIO_PORT_B_PIN_COUNT 16
116 #define _GPIO_PORT_C_PIN_COUNT 16
117 #define _GPIO_PORT_D_PIN_COUNT 16
118 #define _GPIO_PORT_E_PIN_COUNT 16
119 #define _GPIO_PORT_F_PIN_COUNT 10
121 #define _GPIO_PORT_A_PIN_MASK 0xFFFF
122 #define _GPIO_PORT_B_PIN_MASK 0xFFFF
123 #define _GPIO_PORT_C_PIN_MASK 0xFFFF
124 #define _GPIO_PORT_D_PIN_MASK 0xFFFF
125 #define _GPIO_PORT_E_PIN_MASK 0xFFFF
126 #define _GPIO_PORT_F_PIN_MASK 0x03FF
128 #elif defined( _EFR32_MIGHTY_FAMILY ) \
129 || defined( _EFR32_BLUE_FAMILY ) \
130 || defined( _EFR32_FLEX_FAMILY ) \
131 || defined( _EFR32_ZAPPY_FAMILY )
133 #define _GPIO_PORT_A_PIN_COUNT 6
134 #define _GPIO_PORT_B_PIN_COUNT 5
135 #define _GPIO_PORT_C_PIN_COUNT 6
136 #define _GPIO_PORT_D_PIN_COUNT 3
137 #define _GPIO_PORT_E_PIN_COUNT 0
138 #define _GPIO_PORT_F_PIN_COUNT 8
140 #define _GPIO_PORT_A_PIN_MASK 0x003F
141 #define _GPIO_PORT_B_PIN_MASK 0xF800
142 #define _GPIO_PORT_C_PIN_MASK 0x0FC0
143 #define _GPIO_PORT_D_PIN_MASK 0xE000
144 #define _GPIO_PORT_E_PIN_MASK 0x0000
145 #define _GPIO_PORT_F_PIN_MASK 0x00FF
147 #elif defined( _EFM32_PEARL_FAMILY ) \
148 || defined( _EFM32_JADE_FAMILY )
150 #define _GPIO_PORT_A_PIN_COUNT 6
151 #define _GPIO_PORT_B_PIN_COUNT 5
152 #define _GPIO_PORT_C_PIN_COUNT 6
153 #define _GPIO_PORT_D_PIN_COUNT 7
154 #define _GPIO_PORT_E_PIN_COUNT 0
155 #define _GPIO_PORT_F_PIN_COUNT 8
157 #define _GPIO_PORT_A_PIN_MASK 0x003F
158 #define _GPIO_PORT_B_PIN_MASK 0xF800
159 #define _GPIO_PORT_C_PIN_MASK 0x0FC0
160 #define _GPIO_PORT_D_PIN_MASK 0xFE00
161 #define _GPIO_PORT_E_PIN_MASK 0x0000
162 #define _GPIO_PORT_F_PIN_MASK 0x00FF
165 #warning "Port and pin masks are not defined for this family."
168 #if defined( _GPIO_PORT_G_PIN_COUNT ) && defined( _GPIO_PORT_H_PIN_COUNT )
169 #define _GPIO_PORT_SIZE(port) ( \
170 (port) == 0 ? _GPIO_PORT_A_PIN_COUNT : \
171 (port) == 1 ? _GPIO_PORT_B_PIN_COUNT : \
172 (port) == 2 ? _GPIO_PORT_C_PIN_COUNT : \
173 (port) == 3 ? _GPIO_PORT_D_PIN_COUNT : \
174 (port) == 4 ? _GPIO_PORT_E_PIN_COUNT : \
175 (port) == 5 ? _GPIO_PORT_F_PIN_COUNT : \
176 (port) == 6 ? _GPIO_PORT_G_PIN_COUNT : \
177 (port) == 7 ? _GPIO_PORT_H_PIN_COUNT : \
180 #define _GPIO_PORT_SIZE(port) ( \
181 (port) == 0 ? _GPIO_PORT_A_PIN_COUNT : \
182 (port) == 1 ? _GPIO_PORT_B_PIN_COUNT : \
183 (port) == 2 ? _GPIO_PORT_C_PIN_COUNT : \
184 (port) == 3 ? _GPIO_PORT_D_PIN_COUNT : \
185 (port) == 4 ? _GPIO_PORT_E_PIN_COUNT : \
186 (port) == 5 ? _GPIO_PORT_F_PIN_COUNT : \
190 #if defined( _GPIO_PORT_G_PIN_MASK ) && defined( _GPIO_PORT_H_PIN_MASK )
191 #define _GPIO_PORT_MASK(port) ( \
192 (port) == 0 ? _GPIO_PORT_A_PIN_MASK : \
193 (port) == 1 ? _GPIO_PORT_B_PIN_MASK : \
194 (port) == 2 ? _GPIO_PORT_C_PIN_MASK : \
195 (port) == 3 ? _GPIO_PORT_D_PIN_MASK : \
196 (port) == 4 ? _GPIO_PORT_E_PIN_MASK : \
197 (port) == 5 ? _GPIO_PORT_F_PIN_MASK : \
198 (port) == 6 ? _GPIO_PORT_G_PIN_MASK : \
199 (port) == 7 ? _GPIO_PORT_H_PIN_MASK : \
202 #define _GPIO_PORT_MASK(port) ( \
203 (port) == 0 ? _GPIO_PORT_A_PIN_MASK : \
204 (port) == 1 ? _GPIO_PORT_B_PIN_MASK : \
205 (port) == 2 ? _GPIO_PORT_C_PIN_MASK : \
206 (port) == 3 ? _GPIO_PORT_D_PIN_MASK : \
207 (port) == 4 ? _GPIO_PORT_E_PIN_MASK : \
208 (port) == 5 ? _GPIO_PORT_F_PIN_MASK : \
213 #define GPIO_PORT_VALID(port) ( _GPIO_PORT_MASK(port) )
214 #define GPIO_PORT_PIN_VALID(port, pin) ((( _GPIO_PORT_MASK(port)) >> (pin)) & 0x1 )
217 #define GPIO_PIN_MAX 15
220 #if defined( _GPIO_PORT_G_PIN_COUNT ) && defined( _GPIO_PORT_H_PIN_COUNT )
221 #define GPIO_PORT_MAX 7
223 #define GPIO_PORT_MAX 5
234 #if ( _GPIO_PORT_A_PIN_COUNT > 0 )
237 #if ( _GPIO_PORT_B_PIN_COUNT > 0 )
240 #if ( _GPIO_PORT_C_PIN_COUNT > 0 )
243 #if ( _GPIO_PORT_D_PIN_COUNT > 0 )
246 #if ( _GPIO_PORT_E_PIN_COUNT > 0 )
249 #if ( _GPIO_PORT_F_PIN_COUNT > 0 )
252 #if defined( _GPIO_PORT_G_PIN_COUNT ) && ( _GPIO_PORT_G_PIN_COUNT > 0 )
255 #if defined( _GPIO_PORT_H_PIN_COUNT ) && ( _GPIO_PORT_H_PIN_COUNT > 0 )
260 #if defined( _GPIO_P_CTRL_DRIVEMODE_MASK )
275 #if defined( _GPIO_P_CTRL_DRIVESTRENGTH_MASK ) && defined( _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK )
280 gpioDriveStrengthWeakAlternateWeak = GPIO_P_CTRL_DRIVESTRENGTH_WEAK | GPIO_P_CTRL_DRIVESTRENGTHALT_WEAK,
283 gpioDriveStrengthWeakAlternateStrong = GPIO_P_CTRL_DRIVESTRENGTH_WEAK | GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG,
286 gpioDriveStrengthStrongAlternateWeak = GPIO_P_CTRL_DRIVESTRENGTH_STRONG | GPIO_P_CTRL_DRIVESTRENGTHALT_WEAK,
289 gpioDriveStrengthStrongAlternateStrong = GPIO_P_CTRL_DRIVESTRENGTH_STRONG | GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG,
290 } GPIO_DriveStrength_TypeDef;
292 #define gpioDriveStrengthStrong gpioDriveStrengthStrongAlternateStrong
293 #define gpioDriveStrengthWeak gpioDriveStrengthWeakAlternateWeak
310 #if defined( _GPIO_P_MODEL_MODE0_PUSHPULLDRIVE )
314 #if defined( _GPIO_P_MODEL_MODE0_PUSHPULLALT )
316 gpioModePushPullAlternate = _GPIO_P_MODEL_MODE0_PUSHPULLALT,
330 #if defined( _GPIO_P_MODEL_MODE0_WIREDANDDRIVE )
340 #if defined( _GPIO_P_MODEL_MODE0_WIREDANDALT )
342 gpioModeWiredAndAlternate = _GPIO_P_MODEL_MODE0_WIREDANDALT,
344 gpioModeWiredAndAlternateFilter = _GPIO_P_MODEL_MODE0_WIREDANDALTFILTER,
346 gpioModeWiredAndAlternatePullUp = _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP,
348 gpioModeWiredAndAlternatePullUpFilter = _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER,
369 # if defined( _GPIO_EM4WUEN_MASK )
387 #if defined( _GPIO_ROUTE_SWCLKPEN_MASK )
389 #elif defined( _GPIO_ROUTEPEN_SWCLKTCKPEN_MASK )
392 #warning "ROUTE enable for SWCLK pin is not defined."
411 #if defined( _GPIO_ROUTE_SWDIOPEN_MASK )
413 #elif defined( _GPIO_ROUTEPEN_SWDIOTMSPEN_MASK )
416 #warning "ROUTE enable for SWDIO pin is not defined."
421 #if defined( _GPIO_ROUTE_SWOPEN_MASK ) || defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
435 __STATIC_INLINE
void GPIO_DbgSWOEnable(
bool enable)
437 #if defined( _GPIO_ROUTE_SWOPEN_MASK )
439 #elif defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
442 #warning "ROUTE enable for SWO/SWV pin is not defined."
447 #if defined (_GPIO_P_CTRL_DRIVEMODE_MASK)
451 #if defined( _GPIO_P_CTRL_DRIVESTRENGTH_MASK )
452 void GPIO_DriveStrengthSet(
GPIO_Port_TypeDef port, GPIO_DriveStrength_TypeDef strength);
455 # if defined( _GPIO_EM4WUEN_MASK )
468 GPIO->EM4WUEN &= ~pinmask;
473 #if defined( _GPIO_EM4WUCAUSE_MASK ) || defined( _RMU_RSTCAUSE_EM4RST_MASK )
484 #if defined( _GPIO_EM4WUCAUSE_MASK )
493 #if defined( GPIO_CTRL_EM4RET ) || defined( _EMU_EM4CTRL_EM4IORETMODE_MASK )
512 #if defined( GPIO_CTRL_EM4RET )
515 EMU->EM4CTRL = (
EMU->EM4CTRL & ~_EMU_EM4CTRL_EM4IORETMODE_MASK)
516 | EMU_EM4CTRL_EM4IORETMODE_EM4EXIT;
521 #if defined( GPIO_CTRL_EM4RET )
524 EMU->EM4CTRL = (
EMU->EM4CTRL & ~_EMU_EM4CTRL_EM4IORETMODE_MASK)
525 | EMU_EM4CTRL_EM4IORETMODE_DISABLE;
550 GPIO->INSENSE = (
GPIO->INSENSE & ~mask) | (val & mask);
635 return GPIO->IF & tmp;
678 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
700 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
701 #if defined( _GPIO_P_DOUTCLR_MASK )
702 GPIO->P[port].DOUTCLR = 1 << pin;
725 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
747 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
748 #if defined( _GPIO_P_DOUTSET_MASK )
749 GPIO->P[port].DOUTSET = 1 << pin;
773 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
775 GPIO->P[port].DOUTTGL = 1 << pin;
788 EFM_ASSERT(GPIO_PORT_VALID(port));
790 return GPIO->P[port].DIN;
811 EFM_ASSERT(GPIO_PORT_VALID(port));
812 #if defined( _GPIO_P_DOUTCLR_MASK )
813 GPIO->P[port].DOUTCLR = pins;
832 EFM_ASSERT(GPIO_PORT_VALID(port));
834 return GPIO->P[port].DOUT;
855 EFM_ASSERT(GPIO_PORT_VALID(port));
856 #if defined( _GPIO_P_DOUTSET_MASK )
857 GPIO->P[port].DOUTSET = pins;
886 EFM_ASSERT(GPIO_PORT_VALID(port));
888 GPIO->P[port].DOUT = (
GPIO->P[port].DOUT & ~mask) | (val & mask);
909 EFM_ASSERT(GPIO_PORT_VALID(port));
911 GPIO->P[port].DOUTTGL = pins;
#define _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUPFILTER
#define _GPIO_P_MODEL_MODE0_WIREDANDFILTER
#define _GPIO_P_MODEL_MODE0_INPUTPULL
__STATIC_INLINE void GPIO_DbgSWDClkEnable(bool enable)
Enable/disable serial wire clock pin.
__STATIC_INLINE uint32_t GPIO_EM4GetPinWakeupCause(void)
Check which GPIO pin(s) that caused a wake-up from EM4.
__STATIC_INLINE void GPIO_Unlock(void)
Unlocks the GPIO configuration.
#define _GPIO_ROUTE_SWCLKPEN_SHIFT
Emlib peripheral API "assert" implementation.
#define _GPIO_P_MODEL_MODE0_WIREDANDDRIVEFILTER
__STATIC_INLINE void GPIO_PortOutToggle(GPIO_Port_TypeDef port, uint32_t pins)
Toggle pins in GPIO port data out register.
RAM and peripheral bit-field set and clear API.
__STATIC_INLINE uint32_t GPIO_IntGetEnabled(void)
Get enabled and pending GPIO interrupt flags. Useful for handling more interrupt sources in the same ...
__STATIC_INLINE void GPIO_PinOutToggle(GPIO_Port_TypeDef port, unsigned int pin)
Toggle a single pin in GPIO port data out register.
__STATIC_INLINE void GPIO_PortOutSet(GPIO_Port_TypeDef port, uint32_t pins)
Set bits GPIO data out register to 1.
__STATIC_INLINE void GPIO_EM4DisablePinWakeup(uint32_t pinmask)
Disable GPIO pin wake-up from EM4.
#define GPIO_P_CTRL_DRIVEMODE_LOW
__STATIC_INLINE void GPIO_IntClear(uint32_t flags)
Clear one or more pending GPIO interrupts.
#define _GPIO_P_MODEL_MODE0_WIREDOR
__STATIC_INLINE void GPIO_PortOutClear(GPIO_Port_TypeDef port, uint32_t pins)
Set bits in DOUT register for a port to 0.
#define _GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER
#define GPIO_P_CTRL_DRIVEMODE_HIGH
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
#define _GPIO_ROUTE_SWDIOPEN_SHIFT
__STATIC_INLINE unsigned int BUS_RegBitRead(volatile const uint32_t *addr, unsigned int bit)
Perform a single-bit read operation on a peripheral register.
void GPIO_DbgLocationSet(unsigned int location)
Sets the pin location of the debug pins (Serial Wire interface).
__STATIC_INLINE uint32_t GPIO_PortInGet(GPIO_Port_TypeDef port)
Read the pad values for GPIO port.
#define _GPIO_P_MODEL_MODE0_WIREDANDPULLUP
void GPIO_EM4EnablePinWakeup(uint32_t pinmask, uint32_t polaritymask)
Enable GPIO pin wake-up from EM4. When the function exits, EM4 mode can be safely entered...
__STATIC_INLINE void GPIO_IntDisable(uint32_t flags)
Disable one or more GPIO interrupts.
#define _GPIO_P_MODEL_MODE0_INPUT
#define GPIO_P_CTRL_DRIVEMODE_LOWEST
__STATIC_INLINE void GPIO_IntEnable(uint32_t flags)
Enable one or more GPIO interrupts.
#define _GPIO_P_MODEL_MODE0_WIREDANDDRIVE
#define _GPIO_P_MODEL_MODE0_WIREDORPULLDOWN
#define _RMU_RSTCAUSE_EM4RST_MASK
void GPIO_DriveModeSet(GPIO_Port_TypeDef port, GPIO_DriveMode_TypeDef mode)
Sets the drive mode for a GPIO port.
void GPIO_PinModeSet(GPIO_Port_TypeDef port, unsigned int pin, GPIO_Mode_TypeDef mode, unsigned int out)
Set the mode for a GPIO pin.
__STATIC_INLINE void GPIO_Lock(void)
Locks the GPIO configuration.
#define _GPIO_P_MODEL_MODE0_WIREDAND
#define _GPIO_P_MODEL_MODE0_PUSHPULL
__STATIC_INLINE void GPIO_PortOutSetVal(GPIO_Port_TypeDef port, uint32_t val, uint32_t mask)
Set GPIO port data out register.
__STATIC_INLINE void GPIO_IntSet(uint32_t flags)
Set one or more pending GPIO interrupts from SW.
__STATIC_INLINE void GPIO_PinOutSet(GPIO_Port_TypeDef port, unsigned int pin)
Set a single pin in GPIO data out register to 1.
__STATIC_INLINE void GPIO_InputSenseSet(uint32_t val, uint32_t mask)
Enable/disable input sensing.
#define _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUP
__STATIC_INLINE unsigned int GPIO_PinOutGet(GPIO_Port_TypeDef port, unsigned int pin)
Get current setting for a pin in a GPIO port data out register.
__STATIC_INLINE void BUS_RegMaskedSet(volatile uint32_t *addr, uint32_t mask)
Perform a masked set operation on peripheral register address.
__STATIC_INLINE void BUS_RegMaskedClear(volatile uint32_t *addr, uint32_t mask)
Perform a masked clear operation on peripheral register address.
#define _GPIO_P_MODEL_MODE0_INPUTPULLFILTER
__STATIC_INLINE uint32_t GPIO_IntGet(void)
Get pending GPIO interrupts.
#define GPIO_LOCK_LOCKKEY_LOCK
#define _GPIO_EM4WUCAUSE_MASK
#define _GPIO_P_MODEL_MODE0_PUSHPULLDRIVE
#define _GPIO_P_MODEL_MODE0_DISABLED
#define GPIO_P_CTRL_DRIVEMODE_STANDARD
__STATIC_INLINE void GPIO_DbgSWDIOEnable(bool enable)
Enable/disable serial wire data I/O pin.
__STATIC_INLINE void GPIO_PinOutClear(GPIO_Port_TypeDef port, unsigned int pin)
Set a single pin in GPIO data out port register to 0.
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
#define _GPIO_EM4WUEN_MASK
__STATIC_INLINE unsigned int GPIO_PinInGet(GPIO_Port_TypeDef port, unsigned int pin)
Read the pad value for a single pin in a GPIO port.
__STATIC_INLINE uint32_t GPIO_PortOutGet(GPIO_Port_TypeDef port)
Get current setting for a GPIO port data out register.
void GPIO_IntConfig(GPIO_Port_TypeDef port, unsigned int pin, bool risingEdge, bool fallingEdge, bool enable)
Configure GPIO interrupt.
#define GPIO_LOCK_LOCKKEY_UNLOCK
__STATIC_INLINE void GPIO_EM4SetPinRetention(bool enable)
Enable GPIO pin retention of output enable, output value, pull enable and pull direction in EM4...