em_mpu.h

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00001 /***************************************************************************/
00034 #ifndef __SILICON_LABS_EM_MPU_H_
00035 #define __SILICON_LABS_EM_MPU_H_
00036 
00037 #include "em_device.h"
00038 
00039 #if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1)
00040 #include "em_assert.h"
00041 
00042 #include <stdbool.h>
00043 
00044 #ifdef __cplusplus
00045 extern "C" {
00046 #endif
00047 
00048 /***************************************************************************/
00053 /***************************************************************************/
00061 #define MPU_CTRL_PRIVDEFENA    MPU_CTRL_PRIVDEFENA_Msk
00062 
00066 #define MPU_CTRL_HFNMIENA      MPU_CTRL_HFNMIENA_Msk
00067 
00068 /*******************************************************************************
00069  ********************************   ENUMS   ************************************
00070  ******************************************************************************/
00071 
00075 typedef enum
00076 {
00077   mpuRegionSize32b   = 4,        
00078   mpuRegionSize64b   = 5,        
00079   mpuRegionSize128b  = 6,        
00080   mpuRegionSize256b  = 7,        
00081   mpuRegionSize512b  = 8,        
00082   mpuRegionSize1Kb   = 9,        
00083   mpuRegionSize2Kb   = 10,       
00084   mpuRegionSize4Kb   = 11,       
00085   mpuRegionSize8Kb   = 12,       
00086   mpuRegionSize16Kb  = 13,       
00087   mpuRegionSize32Kb  = 14,       
00088   mpuRegionSize64Kb  = 15,       
00089   mpuRegionSize128Kb = 16,       
00090   mpuRegionSize256Kb = 17,       
00091   mpuRegionSize512Kb = 18,       
00092   mpuRegionSize1Mb   = 19,       
00093   mpuRegionSize2Mb   = 20,       
00094   mpuRegionSize4Mb   = 21,       
00095   mpuRegionSize8Mb   = 22,       
00096   mpuRegionSize16Mb  = 23,       
00097   mpuRegionSize32Mb  = 24,       
00098   mpuRegionSize64Mb  = 25,       
00099   mpuRegionSize128Mb = 26,       
00100   mpuRegionSize256Mb = 27,       
00101   mpuRegionSize512Mb = 28,       
00102   mpuRegionSize1Gb   = 29,       
00103   mpuRegionSize2Gb   = 30,       
00104   mpuRegionSize4Gb   = 31        
00105 } MPU_RegionSize_TypeDef;
00106 
00110 typedef enum
00111 {
00112   mpuRegionNoAccess     = 0,  
00113   mpuRegionApPRw        = 1,  
00114   mpuRegionApPRwURo     = 2,  
00115   mpuRegionApFullAccess = 3,  
00116   mpuRegionApPRo        = 5,  
00117   mpuRegionApPRo_URo    = 6   
00118 } MPU_RegionAp_TypeDef;
00119 
00120 
00121 /*******************************************************************************
00122  *******************************   STRUCTS   ***********************************
00123  ******************************************************************************/
00124 
00126 typedef struct
00127 {
00128   bool                   regionEnable;     
00129   uint8_t                regionNo;         
00130   uint32_t               baseAddress;      
00131   MPU_RegionSize_TypeDef size;             
00132   MPU_RegionAp_TypeDef   accessPermission; 
00133   bool                   disableExec;      
00134   bool                   shareable;        
00135   bool                   cacheable;        
00136   bool                   bufferable;       
00137   uint8_t                srd;              
00138   uint8_t                tex;              
00139 } MPU_RegionInit_TypeDef;
00140 
00142 #define MPU_INIT_FLASH_DEFAULT                                  \
00143   {                                                             \
00144     true,                   /* Enable MPU region.            */ \
00145     0,                      /* MPU Region number.            */ \
00146     FLASH_MEM_BASE,         /* Flash base address.           */ \
00147     mpuRegionSize1Mb,       /* Size - Set to max. */ \
00148     mpuRegionApFullAccess,  /* Access permissions.           */ \
00149     false,                  /* Execution allowed.            */ \
00150     false,                  /* Not shareable.                */ \
00151     true,                   /* Cacheable.                    */ \
00152     false,                  /* Not bufferable.               */ \
00153     0,                      /* No subregions.                */ \
00154     0                       /* No TEX attributes.            */ \
00155   }
00156 
00157 
00159 #define MPU_INIT_SRAM_DEFAULT                                   \
00160   {                                                             \
00161     true,                   /* Enable MPU region.            */ \
00162     1,                      /* MPU Region number.            */ \
00163     RAM_MEM_BASE,           /* SRAM base address.            */ \
00164     mpuRegionSize128Kb,     /* Size - Set to max. */ \
00165     mpuRegionApFullAccess,  /* Access permissions.           */ \
00166     false,                  /* Execution allowed.            */ \
00167     true,                   /* Shareable.                    */ \
00168     true,                   /* Cacheable.                    */ \
00169     false,                  /* Not bufferable.               */ \
00170     0,                      /* No subregions.                */ \
00171     0                       /* No TEX attributes.            */ \
00172   }
00173 
00174 
00176 #define MPU_INIT_PERIPHERAL_DEFAULT                             \
00177   {                                                             \
00178     true,                   /* Enable MPU region.            */ \
00179     0,                      /* MPU Region number.            */ \
00180     0,                      /* Region base address.          */ \
00181     mpuRegionSize32b,       /* Size - Set to minimum         */ \
00182     mpuRegionApFullAccess,  /* Access permissions.           */ \
00183     true,                   /* Execution not allowed.        */ \
00184     true,                   /* Shareable.                    */ \
00185     false,                  /* Not cacheable.                */ \
00186     true,                   /* Bufferable.                   */ \
00187     0,                      /* No subregions.                */ \
00188     0                       /* No TEX attributes.            */ \
00189   }
00190 
00191 
00192 /*******************************************************************************
00193  *****************************   PROTOTYPES   **********************************
00194  ******************************************************************************/
00195 
00196 
00197 void MPU_ConfigureRegion(const MPU_RegionInit_TypeDef *init);
00198 
00199 
00200 /***************************************************************************/
00206 __STATIC_INLINE void MPU_Disable(void)
00207 {
00208   SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;      /* Disable fault exceptions */
00209   MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;            /* Disable the MPU */
00210 }
00211 
00212 
00213 /***************************************************************************/
00222 __STATIC_INLINE void MPU_Enable(uint32_t flags)
00223 {
00224   EFM_ASSERT(!(flags & ~(MPU_CTRL_PRIVDEFENA_Msk |
00225                          MPU_CTRL_HFNMIENA_Msk |
00226                          MPU_CTRL_ENABLE_Msk)));
00227 
00228   MPU->CTRL   = flags | MPU_CTRL_ENABLE_Msk;     /* Enable the MPU */
00229   SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;       /* Enable fault exceptions */
00230 }
00231 
00232 
00236 #ifdef __cplusplus
00237 }
00238 #endif
00239 
00240 #endif /* defined(__MPU_PRESENT) && (__MPU_PRESENT == 1) */
00241 
00242 #endif /* __SILICON_LABS_EM_MPU_H_ */