EFM32 Leopard Gecko Software Documentation  efm32lg-doc-4.2.1
em_gpio.c
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1 /***************************************************************************/
35 #include "em_gpio.h"
36 
37 #if defined(GPIO_COUNT) && (GPIO_COUNT > 0)
38 
39 /***************************************************************************/
44 /***************************************************************************/
50 /*******************************************************************************
51  ******************************* DEFINES ***********************************
52  ******************************************************************************/
53 
57 #define GPIO_DRIVEMODE_VALID(mode) ((mode) <= 3)
58 #define GPIO_STRENGHT_VALID(strenght) (!((strenght) & \
59  ~(_GPIO_P_CTRL_DRIVESTRENGTH_MASK \
60  | _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK)))
61 
64 /*******************************************************************************
65  ************************** GLOBAL FUNCTIONS *******************************
66  ******************************************************************************/
67 
68 /***************************************************************************/
78 void GPIO_DbgLocationSet(unsigned int location)
79 {
80 #if defined ( _GPIO_ROUTE_SWLOCATION_MASK )
81  EFM_ASSERT(location < AFCHANLOC_MAX);
82 
83  GPIO->ROUTE = (GPIO->ROUTE & ~_GPIO_ROUTE_SWLOCATION_MASK) |
84  (location << _GPIO_ROUTE_SWLOCATION_SHIFT);
85 #else
86  (void)location;
87 #endif
88 }
89 
90 #if defined (_GPIO_P_CTRL_DRIVEMODE_MASK)
91 /***************************************************************************/
102 {
103  EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_DRIVEMODE_VALID(mode));
104 
105  GPIO->P[port].CTRL = (GPIO->P[port].CTRL & ~(_GPIO_P_CTRL_DRIVEMODE_MASK))
106  | (mode << _GPIO_P_CTRL_DRIVEMODE_SHIFT);
107 }
108 #endif
109 
110 
111 #if defined (_GPIO_P_CTRL_DRIVESTRENGTH_MASK)
112 /***************************************************************************/
122 void GPIO_DriveStrengthSet(GPIO_Port_TypeDef port,
123  GPIO_DriveStrength_TypeDef strength)
124 {
125  EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_STRENGHT_VALID(strength));
126  BUS_RegMaskedWrite(&GPIO->P[port].CTRL,
127  _GPIO_P_CTRL_DRIVESTRENGTH_MASK | _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK,
128  strength);
129 }
130 #endif
131 
132 /***************************************************************************/
169  unsigned int pin,
170  bool risingEdge,
171  bool fallingEdge,
172  bool enable)
173 {
174  uint32_t tmp;
175 
176  EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
177 
178  /* There are two registers controlling the interrupt configuration:
179  * The EXTIPSELL register controls pins 0-7 and EXTIPSELH controls
180  * pins 8-15. */
181  if (pin < 8)
182  {
183  BUS_RegMaskedWrite(&GPIO->EXTIPSELL,
184  0xF << (4 * pin),
185  port << (4 * pin));
186  }
187  else
188  {
189  tmp = pin - 8;
190  BUS_RegMaskedWrite(&GPIO->EXTIPSELH,
191  0xF << (4 * tmp),
192  port << (4 * tmp));
193  }
194 
195  /* Enable/disable rising edge */
196  BUS_RegBitWrite(&(GPIO->EXTIRISE), pin, risingEdge);
197 
198  /* Enable/disable falling edge */
199  BUS_RegBitWrite(&(GPIO->EXTIFALL), pin, fallingEdge);
200 
201  /* Clear any pending interrupt */
202  GPIO->IFC = 1 << pin;
203 
204  /* Finally enable/disable interrupt */
205  BUS_RegBitWrite(&(GPIO->IEN), pin, enable);
206 }
207 
208 
209 /***************************************************************************/
227  unsigned int pin,
228  GPIO_Mode_TypeDef mode,
229  unsigned int out)
230 {
231  EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
232 
233  /* If disabling pin, do not modify DOUT in order to reduce chance for */
234  /* glitch/spike (may not be sufficient precaution in all use cases) */
235  if (mode != gpioModeDisabled)
236  {
237  if (out)
238  {
239  GPIO_PinOutSet(port, pin);
240  }
241  else
242  {
243  GPIO_PinOutClear(port, pin);
244  }
245  }
246 
247  /* There are two registers controlling the pins for each port. The MODEL
248  * register controls pins 0-7 and MODEH controls pins 8-15. */
249  if (pin < 8)
250  {
251  BUS_RegMaskedWrite(&GPIO->P[port].MODEL,
252  0xF << (pin * 4),
253  mode << (pin * 4));
254  }
255  else
256  {
257  BUS_RegMaskedWrite(&GPIO->P[port].MODEH,
258  0xF << ((pin - 8) * 4),
259  mode << ((pin - 8) * 4));
260  }
261 
262  if (mode == gpioModeDisabled)
263  {
264  if (out)
265  {
266  GPIO_PinOutSet(port, pin);
267  }
268  else
269  {
270  GPIO_PinOutClear(port, pin);
271  }
272  }
273 }
274 
275 #if defined( _GPIO_EM4WUEN_MASK )
276 /**************************************************************************/
292 void GPIO_EM4EnablePinWakeup(uint32_t pinmask, uint32_t polaritymask)
293 {
294  EFM_ASSERT((pinmask & ~_GPIO_EM4WUEN_MASK) == 0);
295 
296 #if defined( _GPIO_EM4WUPOL_MASK )
297  EFM_ASSERT((polaritymask & ~_GPIO_EM4WUPOL_MASK) == 0);
298  GPIO->EM4WUPOL &= ~pinmask; /* Set wakeup polarity */
299  GPIO->EM4WUPOL |= pinmask & polaritymask;
300 #elif defined( _GPIO_EXTILEVEL_MASK )
301  EFM_ASSERT((polaritymask & ~_GPIO_EXTILEVEL_MASK) == 0);
302  GPIO->EXTILEVEL &= ~pinmask;
303  GPIO->EXTILEVEL |= pinmask & polaritymask;
304 #endif
305  GPIO->EM4WUEN |= pinmask; /* Enable wakeup */
306 
307  GPIO_EM4SetPinRetention(true); /* Enable pin retention */
308 
309 #if defined( _GPIO_CMD_EM4WUCLR_MASK )
310  GPIO->CMD = GPIO_CMD_EM4WUCLR; /* Clear wake-up logic */
311 #elif defined( _GPIO_IFC_EM4WU_MASK )
312  GPIO_IntClear(pinmask);
313 #endif
314 }
315 #endif
316 
320 #endif /* defined(GPIO_COUNT) && (GPIO_COUNT > 0) */
GPIO_Port_TypeDef
Definition: em_gpio.h:232
__STATIC_INLINE void GPIO_IntClear(uint32_t flags)
Clear one or more pending GPIO interrupts.
Definition: em_gpio.h:561
void GPIO_DbgLocationSet(unsigned int location)
Sets the pin location of the debug pins (Serial Wire interface).
Definition: em_gpio.c:78
void GPIO_EM4EnablePinWakeup(uint32_t pinmask, uint32_t polaritymask)
Enable GPIO pin wake-up from EM4. When the function exits, EM4 mode can be safely entered...
Definition: em_gpio.c:292
#define _GPIO_EM4WUEN_MASK
GPIO_Mode_TypeDef
Definition: em_gpio.h:298
void GPIO_DriveModeSet(GPIO_Port_TypeDef port, GPIO_DriveMode_TypeDef mode)
Sets the drive mode for a GPIO port.
Definition: em_gpio.c:101
void GPIO_PinModeSet(GPIO_Port_TypeDef port, unsigned int pin, GPIO_Mode_TypeDef mode, unsigned int out)
Set the mode for a GPIO pin.
Definition: em_gpio.c:226
#define GPIO
General Purpose IO (GPIO) peripheral API.
#define GPIO_CMD_EM4WUCLR
__STATIC_INLINE void GPIO_PinOutSet(GPIO_Port_TypeDef port, unsigned int pin)
Set a single pin in GPIO data out register to 1.
Definition: em_gpio.h:745
#define _GPIO_P_CTRL_DRIVEMODE_MASK
Definition: efm32lg_gpio.h:74
#define _GPIO_EM4WUPOL_MASK
__STATIC_INLINE void BUS_RegMaskedWrite(volatile uint32_t *addr, uint32_t mask, uint32_t val)
Perform peripheral register masked clear and value write.
Definition: em_bus.h:283
#define _GPIO_ROUTE_SWLOCATION_MASK
GPIO_DriveMode_TypeDef
Definition: em_gpio.h:262
__STATIC_INLINE void GPIO_PinOutClear(GPIO_Port_TypeDef port, unsigned int pin)
Set a single pin in GPIO data out port register to 0.
Definition: em_gpio.h:698
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
Definition: em_bus.h:146
#define _GPIO_ROUTE_SWLOCATION_SHIFT
void GPIO_IntConfig(GPIO_Port_TypeDef port, unsigned int pin, bool risingEdge, bool fallingEdge, bool enable)
Configure GPIO interrupt.
Definition: em_gpio.c:168
#define _GPIO_P_CTRL_DRIVEMODE_SHIFT
Definition: efm32lg_gpio.h:73
__STATIC_INLINE void GPIO_EM4SetPinRetention(bool enable)
Enable GPIO pin retention of output enable, output value, pull enable and pull direction in EM4...
Definition: em_gpio.h:508