em_usart.h

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00001 /***************************************************************************/
00035 #ifndef __SILICON_LABS_EM_USART_H_
00036 #define __SILICON_LABS_EM_USART_H_
00037 
00038 #include "em_device.h"
00039 #if defined(USART_COUNT) && (USART_COUNT > 0)
00040 
00041 #include <stdbool.h>
00042 
00043 #ifdef __cplusplus
00044 extern "C" {
00045 #endif
00046 
00047 /***************************************************************************/
00052 /***************************************************************************/
00058 /*******************************************************************************
00059  ********************************   ENUMS   ************************************
00060  ******************************************************************************/
00061 
00063 typedef enum
00064 {
00065   usartDatabits4  = USART_FRAME_DATABITS_FOUR,     
00066   usartDatabits5  = USART_FRAME_DATABITS_FIVE,     
00067   usartDatabits6  = USART_FRAME_DATABITS_SIX,      
00068   usartDatabits7  = USART_FRAME_DATABITS_SEVEN,    
00069   usartDatabits8  = USART_FRAME_DATABITS_EIGHT,    
00070   usartDatabits9  = USART_FRAME_DATABITS_NINE,     
00071   usartDatabits10 = USART_FRAME_DATABITS_TEN,      
00072   usartDatabits11 = USART_FRAME_DATABITS_ELEVEN,   
00073   usartDatabits12 = USART_FRAME_DATABITS_TWELVE,   
00074   usartDatabits13 = USART_FRAME_DATABITS_THIRTEEN, 
00075   usartDatabits14 = USART_FRAME_DATABITS_FOURTEEN, 
00076   usartDatabits15 = USART_FRAME_DATABITS_FIFTEEN,  
00077   usartDatabits16 = USART_FRAME_DATABITS_SIXTEEN   
00078 } USART_Databits_TypeDef;
00079 
00080 
00082 typedef enum
00083 {
00085   usartDisable  = 0x0,
00086 
00088   usartEnableRx = USART_CMD_RXEN,
00089 
00091   usartEnableTx = USART_CMD_TXEN,
00092 
00094   usartEnable   = (USART_CMD_RXEN | USART_CMD_TXEN)
00095 } USART_Enable_TypeDef;
00096 
00097 
00099 typedef enum
00100 {
00101   usartOVS16 = USART_CTRL_OVS_X16,     
00102   usartOVS8  = USART_CTRL_OVS_X8,      
00103   usartOVS6  = USART_CTRL_OVS_X6,      
00104   usartOVS4  = USART_CTRL_OVS_X4       
00105 } USART_OVS_TypeDef;
00106 
00107 
00109 typedef enum
00110 {
00111   usartNoParity   = USART_FRAME_PARITY_NONE,    
00112   usartEvenParity = USART_FRAME_PARITY_EVEN,    
00113   usartOddParity  = USART_FRAME_PARITY_ODD      
00114 } USART_Parity_TypeDef;
00115 
00116 
00118 typedef enum
00119 {
00120   usartStopbits0p5 = USART_FRAME_STOPBITS_HALF,        
00121   usartStopbits1   = USART_FRAME_STOPBITS_ONE,         
00122   usartStopbits1p5 = USART_FRAME_STOPBITS_ONEANDAHALF, 
00123   usartStopbits2   = USART_FRAME_STOPBITS_TWO          
00124 } USART_Stopbits_TypeDef;
00125 
00126 
00128 typedef enum
00129 {
00131   usartClockMode0 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLELEADING,
00132 
00134   usartClockMode1 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLETRAILING,
00135 
00137   usartClockMode2 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLELEADING,
00138 
00140   usartClockMode3 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLETRAILING
00141 } USART_ClockMode_TypeDef;
00142 
00143 
00145 typedef enum
00146 {
00148   usartIrDAPwONE   = USART_IRCTRL_IRPW_ONE,
00149 
00151   usartIrDAPwTWO   = USART_IRCTRL_IRPW_TWO,
00152 
00154   usartIrDAPwTHREE = USART_IRCTRL_IRPW_THREE,
00155 
00157   usartIrDAPwFOUR  = USART_IRCTRL_IRPW_FOUR
00158 } USART_IrDAPw_Typedef;
00159 
00160 
00162 typedef enum
00163 {
00164   usartIrDAPrsCh0 = USART_IRCTRL_IRPRSSEL_PRSCH0,       
00165   usartIrDAPrsCh1 = USART_IRCTRL_IRPRSSEL_PRSCH1,       
00166   usartIrDAPrsCh2 = USART_IRCTRL_IRPRSSEL_PRSCH2,       
00167   usartIrDAPrsCh3 = USART_IRCTRL_IRPRSSEL_PRSCH3,       
00168 #if defined( USART_IRCTRL_IRPRSSEL_PRSCH4 )
00169   usartIrDAPrsCh4 = USART_IRCTRL_IRPRSSEL_PRSCH4,       
00170 #endif
00171 #if defined( USART_IRCTRL_IRPRSSEL_PRSCH5 )
00172   usartIrDAPrsCh5 = USART_IRCTRL_IRPRSSEL_PRSCH5,       
00173 #endif
00174 #if defined( USART_IRCTRL_IRPRSSEL_PRSCH6 )
00175   usartIrDAPrsCh6 = USART_IRCTRL_IRPRSSEL_PRSCH6,       
00176 #endif
00177 #if defined( USART_IRCTRL_IRPRSSEL_PRSCH7 )
00178   usartIrDAPrsCh7 = USART_IRCTRL_IRPRSSEL_PRSCH7,       
00179 #endif
00180 } USART_IrDAPrsSel_Typedef;
00181 
00182 #if defined( _USART_I2SCTRL_MASK )
00183 
00184 typedef enum
00185 {
00186   usartI2sFormatW32D32  = USART_I2SCTRL_FORMAT_W32D32,   
00187   usartI2sFormatW32D24M = USART_I2SCTRL_FORMAT_W32D24M,  
00188   usartI2sFormatW32D24  = USART_I2SCTRL_FORMAT_W32D24,   
00189   usartI2sFormatW32D16  = USART_I2SCTRL_FORMAT_W32D16,   
00190   usartI2sFormatW32D8   = USART_I2SCTRL_FORMAT_W32D8,    
00191   usartI2sFormatW16D16  = USART_I2SCTRL_FORMAT_W16D16,   
00192   usartI2sFormatW16D8   = USART_I2SCTRL_FORMAT_W16D8,    
00193   usartI2sFormatW8D8    = USART_I2SCTRL_FORMAT_W8D8      
00194 } USART_I2sFormat_TypeDef;
00195 
00197 typedef enum
00198 {
00199   usartI2sJustifyLeft  = USART_I2SCTRL_JUSTIFY_LEFT,  
00200   usartI2sJustifyRight = USART_I2SCTRL_JUSTIFY_RIGHT  
00201 } USART_I2sJustify_TypeDef;
00202 #endif
00203 
00204 #if defined( _USART_INPUT_MASK )
00205 
00206 typedef enum
00207 {
00208   usartPrsRxCh0  = USART_INPUT_RXPRSSEL_PRSCH0,    
00209   usartPrsRxCh1  = USART_INPUT_RXPRSSEL_PRSCH1,    
00210   usartPrsRxCh2  = USART_INPUT_RXPRSSEL_PRSCH2,    
00211   usartPrsRxCh3  = USART_INPUT_RXPRSSEL_PRSCH3,    
00213 #if defined( USART_INPUT_RXPRSSEL_PRSCH7 )
00214   usartPrsRxCh4  = USART_INPUT_RXPRSSEL_PRSCH4,    
00215   usartPrsRxCh5  = USART_INPUT_RXPRSSEL_PRSCH5,    
00216   usartPrsRxCh6  = USART_INPUT_RXPRSSEL_PRSCH6,    
00217   usartPrsRxCh7  = USART_INPUT_RXPRSSEL_PRSCH7,    
00218 #endif
00219 
00220 #if defined( USART_INPUT_RXPRSSEL_PRSCH11 )
00221   usartPrsRxCh8  = USART_INPUT_RXPRSSEL_PRSCH8,    
00222   usartPrsRxCh9  = USART_INPUT_RXPRSSEL_PRSCH9,    
00223   usartPrsRxCh10 = USART_INPUT_RXPRSSEL_PRSCH10,   
00224   usartPrsRxCh11 = USART_INPUT_RXPRSSEL_PRSCH11    
00225 #endif
00226 } USART_PrsRxCh_TypeDef;
00227 #endif
00228 
00230 typedef enum
00231 {
00232   usartPrsTriggerCh0 = USART_TRIGCTRL_TSEL_PRSCH0, 
00233   usartPrsTriggerCh1 = USART_TRIGCTRL_TSEL_PRSCH1, 
00234   usartPrsTriggerCh2 = USART_TRIGCTRL_TSEL_PRSCH2, 
00235   usartPrsTriggerCh3 = USART_TRIGCTRL_TSEL_PRSCH3, 
00237 #if defined( USART_TRIGCTRL_TSEL_PRSCH7 )
00238   usartPrsTriggerCh4 = USART_TRIGCTRL_TSEL_PRSCH4, 
00239   usartPrsTriggerCh5 = USART_TRIGCTRL_TSEL_PRSCH5, 
00240   usartPrsTriggerCh6 = USART_TRIGCTRL_TSEL_PRSCH6, 
00241   usartPrsTriggerCh7 = USART_TRIGCTRL_TSEL_PRSCH7, 
00242 #endif
00243 } USART_PrsTriggerCh_TypeDef;
00244 
00245 /*******************************************************************************
00246  *******************************   STRUCTS   ***********************************
00247  ******************************************************************************/
00248 
00250 typedef struct
00251 {
00253   USART_Enable_TypeDef   enable;
00254 
00259   uint32_t               refFreq;
00260 
00262   uint32_t               baudrate;
00263 
00265   USART_OVS_TypeDef      oversampling;
00266 
00269   USART_Databits_TypeDef databits;
00270 
00272   USART_Parity_TypeDef   parity;
00273 
00275   USART_Stopbits_TypeDef stopbits;
00276 
00277 #if defined( USART_INPUT_RXPRS ) && defined( USART_CTRL_MVDIS )
00278 
00279   bool                   mvdis;
00280 
00282   bool                   prsRxEnable;
00283 
00285   USART_PrsRxCh_TypeDef  prsRxCh;
00286 #endif
00287 } USART_InitAsync_TypeDef;
00288 
00290 typedef struct
00291 {
00292 #if defined( USART_TRIGCTRL_AUTOTXTEN )
00293 
00294   bool autoTxTriggerEnable;
00295 #endif
00296 
00297   bool rxTriggerEnable;
00299   bool txTriggerEnable;
00301   USART_PrsTriggerCh_TypeDef prsTriggerChannel;
00302 } USART_PrsTriggerInit_TypeDef;
00303 
00305 #if defined( USART_INPUT_RXPRS ) && defined( USART_CTRL_MVDIS )
00306 #define USART_INITASYNC_DEFAULT                                                              \
00307   { usartEnable,      /* Enable RX/TX when init completed. */                                \
00308     0,                /* Use current configured reference clock for configuring baudrate. */ \
00309     115200,           /* 115200 bits/s. */                                                   \
00310     usartOVS16,       /* 16x oversampling. */                                                \
00311     usartDatabits8,   /* 8 databits. */                                                      \
00312     usartNoParity,    /* No parity. */                                                       \
00313     usartStopbits1,   /* 1 stopbit. */                                                       \
00314     false,            /* Do not disable majority vote. */                                    \
00315     false,            /* Not USART PRS input mode. */                                        \
00316     usartPrsRxCh0     /* PRS channel 0. */                                                   \
00317   }
00318 #else
00319 #define USART_INITASYNC_DEFAULT                                                              \
00320   { usartEnable,      /* Enable RX/TX when init completed. */                                \
00321     0,                /* Use current configured reference clock for configuring baudrate. */ \
00322     115200,           /* 115200 bits/s. */                                                   \
00323     usartOVS16,       /* 16x oversampling. */                                                \
00324     usartDatabits8,   /* 8 databits. */                                                      \
00325     usartNoParity,    /* No parity. */                                                       \
00326     usartStopbits1    /* 1 stopbit. */                                                       \
00327   }
00328 #endif
00329 
00331 #if defined ( USART_TRIGCTRL_AUTOTXTEN )
00332 #define USART_INITPRSTRIGGER_DEFAULT                                                         \
00333   { false,              /* Do not enable autoTX triggering. */                               \
00334     false,              /* Do not enable receive triggering. */                              \
00335     false,              /* Do not enable transmit triggering. */                             \
00336     usartPrsTriggerCh0  /* Set default channel to zero. */                                   \
00337   }
00338 #else
00339 #define USART_INITPRSTRIGGER_DEFAULT                                                         \
00340   { false,              /* Do not enable receive triggering. */                              \
00341     false,              /* Do not enable transmit triggering. */                             \
00342     usartPrsTriggerCh0  /* Set default channel to zero. */                                   \
00343   }
00344 #endif
00345 
00347 typedef struct
00348 {
00350   USART_Enable_TypeDef    enable;
00351 
00356   uint32_t                refFreq;
00357 
00359   uint32_t                baudrate;
00360 
00362   USART_Databits_TypeDef  databits;
00363 
00365   bool                    master;
00366 
00368   bool                    msbf;
00369 
00371   USART_ClockMode_TypeDef clockMode;
00372 
00373 #if defined( USART_INPUT_RXPRS ) && defined( USART_TRIGCTRL_AUTOTXTEN )
00374 
00375   bool                    prsRxEnable;
00376 
00378   USART_PrsRxCh_TypeDef   prsRxCh;
00379 
00382   bool                    autoTx;
00383 #endif
00384 } USART_InitSync_TypeDef;
00385 
00387 #if defined( USART_INPUT_RXPRS ) && defined( USART_TRIGCTRL_AUTOTXTEN )
00388 #define USART_INITSYNC_DEFAULT                                                                \
00389   { usartEnable,       /* Enable RX/TX when init completed. */                                \
00390     0,                 /* Use current configured reference clock for configuring baudrate. */ \
00391     1000000,           /* 1 Mbits/s. */                                                       \
00392     usartDatabits8,    /* 8 databits. */                                                      \
00393     true,              /* Master mode. */                                                     \
00394     false,             /* Send least significant bit first. */                                \
00395     usartClockMode0,   /* Clock idle low, sample on rising edge. */                           \
00396     false,             /* Not USART PRS input mode. */                                        \
00397     usartPrsRxCh0,     /* PRS channel 0. */                                                   \
00398     false              /* No AUTOTX mode. */                                                  \
00399   }
00400 #else
00401 #define USART_INITSYNC_DEFAULT                                                                \
00402   { usartEnable,       /* Enable RX/TX when init completed. */                                \
00403     0,                 /* Use current configured reference clock for configuring baudrate. */ \
00404     1000000,           /* 1 Mbits/s. */                                                       \
00405     usartDatabits8,    /* 8 databits. */                                                      \
00406     true,              /* Master mode. */                                                     \
00407     false,             /* Send least significant bit first. */                                \
00408     usartClockMode0    /* Clock idle low, sample on rising edge. */                           \
00409   }
00410 #endif
00411 
00412 
00414 typedef struct
00415 {
00417   USART_InitAsync_TypeDef  async;
00418 
00420   bool                     irRxInv;
00421 
00423   bool                     irFilt;
00424 
00427   USART_IrDAPw_Typedef     irPw;
00428 
00431   bool                     irPrsEn;
00432 
00435   USART_IrDAPrsSel_Typedef irPrsSel;
00436 } USART_InitIrDA_TypeDef;
00437 
00438 
00440 #define USART_INITIRDA_DEFAULT                                                                \
00441   {                                                                                           \
00442     { usartEnable,     /* Enable RX/TX when init completed. */                                \
00443       0,               /* Use current configured reference clock for configuring baudrate. */ \
00444       115200,          /* 115200 bits/s. */                                                   \
00445       usartOVS16,      /* 16x oversampling. */                                                \
00446       usartDatabits8,  /* 8 databits. */                                                      \
00447       usartEvenParity, /* Even parity. */                                                     \
00448       usartStopbits1   /* 1 stopbit. */                                                       \
00449     },                                                                                        \
00450     false,             /* Rx invert disabled. */                                              \
00451     false,             /* Filtering disabled. */                                              \
00452     usartIrDAPwTHREE,  /* Pulse width is set to ONE. */                                       \
00453     false,             /* Routing to PRS is disabled. */                                      \
00454     usartIrDAPrsCh0    /* PRS channel 0. */                                                   \
00455   }
00456 
00457 
00458 #if defined( _USART_I2SCTRL_MASK )
00459 
00460 typedef struct
00461 {
00463   USART_InitSync_TypeDef   sync;
00464 
00466   USART_I2sFormat_TypeDef  format;
00467 
00471   bool                     delay;
00472 
00474   bool                     dmaSplit;
00475 
00477   USART_I2sJustify_TypeDef justify;
00478 
00480   bool                     mono;
00481 } USART_InitI2s_TypeDef;
00482 
00483 
00485 #define USART_INITI2S_DEFAULT                                                                    \
00486   {                                                                                              \
00487     { usartEnableTx,      /* Enable TX when init completed. */                                   \
00488       0,                  /* Use current configured reference clock for configuring baudrate. */ \
00489       1000000,            /* Baudrate 1M bits/s. */                                              \
00490       usartDatabits16,    /* 16 databits. */                                                     \
00491       true,               /* Operate as I2S master. */                                           \
00492       true,               /* Most significant bit first. */                                      \
00493       usartClockMode0,    /* Clock idle low, sample on rising edge. */                           \
00494       false,              /* Don't enable USARTRx via PRS. */                                    \
00495       usartPrsRxCh0,      /* PRS channel selection (dummy). */                                   \
00496       false               /* Disable AUTOTX mode. */                                             \
00497     },                                                                                           \
00498     usartI2sFormatW16D16, /* 16-bit word, 16-bit data */                                         \
00499     true,                 /* Delay on I2S data. */                                               \
00500     false,                /* No DMA split. */                                                    \
00501     usartI2sJustifyLeft,  /* Data is left-justified within the frame */                          \
00502     false                 /* Stereo mode. */                                                     \
00503   }
00504 #endif
00505 
00506 /*******************************************************************************
00507  *****************************   PROTOTYPES   **********************************
00508  ******************************************************************************/
00509 
00510 void USART_BaudrateAsyncSet(USART_TypeDef *usart,
00511                             uint32_t refFreq,
00512                             uint32_t baudrate,
00513                             USART_OVS_TypeDef ovs);
00514 uint32_t USART_BaudrateCalc(uint32_t refFreq,
00515                             uint32_t clkdiv,
00516                             bool syncmode,
00517                             USART_OVS_TypeDef ovs);
00518 uint32_t USART_BaudrateGet(USART_TypeDef *usart);
00519 void USART_BaudrateSyncSet(USART_TypeDef *usart,
00520                            uint32_t refFreq,
00521                            uint32_t baudrate);
00522 void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable);
00523 
00524 void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init);
00525 void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init);
00526 #if defined(USART0) || ( (USART_COUNT == 1) && defined( USART1 ) )
00527 void USART_InitIrDA(const USART_InitIrDA_TypeDef *init);
00528 #endif
00529 
00530 #if defined( _USART_I2SCTRL_MASK )
00531 void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init);
00532 #endif
00533 void USART_InitPrsTrigger(USART_TypeDef *usart, const USART_PrsTriggerInit_TypeDef *init);
00534 
00535 
00536 /***************************************************************************/
00547 __STATIC_INLINE void USART_IntClear(USART_TypeDef *usart, uint32_t flags)
00548 {
00549   usart->IFC = flags;
00550 }
00551 
00552 
00553 /***************************************************************************/
00564 __STATIC_INLINE void USART_IntDisable(USART_TypeDef *usart, uint32_t flags)
00565 {
00566   usart->IEN &= ~(flags);
00567 }
00568 
00569 
00570 /***************************************************************************/
00586 __STATIC_INLINE void USART_IntEnable(USART_TypeDef *usart, uint32_t flags)
00587 {
00588   usart->IEN |= flags;
00589 }
00590 
00591 
00592 /***************************************************************************/
00606 __STATIC_INLINE uint32_t USART_IntGet(USART_TypeDef *usart)
00607 {
00608   return usart->IF;
00609 }
00610 
00611 
00612 /***************************************************************************/
00631 __STATIC_INLINE uint32_t USART_IntGetEnabled(USART_TypeDef *usart)
00632 {
00633   uint32_t tmp;
00634 
00635   /* Store USARTx->IEN in temporary variable in order to define explicit order
00636    * of volatile accesses. */
00637   tmp = usart->IEN;
00638 
00639   /* Bitwise AND of pending and enabled interrupts */
00640   return usart->IF & tmp;
00641 }
00642 
00643 
00644 /***************************************************************************/
00655 __STATIC_INLINE void USART_IntSet(USART_TypeDef *usart, uint32_t flags)
00656 {
00657   usart->IFS = flags;
00658 }
00659 
00660 
00661 /***************************************************************************/
00672 __STATIC_INLINE uint32_t USART_StatusGet(USART_TypeDef *usart)
00673 {
00674   return usart->STATUS;
00675 }
00676 
00677 void USART_Reset(USART_TypeDef *usart);
00678 uint8_t USART_Rx(USART_TypeDef *usart);
00679 uint16_t USART_RxDouble(USART_TypeDef *usart);
00680 uint32_t USART_RxDoubleExt(USART_TypeDef *usart);
00681 uint16_t USART_RxExt(USART_TypeDef *usart);
00682 
00683 
00684 /***************************************************************************/
00712 __STATIC_INLINE uint8_t USART_RxDataGet(USART_TypeDef *usart)
00713 {
00714   return (uint8_t) (usart->RXDATA);
00715 }
00716 
00717 
00718 /***************************************************************************/
00750 __STATIC_INLINE uint16_t USART_RxDoubleGet(USART_TypeDef *usart)
00751 {
00752   return (uint16_t) (usart->RXDOUBLE);
00753 }
00754 
00755 
00756 /***************************************************************************/
00786 __STATIC_INLINE uint32_t USART_RxDoubleXGet(USART_TypeDef *usart)
00787 {
00788   return usart->RXDOUBLEX;
00789 }
00790 
00791 
00792 /***************************************************************************/
00821 __STATIC_INLINE uint16_t USART_RxDataXGet(USART_TypeDef *usart)
00822 {
00823   return (uint16_t) (usart->RXDATAX);
00824 }
00825 
00826 uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data);
00827 void USART_Tx(USART_TypeDef *usart, uint8_t data);
00828 void USART_TxDouble(USART_TypeDef *usart, uint16_t data);
00829 void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data);
00830 void USART_TxExt(USART_TypeDef *usart, uint16_t data);
00831 
00832 
00836 #ifdef __cplusplus
00837 }
00838 #endif
00839 
00840 #endif /* defined(USART_COUNT) && (USART_COUNT > 0) */
00841 #endif /* __SILICON_LABS_EM_USART_H_ */