ksz8851snl.c File Reference

Driver for Micrel KSZ8851SNL Ethernet controller. More...

#include <stdio.h>
#include "ksz8851snl.h"
#include <stdint.h>
#include <stdbool.h>
#include "em_assert.h"
#include "lwip/sys.h"
#include "lwipopts.h"
#include "debug.h"
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Defines

#define MARL   0x10
 MAC Address Low.
#define MARM   0x12
 MAC Address Middle.
#define MARH   0x14
 MAC Address High.
#define OBCR   0x20
 On-Chip Bus Control Register.
#define GRR   0x26
 Global Reset Register.
#define TXCR   0x70
 Transmit Flow Control Register.
#define RXCR1   0x74
 Receive Flow Control Register 1.
#define RXCR2   0x76
 Receive Flow Control Register 2.
#define TXMIR   0x78
 TXQ Memory Information Register.
#define RXFHSR   0x7C
 Receive Frame Header Status Register.
#define RXFHBCR   0x7E
 Receive Frame Header Bytecount Register.
#define TXQCR   0x80
 TXQ Command Register.
#define RXQCR   0x82
 RXQ Command Register.
#define TXFDPR   0x84
 TX Frame Data Pointer Register.
#define RXFDPR   0x86
 RX Frame Data Pointer Register.
#define IER   0x90
 Interrupt Enable Register.
#define ISR   0x92
 Interrupt Status Register.
#define RXFCTR   0x9C
 RX Frame Count & Threshold Register.
#define TXNTFSR   0x9E
 TX Next Frame size register.
#define FCLWR   0xB0
 Configure Low Watermark to 6KByte.
#define FCHWR   0xB2
 Configure High Watermark to 4KByte.
#define CIDER   0xC0
 Chip ID and Enable Register.
#define IACR   0xC8
 Indirect access control Register.
#define IADLR   0xD0
 Indirect access data low Register.
#define IADHR   0xD2
 Indirect access data high Register.
#define PMECR   0xD4
 Power Managment Event Control Register.
#define PHYRR   0xD8
 PHY Reset Register.
#define P1MBCR   0xE4
 PHY1 MII-Register Basic Control Register.
#define P1CR   0xF6
 Port 1 Control Register.
#define P1SR   0xF8
 Port 1 Status Register.
#define KSZ8851SNL_CHIP_ID   0x8870
 Default Chip ID for KSZ8851SNL.
#define CHIP_ID_MASK   0xFFF0
 Used to mask the revision ID.
#define ONE_FRAME_THRES   0x0001
 RX INT after one frame.
#define FD_PTR_AUTO_INC   0x4000
 Used to reset the FD pointer.
#define CLEAR_INT   0xFFFF
 Used to clear INT_STATUS_REG.
#define NO_INT   0x0000
 Used to disable the interupts.
#define TX_MEM_AVAIL_MASK   0x1FFF
 Used to mask the reserved bits.
#define FRAME_ID_MASK   0x003F
 Used to mask the reserved bits.
#define CHECKSUM_VALID_FRAME_MASK   0x3C17
 CRC OK for ICMP, IP, TCP, UDP MII error Frame too long error.
#define VALID_FRAME_MASK   0x8000
 RXFV Receive Frame Valid of the RXFHSR register.
#define RX_BYTE_CNT_MASK   0x0FFF
 Used to mask the reserved bits.
#define LSB_MASK   0x00FF
 Used to mask the LSB.
#define MSB_POS   0x0008
 Used to mark the MSB pos.
#define TX_INT_on_COMPLETION   0x8000
 TX INT on completion.
#define WORD_SIZE   0x0004
 Word size in # of bytes.
#define EXTRA_SIZE   0x0008
 Needed for the frame header.
#define BLOCKING_RECEIVE   0
 Determines if receive will block.
#define WATERMARK_6KB   0x0600
 6KByte Watermark
#define WATERMARK_4KB   0x0400
 4KByte Watermark
#define HIGH_QMU_MAC_H   0x00
 1st segment of the MAC address
#define HIGH_QMU_MAC_L   0x0B
 2nd segment of the MAC address
#define MID_QMU_MAC_H   0x57
 3rd segment of the MAC address
#define BYTE_MASK   0x00FF
 Used to mask the LSB.
#define BYTE_SIZE   0x0008
 Used to mark the MSB pos.
#define TX_FLOW_CTRL_ICMP_CHECKSUM   0x0100
 Enable Transmit Checksum Generation for ICMP.
#define TX_FLOW_CTRL_TCP_CHECKSUM   0x0040
 Enable Transmit Checksum Generation for TCP.
#define TX_FLOW_CTRL_IP_CHECKSUM   0x0020
 Enable Transmit Checksum Generation for IP.
#define TX_FLOW_CTRL_FLUSH_QUEUE   0x0010
 Flush Transmit Queue.
#define TX_FLOW_CTRL_FLOW_ENABLE   0x0008
 Transmit flow control enable.
#define TX_FLOW_CTRL_PAD_ENABLE   0x0004
 Transmit Padding enable.
#define TX_FLOW_CTRL_CRC_ENABLE   0x0002
 Transmit CRC Enable.
#define TX_FLOW_CTRL_ENABLE   0x0001
 Enable tranmsit.
#define TX_FLOW_CTRL_CONFIG
 TX FLOW CONTROL Initialization collection.
#define TXQ_AUTO_ENQUEUE   0x0004
 Enable Auto-Enqueue TXQ Frame.
#define TXQ_MEM_AVAILABLE_INT   0x0002
 Enable INT generation when TXQ Memory Available.
#define TXQ_ENQUEUE   0x0001
 Enable Manual Engueue TXQ Frame.
#define RX_FLOW_CTRL_FLUSH_QUEUE   0x8000
 Flush Receive Queue.
#define RX_FLOW_CTRL_UDP_CHECKSUM   0x4000
 Enable Receive UDP Frame Checksum Check.
#define RX_FLOW_CTRL_TCP_CHECKSUM   0x2000
 Enable Receive TCP Frame Checksum Check.
#define RX_FLOW_CTRL_IP_CHECKSUM   0x1000
 Enable Receive IP Frame Checksum Check.
#define RX_FLOW_CTRL_MAC_FILTER   0x0800
 Receive Physical Address Filtering with MAC Address Enable.
#define RX_FLOW_CTRL_FLOW_ENENABLE   0x0400
 Enable Receive Flow Control.
#define RX_FLOW_CTRL_BAD_PACKET   0x0200
 Enable Receive Error Frames.
#define RX_FLOW_CTRL_BROADCAST_ENABLE   0x0080
 Enable Receive Broadcast frames.
#define RX_FLOW_CTRL_MULTICAST_ENABLE   0x0040
 Enable Receive Multicast frames.
#define RX_FLOW_CTRL_UNICAST_ENABLE   0x0020
 Enable Receive Unicast frames.
#define RX_FLOW_CTRL_PROMISCUOUS_MODE   0x0012
 Receive all incoming frames.
#define RX_FLOW_CTRL_RX_ALL   0x0010
 Receive all frames.
#define RX_FLOW_CTRL_INVERSE_FILTER   0x0002
 Receive Inverse Filtering.
#define RX_FLOW_CTRL_RX_ENABLE   0x0001
 Enable receive.
#define RX_FLOW_CTRL1_CONFIG
 RX FLOW CONTROL1 Initialization collection.
#define RX_FLOW_CTRL_BURST_LEN_MASK   0x00E0
 Receive Flow Control Burst Length mask.
#define RX_FLOW_CTRL_BURST_LEN_4   0x0000
 4 bytes length
#define RX_FLOW_CTRL_BURST_LEN_8   0x0020
 8 Bytes length
#define RX_FLOW_CTRL_BURST_LEN_16   0x0040
 16 Bytes length
#define RX_FLOW_CTRL_BURST_LEN_32   0x0060
 32 Bytes length
#define RX_FLOW_CTRL_BURST_LEN_FRAME   0x0080
 Full frame length.
#define RX_FLOW_CTRL_IPV6_UDP_FRAG_PASS   0x0010
 IPV4/IPV6/UDP Fragment Frame Pass.
#define RX_FLOW_CTRL_IPV6_UDP_ZERO_PASS   0x0008
 IPV4/IPV6/UDP Frame Checksum Equal Zero.
#define RX_FLOW_CTRL_UDP_LITE_CHECKSUM   0x0004
 Enable UDP Lite frame.
#define RX_FLOW_CTRL_ICMP_CHECKSUM   0x0002
 Enable ICMP frame.
#define RX_FLOW_CTRL_BLOCK_MAC   0x0001
 Receive Source Address Filtering.
#define RX_FLOW_CTRL2_CONFIG
 RX FLOW CONTROL2 Initialization collection.
#define RXQ_ON_TIME_INT   0x1000
 RX interrupt is occured on timer duration.
#define RXQ_ON_BYTE_CNT_INT   0x0800
 RX interrupt is occured on byte count threshold.
#define RXQ_ON_FRAME_CNT_INT   0x0400
 RX interrupt is occured on frame count threshold.
#define RXQ_TWOBYTE_OFFSET   0x0200
 Enable adding 2-bytes offset before IP frame header.
#define RXQ_EN_ON_TIME_INT   0x0080
 Enable RX interrupt on timer duration.
#define RXQ_EN_ON_BYTE_CNT_INT   0x0040
 Enable RX interrupt on byte count threshold.
#define RXQ_EN_ON_FRAME_CNT_INT   0x0020
 Enable RX interrupt on frame count threshold.
#define RXQ_AUTO_DEQUEUE   0x0010
 Enable Auto Dequeue RXQ Frame.
#define RXQ_START_DMA   0x0008
 Start QMU transfer operation.
#define RXQ_RELEASE_ERROR_FRAME   0x0001
 Release RX Error Frame.
#define RXQ_CMD_CONFIG
 RX COMMAND Initialization collection.
#define PORT1_AN_DONE   0x0040
 Auto-neg done.
#define PORT1_LINK_GOOD   0x0020
 Link good.
#define PORT1_LED_OFF   0x8000
 Turn off port LEDs.
#define PORT1_TX_DISABLE   0x4000
 Disable port transmit.
#define PORT1_AUTO_NEG_RESTART   0x2000
 Restart auto-negotiation.
#define PORT1_POWER_DOWN   0x0800
 Set port power-down.
#define PORT1_AUTO_MDIX_DISABLE   0x0400
 Disable auto MDI/MDI-X.
#define PORT1_FORCE_MDIX   0x0200
 Force MDI-X.
#define PORT1_AUTO_NEG_ENABLE   0x0080
 Enable auto-negotiation.
#define PORT1_FORCE_100_MBIT   0x0040
 Force PHY 100Mbps.
#define PORT1_FORCE_FULL_DUPLEX   0x0020
 Force PHY in full duplex mode.
#define PORT1_AUTO_NEG_FLOW_CTRL   0x0010
 Advertise flow control capability.
#define PORT1_AUTO_NEG_100BTX_FD   0x0008
 Advertise 100BT full-duplex capability.
#define PORT1_AUTO_NEG_100BTX   0x0004
 Advertise 100BT half-duplex capability.
#define PORT1_AUTO_NEG_10BT_FD   0x0002
 Advertise 10BT full-duplex capability.
#define PORT1_AUTO_NEG_10BT   0x0001
 Advertise 10BT half-duplex capability.
#define PORT1_CONFIG
 PHY Port default config P1CR.
#define QMU_MODULE_SOFT_RESET   0x0002
 QMU Reset.
#define GLOBAL_SOFT_RESET   0x0001
 Global reset.
#define PHY_RESET   0x0001
 PHY Reset Register Options.
#define DIGITAL_LOOPBACK   0x4000
 Enable Digital loopback mode.
#define FORCE_100   0x2000
 Force the speed to 100MBps.
#define AUTO_NEG   0x1000
 Force auto negotiation.
#define RESTART_AUTO_NEG   0x0200
 Restart auto negotiation.
#define FORCE_FULL_DUPLEX   0x0100
 Force full duplex.
#define TX_MEMORY_WAIT_MS   500
 wait time in ms for TX memory to be available
#define FRAME_COUNT_THRESHOLD   1
 Receive Frame Count Threshold to use in RXFCTR.
#define MIB_MASK   0x1C00
 Management information base registers.
#define MIB_RxByte   0x00
 # of received bytes
#define MIB_XXX   0x01
 MIB Reserved byte.
#define MIB_RxUndersizePkt   0x02
 # of received undersized packets
#define MIB_RxFragments   0x03
 # of received fragments
#define MIB_RxOversize   0x04
 # of received oversized packets
#define MIB_RxJabbers   0x05
 # of received jabbers
#define MIB_RxSymbolError   0x06
 # of received error symbols
#define MIB_RxCRCError   0x07
 # of received packets with CRC error
#define MIB_RxAlignmentError   0x08
 # of received missaligned packets
#define MIB_RxControl8808Pkts   0x09
 # of received control packets
#define MIB_RxPausePkts   0x0A
 # of received pause packets
#define MIB_RxBroadcast   0x0B
 # of received broadcast packets
#define MIB_RxMulticast   0x0C
 # of received multicast packets
#define MIB_RxUnicast   0x0D
 # of received unicast packets
#define MIB_Rx64Octets   0x0E
 # of received packets with size of 64 bytes
#define MIB_Rx65to127Octets   0x0F
 # of received packets with size between 65 and 127 bytes
#define MIB_Rx128to255Octets   0x10
 # of received packets with size between 128 and 255 bytes
#define MIB_Rx256to511Octets   0x11
 # of received packets with size between 256 and 511 bytes
#define MIB_Rx512to1023Octets   0x12
 # of received packets with size between 512 and 1023 bytes
#define MIB_Rx1024to1521Octets   0x13
 # of received packets with size between 1024 and 1521 bytes
#define MIB_Rx1522to2000Octets   0x14
 # of received packets with size between 1522 and 2000 bytes
#define MIB_TxByte   0x15
 # of transmitted bytes
#define MIB_TxLateCollision   0x16
 # of transmitted late collision packets
#define MIB_TxPausePkts   0x17
 # of transmitted pause packets
#define MIB_TxBroadcastPkts   0x18
 # of transmitted broadcast packets
#define MIB_TxMulticastPkts   0x19
 # of transmitted multicast packets
#define MIB_TxUnicastPkts   0x1A
 # of transmitted unicast packets
#define MIB_TxDeferred   0x1B
 # of transmitted deferred packets
#define MIB_TxTotalCollision   0x1C
 # of transmitted total collisions
#define MIB_TxExcessiveCollision   0x1D
 # of transmitted excessive collisions
#define MIB_TxSingleCollision   0x1E
 # of transmitted single collisions
#define MIB_TxMultipleCollision   0x1F
 # of transmitted multiple collisions

Functions

static uint32_t MIBCountersRead (uint16_t offset)
 helper function for KSZ8851SNL_UpdateMIBCounters
void KSZ8851SNL_MIBCountersUpdate (void)
 Update the Management Information Base Counters.
void KSZ8851SNL_MIBCountersDump (void)
 Dumps the Management Information Base Counters.
void KSZ8851SNL_AllRegistersDump (void)
 Prints the value of the registers of the ethernet controller.
void KSZ8851SNL_RegistersDump (void)
 Prints the value of the registers of the ethernet controller.
void KSZ8851SNL_IntEnable (void)
 enables the chip interrupts
void KSZ8851SNL_IntDisable (void)
 disables the chip interrupts
void KSZ8851SNL_IntClear (uint16_t flags)
 Clear interrupt flags.
uint16_t KSZ8851SNL_IntGet (void)
 Get interrupt flags.
void KSZ8851SNL_PMECRStatusClear (uint16_t flags)
 Clear PMECR (Power Management Event Control Register) flags.
uint16_t KSZ8851SNL_RXQCRGet (void)
 Get RXQCR register.
void KSZ8851SNL_FrameCounterSet (void)
 FrameCounter.
void KSZ8851SNL_TxQueueReset (void)
 Reset TxQueue.
void KSZ8851SNL_RxQueueReset (void)
 Reset RxQueue.
uint16_t KSZ8851SNL_FrameCounterGet (void)
 FrameCounter.
void KSZ8851SNL_Init (void)
 Initialize the registers of the ethernet controller.
void KSZ8851SNL_Enable (void)
 Enable RX and TX.
bool KSZ8851SNL_TransmitBegin (uint16_t length)
 Prepares for a transmission of an ethernet frame over the network.
void KSZ8851SNL_Transmit (uint16_t length, const uint8_t *buffer)
 Transmit a chunk of data to the ethernet controller.
void KSZ8851SNL_TransmitEnd (uint16_t length)
 Ends a transmission of an ethernet frame to the ethernet controller.
static void ReleaseIncosistentFrame (void)
 Release the current frame if it is inconsistent.
uint16_t KSZ8851SNL_Receive (uint16_t length, uint8_t *buffer)
 Performs the actual receive of a raw frame over the network.
void KSZ8851SNL_MacAddressGet (uint8_t *macAddress)
 Get the MAC address of the current board.
uint16_t KSZ8851SNL_PHYStatusGet (void)
 Get the PHY status.

Variables

static KSZ8851SLN_mib_t mibCounters
 Copy of the current MIB counters values from the ksz8851snl.

Detailed Description

Driver for Micrel KSZ8851SNL Ethernet controller.

Version:
4.0.0

License

(C) Copyright 2015 Silicon Labs, http://www.silabs.com

This file is licensed under the Silabs License Agreement. See the file "Silabs_License_Agreement.txt" for details. Before using this software for any purpose, you must agree to the terms of that agreement.

Definition in file ksz8851snl.c.


Define Documentation

#define AUTO_NEG   0x1000

Force auto negotiation.

Definition at line 285 of file ksz8851snl.c.

#define BLOCKING_RECEIVE   0

Determines if receive will block.

Definition at line 82 of file ksz8851snl.c.

#define BYTE_MASK   0x00FF

Used to mask the LSB.

Definition at line 89 of file ksz8851snl.c.

#define BYTE_SIZE   0x0008

Used to mark the MSB pos.

Definition at line 90 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MacAddressGet().

#define CHECKSUM_VALID_FRAME_MASK   0x3C17

CRC OK for ICMP, IP, TCP, UDP MII error Frame too long error.

Definition at line 69 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Receive().

#define CHIP_ID_MASK   0xFFF0

Used to mask the revision ID.

Definition at line 62 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init().

#define CIDER   0xC0

Chip ID and Enable Register.

Definition at line 51 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init(), and KSZ8851SNL_RegistersDump().

#define CLEAR_INT   0xFFFF

Used to clear INT_STATUS_REG.

Definition at line 65 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init().

#define DIGITAL_LOOPBACK   0x4000

Enable Digital loopback mode.

Definition at line 281 of file ksz8851snl.c.

#define EXTRA_SIZE   0x0008

Needed for the frame header.

Definition at line 81 of file ksz8851snl.c.

#define FCHWR   0xB2

Configure High Watermark to 4KByte.

Definition at line 50 of file ksz8851snl.c.

#define FCLWR   0xB0

Configure Low Watermark to 6KByte.

Definition at line 49 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init().

#define FD_PTR_AUTO_INC   0x4000

Used to reset the FD pointer.

Definition at line 64 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init(), and KSZ8851SNL_Receive().

#define FORCE_100   0x2000

Force the speed to 100MBps.

Definition at line 283 of file ksz8851snl.c.

#define FORCE_FULL_DUPLEX   0x0100

Force full duplex.

Definition at line 289 of file ksz8851snl.c.

#define FRAME_COUNT_THRESHOLD   1

Receive Frame Count Threshold to use in RXFCTR.

Definition at line 295 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init().

#define FRAME_ID_MASK   0x003F

Used to mask the reserved bits.

Definition at line 68 of file ksz8851snl.c.

Referenced by KSZ8851SNL_TransmitBegin().

#define GLOBAL_SOFT_RESET   0x0001

Global reset.

Definition at line 274 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init().

#define GRR   0x26

Global Reset Register.

Definition at line 34 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init(), and KSZ8851SNL_RegistersDump().

#define HIGH_QMU_MAC_H   0x00

1st segment of the MAC address

Definition at line 86 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MacAddressGet().

#define HIGH_QMU_MAC_L   0x0B

2nd segment of the MAC address

Definition at line 87 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MacAddressGet().

#define IACR   0xC8

Indirect access control Register.

Definition at line 52 of file ksz8851snl.c.

Referenced by MIBCountersRead().

#define IADHR   0xD2

Indirect access data high Register.

Definition at line 54 of file ksz8851snl.c.

Referenced by MIBCountersRead().

#define IADLR   0xD0

Indirect access data low Register.

Definition at line 53 of file ksz8851snl.c.

Referenced by MIBCountersRead().

#define IER   0x90

Interrupt Enable Register.

Definition at line 45 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Enable(), KSZ8851SNL_IntDisable(), KSZ8851SNL_IntEnable(), and KSZ8851SNL_RegistersDump().

#define ISR   0x92

Interrupt Status Register.

Definition at line 46 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init(), KSZ8851SNL_IntClear(), KSZ8851SNL_IntGet(), and KSZ8851SNL_RegistersDump().

#define KSZ8851SNL_CHIP_ID   0x8870

Default Chip ID for KSZ8851SNL.

Definition at line 61 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init().

#define LSB_MASK   0x00FF

Used to mask the LSB.

Definition at line 77 of file ksz8851snl.c.

Referenced by KSZ8851SNL_TransmitBegin().

#define MARH   0x14

MAC Address High.

Definition at line 32 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init(), and KSZ8851SNL_RegistersDump().

#define MARL   0x10

MAC Address Low.

Definition at line 30 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init(), and KSZ8851SNL_RegistersDump().

#define MARM   0x12

MAC Address Middle.

Definition at line 31 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init(), and KSZ8851SNL_RegistersDump().

#define MIB_MASK   0x1C00

Management information base registers.

MIB Mask

Definition at line 298 of file ksz8851snl.c.

Referenced by MIBCountersRead().

#define MIB_Rx1024to1521Octets   0x13

# of received packets with size between 1024 and 1521 bytes

Definition at line 318 of file ksz8851snl.c.

#define MIB_Rx128to255Octets   0x10

# of received packets with size between 128 and 255 bytes

Definition at line 315 of file ksz8851snl.c.

#define MIB_Rx1522to2000Octets   0x14

# of received packets with size between 1522 and 2000 bytes

Definition at line 319 of file ksz8851snl.c.

#define MIB_Rx256to511Octets   0x11

# of received packets with size between 256 and 511 bytes

Definition at line 316 of file ksz8851snl.c.

#define MIB_Rx512to1023Octets   0x12

# of received packets with size between 512 and 1023 bytes

Definition at line 317 of file ksz8851snl.c.

#define MIB_Rx64Octets   0x0E

# of received packets with size of 64 bytes

Definition at line 313 of file ksz8851snl.c.

#define MIB_Rx65to127Octets   0x0F

# of received packets with size between 65 and 127 bytes

Definition at line 314 of file ksz8851snl.c.

#define MIB_RxAlignmentError   0x08

# of received missaligned packets

Definition at line 307 of file ksz8851snl.c.

#define MIB_RxBroadcast   0x0B

# of received broadcast packets

Definition at line 310 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_RxByte   0x00

# of received bytes

Definition at line 299 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_RxControl8808Pkts   0x09

# of received control packets

Definition at line 308 of file ksz8851snl.c.

#define MIB_RxCRCError   0x07

# of received packets with CRC error

Definition at line 306 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_RxFragments   0x03

# of received fragments

Definition at line 302 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_RxJabbers   0x05

# of received jabbers

Definition at line 304 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_RxMulticast   0x0C

# of received multicast packets

Definition at line 311 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_RxOversize   0x04

# of received oversized packets

Definition at line 303 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_RxPausePkts   0x0A

# of received pause packets

Definition at line 309 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_RxSymbolError   0x06

# of received error symbols

Definition at line 305 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_RxUndersizePkt   0x02

# of received undersized packets

Definition at line 301 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_RxUnicast   0x0D

# of received unicast packets

Definition at line 312 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_TxBroadcastPkts   0x18

# of transmitted broadcast packets

Definition at line 323 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_TxByte   0x15

# of transmitted bytes

Definition at line 320 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_TxDeferred   0x1B

# of transmitted deferred packets

Definition at line 326 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_TxExcessiveCollision   0x1D

# of transmitted excessive collisions

Definition at line 328 of file ksz8851snl.c.

#define MIB_TxLateCollision   0x16

# of transmitted late collision packets

Definition at line 321 of file ksz8851snl.c.

#define MIB_TxMulticastPkts   0x19

# of transmitted multicast packets

Definition at line 324 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_TxMultipleCollision   0x1F

# of transmitted multiple collisions

Definition at line 330 of file ksz8851snl.c.

#define MIB_TxPausePkts   0x17

# of transmitted pause packets

Definition at line 322 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_TxSingleCollision   0x1E

# of transmitted single collisions

Definition at line 329 of file ksz8851snl.c.

#define MIB_TxTotalCollision   0x1C

# of transmitted total collisions

Definition at line 327 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_TxUnicastPkts   0x1A

# of transmitted unicast packets

Definition at line 325 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MIBCountersUpdate().

#define MIB_XXX   0x01

MIB Reserved byte.

Definition at line 300 of file ksz8851snl.c.

#define MID_QMU_MAC_H   0x57

3rd segment of the MAC address

Definition at line 88 of file ksz8851snl.c.

Referenced by KSZ8851SNL_MacAddressGet().

#define MSB_POS   0x0008

Used to mark the MSB pos.

Definition at line 78 of file ksz8851snl.c.

Referenced by KSZ8851SNL_FrameCounterSet(), and KSZ8851SNL_TransmitBegin().

#define NO_INT   0x0000

Used to disable the interupts.

Definition at line 66 of file ksz8851snl.c.

Referenced by KSZ8851SNL_IntDisable().

#define OBCR   0x20

On-Chip Bus Control Register.

Definition at line 33 of file ksz8851snl.c.

Referenced by KSZ8851SNL_RegistersDump().

#define ONE_FRAME_THRES   0x0001

RX INT after one frame.

Definition at line 63 of file ksz8851snl.c.

#define P1CR   0xF6

Port 1 Control Register.

Definition at line 58 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init(), and KSZ8851SNL_RegistersDump().

#define P1MBCR   0xE4

PHY1 MII-Register Basic Control Register.

Definition at line 57 of file ksz8851snl.c.

Referenced by KSZ8851SNL_RegistersDump().

#define P1SR   0xF8

Port 1 Status Register.

Definition at line 59 of file ksz8851snl.c.

Referenced by KSZ8851SNL_PHYStatusGet().

#define PHY_RESET   0x0001

PHY Reset Register Options.

Definition at line 277 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init().

#define PHYRR   0xD8

PHY Reset Register.

Definition at line 56 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init(), and KSZ8851SNL_RegistersDump().

#define PMECR   0xD4

Power Managment Event Control Register.

Definition at line 55 of file ksz8851snl.c.

Referenced by KSZ8851SNL_PMECRStatusClear().

#define PORT1_AN_DONE   0x0040

Auto-neg done.

Definition at line 226 of file ksz8851snl.c.

#define PORT1_AUTO_MDIX_DISABLE   0x0400

Disable auto MDI/MDI-X.

Definition at line 240 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_100BTX   0x0004

Advertise 100BT half-duplex capability.

Definition at line 254 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_100BTX_FD   0x0008

Advertise 100BT full-duplex capability.

Definition at line 252 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_10BT   0x0001

Advertise 10BT half-duplex capability.

Definition at line 258 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_10BT_FD   0x0002

Advertise 10BT full-duplex capability.

Definition at line 256 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_ENABLE   0x0080

Enable auto-negotiation.

Definition at line 244 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_FLOW_CTRL   0x0010

Advertise flow control capability.

Definition at line 250 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_RESTART   0x2000

Restart auto-negotiation.

Definition at line 236 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init().

#define PORT1_CONFIG
#define PORT1_FORCE_100_MBIT   0x0040

Force PHY 100Mbps.

Definition at line 246 of file ksz8851snl.c.

#define PORT1_FORCE_FULL_DUPLEX   0x0020

Force PHY in full duplex mode.

Definition at line 248 of file ksz8851snl.c.

#define PORT1_FORCE_MDIX   0x0200

Force MDI-X.

Definition at line 242 of file ksz8851snl.c.

#define PORT1_LED_OFF   0x8000

Turn off port LEDs.

Definition at line 232 of file ksz8851snl.c.

#define PORT1_LINK_GOOD   0x0020

Link good.

Definition at line 228 of file ksz8851snl.c.

#define PORT1_POWER_DOWN   0x0800

Set port power-down.

Definition at line 238 of file ksz8851snl.c.

#define PORT1_TX_DISABLE   0x4000

Disable port transmit.

Definition at line 234 of file ksz8851snl.c.

#define QMU_MODULE_SOFT_RESET   0x0002

QMU Reset.

Definition at line 272 of file ksz8851snl.c.

#define RESTART_AUTO_NEG   0x0200

Restart auto negotiation.

Definition at line 287 of file ksz8851snl.c.

#define RX_BYTE_CNT_MASK   0x0FFF

Used to mask the reserved bits.

Definition at line 76 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Receive().

#define RX_FLOW_CTRL1_CONFIG
#define RX_FLOW_CTRL2_CONFIG
Value:

RX FLOW CONTROL2 Initialization collection.

Definition at line 193 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init().

#define RX_FLOW_CTRL_BAD_PACKET   0x0200

Enable Receive Error Frames.

Definition at line 142 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BLOCK_MAC   0x0001

Receive Source Address Filtering.

Definition at line 190 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BROADCAST_ENABLE   0x0080

Enable Receive Broadcast frames.

Definition at line 144 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BURST_LEN_16   0x0040

16 Bytes length

Definition at line 176 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BURST_LEN_32   0x0060

32 Bytes length

Definition at line 178 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BURST_LEN_4   0x0000

4 bytes length

Definition at line 172 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BURST_LEN_8   0x0020

8 Bytes length

Definition at line 174 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BURST_LEN_FRAME   0x0080

Full frame length.

Definition at line 180 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BURST_LEN_MASK   0x00E0

Receive Flow Control Burst Length mask.

Definition at line 170 of file ksz8851snl.c.

#define RX_FLOW_CTRL_FLOW_ENENABLE   0x0400

Enable Receive Flow Control.

Definition at line 140 of file ksz8851snl.c.

#define RX_FLOW_CTRL_FLUSH_QUEUE   0x8000

Flush Receive Queue.

Definition at line 130 of file ksz8851snl.c.

Referenced by KSZ8851SNL_RxQueueReset().

#define RX_FLOW_CTRL_ICMP_CHECKSUM   0x0002

Enable ICMP frame.

Definition at line 188 of file ksz8851snl.c.

#define RX_FLOW_CTRL_INVERSE_FILTER   0x0002

Receive Inverse Filtering.

Definition at line 154 of file ksz8851snl.c.

#define RX_FLOW_CTRL_IP_CHECKSUM   0x1000

Enable Receive IP Frame Checksum Check.

Definition at line 136 of file ksz8851snl.c.

#define RX_FLOW_CTRL_IPV6_UDP_FRAG_PASS   0x0010

IPV4/IPV6/UDP Fragment Frame Pass.

Definition at line 182 of file ksz8851snl.c.

#define RX_FLOW_CTRL_IPV6_UDP_ZERO_PASS   0x0008

IPV4/IPV6/UDP Frame Checksum Equal Zero.

Definition at line 184 of file ksz8851snl.c.

#define RX_FLOW_CTRL_MAC_FILTER   0x0800

Receive Physical Address Filtering with MAC Address Enable.

Definition at line 138 of file ksz8851snl.c.

#define RX_FLOW_CTRL_MULTICAST_ENABLE   0x0040

Enable Receive Multicast frames.

Definition at line 146 of file ksz8851snl.c.

#define RX_FLOW_CTRL_PROMISCUOUS_MODE   0x0012

Receive all incoming frames.

Definition at line 150 of file ksz8851snl.c.

#define RX_FLOW_CTRL_RX_ALL   0x0010

Receive all frames.

Definition at line 152 of file ksz8851snl.c.

#define RX_FLOW_CTRL_RX_ENABLE   0x0001

Enable receive.

Definition at line 156 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Enable(), and KSZ8851SNL_RxQueueReset().

#define RX_FLOW_CTRL_TCP_CHECKSUM   0x2000

Enable Receive TCP Frame Checksum Check.

Definition at line 134 of file ksz8851snl.c.

#define RX_FLOW_CTRL_UDP_CHECKSUM   0x4000

Enable Receive UDP Frame Checksum Check.

Definition at line 132 of file ksz8851snl.c.

#define RX_FLOW_CTRL_UDP_LITE_CHECKSUM   0x0004

Enable UDP Lite frame.

Definition at line 186 of file ksz8851snl.c.

#define RX_FLOW_CTRL_UNICAST_ENABLE   0x0020

Enable Receive Unicast frames.

Definition at line 148 of file ksz8851snl.c.

#define RXCR1   0x74

Receive Flow Control Register 1.

Definition at line 36 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Enable(), KSZ8851SNL_Init(), KSZ8851SNL_RegistersDump(), and KSZ8851SNL_RxQueueReset().

#define RXCR2   0x76

Receive Flow Control Register 2.

Definition at line 37 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init(), and KSZ8851SNL_RegistersDump().

#define RXFCTR   0x9C

RX Frame Count & Threshold Register.

Definition at line 47 of file ksz8851snl.c.

Referenced by KSZ8851SNL_FrameCounterSet(), KSZ8851SNL_Init(), and KSZ8851SNL_RegistersDump().

#define RXFDPR   0x86

RX Frame Data Pointer Register.

Definition at line 44 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init(), KSZ8851SNL_Receive(), and KSZ8851SNL_RegistersDump().

#define RXFHBCR   0x7E

Receive Frame Header Bytecount Register.

Definition at line 40 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Receive().

#define RXFHSR   0x7C

Receive Frame Header Status Register.

Definition at line 39 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Receive(), and KSZ8851SNL_RegistersDump().

#define RXQ_AUTO_DEQUEUE   0x0010

Enable Auto Dequeue RXQ Frame.

Definition at line 214 of file ksz8851snl.c.

#define RXQ_CMD_CONFIG
Value:

RX COMMAND Initialization collection.

Definition at line 221 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init().

#define RXQ_EN_ON_BYTE_CNT_INT   0x0040

Enable RX interrupt on byte count threshold.

Definition at line 210 of file ksz8851snl.c.

#define RXQ_EN_ON_FRAME_CNT_INT   0x0020

Enable RX interrupt on frame count threshold.

Definition at line 212 of file ksz8851snl.c.

#define RXQ_EN_ON_TIME_INT   0x0080

Enable RX interrupt on timer duration.

Definition at line 208 of file ksz8851snl.c.

#define RXQ_ON_BYTE_CNT_INT   0x0800

RX interrupt is occured on byte count threshold.

Definition at line 202 of file ksz8851snl.c.

#define RXQ_ON_FRAME_CNT_INT   0x0400

RX interrupt is occured on frame count threshold.

Definition at line 204 of file ksz8851snl.c.

#define RXQ_ON_TIME_INT   0x1000

RX interrupt is occured on timer duration.

Definition at line 200 of file ksz8851snl.c.

#define RXQ_RELEASE_ERROR_FRAME   0x0001

Release RX Error Frame.

Definition at line 218 of file ksz8851snl.c.

Referenced by ReleaseIncosistentFrame().

#define RXQ_START_DMA   0x0008

Start QMU transfer operation.

Definition at line 216 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Receive(), KSZ8851SNL_TransmitBegin(), and KSZ8851SNL_TransmitEnd().

#define RXQ_TWOBYTE_OFFSET   0x0200

Enable adding 2-bytes offset before IP frame header.

Definition at line 206 of file ksz8851snl.c.

#define RXQCR   0x82
#define TX_FLOW_CTRL_CONFIG
Value:

TX FLOW CONTROL Initialization collection.

Definition at line 112 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init().

#define TX_FLOW_CTRL_CRC_ENABLE   0x0002

Transmit CRC Enable.

Definition at line 107 of file ksz8851snl.c.

#define TX_FLOW_CTRL_ENABLE   0x0001

Enable tranmsit.

Definition at line 109 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Enable(), and KSZ8851SNL_TxQueueReset().

#define TX_FLOW_CTRL_FLOW_ENABLE   0x0008

Transmit flow control enable.

Definition at line 103 of file ksz8851snl.c.

#define TX_FLOW_CTRL_FLUSH_QUEUE   0x0010

Flush Transmit Queue.

Definition at line 101 of file ksz8851snl.c.

Referenced by KSZ8851SNL_TxQueueReset().

#define TX_FLOW_CTRL_ICMP_CHECKSUM   0x0100

Enable Transmit Checksum Generation for ICMP.

Definition at line 95 of file ksz8851snl.c.

#define TX_FLOW_CTRL_IP_CHECKSUM   0x0020

Enable Transmit Checksum Generation for IP.

Definition at line 99 of file ksz8851snl.c.

#define TX_FLOW_CTRL_PAD_ENABLE   0x0004

Transmit Padding enable.

Definition at line 105 of file ksz8851snl.c.

#define TX_FLOW_CTRL_TCP_CHECKSUM   0x0040

Enable Transmit Checksum Generation for TCP.

Definition at line 97 of file ksz8851snl.c.

#define TX_INT_on_COMPLETION   0x8000

TX INT on completion.

Definition at line 79 of file ksz8851snl.c.

#define TX_MEM_AVAIL_MASK   0x1FFF

Used to mask the reserved bits.

Definition at line 67 of file ksz8851snl.c.

Referenced by KSZ8851SNL_TransmitBegin().

#define TX_MEMORY_WAIT_MS   500

wait time in ms for TX memory to be available

Definition at line 292 of file ksz8851snl.c.

#define TXCR   0x70

Transmit Flow Control Register.

Definition at line 35 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Enable(), KSZ8851SNL_Init(), KSZ8851SNL_RegistersDump(), and KSZ8851SNL_TxQueueReset().

#define TXFDPR   0x84

TX Frame Data Pointer Register.

Definition at line 43 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Init(), and KSZ8851SNL_RegistersDump().

#define TXMIR   0x78

TXQ Memory Information Register.

Definition at line 38 of file ksz8851snl.c.

Referenced by KSZ8851SNL_RegistersDump(), and KSZ8851SNL_TransmitBegin().

#define TXNTFSR   0x9E

TX Next Frame size register.

Definition at line 48 of file ksz8851snl.c.

Referenced by KSZ8851SNL_RegistersDump().

#define TXQ_AUTO_ENQUEUE   0x0004

Enable Auto-Enqueue TXQ Frame.

Definition at line 121 of file ksz8851snl.c.

#define TXQ_ENQUEUE   0x0001

Enable Manual Engueue TXQ Frame.

Definition at line 125 of file ksz8851snl.c.

Referenced by KSZ8851SNL_TransmitBegin(), and KSZ8851SNL_TransmitEnd().

#define TXQ_MEM_AVAILABLE_INT   0x0002

Enable INT generation when TXQ Memory Available.

Definition at line 123 of file ksz8851snl.c.

#define TXQCR   0x80

TXQ Command Register.

Definition at line 41 of file ksz8851snl.c.

Referenced by KSZ8851SNL_RegistersDump(), KSZ8851SNL_TransmitBegin(), and KSZ8851SNL_TransmitEnd().

#define VALID_FRAME_MASK   0x8000

RXFV Receive Frame Valid of the RXFHSR register.

Definition at line 73 of file ksz8851snl.c.

Referenced by KSZ8851SNL_Receive().

#define WATERMARK_4KB   0x0400

4KByte Watermark

Definition at line 84 of file ksz8851snl.c.

#define WATERMARK_6KB   0x0600

6KByte Watermark

Definition at line 83 of file ksz8851snl.c.

#define WORD_SIZE   0x0004

Word size in # of bytes.

Definition at line 80 of file ksz8851snl.c.


Function Documentation

static uint32_t MIBCountersRead ( uint16_t  offset  )  [static]

helper function for KSZ8851SNL_UpdateMIBCounters

Parameters:
[in] offset The offset specifies which MIB counter you want to read
Returns:
The value of the MIB Counter

Definition at line 362 of file ksz8851snl.c.

References IACR, IADHR, IADLR, KSZ8851SNL_SPI_ReadRegister(), KSZ8851SNL_SPI_WriteRegister(), and MIB_MASK.

Referenced by KSZ8851SNL_MIBCountersUpdate().

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static void ReleaseIncosistentFrame ( void   )  [static]

Release the current frame if it is inconsistent.

Note:
Support method used for minimizing the code size.

Definition at line 848 of file ksz8851snl.c.

References KSZ8851SNL_SPI_ReadRegister(), KSZ8851SNL_SPI_WriteRegister(), RXQ_RELEASE_ERROR_FRAME, and RXQCR.

Referenced by KSZ8851SNL_Receive().

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Variable Documentation

Copy of the current MIB counters values from the ksz8851snl.

This is updated by calling KSZ8851SNL_MIBCountersUpdate.

The datasheet recommends that the MIB counter values are read at least every 30 seconds because of counter overflow possibility.

Definition at line 350 of file ksz8851snl.c.