uartdrv.h

Go to the documentation of this file.
00001 /***************************************************************************/
00016 #ifndef __SILICON_LABS_UARTDRV_H__
00017 #define __SILICON_LABS_UARTDRV_H__
00018 
00019 #include "em_device.h"
00020 #include "em_usart.h"
00021 #include "em_cmu.h"
00022 #include "ecode.h"
00023 #include "uartdrv_config.h"
00024 #include "dmadrv.h"
00025 
00026 #ifdef __cplusplus
00027 extern "C" {
00028 #endif
00029 
00030 /***************************************************************************/
00035 /***************************************************************************/
00043 #define ECODE_EMDRV_UARTDRV_OK                (ECODE_OK)                              ///< Success return value.
00044 #define ECODE_EMDRV_UARTDRV_WAITING           (ECODE_EMDRV_UARTDRV_BASE | 0x00000001) ///< Operation is waiting in queue.
00045 #define ECODE_EMDRV_UARTDRV_ILLEGAL_HANDLE    (ECODE_EMDRV_UARTDRV_BASE | 0x00000002) ///< Illegal UART handle.
00046 #define ECODE_EMDRV_UARTDRV_PARAM_ERROR       (ECODE_EMDRV_UARTDRV_BASE | 0x00000003) ///< Illegal input parameter.
00047 #define ECODE_EMDRV_UARTDRV_BUSY              (ECODE_EMDRV_UARTDRV_BASE | 0x00000004) ///< The UART port is busy.
00048 #define ECODE_EMDRV_UARTDRV_ILLEGAL_OPERATION (ECODE_EMDRV_UARTDRV_BASE | 0x00000005) ///< Illegal operation on UART port.
00049 #define ECODE_EMDRV_UARTDRV_IDLE              (ECODE_EMDRV_UARTDRV_BASE | 0x00000008) ///< No UART transfer in progress.
00050 #define ECODE_EMDRV_UARTDRV_ABORTED           (ECODE_EMDRV_UARTDRV_BASE | 0x00000009) ///< UART transfer has been aborted.
00051 #define ECODE_EMDRV_UARTDRV_QUEUE_FULL        (ECODE_EMDRV_UARTDRV_BASE | 0x0000000A) ///< UART operation queue is full.
00052 #define ECODE_EMDRV_UARTDRV_QUEUE_EMPTY       (ECODE_EMDRV_UARTDRV_BASE | 0x0000000B) ///< UART operation queue is empty.
00053 #define ECODE_EMDRV_UARTDRV_PARITY_ERROR      (ECODE_EMDRV_UARTDRV_BASE | 0x0000000C) ///< UART parity error frame. Data is ignored.
00054 #define ECODE_EMDRV_UARTDRV_FRAME_ERROR       (ECODE_EMDRV_UARTDRV_BASE | 0x0000000D) ///< UART frame error. Data is ignored.
00055 #define ECODE_EMDRV_UARTDRV_DMA_ALLOC_ERROR   (ECODE_EMDRV_UARTDRV_BASE | 0x0000000E) ///< Unable to allocated DMA channels.
00056 
00058 #if defined(UART_PRESENT) && defined(USART_PRESENT)
00059 #define UART_NUM_PORTS  (UART_COUNT + USART_COUNT)
00060 #elif defined(UART_PRESENT)
00061 #define UART_NUM_PORTS  (UART_COUNT)
00062 #else
00063 #define UART_NUM_PORTS  (USART_COUNT)
00064 #endif
00065 
00066 
00067 typedef uint32_t UARTDRV_Count_t;     
00068 typedef uint32_t UARTDRV_Status_t;    
00069 
00071 typedef enum UARTDRV_FlowControlType
00072 {
00073   uartdrvFlowControlNone  = 0,       
00074   uartdrvFlowControlSw    = 1,       
00075   uartdrvFlowControlHw    = 2        
00076 } UARTDRV_FlowControlType_t;
00077 
00079 typedef enum UARTDRV_FlowControlState
00080 {
00081   uartdrvFlowControlOn = 0,         
00082   uartdrvFlowControlOff = 1,        
00083   uartdrvFlowControlAuto = 2        
00084 } UARTDRV_FlowControlState_t;
00085 
00087 typedef enum UARTDRV_AbortType
00088 {
00089   uartdrvAbortTransmit = 1,          
00090   uartdrvAbortReceive = 2,           
00091   uartdrvAbortAll = 3                
00092 } UARTDRV_AbortType_t;
00093 
00094 struct UARTDRV_HandleData;
00095 
00096 /***************************************************************************/
00113 typedef void (*UARTDRV_Callback_t)(struct UARTDRV_HandleData *handle,
00114                                    Ecode_t transferStatus,
00115                                    uint8_t *data,
00116                                    UARTDRV_Count_t transferCount);
00117 
00119 typedef struct
00120 {
00121   uint8_t *data;                         
00122   UARTDRV_Count_t transferCount;         
00123   UARTDRV_Count_t itemsRemaining;        
00124   UARTDRV_Callback_t callback;           
00125   Ecode_t transferStatus;                
00126 } UARTDRV_Buffer_t;
00127 
00129 typedef struct
00130 {
00131   uint16_t head;                         
00132   uint16_t tail;                         
00133   uint16_t used;                         
00134   const uint16_t size;                   
00135   UARTDRV_Buffer_t fifo[];               
00136 } UARTDRV_Buffer_FifoQueue_t;
00137 
00140 #define DEFINE_BUF_QUEUE(qSize, qName)  \
00141 typedef struct {                        \
00142   uint16_t head;                        \
00143   uint16_t tail;                        \
00144   uint16_t used;                        \
00145   const uint16_t size;                  \
00146   UARTDRV_Buffer_t fifo[qSize];         \
00147 } _##qName;                             \
00148 static volatile _##qName qName =        \
00149 {                                       \
00150   .head = 0,                            \
00151   .tail = 0,                            \
00152   .used = 0,                            \
00153   .size = qSize,                        \
00154 }
00155 
00156 
00162 typedef struct
00163 {
00164   USART_TypeDef              *port;             
00165   uint32_t                   baudRate;          
00166 #if defined( _USART_ROUTELOC0_MASK )
00167   uint8_t                    portLocationTx;    
00168   uint8_t                    portLocationRx;    
00169 #else
00170   uint8_t                    portLocation;      
00171 #endif
00172   USART_Stopbits_TypeDef     stopBits;          
00173   USART_Parity_TypeDef       parity;            
00174   USART_OVS_TypeDef          oversampling;      
00175 #if defined(USART_CTRL_MVDIS)
00176   bool                       mvdis;             
00177 #endif
00178   UARTDRV_FlowControlType_t  fcType;            
00179   GPIO_Port_TypeDef          ctsPort;           
00180   uint8_t                    ctsPin;            
00181   GPIO_Port_TypeDef          rtsPort;           
00182   uint8_t                    rtsPin;            
00183   UARTDRV_Buffer_FifoQueue_t *rxQueue;          
00184   UARTDRV_Buffer_FifoQueue_t *txQueue;          
00185 } UARTDRV_Init_t;
00186 
00191 typedef struct UARTDRV_HandleData
00192 {
00194   UARTDRV_Init_t             initData;          // Driver instance initialization data
00195   unsigned int               txDmaCh;           // DMA ch assigned to Tx
00196   unsigned int               rxDmaCh;           // DMA ch assigned to Rx
00197   DMADRV_PeripheralSignal_t  txDmaSignal;       // DMA Tx trigger source signal
00198   DMADRV_PeripheralSignal_t  rxDmaSignal;       // DMA Rx trigger source signal
00199   UARTDRV_FlowControlState_t fcSelfState;       // Current flow control state of self
00200   UARTDRV_FlowControlState_t fcSelfCfg;         // Flow control override configuration of self
00201   UARTDRV_FlowControlState_t fcPeerState;       // Current flow control state of peer
00202   bool                       IgnoreRestrain;    // Transmit does not respect uartdrvFlowControlOff
00203   GPIO_Port_TypeDef          rxPort;            // RX pin port number
00204   uint8_t                    rxPin;             // RX pin number
00205   GPIO_Port_TypeDef          txPort;            // TX pin port number
00206   uint8_t                    txPin;             // RTS pin number
00207   CMU_Clock_TypeDef          uartClock;         // Clock source select
00208   UARTDRV_Buffer_FifoQueue_t *rxQueue;          // Receive operation queue
00209   UARTDRV_Buffer_FifoQueue_t *txQueue;          // Transmit operation queue
00210   volatile bool              rxDmaActive;       // Receive DMA is currently active
00211   volatile bool              txDmaActive;       // Transmit DMA is currently active
00213 } UARTDRV_HandleData_t;
00214 
00216 typedef UARTDRV_HandleData_t * UARTDRV_Handle_t;
00217 
00218 Ecode_t UARTDRV_Init(UARTDRV_Handle_t handle, UARTDRV_Init_t *initData);
00219 
00220 Ecode_t UARTDRV_DeInit(UARTDRV_Handle_t handle);
00221 
00222 UARTDRV_Status_t UARTDRV_GetReceiveStatus(UARTDRV_Handle_t handle,
00223                                           uint8_t **buffer,
00224                                           UARTDRV_Count_t *bytesReceived,
00225                                           UARTDRV_Count_t *bytesRemaining);
00226 
00227 UARTDRV_Status_t UARTDRV_GetTransmitStatus(UARTDRV_Handle_t handle,
00228                                            uint8_t **buffer,
00229                                            UARTDRV_Count_t *bytesSent,
00230                                            UARTDRV_Count_t *bytesRemaining);
00231 
00232 uint8_t UARTDRV_GetReceiveDepth(UARTDRV_Handle_t handle);
00233 
00234 uint8_t UARTDRV_GetTransmitDepth(UARTDRV_Handle_t handle);
00235 
00236 Ecode_t UARTDRV_Transmit(UARTDRV_Handle_t handle,
00237                          uint8_t *data,
00238                          UARTDRV_Count_t count,
00239                          UARTDRV_Callback_t callback);
00240 
00241 Ecode_t UARTDRV_Receive(UARTDRV_Handle_t handle,
00242                         uint8_t *data,
00243                         UARTDRV_Count_t count,
00244                         UARTDRV_Callback_t callback);
00245 
00246 Ecode_t UARTDRV_TransmitB(UARTDRV_Handle_t handle,
00247                           uint8_t *data,
00248                           UARTDRV_Count_t count);
00249 
00250 Ecode_t UARTDRV_ReceiveB(UARTDRV_Handle_t handle,
00251                          uint8_t *data,
00252                          UARTDRV_Count_t count);
00253 
00254 Ecode_t UARTDRV_ForceTransmit(UARTDRV_Handle_t handle,
00255                               uint8_t *data,
00256                               UARTDRV_Count_t count);
00257 
00258 UARTDRV_Count_t UARTDRV_ForceReceive(UARTDRV_Handle_t handle,
00259                                       uint8_t *data,
00260                                       UARTDRV_Count_t maxLength);
00261 
00262 Ecode_t UARTDRV_Abort(UARTDRV_Handle_t handle, UARTDRV_AbortType_t type);
00263 
00264 UARTDRV_FlowControlState_t UARTDRV_FlowControlGetSelfStatus(UARTDRV_Handle_t handle);
00265 
00266 UARTDRV_FlowControlState_t UARTDRV_FlowControlGetPeerStatus(UARTDRV_Handle_t handle);
00267 
00268 Ecode_t UARTDRV_FlowControlSet(UARTDRV_Handle_t handle, UARTDRV_FlowControlState_t state);
00269 
00270 Ecode_t UARTDRV_FlowControlIgnoreRestrain(UARTDRV_Handle_t handle);
00271 
00275 #ifdef __cplusplus
00276 }
00277 #endif
00278 #endif // __SILICON_LABS_UARTDRV_H__