release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32TG/Source/IAR/startup_efm32tg.c

00001 /**************************************************************************/
00033 #include "em_device.h"        /* The correct device header file. */
00034 
00035 #pragma language=extended
00036 #pragma segment="CSTACK"
00037 
00038 /* IAR start function */
00039 extern void __iar_program_start(void);
00040 /* CMSIS init function */
00041 extern void SystemInit(void);
00042 
00043 /* Auto defined by linker */
00044 extern unsigned char CSTACK$$Limit;
00045 
00046 __weak void Reset_Handler(void)
00047 {
00048   SystemInit();
00049   __iar_program_start();
00050 }
00051 
00052 __weak void NMI_Handler(void)
00053 {
00054   while(1);
00055 }
00056 
00057 __weak void HardFault_Handler(void)
00058 {
00059   while(1);
00060 }
00061 
00062 __weak void MemManage_Handler(void)
00063 {
00064   while(1);
00065 }
00066 
00067 __weak void BusFault_Handler(void)
00068 {
00069   while(1);
00070 }
00071 
00072 __weak void UsageFault_Handler(void)
00073 {
00074   while(1);
00075 }
00076 
00077 __weak void SVC_Handler(void)
00078 {
00079   while(1);
00080 }
00081 
00082 __weak void DebugMon_Handler(void)
00083 {
00084   while(1);
00085 }
00086 
00087 __weak void PendSV_Handler(void)
00088 {
00089   while(1);
00090 }
00091 
00092 __weak void SysTick_Handler(void)
00093 {
00094   while(1);
00095 }
00096 
00097 __weak void DMA_IRQHandler(void)
00098 {
00099   while(1);
00100 }
00101 
00102 __weak void GPIO_EVEN_IRQHandler(void)
00103 {
00104   while(1);
00105 }
00106 
00107 __weak void TIMER0_IRQHandler(void)
00108 {
00109   while(1);
00110 }
00111 
00112 __weak void USART0_RX_IRQHandler(void)
00113 {
00114   while(1);
00115 }
00116 
00117 __weak void USART0_TX_IRQHandler(void)
00118 {
00119   while(1);
00120 }
00121 
00122 __weak void ACMP0_IRQHandler(void)
00123 {
00124   while(1);
00125 }
00126 
00127 __weak void ADC0_IRQHandler(void)
00128 {
00129   while(1);
00130 }
00131 
00132 __weak void DAC0_IRQHandler(void)
00133 {
00134   while(1);
00135 }
00136 
00137 __weak void I2C0_IRQHandler(void)
00138 {
00139   while(1);
00140 }
00141 
00142 __weak void GPIO_ODD_IRQHandler(void)
00143 {
00144   while(1);
00145 }
00146 
00147 __weak void TIMER1_IRQHandler(void)
00148 {
00149   while(1);
00150 }
00151 
00152 __weak void USART1_RX_IRQHandler(void)
00153 {
00154   while(1);
00155 }
00156 
00157 __weak void USART1_TX_IRQHandler(void)
00158 {
00159   while(1);
00160 }
00161 
00162 __weak void LESENSE_IRQHandler(void)
00163 {
00164   while(1);
00165 }
00166 
00167 __weak void LEUART0_IRQHandler(void)
00168 {
00169   while(1);
00170 }
00171 
00172 __weak void LETIMER0_IRQHandler(void)
00173 {
00174   while(1);
00175 }
00176 
00177 __weak void PCNT0_IRQHandler(void)
00178 {
00179   while(1);
00180 }
00181 
00182 __weak void RTC_IRQHandler(void)
00183 {
00184   while(1);
00185 }
00186 
00187 __weak void CMU_IRQHandler(void)
00188 {
00189   while(1);
00190 }
00191 
00192 __weak void VCMP_IRQHandler(void)
00193 {
00194   while(1);
00195 }
00196 
00197 __weak void LCD_IRQHandler(void)
00198 {
00199   while(1);
00200 }
00201 
00202 __weak void MSC_IRQHandler(void)
00203 {
00204   while(1);
00205 }
00206 
00207 __weak void AES_IRQHandler(void)
00208 {
00209   while(1);
00210 }
00211 
00212 
00213 /* With IAR, the CSTACK is defined via project options settings */
00214 #pragma data_alignment=256
00215 #pragma location = ".intvec"
00216 const void * const __vector_table[]=  {
00217     &CSTACK$$Limit,
00218     (void *) Reset_Handler,           /*  1 - Reset (start instruction) */
00219     (void *) NMI_Handler,             /*  2 - NMI */
00220     (void *) HardFault_Handler,       /*  3 - HardFault */
00221     (void *) MemManage_Handler,
00222     (void *) BusFault_Handler,
00223     (void *) UsageFault_Handler,
00224     (void *) 0,
00225     (void *) 0,
00226     (void *) 0,
00227     (void *) 0,
00228     (void *) SVC_Handler,
00229     (void *) DebugMon_Handler,
00230     (void *) 0,
00231     (void *) PendSV_Handler,
00232     (void *) SysTick_Handler,
00233     (void *) DMA_IRQHandler,  /* 0 - DMA */
00234     (void *) GPIO_EVEN_IRQHandler,  /* 1 - GPIO_EVEN */
00235     (void *) TIMER0_IRQHandler,  /* 2 - TIMER0 */
00236     (void *) USART0_RX_IRQHandler,  /* 3 - USART0_RX */
00237     (void *) USART0_TX_IRQHandler,  /* 4 - USART0_TX */
00238     (void *) ACMP0_IRQHandler,  /* 5 - ACMP0 */
00239     (void *) ADC0_IRQHandler,  /* 6 - ADC0 */
00240     (void *) DAC0_IRQHandler,  /* 7 - DAC0 */
00241     (void *) I2C0_IRQHandler,  /* 8 - I2C0 */
00242     (void *) GPIO_ODD_IRQHandler,  /* 9 - GPIO_ODD */
00243     (void *) TIMER1_IRQHandler,  /* 10 - TIMER1 */
00244     (void *) USART1_RX_IRQHandler,  /* 11 - USART1_RX */
00245     (void *) USART1_TX_IRQHandler,  /* 12 - USART1_TX */
00246     (void *) LESENSE_IRQHandler,  /* 13 - LESENSE */
00247     (void *) LEUART0_IRQHandler,  /* 14 - LEUART0 */
00248     (void *) LETIMER0_IRQHandler,  /* 15 - LETIMER0 */
00249     (void *) PCNT0_IRQHandler,  /* 16 - PCNT0 */
00250     (void *) RTC_IRQHandler,  /* 17 - RTC */
00251     (void *) CMU_IRQHandler,  /* 18 - CMU */
00252     (void *) VCMP_IRQHandler,  /* 19 - VCMP */
00253     (void *) LCD_IRQHandler,  /* 20 - LCD */
00254     (void *) MSC_IRQHandler,  /* 21 - MSC */
00255     (void *) AES_IRQHandler,  /* 22 - AES */
00256 };