34 #if defined(IDAC_COUNT) && (IDAC_COUNT > 0)
52 #if defined(_EFM32_ZERO_FAMILY) || defined(_EFM32_HAPPY_FAMILY)
53 #define ERRATA_FIX_IDAC_E101_EN
77 void IDAC_Init(IDAC_TypeDef *idac,
const IDAC_Init_TypeDef *init)
81 EFM_ASSERT(IDAC_REF_VALID(idac));
83 tmp = (uint32_t)(init->prsSel);
93 tmp |= IDAC_CTRL_OUTENPRS;
97 tmp |= IDAC_CTRL_CURSINK;
114 void IDAC_Enable(IDAC_TypeDef *idac,
bool enable)
116 volatile uint32_t *reg;
118 EFM_ASSERT(IDAC_REF_VALID(idac));
133 void IDAC_Reset(IDAC_TypeDef *idac)
135 EFM_ASSERT(IDAC_REF_VALID(idac));
137 #if defined(ERRATA_FIX_IDAC_E101_EN)
143 idac->CTRL = _IDAC_CTRL_RESETVALUE | IDAC_CTRL_EN;
146 idac->CURPROG = IDAC_CURPROG_RANGESEL_RANGE0 |
147 (0x0 << _IDAC_CURPROG_STEPSEL_SHIFT);
150 idac->DUTYCONFIG = IDAC_DUTYCONFIG_DUTYCYCLEEN;
152 idac->CTRL = _IDAC_CTRL_RESETVALUE;
153 idac->CURPROG = _IDAC_CURPROG_RESETVALUE;
154 idac->DUTYCONFIG = _IDAC_DUTYCONFIG_RESETVALUE;
156 #if defined ( _IDAC_CAL_MASK )
157 idac->CAL = _IDAC_CAL_RESETVALUE;
172 void IDAC_MinimalOutputTransitionMode(IDAC_TypeDef *idac,
bool enable)
174 volatile uint32_t *reg;
176 EFM_ASSERT(IDAC_REF_VALID(idac));
200 void IDAC_RangeSet(IDAC_TypeDef *idac,
const IDAC_Range_TypeDef range)
203 #if defined( _IDAC_CURPROG_TUNING_MASK )
208 EFM_ASSERT(IDAC_REF_VALID(idac));
209 EFM_ASSERT(((uint32_t)range >> _IDAC_CURPROG_RANGESEL_SHIFT)
210 <= (_IDAC_CURPROG_RANGESEL_MASK >> _IDAC_CURPROG_RANGESEL_SHIFT));
212 #if defined ( _IDAC_CAL_MASK )
215 switch ((IDAC_Range_TypeDef)range)
217 case idacCurrentRange0:
218 idac->CAL = (
DEVINFO->IDAC0CAL0 & _DEVINFO_IDAC0CAL0_RANGE0_MASK)
219 >> _DEVINFO_IDAC0CAL0_RANGE0_SHIFT;
221 case idacCurrentRange1:
222 idac->CAL = (
DEVINFO->IDAC0CAL0 & _DEVINFO_IDAC0CAL0_RANGE1_MASK)
223 >> _DEVINFO_IDAC0CAL0_RANGE1_SHIFT;
225 case idacCurrentRange2:
226 idac->CAL = (
DEVINFO->IDAC0CAL0 & _DEVINFO_IDAC0CAL0_RANGE2_MASK)
227 >> _DEVINFO_IDAC0CAL0_RANGE2_SHIFT;
229 case idacCurrentRange3:
230 idac->CAL = (
DEVINFO->IDAC0CAL0 & _DEVINFO_IDAC0CAL0_RANGE3_MASK)
231 >> _DEVINFO_IDAC0CAL0_RANGE3_SHIFT;
235 tmp = idac->CURPROG & ~_IDAC_CURPROG_RANGESEL_MASK;
236 tmp |= (uint32_t)range;
238 #elif defined( _IDAC_CURPROG_TUNING_MASK )
252 tmp = idac->CURPROG & ~(_IDAC_CURPROG_TUNING_MASK
253 | _IDAC_CURPROG_RANGESEL_MASK);
254 if (idac->CTRL & IDAC_CTRL_CURSINK)
258 case idacCurrentRange0:
259 tmp |= ((diCal1 & _DEVINFO_IDAC0CAL1_SINKRANGE0TUNING_MASK)
260 >> _DEVINFO_IDAC0CAL1_SINKRANGE0TUNING_SHIFT)
261 << _IDAC_CURPROG_TUNING_SHIFT;
264 case idacCurrentRange1:
265 tmp |= ((diCal1 & _DEVINFO_IDAC0CAL1_SINKRANGE1TUNING_MASK)
266 >> _DEVINFO_IDAC0CAL1_SINKRANGE1TUNING_SHIFT)
267 << _IDAC_CURPROG_TUNING_SHIFT;
270 case idacCurrentRange2:
271 tmp |= ((diCal1 & _DEVINFO_IDAC0CAL1_SINKRANGE2TUNING_MASK)
272 >> _DEVINFO_IDAC0CAL1_SINKRANGE2TUNING_SHIFT)
273 << _IDAC_CURPROG_TUNING_SHIFT;
276 case idacCurrentRange3:
277 tmp |= ((diCal1 & _DEVINFO_IDAC0CAL1_SINKRANGE3TUNING_MASK)
278 >> _DEVINFO_IDAC0CAL1_SINKRANGE3TUNING_SHIFT)
279 << _IDAC_CURPROG_TUNING_SHIFT;
287 case idacCurrentRange0:
288 tmp |= ((diCal0 & _DEVINFO_IDAC0CAL0_SOURCERANGE0TUNING_MASK)
289 >> _DEVINFO_IDAC0CAL0_SOURCERANGE0TUNING_SHIFT)
290 << _IDAC_CURPROG_TUNING_SHIFT;
293 case idacCurrentRange1:
294 tmp |= ((diCal0 & _DEVINFO_IDAC0CAL0_SOURCERANGE1TUNING_MASK)
295 >> _DEVINFO_IDAC0CAL0_SOURCERANGE1TUNING_SHIFT)
296 << _IDAC_CURPROG_TUNING_SHIFT;
299 case idacCurrentRange2:
300 tmp |= ((diCal0 & _DEVINFO_IDAC0CAL0_SOURCERANGE2TUNING_MASK)
301 >> _DEVINFO_IDAC0CAL0_SOURCERANGE2TUNING_SHIFT)
302 << _IDAC_CURPROG_TUNING_SHIFT;
305 case idacCurrentRange3:
306 tmp |= ((diCal0 & _DEVINFO_IDAC0CAL0_SOURCERANGE3TUNING_MASK)
307 >> _DEVINFO_IDAC0CAL0_SOURCERANGE3TUNING_SHIFT)
308 << _IDAC_CURPROG_TUNING_SHIFT;
313 tmp |= (uint32_t)range;
316 #warning "IDAC calibration register definition unknown."
333 void IDAC_StepSet(IDAC_TypeDef *idac,
const uint32_t step)
337 EFM_ASSERT(IDAC_REF_VALID(idac));
338 EFM_ASSERT(step <= (_IDAC_CURPROG_STEPSEL_MASK >> _IDAC_CURPROG_STEPSEL_SHIFT));
340 tmp = idac->CURPROG & ~_IDAC_CURPROG_STEPSEL_MASK;
341 tmp |= step << _IDAC_CURPROG_STEPSEL_SHIFT;
357 void IDAC_OutEnable(IDAC_TypeDef *idac,
bool enable)
359 volatile uint32_t *reg;
361 EFM_ASSERT(IDAC_REF_VALID(idac));
Clock management unit (CMU) API.
Emlib peripheral API "assert" implementation.
RAM and peripheral bit-field set and clear API.
Current Digital to Analog Converter (IDAC) peripheral API.
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.