28 static bool spidrvIsInitialized =
false;
32 int itemsTransferred );
36 static bool RxDMAComplete(
unsigned int channel,
37 unsigned int sequenceNo,
40 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
71 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
101 if ( initData == NULL )
110 #if defined( USART0 )
118 #if defined( USART1 )
126 #if defined( USART2 )
134 #if defined( USARTRF0 )
136 else if ( initData->
port == USARTRF0 )
138 handle->usartClock = cmuClock_USARTRF0;
139 handle->txDMASignal = dmadrvPeripheralSignal_USARTRF0_TXBL;
140 handle->rxDMASignal = dmadrvPeripheralSignal_USARTRF0_RXDATAV;
142 #if defined( USARTRF1 )
144 else if ( initData->
port == USARTRF1 )
146 handle->usartClock = cmuClock_USARTRF1;
147 handle->txDMASignal = dmadrvPeripheralSignal_USARTRF1_TXBL;
148 handle->rxDMASignal = dmadrvPeripheralSignal_USARTRF1_RXDATAV;
156 handle->initData = *initData;
160 usartInit.
msbf =
true;
208 #if defined( USART_ROUTEPEN_TXPEN )
209 initData->
port->ROUTEPEN = USART_ROUTEPEN_TXPEN
210 | USART_ROUTEPEN_RXPEN
211 | USART_ROUTEPEN_CLKPEN
212 | USART_ROUTEPEN_CSPEN;
214 initData->
port->ROUTELOC0 = ( initData->
port->ROUTELOC0 &
215 ~( _USART_ROUTELOC0_TXLOC_MASK
216 | _USART_ROUTELOC0_RXLOC_MASK
217 | _USART_ROUTELOC0_CLKLOC_MASK
218 | _USART_ROUTELOC0_CSLOC_MASK ) )
219 | ( initData->portLocationTx << _USART_ROUTELOC0_TXLOC_SHIFT )
220 | ( initData->portLocationRx << _USART_ROUTELOC0_RXLOC_SHIFT )
221 | ( initData->portLocationClk << _USART_ROUTELOC0_CLKLOC_SHIFT )
222 | ( initData->portLocationCs << _USART_ROUTELOC0_CSLOC_SHIFT );
235 #if defined( USART_ROUTEPEN_TXPEN )
236 initData->
port->ROUTEPEN = USART_ROUTEPEN_TXPEN
237 | USART_ROUTEPEN_RXPEN
238 | USART_ROUTEPEN_CLKPEN;
240 initData->
port->ROUTELOC0 = ( initData->
port->ROUTELOC0 &
241 ~( _USART_ROUTELOC0_TXLOC_MASK
242 | _USART_ROUTELOC0_RXLOC_MASK
243 | _USART_ROUTELOC0_CLKLOC_MASK ) )
244 | ( initData->portLocationTx << _USART_ROUTELOC0_TXLOC_SHIFT )
245 | ( initData->portLocationRx << _USART_ROUTELOC0_RXLOC_SHIFT )
246 | ( initData->portLocationClk << _USART_ROUTELOC0_CLKLOC_SHIFT );
262 if ( ! spidrvIsInitialized )
264 spidrvIsInitialized =
true;
267 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
276 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
314 if ( handle == NULL )
323 ConfigGPIO( handle,
false );
325 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
355 if ( handle == NULL )
361 if ( handle->state == spidrvStateIdle )
367 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
379 handle->state = spidrvStateIdle;
381 handle->blockingCompleted =
true;
383 if ( handle->userCallback != NULL )
385 handle->userCallback( handle,
387 handle->transferCount - handle->remaining );
408 if ( handle == NULL )
413 if ( bitRate == NULL )
437 if ( handle == NULL )
442 if ( frameLength == NULL )
447 *frameLength = handle->initData.frameLength;
471 int *itemsTransferred,
472 int *itemsRemaining )
476 if ( handle == NULL )
481 if ( ( itemsTransferred == NULL ) || ( itemsRemaining == NULL ) )
487 if ( handle->state == spidrvStateIdle )
489 remaining = handle->remaining;
497 *itemsTransferred = handle->transferCount - remaining;
498 *itemsRemaining = remaining;
534 if ( ( retVal = TransferApiPrologue( handle, buffer, count ) )
540 StartReceiveDMA( handle, buffer, count, callback );
576 if ( ( retVal = TransferApiBlockingPrologue( handle, buffer, count ) )
582 StartReceiveDMA( handle, buffer, count, BlockingComplete );
584 WaitForTransferCompletion( handle );
586 return handle->transferStatus;
608 const void *txBuffer,
620 if ( ( retVal = TransferApiPrologue( handle, (
void*)txBuffer, count ) )
626 if ( rxBuffer == NULL )
631 StartTransferDMA( handle, txBuffer, rxBuffer, count, callback );
658 const void *txBuffer,
669 if ( ( retVal = TransferApiBlockingPrologue( handle, (
void*)txBuffer, count ))
675 if ( rxBuffer == NULL )
680 StartTransferDMA( handle, txBuffer, rxBuffer, count, BlockingComplete );
682 WaitForTransferCompletion( handle );
684 return handle->transferStatus;
718 if ( handle == NULL )
724 if ( handle->state != spidrvStateIdle )
729 handle->state = spidrvStateTransferring;
732 if ( ( pRx = rxValue ) == NULL )
737 StartTransferDMA( handle, &txValue, pRx, 1, BlockingComplete );
739 WaitForTransferCompletion( handle );
741 return handle->transferStatus;
775 if ( ( retVal = TransferApiPrologue( handle, (
void*)buffer, count ) )
781 StartTransmitDMA( handle, buffer, count, callback );
816 if ( ( retVal = TransferApiBlockingPrologue( handle, (
void*)buffer, count ) )
822 StartTransmitDMA( handle, buffer, count, BlockingComplete );
824 WaitForTransferCompletion( handle );
826 return handle->transferStatus;
843 if ( handle == NULL )
849 if ( handle->state != spidrvStateIdle )
855 handle->initData.bitRate = bitRate;
876 if ( handle == NULL )
889 if ( handle->state != spidrvStateIdle )
895 handle->initData.frameLength = frameLength + 3;
896 handle->initData.port->FRAME = ( handle->initData.port->FRAME
905 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
940 if ( ( retVal = TransferApiPrologue( handle, buffer, count ) )
963 StartReceiveDMA( handle, buffer, count, callback );
1003 if ( ( retVal = TransferApiBlockingPrologue( handle, buffer, count ) )
1026 StartReceiveDMA( handle, buffer, count, BlockingComplete );
1028 WaitForTransferCompletion( handle );
1030 return handle->transferStatus;
1054 const void *txBuffer,
1067 if ( ( retVal = TransferApiPrologue( handle, (
void*)txBuffer, count ) )
1073 if ( rxBuffer == NULL )
1095 StartTransferDMA( handle, txBuffer, rxBuffer, count, callback );
1125 const void *txBuffer,
1137 if ( ( retVal = TransferApiBlockingPrologue( handle, (
void*)txBuffer, count ))
1143 if ( rxBuffer == NULL )
1165 StartTransferDMA( handle, txBuffer, rxBuffer, count, BlockingComplete );
1167 WaitForTransferCompletion( handle );
1169 return handle->transferStatus;
1206 if ( ( retVal = TransferApiPrologue( handle, (
void*)buffer, count ) )
1229 StartTransmitDMA( handle, buffer, count, callback );
1269 if ( ( retVal = TransferApiBlockingPrologue( handle, (
void*)buffer, count ) )
1292 StartTransmitDMA( handle, buffer, count, BlockingComplete );
1294 WaitForTransferCompletion( handle );
1296 return handle->transferStatus;
1310 int itemsTransferred )
1312 (void)itemsTransferred;
1314 handle->transferStatus = transferStatus;
1315 handle->blockingCompleted =
true;
1323 #if defined( _USART_ROUTELOC0_MASK )
1328 int mosiPin, misoPin, clkPin;
1329 int mosiPort, misoPort, clkPort;
1331 #if defined( _USART_ROUTELOC0_MASK )
1332 initData = &handle->initData;
1336 #if defined( USART0 )
1338 else if ( handle->initData.port ==
USART0 )
1340 mosiPort = AF_USART0_TX_PORT( initData->portLocationTx );
1341 misoPort = AF_USART0_RX_PORT( initData->portLocationRx );
1342 clkPort = AF_USART0_CLK_PORT( initData->portLocationClk );
1343 handle->csPort = AF_USART0_CS_PORT( initData->portLocationCs );
1344 mosiPin = AF_USART0_TX_PIN( initData->portLocationTx );
1345 misoPin = AF_USART0_RX_PIN( initData->portLocationRx );
1346 clkPin = AF_USART0_CLK_PIN( initData->portLocationClk );
1347 handle->csPin = AF_USART0_CS_PIN( initData->portLocationCs );
1349 #if defined( USART1 )
1351 else if ( handle->initData.port ==
USART1 )
1353 mosiPort = AF_USART1_TX_PORT( initData->portLocationTx );
1354 misoPort = AF_USART1_RX_PORT( initData->portLocationRx );
1355 clkPort = AF_USART1_CLK_PORT( initData->portLocationClk );
1356 handle->csPort = AF_USART1_CS_PORT( initData->portLocationCs );
1357 mosiPin = AF_USART1_TX_PIN( initData->portLocationTx );
1358 misoPin = AF_USART1_RX_PIN( initData->portLocationRx );
1359 clkPin = AF_USART1_CLK_PIN( initData->portLocationClk );
1360 handle->csPin = AF_USART1_CS_PIN( initData->portLocationCs );
1362 #if defined( USART2 )
1364 else if ( handle->initData.port ==
USART2 )
1366 mosiPort = AF_USART2_TX_PORT( initData->portLocationTx );
1367 misoPort = AF_USART2_RX_PORT( initData->portLocationRx );
1368 clkPort = AF_USART2_CLK_PORT( initData->portLocationClk );
1369 handle->csPort = AF_USART2_CS_PORT( initData->portLocationCs );
1370 mosiPin = AF_USART2_TX_PIN( initData->portLocationTx );
1371 misoPin = AF_USART2_RX_PIN( initData->portLocationRx );
1372 clkPin = AF_USART2_CLK_PIN( initData->portLocationClk );
1373 handle->csPin = AF_USART2_CS_PIN( initData->portLocationCs );
1375 #if defined( USARTRF0 )
1377 else if ( handle->initData.port == USARTRF0 )
1379 mosiPort = AF_USARTRF0_TX_PORT( initData->portLocationTx );
1380 misoPort = AF_USARTRF0_RX_PORT( initData->portLocationRx );
1381 clkPort = AF_USARTRF0_CLK_PORT( initData->portLocationClk );
1382 handle->csPort = AF_USARTRF0_CS_PORT( initData->portLocationCs );
1383 mosiPin = AF_USARTRF0_TX_PIN( initData->portLocationTx );
1384 misoPin = AF_USARTRF0_RX_PIN( initData->portLocationRx );
1385 clkPin = AF_USARTRF0_CLK_PIN( initData->portLocationClk );
1386 handle->csPin = AF_USARTRF0_CS_PIN( initData->portLocationCs );
1388 #if defined( USARTRF1 )
1390 else if ( handle->initData.port == USARTRF1 )
1392 mosiPort = AF_USARTRF1_TX_PORT( initData->portLocationTx );
1393 misoPort = AF_USARTRF1_RX_PORT( initData->portLocationRx );
1394 clkPort = AF_USARTRF1_CLK_PORT( initData->portLocationClk );
1395 handle->csPort = AF_USARTRF1_CS_PORT( initData->portLocationCs );
1396 mosiPin = AF_USARTRF1_TX_PIN( initData->portLocationTx );
1397 misoPin = AF_USARTRF1_RX_PIN( initData->portLocationRx );
1398 clkPin = AF_USARTRF1_CLK_PIN( initData->portLocationClk );
1399 handle->csPin = AF_USARTRF1_CS_PIN( initData->portLocationCs );
1408 location = handle->initData.portLocation;
1412 #if defined( USART0 )
1414 else if ( handle->initData.port ==
USART0 )
1416 mosiPort = AF_USART0_TX_PORT( location );
1417 misoPort = AF_USART0_RX_PORT( location );
1418 clkPort = AF_USART0_CLK_PORT( location );
1419 handle->csPort = AF_USART0_CS_PORT( location );
1420 mosiPin = AF_USART0_TX_PIN( location );
1421 misoPin = AF_USART0_RX_PIN( location );
1422 clkPin = AF_USART0_CLK_PIN( location );
1423 handle->csPin = AF_USART0_CS_PIN( location );
1425 #if defined( USART1 )
1427 else if ( handle->initData.port ==
USART1 )
1429 mosiPort = AF_USART1_TX_PORT( location );
1430 misoPort = AF_USART1_RX_PORT( location );
1431 clkPort = AF_USART1_CLK_PORT( location );
1432 handle->csPort = AF_USART1_CS_PORT( location );
1433 mosiPin = AF_USART1_TX_PIN( location );
1434 misoPin = AF_USART1_RX_PIN( location );
1435 clkPin = AF_USART1_CLK_PIN( location );
1436 handle->csPin = AF_USART1_CS_PIN( location );
1438 #if defined( USART2 )
1440 else if ( handle->initData.port ==
USART2 )
1442 mosiPort = AF_USART2_TX_PORT( location );
1443 misoPort = AF_USART2_RX_PORT( location );
1444 clkPort = AF_USART2_CLK_PORT( location );
1445 handle->csPort = AF_USART2_CS_PORT( location );
1446 mosiPin = AF_USART2_TX_PIN( location );
1447 misoPin = AF_USART2_RX_PIN( location );
1448 clkPin = AF_USART2_CLK_PIN( location );
1449 handle->csPin = AF_USART2_CS_PIN( location );
1451 #if defined( USARTRF0 )
1453 else if ( handle->initData.port == USARTRF0 )
1455 mosiPort = AF_USARTRF0_TX_PORT( location );
1456 misoPort = AF_USARTRF0_RX_PORT( location );
1457 clkPort = AF_USARTRF0_CLK_PORT( location );
1458 handle->csPort = AF_USARTRF0_CS_PORT( location );
1459 mosiPin = AF_USARTRF0_TX_PIN( location );
1460 misoPin = AF_USARTRF0_RX_PIN( location );
1461 clkPin = AF_USARTRF0_CLK_PIN( location );
1462 handle->csPin = AF_USARTRF0_CS_PIN( location );
1464 #if defined( USARTRF1 )
1466 else if ( handle->initData.port == USARTRF1 )
1468 mosiPort = AF_USARTRF1_TX_PORT( location );
1469 misoPort = AF_USARTRF1_RX_PORT( location );
1470 clkPort = AF_USARTRF1_CLK_PORT( location );
1471 handle->csPort = AF_USARTRF1_CS_PORT( location );
1472 mosiPin = AF_USARTRF1_TX_PIN( location );
1473 misoPin = AF_USARTRF1_RX_PIN( location );
1474 clkPin = AF_USARTRF1_CLK_PIN( location );
1475 handle->csPin = AF_USARTRF1_CS_PIN( location );
1565 static bool RxDMAComplete(
unsigned int channel,
1566 unsigned int sequenceNo,
1578 handle->state = spidrvStateIdle;
1579 handle->remaining = 0;
1581 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
1588 if ( handle->userCallback != NULL )
1597 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
1603 bool active, pending;
1609 if ( handle->state == spidrvStateTransferring )
1628 handle->remaining = handle->transferCount;
1631 handle->state = spidrvStateIdle;
1633 if ( handle->userCallback != NULL )
1635 handle->userCallback( handle,
1637 handle->transferCount - handle->remaining );
1651 void *rxPort, *txPort;
1652 DMADRV_DataSize_t size;
1654 handle->blockingCompleted =
false;
1655 handle->transferCount = count;
1657 handle->userCallback = callback;
1659 if ( handle->initData.frameLength > 8 )
1668 if ( handle->initData.frameLength > 8 )
1670 rxPort = (
void *)&(handle->initData.port->RXDOUBLE);
1671 txPort = (
void *)&(handle->initData.port->TXDOUBLE);
1675 rxPort = (
void *)&(handle->initData.port->RXDATA);
1676 txPort = (
void *)&(handle->initData.port->TXDATA);
1681 handle->rxDMASignal,
1692 handle->txDMASignal,
1694 (
void *)&(handle->initData.dummyTxValue),
1706 const void *txBuffer,
1711 void *rxPort, *txPort;
1712 DMADRV_DataSize_t size;
1714 handle->blockingCompleted =
false;
1715 handle->transferCount = count;
1717 handle->userCallback = callback;
1719 if ( handle->initData.frameLength > 8 )
1728 if ( handle->initData.frameLength > 8 )
1730 rxPort = (
void *)&(handle->initData.port->RXDOUBLE);
1731 txPort = (
void *)&(handle->initData.port->TXDOUBLE);
1735 rxPort = (
void *)&(handle->initData.port->RXDATA);
1736 txPort = (
void *)&(handle->initData.port->TXDATA);
1741 handle->rxDMASignal,
1752 handle->txDMASignal,
1770 void *rxPort, *txPort;
1771 DMADRV_DataSize_t size;
1773 handle->blockingCompleted =
false;
1774 handle->transferCount = count;
1776 handle->userCallback = callback;
1778 if ( handle->initData.frameLength > 8 )
1787 if ( handle->initData.frameLength > 8 )
1789 rxPort = (
void *)&(handle->initData.port->RXDOUBLE);
1790 txPort = (
void *)&(handle->initData.port->TXDOUBLE);
1794 rxPort = (
void *)&(handle->initData.port->RXDATA);
1795 txPort = (
void *)&(handle->initData.port->TXDATA);
1801 handle->rxDMASignal,
1812 handle->txDMASignal,
1829 if ( handle == NULL )
1840 if ( handle->state != spidrvStateIdle )
1845 handle->state = spidrvStateTransferring;
1858 if ( handle == NULL )
1869 if ( handle->state != spidrvStateIdle )
1874 handle->state = spidrvStateTransferring;
1888 while ( handle->blockingCompleted ==
false )
1890 #if defined( DMA_PRESENT ) && ( DMA_COUNT == 1 )
1892 #elif defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 )
1895 #error "No valid DMA engine defined."
1903 while ( handle->blockingCompleted ==
false );
1907 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
1914 && ( handle->state != spidrvStateIdle ) );
1916 if ( handle->state == spidrvStateIdle )
1918 return handle->transferStatus;
#define ECODE_EMDRV_SPIDRV_ILLEGAL_HANDLE
Illegal SPI handle.
Ecode_t SPIDRV_GetTransferStatus(SPIDRV_Handle_t handle, int *itemsTransferred, int *itemsRemaining)
Get the status of a SPI transfer.
SPIDRV_Type_t type
SPI type, master or slave.
Ecode_t SPIDRV_DeInit(SPIDRV_Handle_t handle)
Deinitialize a SPI driver instance.
Ecode_t SPIDRV_AbortTransfer(SPIDRV_Handle_t handle)
Abort an ongoing SPI transfer.
uint32_t RTCDRV_TimerID_t
Timer ID.
#define ECODE_EMDRV_RTCDRV_OK
Success return value.
Ecode_t SPIDRV_STransferB(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, int timeoutMs)
Start a SPI slave blocking transfer.
Ecode_t DMADRV_PeripheralMemory(unsigned int channelId, DMADRV_PeripheralSignal_t peripheralSignal, void *dst, void *src, bool dstInc, int len, DMADRV_DataSize_t size, DMADRV_Callback_t callback, void *cbUserParam)
Start a peripheral to memory DMA transfer.
Ecode_t SPIDRV_GetBitrate(SPIDRV_Handle_t handle, uint32_t *bitRate)
Get current SPI bus bitrate.
#define USART_CTRL_AUTOCS
void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init)
Init USART for synchronous mode.
#define ECODE_EMDRV_SPIDRV_ABORTED
SPI transfer has been aborted.
Ecode_t SPIDRV_MTransmitB(SPIDRV_Handle_t handle, const void *buffer, int count)
Start a SPI master blocking transmit transfer.
Ecode_t DMADRV_TransferActive(unsigned int channelId, bool *active)
Check if a transfer is running.
#define ECODE_EMDRV_SPIDRV_TIMER_ALLOC_ERROR
Unable to allocated timeout timer.
#define ECODE_EMDRV_SPIDRV_MODE_ERROR
SPI master used slave API or vica versa.
void USART_BaudrateSyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate)
Configure USART operating in synchronous mode to use a given baudrate (or as close as possible to spe...
MSB bit is transmitted first.
Ecode_t SPIDRV_MTransfer(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, SPIDRV_Callback_t callback)
Start a SPI master transfer.
void DMA_IRQHandler(void)
Interrupt handler for DMA cycle completion handling.
Ecode_t SPIDRV_MReceive(SPIDRV_Handle_t handle, void *buffer, int count, SPIDRV_Callback_t callback)
Start a SPI master receive transfer.
SPIDRV_BitOrder_t bitOrder
Bit order on SPI bus, MSB or LSB first.
USART_TypeDef * port
The USART used for SPI.
__STATIC_INLINE uint32_t INT_Enable(void)
Enable interrupts.
Ecode_t SPIDRV_MTransferSingleItemB(SPIDRV_Handle_t handle, uint32_t txValue, void *rxValue)
Start a SPI master blocking single item (frame) transfer.
Ecode_t DMADRV_StopTransfer(unsigned int channelId)
Stop an ongoing DMA transfer.
Ecode_t RTCDRV_AllocateTimer(RTCDRV_TimerID_t *id)
Allocate timer.
#define ECODE_EMDRV_SPIDRV_IDLE
No SPI transfer in progress.
Ecode_t SPIDRV_MTransferB(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count)
Start a SPI master blocking transfer.
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
Universal synchronous/asynchronous receiver/transmitter (USART/UART) peripheral API.
#define ECODE_EMDRV_SPIDRV_DMA_ALLOC_ERROR
Unable to allocated DMA channels.
SPI mode 2: CLKPOL=1, CLKPHA=0.
#define ECODE_EMDRV_SPIDRV_PARAM_ERROR
Illegal input parameter.
uint8_t portLocation
Location number for SPI pins.
uint32_t bitRate
SPI bitrate.
#define _USART_FRAME_DATABITS_SIXTEEN
#define ECODE_EMDRV_SPIDRV_BUSY
The SPI port is busy.
#define ECODE_EMDRV_SPIDRV_OK
Success return value.
Ecode_t SPIDRV_SetFramelength(SPIDRV_Handle_t handle, uint32_t frameLength)
Set SPI framelength.
Ecode_t DMADRV_TransferRemainingCount(unsigned int channelId, int *remaining)
Get number of items remaining in a transfer.
SPI mode 1: CLKPOL=0, CLKPHA=1.
Interrupt enable/disable unit API.
Ecode_t RTCDRV_StopTimer(RTCDRV_TimerID_t id)
Stop a given timer.
Ecode_t RTCDRV_Init(void)
Initialize RTCDRV driver.
#define _USART_FRAME_DATABITS_SHIFT
#define USART_CMD_CLEARRX
void GPIO_PinModeSet(GPIO_Port_TypeDef port, unsigned int pin, GPIO_Mode_TypeDef mode, unsigned int out)
Set the mode for a GPIO pin.
Transfer is started when bus is idle (CS deasserted).
General Purpose IO (GPIO) peripheral API.
#define USART_ROUTE_RXPEN
Ecode_t RTCDRV_FreeTimer(RTCDRV_TimerID_t id)
Free timer.
#define DMADRV_MAX_XFER_COUNT
Maximum length of one DMA transfer.
#define USART_CMD_CLEARTX
void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable)
Enable/disable a clock.
Ecode_t DMADRV_Init(void)
Initialize DMADRV.
Ecode_t SPIDRV_SetBitrate(SPIDRV_Handle_t handle, uint32_t bitRate)
Set SPI bus bitrate.
USART_ClockMode_TypeDef clockMode
Ecode_t SPIDRV_MTransmit(SPIDRV_Handle_t handle, const void *buffer, int count, SPIDRV_Callback_t callback)
Start a SPI master transmit transfer.
#define USART_ROUTE_CLKPEN
#define ECODE_EMDRV_DMADRV_OK
Success return value.
void USART_Reset(USART_TypeDef *usart)
Reset USART/UART to same state as after a HW reset.
Ecode_t DMADRV_DeInit(void)
Deinitialize DMADRV.
#define USART_ROUTE_TXPEN
Ecode_t DMADRV_AllocateChannel(unsigned int *channelId, void *capabilities)
Allocate (reserve) a DMA channel.
Ecode_t RTCDRV_StartTimer(RTCDRV_TimerID_t id, RTCDRV_TimerType_t type, uint32_t timeout, RTCDRV_Callback_t callback, void *user)
Start a timer.
static volatile uint8_t rxBuffer[RXBUFSIZE]
Ecode_t SPIDRV_STransfer(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave transfer.
Ecode_t SPIDRV_STransmitB(SPIDRV_Handle_t handle, const void *buffer, int count, int timeoutMs)
Start a SPI slave blocking transmit transfer.
Ecode_t DMADRV_MemoryPeripheral(unsigned int channelId, DMADRV_PeripheralSignal_t peripheralSignal, void *dst, void *src, bool srcInc, int len, DMADRV_DataSize_t size, DMADRV_Callback_t callback, void *cbUserParam)
Start a memory to peripheral DMA transfer.
SPI mode 0: CLKPOL=0, CLKPHA=0.
Ecode_t SPIDRV_GetFramelength(SPIDRV_Handle_t handle, uint32_t *frameLength)
Get current SPI framelength.
Ecode_t SPIDRV_Init(SPIDRV_Handle_t handle, SPIDRV_Init_t *initData)
Initialize a SPI driver instance.
uint32_t Ecode_t
Typedef for API function errorcode return values.
#define _USART_FRAME_DATABITS_FOUR
Ecode_t SPIDRV_STransmit(SPIDRV_Handle_t handle, const void *buffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave transmit transfer.
#define ECODE_EMDRV_SPIDRV_TIMEOUT
SPI transfer timeout.
Ecode_t DMADRV_TransferCompletePending(unsigned int channelId, bool *pending)
Check if a transfer complete is pending.
CS controlled by SPI driver.
__STATIC_INLINE uint32_t INT_Disable(void)
Disable interrupts.
Ecode_t SPIDRV_SReceive(SPIDRV_Handle_t handle, void *buffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave receive transfer.
#define _USART_FRAME_DATABITS_MASK
#define USART_INITSYNC_DEFAULT
uint32_t USART_BaudrateGet(USART_TypeDef *usart)
Get current baudrate for USART/UART.
__STATIC_INLINE unsigned int GPIO_PinInGet(GPIO_Port_TypeDef port, unsigned int pin)
Read the pad value for a single pin in a GPIO port.
#define USART_ROUTE_CSPEN
void(* SPIDRV_Callback_t)(struct SPIDRV_HandleData *handle, Ecode_t transferStatus, int itemsTransferred)
SPIDRV transfer completion callback function.
SPI mode 3: CLKPOL=1, CLKPHA=1.
Ecode_t SPIDRV_SReceiveB(SPIDRV_Handle_t handle, void *buffer, int count, int timeoutMs)
Start a SPI slave blocking receive transfer.
SPIDRV_HandleData_t * SPIDRV_Handle_t
SPI driver instance handle.
SPIDRV_CsControl_t csControl
Select master mode chip select (CS) control scheme.
SPIDRV_ClockMode_t clockMode
SPI mode, CLKPOL/CLKPHASE setting.
Ecode_t SPIDRV_MReceiveB(SPIDRV_Handle_t handle, void *buffer, int count)
Start a SPI master blocking receive transfer.
Ecode_t DMADRV_FreeChannel(unsigned int channelId)
Free an allocate (reserved) DMA channel.
#define _USART_ROUTE_LOCATION_SHIFT