release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_idac.h

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00001 /**************************************************************************/
00032 /**************************************************************************/
00037 typedef struct
00038 {
00039   __IO uint32_t CTRL;       
00040   __IO uint32_t CURPROG;    
00041   __IO uint32_t CAL;        
00042   __IO uint32_t DUTYCONFIG; 
00043 } IDAC_TypeDef;             
00045 /**************************************************************************/
00050 /* Bit fields for IDAC CTRL */
00051 #define _IDAC_CTRL_RESETVALUE                       0x00000000UL                          
00052 #define _IDAC_CTRL_MASK                             0x0034001FUL                          
00053 #define IDAC_CTRL_EN                                (0x1UL << 0)                          
00054 #define _IDAC_CTRL_EN_SHIFT                         0                                     
00055 #define _IDAC_CTRL_EN_MASK                          0x1UL                                 
00056 #define _IDAC_CTRL_EN_DEFAULT                       0x00000000UL                          
00057 #define IDAC_CTRL_EN_DEFAULT                        (_IDAC_CTRL_EN_DEFAULT << 0)          
00058 #define IDAC_CTRL_CURSINK                           (0x1UL << 1)                          
00059 #define _IDAC_CTRL_CURSINK_SHIFT                    1                                     
00060 #define _IDAC_CTRL_CURSINK_MASK                     0x2UL                                 
00061 #define _IDAC_CTRL_CURSINK_DEFAULT                  0x00000000UL                          
00062 #define IDAC_CTRL_CURSINK_DEFAULT                   (_IDAC_CTRL_CURSINK_DEFAULT << 1)     
00063 #define IDAC_CTRL_MINOUTTRANS                       (0x1UL << 2)                          
00064 #define _IDAC_CTRL_MINOUTTRANS_SHIFT                2                                     
00065 #define _IDAC_CTRL_MINOUTTRANS_MASK                 0x4UL                                 
00066 #define _IDAC_CTRL_MINOUTTRANS_DEFAULT              0x00000000UL                          
00067 #define IDAC_CTRL_MINOUTTRANS_DEFAULT               (_IDAC_CTRL_MINOUTTRANS_DEFAULT << 2) 
00068 #define IDAC_CTRL_OUTEN                             (0x1UL << 3)                          
00069 #define _IDAC_CTRL_OUTEN_SHIFT                      3                                     
00070 #define _IDAC_CTRL_OUTEN_MASK                       0x8UL                                 
00071 #define _IDAC_CTRL_OUTEN_DEFAULT                    0x00000000UL                          
00072 #define IDAC_CTRL_OUTEN_DEFAULT                     (_IDAC_CTRL_OUTEN_DEFAULT << 3)       
00073 #define IDAC_CTRL_OUTMODE                           (0x1UL << 4)                          
00074 #define _IDAC_CTRL_OUTMODE_SHIFT                    4                                     
00075 #define _IDAC_CTRL_OUTMODE_MASK                     0x10UL                                
00076 #define _IDAC_CTRL_OUTMODE_DEFAULT                  0x00000000UL                          
00077 #define _IDAC_CTRL_OUTMODE_PIN                      0x00000000UL                          
00078 #define _IDAC_CTRL_OUTMODE_ADC                      0x00000001UL                          
00079 #define IDAC_CTRL_OUTMODE_DEFAULT                   (_IDAC_CTRL_OUTMODE_DEFAULT << 4)     
00080 #define IDAC_CTRL_OUTMODE_PIN                       (_IDAC_CTRL_OUTMODE_PIN << 4)         
00081 #define IDAC_CTRL_OUTMODE_ADC                       (_IDAC_CTRL_OUTMODE_ADC << 4)         
00082 #define IDAC_CTRL_OUTENPRS                          (0x1UL << 18)                         
00083 #define _IDAC_CTRL_OUTENPRS_SHIFT                   18                                    
00084 #define _IDAC_CTRL_OUTENPRS_MASK                    0x40000UL                             
00085 #define _IDAC_CTRL_OUTENPRS_DEFAULT                 0x00000000UL                          
00086 #define IDAC_CTRL_OUTENPRS_DEFAULT                  (_IDAC_CTRL_OUTENPRS_DEFAULT << 18)   
00087 #define _IDAC_CTRL_PRSSEL_SHIFT                     20                                    
00088 #define _IDAC_CTRL_PRSSEL_MASK                      0x300000UL                            
00089 #define _IDAC_CTRL_PRSSEL_DEFAULT                   0x00000000UL                          
00090 #define _IDAC_CTRL_PRSSEL_PRSCH0                    0x00000000UL                          
00091 #define _IDAC_CTRL_PRSSEL_PRSCH1                    0x00000001UL                          
00092 #define _IDAC_CTRL_PRSSEL_PRSCH2                    0x00000002UL                          
00093 #define _IDAC_CTRL_PRSSEL_PRSCH3                    0x00000003UL                          
00094 #define IDAC_CTRL_PRSSEL_DEFAULT                    (_IDAC_CTRL_PRSSEL_DEFAULT << 20)     
00095 #define IDAC_CTRL_PRSSEL_PRSCH0                     (_IDAC_CTRL_PRSSEL_PRSCH0 << 20)      
00096 #define IDAC_CTRL_PRSSEL_PRSCH1                     (_IDAC_CTRL_PRSSEL_PRSCH1 << 20)      
00097 #define IDAC_CTRL_PRSSEL_PRSCH2                     (_IDAC_CTRL_PRSSEL_PRSCH2 << 20)      
00098 #define IDAC_CTRL_PRSSEL_PRSCH3                     (_IDAC_CTRL_PRSSEL_PRSCH3 << 20)      
00100 /* Bit fields for IDAC CURPROG */
00101 #define _IDAC_CURPROG_RESETVALUE                    0x00000000UL                          
00102 #define _IDAC_CURPROG_MASK                          0x00001F03UL                          
00103 #define _IDAC_CURPROG_RANGESEL_SHIFT                0                                     
00104 #define _IDAC_CURPROG_RANGESEL_MASK                 0x3UL                                 
00105 #define _IDAC_CURPROG_RANGESEL_DEFAULT              0x00000000UL                          
00106 #define _IDAC_CURPROG_RANGESEL_RANGE0               0x00000000UL                          
00107 #define _IDAC_CURPROG_RANGESEL_RANGE1               0x00000001UL                          
00108 #define _IDAC_CURPROG_RANGESEL_RANGE2               0x00000002UL                          
00109 #define _IDAC_CURPROG_RANGESEL_RANGE3               0x00000003UL                          
00110 #define IDAC_CURPROG_RANGESEL_DEFAULT               (_IDAC_CURPROG_RANGESEL_DEFAULT << 0) 
00111 #define IDAC_CURPROG_RANGESEL_RANGE0                (_IDAC_CURPROG_RANGESEL_RANGE0 << 0)  
00112 #define IDAC_CURPROG_RANGESEL_RANGE1                (_IDAC_CURPROG_RANGESEL_RANGE1 << 0)  
00113 #define IDAC_CURPROG_RANGESEL_RANGE2                (_IDAC_CURPROG_RANGESEL_RANGE2 << 0)  
00114 #define IDAC_CURPROG_RANGESEL_RANGE3                (_IDAC_CURPROG_RANGESEL_RANGE3 << 0)  
00115 #define _IDAC_CURPROG_STEPSEL_SHIFT                 8                                     
00116 #define _IDAC_CURPROG_STEPSEL_MASK                  0x1F00UL                              
00117 #define _IDAC_CURPROG_STEPSEL_DEFAULT               0x00000000UL                          
00118 #define IDAC_CURPROG_STEPSEL_DEFAULT                (_IDAC_CURPROG_STEPSEL_DEFAULT << 8)  
00120 /* Bit fields for IDAC CAL */
00121 #define _IDAC_CAL_RESETVALUE                        0x00000000UL                    
00122 #define _IDAC_CAL_MASK                              0x0000007FUL                    
00123 #define _IDAC_CAL_TUNING_SHIFT                      0                               
00124 #define _IDAC_CAL_TUNING_MASK                       0x7FUL                          
00125 #define _IDAC_CAL_TUNING_DEFAULT                    0x00000000UL                    
00126 #define IDAC_CAL_TUNING_DEFAULT                     (_IDAC_CAL_TUNING_DEFAULT << 0) 
00128 /* Bit fields for IDAC DUTYCONFIG */
00129 #define _IDAC_DUTYCONFIG_RESETVALUE                 0x00000000UL                                    
00130 #define _IDAC_DUTYCONFIG_MASK                       0x00000003UL                                    
00131 #define IDAC_DUTYCONFIG_DUTYCYCLEEN                 (0x1UL << 0)                                    
00132 #define _IDAC_DUTYCONFIG_DUTYCYCLEEN_SHIFT          0                                               
00133 #define _IDAC_DUTYCONFIG_DUTYCYCLEEN_MASK           0x1UL                                           
00134 #define _IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT        0x00000000UL                                    
00135 #define IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT         (_IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT << 0)     
00136 #define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS             (0x1UL << 1)                                    
00137 #define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_SHIFT      1                                               
00138 #define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_MASK       0x2UL                                           
00139 #define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT    0x00000000UL                                    
00140 #define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT     (_IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT << 1)