Silicon Labs EFM32 CMSIS File List

Here is a list of all documented files with brief descriptions:
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg108f16.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG108F16
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg108f32.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG108F32
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg108f4.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG108F4
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg108f8.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG108F8
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg110f16.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG110F16
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg110f32.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG110F32
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg110f4.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG110F4
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg110f8.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG110F8
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg210f16.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG210F16
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg210f32.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG210F32
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg210f4.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG210F4
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg210f8.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG210F8
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg222f16.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG222F16
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg222f32.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG222F32
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg222f4.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG222F4
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg222f8.h [code]CMSIS Cortex-M Peripheral Access Layer Header File for EFM32ZG222F8
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_acmp.h [code]EFM32ZG_ACMP register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_adc.h [code]EFM32ZG_ADC register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_aes.h [code]EFM32ZG_AES register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_af_pins.h [code]EFM32ZG_AF_PINS register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_af_ports.h [code]EFM32ZG_AF_PORTS register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_calibrate.h [code]EFM32ZG_CALIBRATE register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_cmu.h [code]EFM32ZG_CMU register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_devinfo.h [code]EFM32ZG_DEVINFO register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_dma.h [code]EFM32ZG_DMA register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_dma_ch.h [code]EFM32ZG_DMA_CH register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_dma_descriptor.h [code]EFM32ZG_DMA_DESCRIPTOR register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_dmactrl.h [code]EFM32ZG_DMACTRL register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_dmareq.h [code]EFM32ZG_DMAREQ register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_emu.h [code]EFM32ZG_EMU register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_gpio.h [code]EFM32ZG_GPIO register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_gpio_p.h [code]EFM32ZG_GPIO_P register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_i2c.h [code]EFM32ZG_I2C register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_idac.h [code]EFM32ZG_IDAC register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_leuart.h [code]EFM32ZG_LEUART register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_msc.h [code]EFM32ZG_MSC register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_pcnt.h [code]EFM32ZG_PCNT register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_prs.h [code]EFM32ZG_PRS register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_prs_ch.h [code]EFM32ZG_PRS_CH register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_prs_signals.h [code]EFM32ZG_PRS_SIGNALS register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_rmu.h [code]EFM32ZG_RMU register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_romtable.h [code]EFM32ZG_ROMTABLE register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_rtc.h [code]EFM32ZG_RTC register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_timer.h [code]EFM32ZG_TIMER register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_timer_cc.h [code]EFM32ZG_TIMER_CC register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_usart.h [code]EFM32ZG_USART register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_vcmp.h [code]EFM32ZG_VCMP register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/efm32zg_wdog.h [code]EFM32ZG_WDOG register and bit field definitions
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/em_device.h [code]CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Include/system_efm32zg.h [code]CMSIS Cortex-M System Layer for EFM32 devices
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Source/system_efm32zg.c [code]CMSIS Cortex-M0+ System Layer for EFM32ZG devices
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Source/GCC/startup_efm32zg.c [code]
release/EM_CMSIS_P1_4.0.0/Device/SiliconLabs/EFM32ZG/Source/IAR/startup_efm32zg.c [code]