This section describes the programming interface of the MPU HAL driver.
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#define | MPU_WORD_LOW_MASTER_SHIFT(n) (n*6) |
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#define | MPU_WORD_LOW_MASTER_MASK(n) (0x1Fu<<MPU_WORD_LOW_MASTER_SHIFT(n)) |
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#define | MPU_WORD_LOW_MASTER_WIDTH 5 |
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#define | MPU_WORD_LOW_MASTER(n, x) (((uint32_t)(((uint32_t)(x))<<MPU_WORD_LOW_MASTER_SHIFT(n)))&MPU_WORD_LOW_MASTER_MASK(n)) |
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#define | MPU_LOW_MASTER_PE_SHIFT(n) (n*6+5) |
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#define | MPU_LOW_MASTER_PE_MASK(n) (0x1u << MPU_LOW_MASTER_PE_SHIFT(n)) |
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#define | MPU_WORD_MASTER_PE_WIDTH 1 |
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#define | MPU_WORD_MASTER_PE(n, x) (((uint32_t)(((uint32_t)(x))<<MPU_LOW_MASTER_PE_SHIFT(n)))&MPU_LOW_MASTER_PE_MASK(n)) |
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#define | MPU_WORD_HIGH_MASTER_SHIFT(n) (n*2+23) |
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#define | MPU_WORD_HIGH_MASTER_MASK(n) (0x03u << MPU_WORD_HIGH_MASTER_SHIFT(n)) |
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#define | MPU_WORD_HIGH_MASTER_WIDTH 2 |
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#define | MPU_WORD_HIGH_MASTER(n, x) (((uint32_t)(((uint32_t)(x))<<MPU_WORD_HIGH_MASTER_SHIFT(n)))&MPU_WORD_HIGH_MASTER_MASK(n)) |
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#define | MPU_WR_WORD_LOW_MASTER(base, index, index2, n, value) (MPU_WR_WORD(base, index, index2, (MPU_RD_WORD(base, index, index2) & ~MPU_WORD_LOW_MASTER_MASK(n)) | MPU_WORD_LOW_MASTER(n, value))) |
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#define | MPU_WR_WORD_PE(base, index, index2, n, value) (MPU_WR_WORD(base, index, index2, (MPU_RD_WORD(base, index, index2) & ~MPU_LOW_MASTER_PE_MASK(n)) | MPU_WORD_MASTER_PE(n, value))) |
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#define | MPU_WR_WORD_HIGH_MASTER(base, index, index2, n, value) (MPU_WR_WORD(base, index, index2, (MPU_RD_WORD(base, index, index2) & ~MPU_WORD_HIGH_MASTER_MASK(n)) | MPU_WORD_HIGH_MASTER(n, value))) |
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#define | MPU_WR_WORD_RGDAAC_LOW_MASTER(base, index, n, value) (MPU_WR_RGDAAC(base, index, (MPU_RD_RGDAAC(base, index) & ~MPU_WORD_LOW_MASTER_MASK(n)) | MPU_WORD_LOW_MASTER(n, value))) |
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#define | MPU_WR_WORD_RGDAAC_PE(base, index, n, value) (MPU_WR_RGDAAC(base, index, (MPU_RD_RGDAAC(base, index) & ~MPU_LOW_MASTER_PE_MASK(n)) | MPU_WORD_MASTER_PE(n, value))) |
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#define | MPU_WR_WORD_RGDAAC_HIGH_MASTER(base, index, n, value) (MPU_WR_RGDAAC(base, index, (MPU_RD_RGDAAC(base, index) & ~MPU_WORD_HIGH_MASTER_MASK(n)) | MPU_WORD_HIGH_MASTER(n, value))) |
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enum | mpu_region_num_t |
| MPU region number region0~region11. More...
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enum | mpu_region_total_num_t {
kMPU8Regions = 0x0U,
kMPU12Regions = 0x1U,
kMPU16Regions = 0x2U
} |
| Descripts the number of MPU regions. More...
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enum | mpu_err_access_type_t {
kMPUErrTypeRead = 0U,
kMPUErrTypeWrite = 1U
} |
| MPU access error. More...
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enum | mpu_err_attributes_t {
kMPUInstructionAccessInUserMode = 0U,
kMPUDataAccessInUserMode = 1U,
kMPUInstructionAccessInSupervisorMode = 2U,
kMPUDataAccessInSupervisorMode = 3U
} |
| MPU access error attributes. More...
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enum | mpu_access_mode_t {
kMPUAccessInUserMode = 0U,
kMPUAccessInSupervisorMode = 1U
} |
| access MPU in which mode. More...
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enum | mpu_master_t {
kMPUMaster0 = 0U,
kMPUMaster1 = 1U,
kMPUMaster2 = 2U,
kMPUMaster3 = 3U,
kMPUMaster4 = 4U,
kMPUMaster5 = 5U,
kMPUMaster6 = 6U
} |
| MPU master number. More...
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enum | mpu_err_access_ctr_t {
kMPUNoRegionHit = 0U,
kMPUNoneOverlappRegion = 1U,
kMPUOverlappRegion = 2U
} |
| MPU error access control detail. More...
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enum | mpu_supervisor_access_rights_t {
kMPUSupervisorReadWriteExecute = 0U,
kMPUSupervisorReadExecute = 1U,
kMPUSupervisorReadWrite = 2U,
kMPUSupervisorEqualToUsermode = 3U
} |
| MPU access rights in supervisor mode for master0~master3. More...
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enum | mpu_user_access_rights_t {
kMPUUserNoAccessRights = 0U,
kMPUUserExecute = 1U,
kMPUUserWrite = 2U,
kMPUUserWriteExecute = 3U,
kMPUUserRead = 4U,
kMPUUserReadExecute = 5U,
kMPUUserReadWrite = 6U,
kMPUUserReadWriteExecute = 7U
} |
| MPU access rights in user mode for master0~master3. More...
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enum | mpu_status_t {
kStatus_MPU_Success = 0x0U,
kStatus_MPU_Fail = 0x1U,
kStatus_MPU_NotInitlialized = 0x2U,
kStatus_MPU_NullArgument = 0x3U
} |
| MPU status return codes. More...
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static void | MPU_HAL_Enable (MPU_Type *base) |
| Enables the MPU module operation. More...
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static void | MPU_HAL_Disable (MPU_Type *base) |
| Disables the MPU module operation. More...
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static bool | MPU_HAL_IsEnable (MPU_Type *base) |
| Checks whether the MPU module is enabled. More...
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void | MPU_HAL_GetHardwareInfo (MPU_Type *base, mpu_hardware_info_t *infoPtr) |
| Gets MPU basic hardware info. More...
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void | MPU_HAL_GetDetailErrorAccessInfo (MPU_Type *base, mpu_access_err_info_t *errInfoArrayPtr) |
| Gets MPU derail error access info. More...
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void | MPU_HAL_SetRegionAddr (MPU_Type *base, mpu_region_num_t regionNum, uint32_t startAddr, uint32_t endAddr) |
| Sets region start and end address. More...
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void | MPU_HAL_SetLowMasterAccessRights (MPU_Type *base, mpu_region_num_t regionNum, mpu_master_t masterNum, const mpu_low_masters_access_rights_t *accessRightsPtr) |
| Configures low master0~3 access permission for a specific region. More...
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void | MPU_HAL_SetHighMasterAccessRights (MPU_Type *base, mpu_region_num_t regionNum, mpu_master_t masterNum, const mpu_high_masters_access_rights_t *accessRightsPtr) |
| Sets high master access permission for a specific region. More...
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static void | MPU_HAL_SetRegionValidCmd (MPU_Type *base, mpu_region_num_t regionNum, bool enable) |
| Sets the region valid value. More...
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void | MPU_HAL_SetLowMasterAccessRightsByAlternateReg (MPU_Type *base, mpu_region_num_t regionNum, mpu_master_t masterNum, const mpu_low_masters_access_rights_t *accessRightsPtr) |
| Configures low master0~3 access permission for a specific region. More...
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void | MPU_HAL_SetHighMasterAccessRightsByAlternateReg (MPU_Type *base, mpu_region_num_t regionNum, mpu_master_t masterNum, const mpu_high_masters_access_rights_t *accessRightsPtr) |
| Sets high master access permission for a specific region. More...
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void | MPU_HAL_SetRegionConfig (MPU_Type *base, const mpu_region_config_t *regionConfigPtr) |
| Configures the MPU region. More...
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void | MPU_HAL_Init (MPU_Type *base) |
| Initializes the MPU module. More...
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