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Kinetis SDK v.1.2 API Reference Manual
Rev. 0
Freescale Semiconductor, Inc.
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The section describes the enumerations, macros and data structures for KL03Z4 SIM HAL driver.
Files | |
file | fsl_sim_hal_MKL03Z4.h |
Macros | |
#define | FSL_SIM_SCGC_BIT(SCGCx, n) (((SCGCx-1U)<<5U) + n) |
SIM SCGC bit index. More... | |
Enumerations | |
enum | clock_cop_src_kl03z4_t { kClockCopSrcLpoClk, kClockCopSrcMcgIrClk, kClockCopSrcOsc0erClk, kClockCopSrcBusClk } |
COP clock source selection. More... | |
enum | clock_er32k_src_kl03z4_t { kClockEr32kSrcOsc0 = 0U, kClockEr32kSrcRtc = 2U, kClockEr32kSrcLpo = 3U } |
SIM external reference clock source select (OSC32KSEL). More... | |
enum | clock_osc32kout_sel_kl03z4_t { kClockOsc32koutNone, kClockOsc32koutPtb13 } |
SIM external reference clock output pin select (OSC32KOUT). More... | |
enum | clock_lpuart_src_kl03z4_t { kClockLpuartSrcNone, kClockLpuartSrcIrc48M, kClockLpuartSrcOsc0erClk, kClockLpuartSrcMcgIrClk } |
SIM LPUART0 clock source. More... | |
enum | clock_tpm_src_kl03z4_t { kClockTpmSrcNone, kClockTpmSrcIrc48M, kClockTpmSrcOsc0erClk, kClockTpmSrcMcgIrClk } |
SIM TPM clock source. More... | |
enum | clock_lptmr_src_kl03z4_t { kClockLptmrSrcMcgIrClk, kClockLptmrSrcLpoClk, kClockLptmrSrcEr32kClk, kClockLptmrSrcOsc0erClk } |
LPTMR clock source select. More... | |
enum | clock_clkout_src_kl03z4_t { kClockClkoutSelFlashClk = 2U, kClockClkoutSelLpoClk = 3U, kClockClkoutSelMcgIrClk = 4U, kClockClkoutSelOsc0erClk = 6U, kClockClkoutSelIrc48M = 7U } |
SIM CLKOUT_SEL clock source select. More... | |
enum | clock_rtcout_src_kl03z4_t { kClockRtcoutSrc1Hz, kClockRtcoutSrcOsc0erClk } |
SIM RTCCLKOUTSEL clock source select. More... | |
enum | sim_adc_pretrg_sel_kl03z4_t { kSimAdcPretrgselA, kSimAdcPretrgselB } |
SIM ADCx pre-trigger select. More... | |
enum | sim_adc_trg_sel_kl03z4_t { kSimAdcTrgselExt = 0U, kSimAdcTrgSelHighSpeedComp0 = 1U, kSimAdcTrgSelTpm0 = 8U, kSimAdcTrgSelTpm1 = 9U, kSimAdcTrgSelRtcAlarm = 12U, kSimAdcTrgSelRtcSec = 13U, kSimAdcTrgSelLptimer = 14U } |
SIM ADCx trigger select. More... | |
enum | sim_lpuart_rxsrc_kl03z4_t { kSimLpuartRxsrcPin, kSimLpuartRxsrcCmp0 } |
SIM LPUART receive data source select. More... | |
enum | sim_lpuart_txsrc_kl03z4_t { kSimLpuartTxsrcPin, kSimLpuartTxsrcFtm1 } |
SIM LPUART transmit data source select. More... | |
enum | sim_tpm_clk_sel_kl03z4_t { kSimTpmClkSel0, kSimTpmClkSel1 } |
SIM Timer/PWM external clock select. More... | |
enum | sim_tpm_ch_src_kl03z4_t { kSimTpmChSrc0, kSimTpmChSrc1 } |
SIM Timer/PWM x channel y input capture source select. More... | |
enum | sim_ptd7pad_strengh_kl03z4_t { kSimPtd7padSinglePad, kSimPtd7padDualPad } |
SIM PTD7 pad drive strength. More... | |
enum | sim_clock_gate_name_kl03z4_t { kSimClockGateI2c0 = FSL_SIM_SCGC_BIT(4U, 6U), kSimClockGateCmp0 = FSL_SIM_SCGC_BIT(4U, 19U), kSimClockGateVref0 = FSL_SIM_SCGC_BIT(4U, 20U), kSimClockGateSpi0 = FSL_SIM_SCGC_BIT(4U, 22U), kSimClockGateLptmr0 = FSL_SIM_SCGC_BIT(5U, 0U), kSimClockGatePortA = FSL_SIM_SCGC_BIT(5U, 9U), kSimClockGatePortB = FSL_SIM_SCGC_BIT(5U, 10U), kSimClockGateLpuart0 = FSL_SIM_SCGC_BIT(5U, 20U), kSimClockGateFtf0 = FSL_SIM_SCGC_BIT(6U, 0U), kSimClockGateTpm0 = FSL_SIM_SCGC_BIT(6U, 24U), kSimClockGateTpm1 = FSL_SIM_SCGC_BIT(6U, 25U), kSimClockGateAdc0 = FSL_SIM_SCGC_BIT(6U, 27U), kSimClockGateRtc0 = FSL_SIM_SCGC_BIT(6U, 29U) } |
Clock gate name used for SIM_HAL_EnableClock/SIM_HAL_DisableClock. More... | |
#define FSL_SIM_SCGC_BIT | ( | SCGCx, | |
n | |||
) | (((SCGCx-1U)<<5U) + n) |