File System Component  Version 5.0
MDK-Professional Middleware for Devices with Flash File System
 All Data Structures Files Functions Variables Enumerations Enumerator Macros Groups Pages
fs_config.h
Go to the documentation of this file.
1 /*------------------------------------------------------------------------------
2  * MDK Middleware - Component ::File System
3  * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
4  *------------------------------------------------------------------------------
5  * Name: fs_config.h
6  * Purpose: File System Library Configuration
7  * Rev.: V5.04
8  *----------------------------------------------------------------------------*/
9 
10 #include <absacc.h>
11 #include <string.h>
12 #include <rt_sys.h>
13 #include "rl_fs_lib.h"
14 
15 #pragma thumb
16 #pragma O3
17 
18 /*-----------------------------------------------------------------------------
19  * File System Configuration File
20  *----------------------------------------------------------------------------*/
21 
22 #ifdef __MICROLIB
23  #error "File System does not work with MicroLIB"
24 #endif
25 
26 /* ---------------------------------------------------------------------------*/
27 
28 #ifndef NOR0_ENABLE
29  #define NOR0_ENABLE 0
30  #define NOR0_DEFAULT_DRIVE 0
31 #endif
32 
33 #ifndef NOR1_ENABLE
34  #define NOR1_ENABLE 0
35  #define NOR1_DEFAULT_DRIVE 0
36 #endif
37 
38 #ifndef RAM0_ENABLE
39  #define RAM0_ENABLE 0
40  #define RAM0_DEFAULT_DRIVE 0
41 #endif
42 
43 /* If MC0 drive not defined */
44 #ifndef MC0_ENABLE
45  #define MC0_ENABLE 0
46  #define MC0_DEFAULT_DRIVE 0
47 #endif
48 
49 /* If MC1 drive not defined */
50 #ifndef MC1_ENABLE
51  #define MC1_ENABLE 0
52  #define MC1_DEFAULT_DRIVE 0
53 #endif
54 
55 /* If NAND0 drive not defined */
56 #ifndef NAND0_ENABLE
57  #define NAND0_ENABLE 0
58  #define NAND0_DEFAULT_DRIVE 0
59 #endif
60 
61 /* If NAND1 drive not defined */
62 #ifndef NAND1_ENABLE
63  #define NAND1_ENABLE 0
64  #define NAND1_DEFAULT_DRIVE 0
65 #endif
66 
67 /* If USB0 drive not defined */
68 #ifndef USB0_ENABLE
69  #define USB0_ENABLE 0
70  #define USB0_DEFAULT_DRIVE 0
71 #endif
72 
73 /* If USB1 drive not defined */
74 #ifndef USB1_ENABLE
75  #define USB1_ENABLE 0
76  #define USB1_DEFAULT_DRIVE 0
77 #endif
78 
79 /* ---------------------------------------------------------------------------*/
80 
81 /* Check number of enabled drives */
82 #define FS_NDRV (NOR0_ENABLE + NOR1_ENABLE + \
83  RAM0_ENABLE + \
84  MC0_ENABLE + MC1_ENABLE + \
85  USB0_ENABLE + USB1_ENABLE + \
86  NAND0_ENABLE + NAND1_ENABLE)
87 #if (FS_NDRV == 0)
88  #error "No drive enabled, File System requires at least on component ::File System:Drive"
89 #endif
90 
91 /* Count number of enabled FAT drives */
92 #define FS_FAT_NDRV (RAM0_ENABLE \
93  MC0_ENABLE + MC1_ENABLE + \
94  USB0_ENABLE + USB1_ENABLE + \
95  NAND0_ENABLE + NAND1_ENABLE)
96 
97 /* Count number of enabled NAND devices */
98 #define FS_NAND_NDRV (NAND0_ENABLE + NAND1_ENABLE)
99 
100 /* Check Default drive settings */
101 #define __DEF ((NOR0_DEFAULT_DRIVE & NOR0_ENABLE) + \
102  (NOR1_DEFAULT_DRIVE & NOR1_ENABLE) + \
103  (RAM0_DEFAULT_DRIVE & RAM0_ENABLE) + \
104  (MC0_DEFAULT_DRIVE & MC0_ENABLE) + \
105  (MC1_DEFAULT_DRIVE & MC1_ENABLE) + \
106  (USB0_DEFAULT_DRIVE & USB0_ENABLE) + \
107  (USB1_DEFAULT_DRIVE & USB1_ENABLE) + \
108  (NAND0_DEFAULT_DRIVE & NAND0_ENABLE) + \
109  (NAND1_DEFAULT_DRIVE & NAND1_ENABLE))
110 #if (__DEF == 0)
111  #error "Default ::File System:Drive not specified"
112 #elif (__DEF > 1)
113  #error "Multiple default ::File System:Drive: enabled"
114 #endif
115 
116 /* Check MCI port consistency */
117 #if (MC0_ENABLE && MC1_ENABLE)
118  #if (MC0_MCI_DRIVER == MC1_MCI_DRIVER)
119  #error "::File System:Drive:Memory Card: MCI ports for different drives must be different"
120  #endif
121 #endif
122 
123 /* Check FS usage */
124 #define EFS_USE (NOR0_ENABLE + NOR1_ENABLE)
125 #define FAT_USE (RAM0_ENABLE + MC0_ENABLE + MC1_ENABLE + USB0_ENABLE + USB1_ENABLE + NAND0_ENABLE + NAND1_ENABLE)
126 
127 /* Check journal usage */
128 #define FSJ_USE (MC0_ENABLE * MC0_FAT_JOURNAL + \
129  MC1_ENABLE * MC1_FAT_JOURNAL + \
130  USB0_ENABLE * USB0_FAT_JOURNAL + \
131  USB1_ENABLE * USB1_FAT_JOURNAL + \
132  NAND0_ENABLE * NAND0_FAT_JOURNAL + \
133  NAND1_ENABLE * NAND1_FAT_JOURNAL)
134 
135 /* Reserved sector count */
136 #define FAT_SECT_RSVD 64
137 
138 /* Make sure to resolve a weak stdlib symbol. */
139 #ifdef __RTX
140 extern volatile int _stream_list_lock;
141  #define STREAM_LIST_LOCK _stream_list_lock;
142 #else
143  #define STREAM_LIST_LOCK
144 #endif
145 
146 /* Memory resources allocated by the Flash File System */
147 struct iob _iob[NUM_FILES];
148 
149 /* Exported Defines to other modules */
150 uint16_t const _NFILE = NUM_FILES;
151 uint16_t const _NDRV = FS_NDRV;
152 
153 /*----------------------------------------------------------------------------
154  * FAT Name Cache definition and configuration
155  *---------------------------------------------------------------------------*/
156 #if (FAT_NAME_CACNT == 0)
157  FAT_NCACHE_CFG fat_ncache = {
158  0, 0, 0, NULL
159  };
160 #else
161  #if (FAT_NAME_RELOC == 1)
162  #define __AT_FAT_NAME __at(FAT_NAME_CADR)
163  #else
164  #define __AT_FAT_NAME
165  #endif
166 
167  /* FAT name cache max folder depth */
168  #define FAT_NAME_MAX_DEPTH 8
169 
170  /* FAT name cache control block size and count */
171  #define FAT_NAME_CB_SZ (16)
172  #define FAT_NAME_CB_POOL_SZ (FAT_NAME_CB_SZ * FS_FAT_NDRV)
173 
174  /* FAT name cache folder depth control block size */
175  #define FAT_NAME_DEPTH_CB_SZ (8)
176  #define FAT_NAME_DEPTH_POOL_SZ (FAT_NAME_DEPTH_CB_SZ * FAT_NAME_MAX_DEPTH)
177 
178  /* FAT name cache pool size */
179  #define FAT_NAME_LINK_SZ (48)
180  #define FAT_NAME_LINK_POOL_SZ (FAT_NAME_LINK_SZ * FAT_NAME_CACNT)
181 
182  /* FAT name cache buffer size in bytes */
183  #define FAT_NAME_CACHE_SZ (FAT_NAME_CB_POOL_SZ + \
184  FAT_NAME_DEPTH_POOL_SZ + \
185  FAT_NAME_LINK_POOL_SZ)
186 
187  uint32_t fat_name_pool[FAT_NAME_CACHE_SZ/4] __AT_FAT_NAME;
188 
189  FAT_NCACHE_CFG fat_ncache = {
190  FAT_NAME_MAX_DEPTH,
191  FS_FAT_NDRV,
192  FAT_NAME_CACHE_SZ,
193  fat_name_pool
194  };
195 #endif /* FAT_NAME_CACNT */
196 
197 #define EXPAND_SYMBOL(name, port) name##port
198 #define CREATE_SYMBOL(name, port) EXPAND_SYMBOL(name, port)
199 
200 /*----------------------------------------------------------------------------
201  * Drive F0: NOR Flash device NOR0 configuration
202  *---------------------------------------------------------------------------*/
203 #if (NOR0_ENABLE)
204  static EFS_VI nor0_vol;
205 
206  extern ARM_DRIVER_NOR CREATE_SYMBOL (Driver_NOR_, NOR0_NAME);
207  extern ARM_NOR_DEVICE CREATE_SYMBOL (NOR_Device_, NOR0_NAME);
208 
209  #if (NOR0_SPI)
210  extern ARM_DRIVER_SPI CREATE_SYMBOL (Driver_SPI, NOR0_SPI_DRIVER);
211  ARM_DRIVER_SPI *CREATE_SYMBOL (NOR_SPI_Driver_, NOR0_NAME) = &CREATE_SYMBOL (Driver_SPI, NOR0_SPI_DRIVER);
212  #endif
213 #endif
214 
215 /*----------------------------------------------------------------------------
216  * Drive F1: NOR Flash device NOR1 configuration
217  *---------------------------------------------------------------------------*/
218 #if (NOR1_ENABLE)
219  static EFS_VI nor1_vol;
220 
221  extern ARM_DRIVER_NOR CREATE_SYMBOL (Driver_NOR_, NOR1_NAME);
222  extern ARM_NOR_DEVICE CREATE_SYMBOL (NOR_Device_, NOR1_NAME);
223 
224  #if (NOR1_SPI)
225  extern ARM_DRIVER_SPI CREATE_SYMBOL (Driver_SPI, NOR1_SPI_DRIVER);
226  ARM_DRIVER_SPI *CREATE_SYMBOL (NOR_SPI_Driver_, NOR1_NAME) = &CREATE_SYMBOL (Driver_SPI, NOR1_SPI_DRIVER);
227  #endif
228 #endif
229 
230 /*----------------------------------------------------------------------------
231  * Drive M0: Memory Card device MC0 configuration
232  *---------------------------------------------------------------------------*/
233 #if (MC0_ENABLE)
234  static FAT_VI mc0_vol;
235  static MCI_DEV mc0_dev;
236 
237  #if (MC0_FAT_JOURNAL)
238  static FSJOUR mc0_fsj;
239  #endif
240 
241  extern ARM_DRIVER_MCI CREATE_SYMBOL (Driver_MCI, MC0_MCI_DRIVER);
242 
243  #if (MC0_CACHE_RELOC == 1)
244  #define __AT_MC0 __at(MC0_CACHE_ADDR)
245  #else
246  #define __AT_MC0
247  #endif
248 
249  /* MC0 Cache Buffer for Data and FAT Caching */
250  static uint32_t mc0_cache[(MC0_CACHE_SIZE+1) * 256 + MC0_FAT_JOURNAL * 128] __AT_MC0;
251 
252  #if (MC0_SPI == 0)
253  /* SD Native bus mode */
254  #define MC0_INIT(m) mc_mci_Init (m, &mc0_dev)
255  #define MC0_UNINIT(m) mc_mci_UnInit (m, &mc0_dev)
256  #define MC0_RDSEC(s,b,c) mc_mci_ReadSector (s, b, c, &mc0_dev)
257  #define MC0_WRSEC(s,b,c) mc_mci_WriteSector (s, b, c, &mc0_dev)
258  #define MC0_RDINFO(i) mc_mci_ReadInfo (i, &mc0_dev)
259  #define MC0_DEVCTRL(c,p) mc_mci_DevCtrl (c, p, &mc0_dev)
260  #else
261  /* SPI bus mode */
262  #define MC0_INIT(m) mc_spi_Init (m, &mc0_dev)
263  #define MC0_UNINIT(m) mc_spi_UnInit (m, &mc0_dev)
264  #define MC0_RDSEC(s,b,c) mc_spi_ReadSector (s, b, c, &mc0_dev)
265  #define MC0_WRSEC(s,b,c) mc_spi_WriteSector (s, b, c, &mc0_dev)
266  #define MC0_RDINFO(i) mc_spi_ReadInfo (i, &mc0_dev)
267  #define MC0_DEVCTRL(c,p) mc_spi_DevCtrl (c, p, &mc0_dev)
268 
269  extern ARM_DRIVER_SPI CREATE_SYMBOL (Driver_SPI, MC0_SPI_DRIVER);
270  #endif
271 
272  /* MC0 wrapper functions */
273  static uint32_t mc0_Init (uint32_t mode) {
274  return (MC0_INIT (mode));
275  }
276  static uint32_t mc0_UnInit (uint32_t mode) {
277  return (MC0_UNINIT (mode));
278  }
279  static uint32_t mc0_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
280  return (MC0_RDSEC (sect, buf, cnt));
281  }
282  static uint32_t mc0_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
283  return (MC0_WRSEC (sect, buf, cnt));
284  }
285  static uint32_t mc0_RdInfo (fsMediaInfo *info) {
286  return (MC0_RDINFO (info));
287  }
288  static fsStatus mc0_DevCtrl (fsDevCtrlCode code, void *p) {
289  return (MC0_DEVCTRL (code, p));
290  }
291 
292  /* MC0 FAT device driver */
293  FAT_DRV mc0_drv = {
294  mc0_Init,
295  mc0_UnInit,
296  mc0_RdSect,
297  mc0_WrSect,
298  mc0_RdInfo,
299  mc0_DevCtrl
300  };
301 
302  /* ------- MC0 MCI/SPI Callback ------- */
303  static void MC0_MCI_SignalEvent (ARM_MCI_EVENT event) {
304  mc_mci_DrvEvent (event, &mc0_dev);
305  }
306  #if (MC0_SPI != 0)
307  static void MC0_SPI_SignalEvent (ARM_SPI_EVENT event) {
308  mc_spi_DrvEvent (event, &mc0_dev);
309  }
310  #endif
311 #endif
312 
313 /*----------------------------------------------------------------------------
314  * Drive M1: Memory Card device MC1 configuration
315  *---------------------------------------------------------------------------*/
316 #if (MC1_ENABLE)
317  static FAT_VI mc1_vol;
318  static MCI_DEV mc1_dev;
319 
320  #if (MC1_FAT_JOURNAL)
321  static FSJOUR mc1_fsj;
322  #endif
323 
324  extern ARM_DRIVER_MCI CREATE_SYMBOL (Driver_MCI, MC1_MCI_DRIVER);
325 
326  #if (MC1_CACHE_RELOC == 1)
327  #define __AT_MC1 __at(MC1_CACHE_ADDR)
328  #else
329  #define __AT_MC1
330  #endif
331 
332  /* MC1 Cache Buffer for Data and FAT Caching */
333  static uint32_t mc1_cache[(MC1_CACHE_SIZE+1) * 256 + MC1_FAT_JOURNAL * 128] __AT_MC1;
334 
335  #if (MC1_SPI == 0)
336  /* SD Native bus mode */
337  #define MC1_INIT(m) mc_mci_Init (m, &mc1_dev)
338  #define MC1_UNINIT(m) mc_mci_UnInit (m, &mc1_dev)
339  #define MC1_RDSEC(s,b,c) mc_mci_ReadSector (s, b, c, &mc1_dev)
340  #define MC1_WRSEC(s,b,c) mc_mci_WriteSector (s, b, c, &mc1_dev)
341  #define MC1_RDINFO(i) mc_mci_ReadInfo (i, &mc1_dev)
342  #define MC1_DEVCTRL(c,p) mc_mci_DevCtrl (c, p, &mc1_dev)
343  #else
344  /* SPI bus mode */
345  #define MC1_INIT(m) mc_spi_Init (m, &mc1_dev)
346  #define MC1_UNINIT(m) mc_spi_UnInit (m, &mc1_dev)
347  #define MC1_RDSEC(s,b,c) mc_spi_ReadSector (s, b, c, &mc1_dev)
348  #define MC1_WRSEC(s,b,c) mc_spi_WriteSector (s, b, c, &mc1_dev)
349  #define MC1_RDINFO(i) mc_spi_ReadInfo (i, &mc1_dev)
350  #define MC1_DEVCTRL(c,p) mc_spi_DevCtrl (c, p, &mc1_dev)
351 
352  extern ARM_DRIVER_SPI CREATE_SYMBOL (Driver_SPI, MC1_SPI_DRIVER);
353  #endif
354 
355  /* MC1 wrapper functions */
356  static uint32_t mc1_Init (uint32_t mode) {
357  return (MC1_INIT (mode));
358  }
359  static uint32_t mc1_UnInit (uint32_t mode) {
360  return (MC1_UNINIT (mode));
361  }
362  static uint32_t mc1_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
363  return (MC1_RDSEC (sect, buf, cnt));
364  }
365  static uint32_t mc1_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
366  return (MC1_WRSEC (sect, buf, cnt));
367  }
368  static uint32_t mc1_RdInfo (fsMediaInfo *info) {
369  return (MC1_RDINFO (info));
370  }
371  static fsStatus mc1_DevCtrl (fsDevCtrlCode code, void *p) {
372  return (MC1_DEVCTRL (code, p));
373  }
374 
375  /* MC1 FAT device driver */
376  FAT_DRV mc1_drv = {
377  mc1_Init,
378  mc1_UnInit,
379  mc1_RdSect,
380  mc1_WrSect,
381  mc1_RdInfo,
382  mc1_DevCtrl
383  };
384 
385  /* ------- MC1 MCI/SPI Callback ------- */
386  static void MC1_MCI_SignalEvent (ARM_MCI_EVENT event) {
387  mc_mci_DrvEvent (event, &mc1_dev);
388  }
389  #if (MC1_SPI != 0)
390  static void MC1_SPI_SignalEvent (ARM_SPI_EVENT event) {
391  mc_spi_DrvEvent (event, &mc1_dev);
392  }
393  #endif
394 #endif
395 
396 /*----------------------------------------------------------------------------
397  * General NAND Flash device configuration
398  *---------------------------------------------------------------------------*/
399 #ifdef RTE_FileSystem_Drive_NAND_0
400  #if (NAND0_ENABLE)
401  #define NAND_INFO_0_DEV_0
402 
403  #if ((NAND1_ENABLE) && (NAND1_DRIVER == NAND0_DRIVER))
404  #if (NAND1_DEV_NUM == NAND0_DEV_NUM)
405  #error "::File System:Drive:NAND: NAND ports for different drives must be different"
406  #endif
407  #define NAND_INFO_0_DEV_1
408  #endif
409  #endif
410 #endif
411 
412 #ifdef RTE_FileSystem_Drive_NAND_1
413  #if (((NAND0_ENABLE == 0) && NAND1_ENABLE) || ((NAND0_ENABLE && NAND1_ENABLE) && (NAND1_DRIVER != NAND0_DRIVER)))
414  #define NAND_INFO_1_DEV_0
415  #endif
416 #endif
417 
418 #if (NAND0_ENABLE)
419  static FAT_VI nand0_vol;
420  static NAND_FTL_DEV nand0_dev;
421 
422  #if (NAND0_FAT_JOURNAL)
423  static FSJOUR nand0_fsj;
424  #endif
425 
426  extern ARM_DRIVER_NAND CREATE_SYMBOL (Driver_NAND, NAND0_DRIVER);
427 #endif
428 
429 #if (NAND1_ENABLE)
430  static FAT_VI nand1_vol;
431  static NAND_FTL_DEV nand1_dev;
432 
433  #if (NAND1_FAT_JOURNAL)
434  static FSJOUR nand1_fsj;
435  #endif
436 
437  #if defined(NAND_INFO_1_DEV_0)
438  extern ARM_DRIVER_NAND CREATE_SYMBOL (Driver_NAND, NAND1_DRIVER);
439  #endif
440 #endif
441 
442 #if defined(NAND_INFO_0_DEV_0)
443  #define NAND0_EVENT_HANDLER NAND_SignalEventHandler0
444  #if defined(NAND_INFO_0_DEV_1)
445  #define NAND1_EVENT_HANDLER NAND_SignalEventHandler0
446  #endif
447 
448  void NAND_SignalEventHandler0 (uint32_t dev_num) {
449  switch (dev_num) {
450  case NAND0_DEV_NUM: ftl_DrvEvent (&nand0_dev); break;
451 
452  #if defined(NAND_INFO_0_DEV_1)
453  case NAND1_DEV_NUM: ftl_DrvEvent (&nand1_dev); break;
454  #endif
455 
456  default: return;
457  }
458  }
459 
460  ARM_NAND_DEVICE NAND_DevInfo0[] = {
461  {&nand0_dev.PgLay,
462  NAND0_TYPE,
463  NAND0_DEV_NUM,
464  NAND0_PAGE_SIZE,
465  NAND0_BLOCK_COUNT,
466  NAND0_PAGE_COUNT,
467  NAND_SEC_BLOCK (NAND0_PAGE_COUNT, NAND0_PAGE_SIZE),
468  NAND_SEC_PAGE (NAND0_PAGE_SIZE),
469  NAND_ROW_CYCLES (NAND0_BLOCK_COUNT, NAND0_PAGE_COUNT),
470  NAND_COL_CYCLES (NAND0_PAGE_SIZE),
471  NAND0_SW_ECC
472  },
473  #if defined(NAND_INFO_0_DEV_1)
474  {&nand1_dev.PgLay,
475  NAND1_TYPE,
476  NAND1_DEV_NUM,
477  NAND1_PAGE_SIZE,
478  NAND1_BLOCK_COUNT,
479  NAND1_PAGE_COUNT,
480  NAND_SEC_BLOCK (NAND1_PAGE_COUNT, NAND1_PAGE_SIZE),
481  NAND_SEC_PAGE (NAND1_PAGE_SIZE),
482  NAND_ROW_CYCLES (NAND1_BLOCK_COUNT, NAND1_PAGE_COUNT),
483  NAND_COL_CYCLES (NAND1_PAGE_SIZE),
484  NAND1_SW_ECC
485  },
486  #endif
487  };
488  #define NAND_INFO0 NAND_DevInfo0
489  #define NAND_INFO0_SZ (sizeof(NAND_DevInfo0) / sizeof(NAND_DevInfo0[0]))
490 #else
491  #define NAND_INFO0 NULL
492  #define NAND_INFO0_SZ 0
493 #endif
494 
495 #if defined(NAND_INFO_1_DEV_0)
496  #define NAND1_EVENT_HANDLER NAND_SignalEventHandler1
497 
498  void NAND_SignalEventHandler1 (uint32_t dev_num) {
499  switch (dev_num) {
500  case NAND1_DEV_NUM: ftl_DrvEvent (&nand1_dev); break;
501 
502  default: return;
503  }
504  }
505 
506  ARM_NAND_DEVICE NAND_DevInfo1[] = {
507  {&nand1_dev.PgLay,
508  NAND1_TYPE,
509  NAND1_DEV_NUM,
510  NAND1_PAGE_SIZE,
511  NAND1_BLOCK_COUNT,
512  NAND1_PAGE_COUNT,
513  NAND_SEC_BLOCK (NAND1_PAGE_COUNT, NAND1_PAGE_SIZE),
514  NAND_SEC_PAGE (NAND1_PAGE_SIZE),
515  NAND_ROW_CYCLES (NAND1_BLOCK_COUNT, NAND1_PAGE_COUNT),
516  NAND_COL_CYCLES (NAND1_PAGE_SIZE),
517  NAND1_SW_ECC
518  },
519  };
520  #define NAND_INFO1 NAND_DevInfo1
521  #define NAND_INFO1_SZ (sizeof(NAND_DevInfo1) / sizeof(NAND_DevInfo1[0]))
522 #else
523  #define NAND_INFO1 NULL
524  #define NAND_INFO1_SZ 0
525 #endif
526 
527 /*----------------------------------------------------------------------------
528  * Drive N0: NAND Flash device NAND0 configuration
529  *---------------------------------------------------------------------------*/
530 #if (NAND0_ENABLE)
531  #if (NAND0_CACHE_RELOC == 1)
532  #define __AT_NAND0 __at(NAND0_CACHE_ADDR)
533  #else
534  #define __AT_NAND0
535  #endif
536 
537  /* NAND Cache Buffer for FAT, Page and Block Caching */
538  #define NAND0_CSZ ((NAND0_CACHE_SIZE + 1) * 1024 + \
539  (NAND0_PAGE_CACHE + 2) * NAND0_PAGE_SIZE + \
540  (NAND0_BLOCK_CACHE + 2) * NAND0_PAGE_COUNT)
541  #define NAND0_FSJBUF (NAND0_FAT_JOURNAL * 512)
542 
543  static uint32_t nand0_cache[NAND0_CSZ/4 + NAND0_FSJBUF/4] __AT_NAND0;
544  static PAGE_CACHE nand0_capg [NAND0_PAGE_CACHE + 1];
545  static BLOCK_CACHE nand0_cabl [NAND0_BLOCK_CACHE + 2];
546  static uint32_t nand0_ttsn [NAND_TSN_SIZE(NAND0_BLOCK_COUNT, NAND0_PAGE_SIZE)];
547 
548  /* NAND Flash Configuration */
549  static NAND_FTL_CFG nand0_cfg = {
550  /* Block Translation Table Space */
551  1,
552  NAND_BTT_SIZE (NAND0_BLOCK_COUNT),
553 
554  /* Data Space */
555  NAND_BTT_SIZE (NAND0_BLOCK_COUNT) + 1,
556  NAND0_BLOCK_COUNT - 1,
557 
558  /* Caching */
559  NAND0_BLOCK_CACHE + 2,
560  NAND0_PAGE_CACHE + 1,
561  NAND_TSN_SIZE(NAND0_BLOCK_COUNT, NAND0_PAGE_SIZE),
562 
563  /* Page buffer & Caches */
564  (uint8_t *)&nand0_cache[(NAND0_CACHE_SIZE+1)*256],
565  &nand0_cabl[0],
566  (uint8_t *)&nand0_cache[(NAND0_CACHE_SIZE+1)*256+(NAND0_PAGE_CACHE+2)*NAND0_PAGE_SIZE/4],
567  &nand0_capg[0],
568  (uint8_t *)&nand0_cache[(NAND0_CACHE_SIZE+1)*256+NAND0_PAGE_SIZE/4],
569  &nand0_ttsn[0]
570  };
571 
572  /* NAND0 wrapper functions */
573  static uint32_t nand0_Init (uint32_t mode) {
574  return (ftl_Init (mode, &nand0_dev, NAND_INFO0, NAND_INFO0_SZ));
575  }
576  static uint32_t nand0_UnInit (uint32_t mode) {
577  return (ftl_UnInit (mode, &nand0_dev));
578  }
579  static uint32_t nand0_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
580  uint32_t retv = ftl_ReadSect (sect, buf, cnt, &nand0_dev);
581  if (retv < 2) return (true);
582  else return (false);
583  }
584  static uint32_t nand0_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
585  uint32_t retv = ftl_WriteSect (sect, buf, cnt, &nand0_dev);
586  if (retv < 2) return (true);
587  else return (false);
588  }
589  static uint32_t nand0_RdInfo (fsMediaInfo *info) {
590  return (ftl_ReadInfo (info, &nand0_dev));
591  }
592  static fsStatus nand0_DevCtrl (fsDevCtrlCode code, void *p) {
593  return (ftl_DevCtrl (code, p, &nand0_dev));
594  }
595 
596  FAT_DRV nand0_drv = {
597  nand0_Init,
598  nand0_UnInit,
599  nand0_RdSect,
600  nand0_WrSect,
601  nand0_RdInfo,
602  nand0_DevCtrl
603  };
604 #endif
605 
606 /*----------------------------------------------------------------------------
607  * Drive N1: NAND Flash device NAND1 configuration
608  *---------------------------------------------------------------------------*/
609 #if (NAND1_ENABLE)
610  #if (NAND1_CACHE_RELOC == 1)
611  #define __AT_NAND1 __at(NAND1_CACHE_ADDR)
612  #else
613  #define __AT_NAND1
614  #endif
615 
616  /* NAND Cache Buffer for FAT, Page and Block Caching */
617  #define NAND1_CSZ ((NAND1_CACHE_SIZE + 1) * 1024 + \
618  (NAND1_PAGE_CACHE + 2) * NAND1_PAGE_SIZE + \
619  (NAND1_BLOCK_CACHE + 2) * NAND1_PAGE_COUNT)
620  #define NAND1_FSJBUF (NAND1_FAT_JOURNAL * 512)
621 
622  static uint32_t nand1_cache[NAND1_CSZ/4 + NAND1_FSJBUF/4] __AT_NAND1;
623  static PAGE_CACHE nand1_capg [NAND1_PAGE_CACHE + 1];
624  static BLOCK_CACHE nand1_cabl [NAND1_BLOCK_CACHE + 2];
625  static uint32_t nand1_ttsn [NAND_TSN_SIZE(NAND1_BLOCK_COUNT, NAND1_PAGE_SIZE)];
626 
627  /* NAND Flash Configuration */
628  static NAND_FTL_CFG nand1_cfg = {
629  /* Block Translation Table Space */
630  1,
631  NAND_BTT_SIZE (NAND1_BLOCK_COUNT),
632 
633  /* Data Space */
634  NAND_BTT_SIZE (NAND1_BLOCK_COUNT) + 1,
635  NAND1_BLOCK_COUNT - 1,
636 
637  /* Caching */
638  NAND1_BLOCK_CACHE + 2,
639  NAND1_PAGE_CACHE + 1,
640  NAND_TSN_SIZE(NAND1_BLOCK_COUNT, NAND1_PAGE_SIZE),
641 
642  /* Page buffer & Caches */
643  (uint8_t *)&nand1_cache[(NAND1_CACHE_SIZE+1)*256],
644  &nand1_cabl[0],
645  (uint8_t *)&nand1_cache[(NAND1_CACHE_SIZE+1)*256+(NAND1_PAGE_CACHE+2)*NAND1_PAGE_SIZE/4],
646  &nand1_capg[0],
647  (uint8_t *)&nand1_cache[(NAND1_CACHE_SIZE+1)*256+NAND1_PAGE_SIZE/4],
648  &nand1_ttsn[0],
649  };
650 
651  /* NAND1 wrapper functions */
652  static uint32_t nand1_Init (uint32_t mode) {
653  return (ftl_Init(mode, &nand1_dev, NAND_INFO1, NAND_INFO1_SZ));
654  }
655  static uint32_t nand1_UnInit (uint32_t mode) {
656  return (ftl_UnInit (mode, &nand1_dev));
657  }
658  static uint32_t nand1_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
659  uint32_t retv = ftl_ReadSect (sect, buf, cnt, &nand1_dev);
660  if (retv < 2) return (true);
661  else return (false);
662  }
663  static uint32_t nand1_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
664  uint32_t retv = ftl_WriteSect (sect, buf, cnt, &nand1_dev);
665  if (retv < 2) return (true);
666  else return (false);
667  }
668  static uint32_t nand1_RdInfo (fsMediaInfo *info) {
669  return (ftl_ReadInfo (info, &nand1_dev));
670  }
671  static fsStatus nand1_DevCtrl (fsDevCtrlCode code, void *p) {
672  return (ftl_DevCtrl (code, p, &nand1_dev));
673  }
674 
675  FAT_DRV nand1_drv = {
676  nand1_Init,
677  nand1_UnInit,
678  nand1_RdSect,
679  nand1_WrSect,
680  nand1_RdInfo,
681  nand1_DevCtrl
682  };
683 #endif
684 
685 /*----------------------------------------------------------------------------
686  * Drive R0: RAM device RAM0 configuration
687  *---------------------------------------------------------------------------*/
688 #if (RAM0_ENABLE)
689  static FAT_VI ram0_vol;
690 
691  #if (RAM0_SIZE < 0x4A00)
692  #error "::File System:Drive:RAM requires minimum of 0x4A00 bytes of memory"
693  #endif
694 
695  #if (RAM0_RELOC == 1)
696  #define __AT_RAM0 __at(RAM0_BASE_ADDR)
697  #else
698  #define __AT_RAM0
699  #endif
700 
701  /* RAM0 Device data buffer */
702  static uint32_t ram0_buf[256 + (RAM0_SIZE/4)] __AT_RAM0;
703 
704  /* RAM0 device info */
705  static RAM_DEV ram0_dev = {
706  (uint8_t *)&ram0_buf[256],
707  RAM0_SIZE
708  };
709 
710  /* RAM0 wrapper functions */
711  static uint32_t ram0_Init (uint32_t mode) {
712  return (ram_Init (mode, &ram0_dev));
713  }
714  static uint32_t ram0_UnInit (uint32_t mode) {
715  return (ram_UnInit (mode, &ram0_dev));
716  }
717  static uint32_t ram0_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
718  return (ram_ReadSector (sect, buf, cnt, &ram0_dev));
719  }
720  static uint32_t ram0_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
721  return (ram_WriteSector (sect, buf, cnt, &ram0_dev));
722  }
723  static uint32_t ram0_RdInfo (fsMediaInfo *info) {
724  return (ram_ReadInfo (info, &ram0_dev));
725  }
726  static fsStatus ram0_DevCtrl (fsDevCtrlCode code, void *p) {
727  return (ram_DevCtrl (code, p, &ram0_dev));
728  }
729 
730  /* FAT RAM Driver Control Block */
731  FAT_DRV ram0_drv = {
732  ram0_Init,
733  ram0_UnInit,
734  ram0_RdSect,
735  ram0_WrSect,
736  ram0_RdInfo,
737  ram0_DevCtrl
738  };
739 #endif
740 
741 /*----------------------------------------------------------------------------
742  * Drive U0: USB Flash device USB0 configuration
743  *---------------------------------------------------------------------------*/
744 #if (USB0_ENABLE)
745  extern FAT_DRV usb0_drv;
746 
747  #if (USB0_FAT_JOURNAL)
748  static FSJOUR usb0_fsj;
749  #endif
750 
751  /* USB Cache Buffer for Data and FAT Caching */
752  static uint32_t usb0_cache[(USB0_CACHE_SIZE+1) * 256 + USB0_FAT_JOURNAL * 128];
753  static FAT_VI usb0_vol;
754 
755  /* USB0 wrapper functions */
756  static uint32_t usb0_Init (uint32_t mode) {
757  return (FS_USBH_MSC_Initialize (0, mode));
758  }
759  static uint32_t usb0_UnInit (uint32_t mode) {
760  return (FS_USBH_MSC_Uninitialize (0, mode));
761  }
762  static uint32_t usb0_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
763  return (FS_USBH_MSC_ReadSectors (0, sect, cnt, buf));
764  }
765  static uint32_t usb0_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
766  return (FS_USBH_MSC_WriteSectors (0, sect, cnt, buf));
767  }
768  static uint32_t usb0_RdInfo (fsMediaInfo *info) {
769  return (FS_USBH_MSC_ReadInfo (0, info));
770  }
771  static fsStatus usb0_DevCtrl (fsDevCtrlCode code, void *p) {
772  return (FS_USBH_MSC_DeviceCtrl (0, code, p));
773  }
774 
775  FAT_DRV usb0_drv = {
776  usb0_Init,
777  usb0_UnInit,
778  usb0_RdSect,
779  usb0_WrSect,
780  usb0_RdInfo,
781  usb0_DevCtrl
782  };
783 #endif
784 
785 /*----------------------------------------------------------------------------
786  * Drive U1: USB Flash device USB1 configuration
787  *---------------------------------------------------------------------------*/
788 #if (USB1_ENABLE)
789  extern FAT_DRV usb1_drv;
790 
791  #if (USB1_FAT_JOURNAL)
792  static FSJOUR usb1_fsj;
793  #endif
794 
795  /* USB Cache Buffer for Data and FAT Caching */
796  static uint32_t usb1_cache[(USB1_CACHE_SIZE+1) * 256 + USB1_FAT_JOURNAL * 128];
797  static FAT_VI usb1_vol;
798 
799  /* USB1 wrapper functions */
800  static uint32_t usb1_Init (uint32_t mode) {
801  return (FS_USBH_MSC_Initialize (1, mode));
802  }
803  static uint32_t usb1_UnInit (uint32_t mode) {
804  return (FS_USBH_MSC_Uninitialize (1, mode));
805  }
806  static uint32_t usb1_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
807  return (FS_USBH_MSC_ReadSectors (1, sect, cnt, buf));
808  }
809  static uint32_t usb1_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
810  return (FS_USBH_MSC_WriteSectors (1, sect, cnt, buf));
811  }
812  static uint32_t usb1_RdInfo (fsMediaInfo *info) {
813  return (FS_USBH_MSC_ReadInfo (1, info));
814  }
815  static fsStatus usb1_DevCtrl (fsDevCtrlCode code, void *p) {
816  return (FS_USBH_MSC_DeviceCtrl (1, code, p));
817  }
818 
819  FAT_DRV usb1_drv = {
820  usb1_Init,
821  usb1_UnInit,
822  usb1_RdSect,
823  usb1_WrSect,
824  usb1_RdInfo,
825  usb1_DevCtrl
826  };
827 #endif
828 
829 
830 /*-----------------------------------------------------------------------------
831  * An array of installed Device drivers
832  *----------------------------------------------------------------------------*/
833 FS_DEV fs_DevPool[FS_NDRV] = {
834 #if (NOR0_ENABLE)
835  { &nor0_vol, "F0", FS_EMB | NOR0_DEFAULT_DRIVE },
836 #endif
837 #if (NOR1_ENABLE)
838  { &nor1_vol, "F1", FS_EMB | NOR1_DEFAULT_DRIVE },
839 #endif
840 #if (MC0_ENABLE)
841  { &mc0_vol, "M0", FS_FAT | MC0_DEFAULT_DRIVE | FS_IOC },
842 #endif
843 #if (MC1_ENABLE)
844  { &mc1_vol, "M1", FS_FAT | MC1_DEFAULT_DRIVE | FS_IOC },
845 #endif
846 #if (NAND0_ENABLE)
847  { &nand0_vol,"N0", FS_FAT | NAND0_DEFAULT_DRIVE | FS_IOC },
848 #endif
849 #if (NAND1_ENABLE)
850  { &nand1_vol,"N1", FS_FAT | NAND1_DEFAULT_DRIVE | FS_IOC },
851 #endif
852 #if (RAM0_ENABLE)
853  { &ram0_vol, "R0", FS_FAT | RAM0_DEFAULT_DRIVE | FS_RAM },
854 #endif
855 #if (USB0_ENABLE)
856  { &usb0_vol, "U0", FS_FAT | USB0_DEFAULT_DRIVE },
857 #endif
858 #if (USB1_ENABLE)
859  { &usb1_vol, "U1", FS_FAT | USB1_DEFAULT_DRIVE },
860 #endif
861 };
862 
863 /*-----------------------------------------------------------------------------
864  * Configure Flash File System
865  *----------------------------------------------------------------------------*/
866 void fs_config (void) {
867 
868 #if (NOR0_ENABLE)
869  nor0_vol.Drv = &CREATE_SYMBOL (Driver_NOR_, NOR0_NAME);
870  nor0_vol.BaseAdr = NOR0_BASE_ADDR;
871  nor0_vol.InitVal = CREATE_SYMBOL (NOR_Device_, NOR0_NAME).erased_value * 0x01010101;
872  nor0_vol.NumSect = CREATE_SYMBOL (NOR_Device_, NOR0_NAME).sector_count;
873  nor0_vol.Size = CREATE_SYMBOL (NOR_Device_, NOR0_NAME).size;
874  nor0_vol.DevCfg = CREATE_SYMBOL (NOR_Device_, NOR0_NAME).sector_info;
875 #endif
876 
877 #if (NOR1_ENABLE)
878  nor1_vol.Drv = &CREATE_SYMBOL (Driver_NOR_, NOR1_NAME);
879  nor1_vol.BaseAdr = NOR1_BASE_ADDR;
880  nor1_vol.InitVal = CREATE_SYMBOL (NOR_Device_, NOR1_NAME).erased_value * 0x01010101;
881  nor1_vol.NumSect = CREATE_SYMBOL (NOR_Device_, NOR1_NAME).sector_count;
882  nor1_vol.Size = CREATE_SYMBOL (NOR_Device_, NOR1_NAME).size;
883  nor1_vol.DevCfg = CREATE_SYMBOL (NOR_Device_, NOR1_NAME).sector_info;
884 #endif
885 
886 #if (MC0_ENABLE)
887  mc0_vol.Drv = &mc0_drv;
888  mc0_vol.CaBuf = mc0_cache;
889  mc0_vol.CaSize = MC0_CACHE_SIZE * 2;
890 
891  /* Register MCI driver for Native mode */
892  mc0_dev.DrvMci = &CREATE_SYMBOL (Driver_MCI, MC0_MCI_DRIVER);
893  mc0_dev.MCI_Callback = MC0_MCI_SignalEvent;
894  #if (MC0_SPI != 0)
895  /* Register SPI driver for SPI mode */
896  mc0_dev.DrvSpi = &CREATE_SYMBOL (Driver_SPI, MC0_SPI_DRIVER);
897  mc0_dev.SPI_Callback = MC0_SPI_SignalEvent;
898  #endif
899 
900  #if (MC0_FAT_JOURNAL)
901  /* Register file system journal */
902  mc0_fsj.buf = (uint8_t *)&mc0_cache[(MC0_CACHE_SIZE+1) * 256];
903  mc0_vol.fsj = &mc0_fsj;
904  mc0_vol.RsvdS = FAT_SECT_RSVD;
905  #else
906  mc0_vol.fsj = NULL;
907  mc0_vol.RsvdS = 0;
908  #endif
909 #endif
910 
911 #if (MC1_ENABLE)
912  mc1_vol.Drv = &mc1_drv;
913  mc1_vol.CaBuf = mc1_cache;
914  mc1_vol.CaSize = MC1_CACHE_SIZE * 2;
915 
916  /* Register MCI driver for Native mode */
917  mc1_dev.DrvMci = &CREATE_SYMBOL (Driver_MCI, MC1_MCI_DRIVER);
918  mc1_dev.MCI_Callback = MC1_MCI_SignalEvent;
919  #if (MC1_SPI != 0)
920  /* Register SPI driver for SPI mode */
921  mc1_dev.DrvSpi = &CREATE_SYMBOL (Driver_SPI, MC1_SPI_DRIVER);
922  mc1_dev.SPI_Callback = MC1_SPI_SignalEvent;
923  #endif
924 
925  #if (MC1_FAT_JOURNAL)
926  /* Register file system journal */
927  mc1_fsj.buf = (uint8_t *)&mc1_cache[(MC1_CACHE_SIZE+1) * 256];
928  mc1_vol.fsj = &mc1_fsj;
929  mc1_vol.RsvdS = FAT_SECT_RSVD;
930  #else
931  mc1_vol.fsj = NULL;
932  mc1_vol.RsvdS = 0;
933  #endif
934 #endif
935 
936 #if (NAND0_ENABLE)
937  nand0_vol.Drv = &nand0_drv;
938  nand0_vol.CaBuf = nand0_cache;
939  nand0_vol.CaSize = NAND0_CACHE_SIZE * 2;
940 
941  nand0_dev.Drv = &CREATE_SYMBOL (Driver_NAND, NAND0_DRIVER);
942  nand0_dev.Dev = &NAND_DevInfo0[0];
943  nand0_dev.Cfg = &nand0_cfg;
944  nand0_dev.Callback = NAND0_EVENT_HANDLER;
945 
946  #if (NAND0_FAT_JOURNAL)
947  /* Register file system journal */
948  nand0_fsj.buf = (uint8_t *)&nand0_cache[NAND0_CSZ/4];
949  nand0_vol.fsj = &nand0_fsj;
950  nand0_vol.RsvdS = FAT_SECT_RSVD;
951  #else
952  nand0_vol.fsj = NULL;
953  nand0_vol.RsvdS = 0;
954  #endif
955 #endif
956 
957 #if (NAND1_ENABLE)
958  nand1_vol.Drv = &nand1_drv;
959  nand1_vol.CaBuf = nand1_cache;
960  nand1_vol.CaSize = NAND1_CACHE_SIZE * 2;
961 
962  nand1_dev.Drv = &CREATE_SYMBOL (Driver_NAND, NAND1_DRIVER);
963  #if defined(NAND_INFO_0_DEV_1)
964  nand1_dev.Dev = &NAND_DevInfo0[1];
965  #else
966  nand1_dev.Dev = &NAND_DevInfo1[0];
967  #endif
968  nand1_dev.Cfg = &nand1_cfg;
969  nand1_dev.Callback = NAND1_EVENT_HANDLER;
970 
971  #if (NAND1_FAT_JOURNAL)
972  /* Register file system journal */
973  nand1_fsj.buf = (uint8_t *)&nand1_cache[NAND1_CSZ/4];
974  nand1_vol.fsj = &nand1_fsj;
975  nand1_vol.RsvdS = FAT_SECT_RSVD;
976  #else
977  nand1_vol.fsj = NULL;
978  nand1_vol.RsvdS = 0;
979  #endif
980 #endif
981 
982 #if (RAM0_ENABLE)
983  ram0_vol.Drv = &ram0_drv;
984  ram0_vol.CaBuf = ram0_buf;
985  ram0_vol.CaSize = 0;
986  ram0_vol.RsvdS = 0;
987  ram0_vol.fsj = NULL;
988 #endif
989 
990 #if (USB0_ENABLE)
991  usb0_vol.Drv = &usb0_drv;
992  usb0_vol.CaBuf = usb0_cache;
993  usb0_vol.CaSize = USB0_CACHE_SIZE * 2;
994 
995  #if (USB0_FAT_JOURNAL)
996  /* Register file system journal */
997  usb0_fsj.buf = (uint8_t *)&usb0_cache[(USB0_CACHE_SIZE+1) * 256];
998  usb0_vol.fsj = &usb0_fsj;
999  usb0_vol.RsvdS = FAT_SECT_RSVD;
1000  #else
1001  usb0_vol.fsj = NULL;
1002  usb0_vol.RsvdS = 0;
1003  #endif
1004 #endif
1005 
1006 #if (USB1_ENABLE)
1007  usb1_vol.Drv = &usb1_drv;
1008  usb1_vol.CaSize = USB1_CACHE_SIZE * 2;
1009  usb1_vol.CaBuf = usb1_cache;
1010 
1011 
1012  #if (USB1_FAT_JOURNAL)
1013  /* Register file system journal */
1014  usb1_fsj.buf = (uint8_t *)&usb1_cache[(USB1_CACHE_SIZE+1) * 256];
1015  usb1_vol.fsj = &usb1_fsj;
1016  usb1_vol.RsvdS = FAT_SECT_RSVD;
1017  #else
1018  usb1_vol.fsj = NULL;
1019  usb1_vol.RsvdS = 0;
1020  #endif
1021 #endif
1022 
1024 }
1025 
1026 #if (EFS_USE == 0)
1027  /* Empty functions to reduce image size when EFS not used */
1028  uint32_t efs_rename (const char *filename, IOB *fcb) { return (false); }
1029  uint32_t efs_create (const char *fname, IOB *fcb) { return (false); }
1030  uint32_t efs_delete (IOB *fcb) { return (false); }
1031  uint32_t efs_free (EFS_VI *vi) { return (0); }
1032  uint32_t efs_format (EFS_VI *vi) { return (false); }
1033  uint32_t efs_ffind (fsFileInfo *info, IOB *fcb) { return (false); }
1034  uint32_t efs_wclose (IOB *fcb) { return (false); }
1035  uint32_t efs_read (IOB *fcb, uint8_t *buf, uint32_t len) { return (0); }
1036  uint32_t efs_write (IOB *fcb, const uint8_t *buf, uint32_t len){ return (false); }
1037  uint32_t efs_ensure (IOB *fcb) { return (false); }
1038  uint32_t efs_seek (IOB *fcb, uint32_t pos) { return (false); }
1039  void efs_fsize (IOB *fcb) { ; }
1040  uint32_t efs_find (const char *name, IOB *fcb) { return (false); }
1041  int efs_analyse (EFS_VI *vi) { return (0); }
1042  uint32_t efs_check (EFS_VI *vi) { return (false); }
1043  uint32_t efs_defrag (IOB *fcb) { return (false); }
1044 #endif /* EFS_USE */
1045 
1046 #if (FAT_USE == 0)
1047  /* Empty functions to reduce image size when FAT not used */
1048  int fat_init (FAT_VI *vi) { return (0); }
1049  uint32_t fat_find (const char *fn, IOB *fcb) { return (false); }
1050  uint32_t fat_seek (IOB *fcb, uint32_t pos) { return (false); }
1051  uint32_t fat_read (IOB *fcb, uint8_t *buf, uint32_t len) { return (0); }
1052  uint32_t fat_write (IOB *fcb, const uint8_t *buf, uint32_t len){ return (false); }
1053  uint64_t fat_free (FAT_VI *vi) { return (0) ; }
1054  uint32_t fat_delete (const char *fn, IOB *fcb) { return (false); }
1055  uint32_t fat_wclose (IOB *fcb) { return (false); }
1056  uint32_t fat_rename (const char *old, const char *newn, IOB *fcb) {
1057  return (false); }
1058  uint32_t fat_create (const char *fn, IOB *fcb) { return (false); }
1059  uint32_t fat_format (FAT_VI *vi, const char *param) { return (false); }
1060  uint32_t fat_ffind (const char *fn, fsFileInfo *info, IOB *fcb) {
1061  return (false); }
1062  uint32_t fat_jour_init (FAT_VI *vi) { return (true); }
1063  uint32_t fat_path_valid (const char *path, IOB *fcb) { return (false); }
1064  uint32_t fat_getlabel (IOB *fcb, char *buf) { return (false); }
1065  uint32_t fat_attrib (IOB *fcb, const char *fn, uint32_t attrib) {
1066  return (false); }
1067 #else
1068  #if (FSJ_USE == 0)
1069  /* Empty functions to reduce image size when journal not used */
1070  uint32_t fat_jour_init (FAT_VI *vi) { return (true); }
1071  uint32_t fat_jour_prep (FAT_VI *vi) { return (true); }
1072  uint32_t fsj_set_space (FSJOUR *fsj, uint32_t start_sect, uint32_t cnt) {
1073  return (false); }
1074  uint32_t fsj_write (FSJOUR *fsj, uint32_t sect, uint32_t cnt, uint8_t *buf) {
1075  return (false); }
1076  uint32_t fsj_init (FSJOUR *fsj, FAT_DRV *drv) { return (false); }
1077  #endif
1078  #if (FAT_NAME_CACNT == 0)
1079  uint32_t elink_init (void) { return (1); }
1080  uint32_t elink_init_path (const char *drvLet) { return (0xFF); }
1081  uint32_t elink_flush (const char *drvLet) { return (1); }
1082  void *elink_alloc (uint32_t i) { return (NULL); }
1083  uint32_t elink_cmd (uint32_t i, uint32_t j) { return (0); }
1084  void *elink_set (uint32_t i, uint32_t j) { return (NULL); }
1085  uint32_t elink_prop (void *p, uint32_t i) { return (0); }
1086  uint32_t elink_insert (void *p, uint32_t i, uint32_t j) { return (1); }
1087  uint32_t elink_delete (void *p, uint32_t i) { return (0); }
1088  uint32_t elink_scan (uint32_t i, void **pp, uint32_t j) { return (1); }
1089  #endif
1090 #endif /* FAT_USE */
1091 
1092 
1093 /*-----------------------------------------------------------------------------
1094  * Retarget low level functions
1095  *----------------------------------------------------------------------------*/
1096 
1097 #pragma import(__use_no_semihosting_swi)
1098 
1099 #ifndef STDIO_DISABLE
1100 
1101 /* Standard IO device handles. */
1102 #define STDIN 0x8001
1103 #define STDOUT 0x8002
1104 #define STDERR 0x8003
1105 
1106 /* Standard IO device name defines. */
1107 const char __stdin_name[] = "STDIN";
1108 const char __stdout_name[] = "STDOUT";
1109 const char __stderr_name[] = "STDERR";
1110 
1111 #if (__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M)
1112 /* Redirected to ITM by default */
1113 extern int stdio_getc (void);
1114 extern int stdio_putc (int ch);
1115 #else
1116 /* Dummy implementation */
1117 __weak int stdio_getc (void) { return (-1); }
1118 __weak int stdio_putc (int ch) {}
1119 #endif
1120 
1121 #endif
1122 
1123 /*--------------------------- _ttywrch ---------------------------------------*/
1124 
1125 __weak void _ttywrch (int ch) {
1126 #ifndef STDIO_DISABLE
1127 #ifndef STDOUT_LF_CR_DISABLE
1128  if (ch == '\n') stdio_putc ('\r');
1129 #endif
1130  stdio_putc (ch);
1131 #endif
1132 }
1133 
1134 /*--------------------------- _sys_open --------------------------------------*/
1135 
1136 FILEHANDLE _sys_open (const char *name, int openmode) {
1137  /* Register standard Input Output devices. */
1138 #ifndef STDIO_DISABLE
1139  if (strcmp(name, "STDIN") == 0) {
1140  return (STDIN);
1141  }
1142  if (strcmp(name, "STDOUT") == 0) {
1143  return (STDOUT);
1144  }
1145  if (strcmp(name, "STDERR") == 0) {
1146  return (STDERR);
1147  }
1148 #endif
1149  return (__sys_open (name, openmode));
1150 }
1151 
1152 /*--------------------------- _sys_close -------------------------------------*/
1153 
1154 int _sys_close (FILEHANDLE fh) {
1155 #ifndef STDIO_DISABLE
1156  switch (fh) {
1157  case STDOUT:
1158  case STDIN:
1159  case STDERR:
1160  return (0);
1161  }
1162 #endif
1163  return (__sys_close (fh));
1164 }
1165 
1166 /*--------------------------- _sys_write -------------------------------------*/
1167 
1168 int _sys_write (FILEHANDLE fh, const uint8_t *buf, uint32_t len, int mode) {
1169 #ifndef STDIO_DISABLE
1170  int ch;
1171 
1172  switch (fh) {
1173  case STDOUT:
1174  /* Standard Output device. */
1175  for ( ; len; len--) {
1176  ch = *buf++;
1177 #ifndef STDOUT_LF_CR_DISABLE
1178  if (ch == '\n') stdio_putc ('\r');
1179 #endif
1180  stdio_putc (ch);
1181  }
1182  return (0);
1183  case STDIN:
1184  case STDERR:
1185  return (-1);
1186  }
1187 #endif
1188  return (__sys_write (fh, buf, len));
1189 }
1190 
1191 /*--------------------------- _sys_read --------------------------------------*/
1192 
1193 int _sys_read (FILEHANDLE fh, uint8_t *buf, uint32_t len, int mode) {
1194 #ifndef STDIO_DISABLE
1195  int ch;
1196 
1197  switch (fh) {
1198  case STDIN:
1199  /* Standard Input device. */
1200  do {
1201  ch = stdio_getc ();
1202  } while (ch < 0);
1203  *buf++ = (uint8_t)ch;
1204  len--;
1205  for ( ; len; len--) {
1206  ch = stdio_getc ();
1207  if (ch < 0) break;
1208  *buf++ = (uint8_t)ch;
1209  }
1210  return (len);
1211  case STDOUT:
1212  case STDERR:
1213  return (-1);
1214  }
1215 #endif
1216  return (__sys_read (fh, buf, len));
1217 }
1218 
1219 /*--------------------------- _sys_istty -------------------------------------*/
1220 
1221 int _sys_istty (FILEHANDLE fh) {
1222 #ifndef STDIO_DISABLE
1223  switch (fh) {
1224  case STDOUT:
1225  case STDIN:
1226  case STDERR:
1227  return (1);
1228  }
1229 #endif
1230  return (0);
1231 }
1232 
1233 /*--------------------------- _sys_seek --------------------------------------*/
1234 
1235 int _sys_seek (FILEHANDLE fh, long pos) {
1236 #ifndef STDIO_DISABLE
1237  switch (fh) {
1238  case STDOUT:
1239  case STDIN:
1240  case STDERR:
1241  return (-1);
1242  }
1243 #endif
1244  return (__sys_seek (fh, pos));
1245 }
1246 
1247 /*--------------------------- _sys_ensure ------------------------------------*/
1248 
1249 int _sys_ensure (FILEHANDLE fh) {
1250 #ifndef STDIO_DISABLE
1251  switch (fh) {
1252  case STDOUT:
1253  case STDIN:
1254  case STDERR:
1255  return (-1);
1256  }
1257 #endif
1258  return (__sys_ensure (fh));
1259 }
1260 
1261 /*--------------------------- _sys_flen --------------------------------------*/
1262 
1263 long _sys_flen (FILEHANDLE fh) {
1264 #ifndef STDIO_DISABLE
1265  switch (fh) {
1266  case STDOUT:
1267  case STDIN:
1268  case STDERR:
1269  return (0);
1270  }
1271 #endif
1272  return (__sys_flen (fh));
1273 }
1274 
1275 /*--------------------------- _sys_exit --------------------------------------*/
1276 
1277 __weak void _sys_exit (int return_code) {
1278  /* Endless loop. */
1279  while (1);
1280 }