12 #include "rl_fs_lib.h"
22 #error "File System does not work with MicroLIB"
29 #define NOR0_DEFAULT_DRIVE 0
34 #define NOR1_DEFAULT_DRIVE 0
39 #define RAM0_DEFAULT_DRIVE 0
45 #define MC0_DEFAULT_DRIVE 0
51 #define MC1_DEFAULT_DRIVE 0
56 #define NAND0_ENABLE 0
57 #define NAND0_DEFAULT_DRIVE 0
62 #define NAND1_ENABLE 0
63 #define NAND1_DEFAULT_DRIVE 0
69 #define USB0_DEFAULT_DRIVE 0
75 #define USB1_DEFAULT_DRIVE 0
79 #ifndef FAT_MAX_OPEN_FILES
80 #define FAT_MAX_OPEN_FILES NUM_FILES
82 #ifndef EFS_MAX_OPEN_FILES
83 #define EFS_MAX_OPEN_FILES NUM_FILES
89 #define FS_NDRV (NOR0_ENABLE + NOR1_ENABLE + \
91 MC0_ENABLE + MC1_ENABLE + \
92 USB0_ENABLE + USB1_ENABLE + \
93 NAND0_ENABLE + NAND1_ENABLE)
95 #error "No drive enabled, File System requires at least on component ::File System:Drive"
99 #define FS_FAT_NDRV (RAM0_ENABLE + \
100 MC0_ENABLE + MC1_ENABLE + \
101 USB0_ENABLE + USB1_ENABLE + \
102 NAND0_ENABLE + NAND1_ENABLE)
105 #define FS_NAND_NDRV (NAND0_ENABLE + NAND1_ENABLE)
108 #define __DEF ((NOR0_DEFAULT_DRIVE & NOR0_ENABLE) + \
109 (NOR1_DEFAULT_DRIVE & NOR1_ENABLE) + \
110 (RAM0_DEFAULT_DRIVE & RAM0_ENABLE) + \
111 (MC0_DEFAULT_DRIVE & MC0_ENABLE) + \
112 (MC1_DEFAULT_DRIVE & MC1_ENABLE) + \
113 (USB0_DEFAULT_DRIVE & USB0_ENABLE) + \
114 (USB1_DEFAULT_DRIVE & USB1_ENABLE) + \
115 (NAND0_DEFAULT_DRIVE & NAND0_ENABLE) + \
116 (NAND1_DEFAULT_DRIVE & NAND1_ENABLE))
118 #error "Default ::File System:Drive not specified"
120 #error "Multiple default ::File System:Drive: enabled"
124 #if (MC0_ENABLE && MC1_ENABLE)
125 #if (MC0_MCI_DRIVER == MC1_MCI_DRIVER)
126 #error "::File System:Drive:Memory Card: MCI ports for different drives must be different"
131 #define EFS_USE (NOR0_ENABLE + NOR1_ENABLE)
132 #define FAT_USE (RAM0_ENABLE + MC0_ENABLE + MC1_ENABLE + USB0_ENABLE + USB1_ENABLE + NAND0_ENABLE + NAND1_ENABLE)
135 #define FSJ_USE (MC0_ENABLE * MC0_FAT_JOURNAL + \
136 MC1_ENABLE * MC1_FAT_JOURNAL + \
137 USB0_ENABLE * USB0_FAT_JOURNAL + \
138 USB1_ENABLE * USB1_FAT_JOURNAL + \
139 NAND0_ENABLE * NAND0_FAT_JOURNAL + \
140 NAND1_ENABLE * NAND1_FAT_JOURNAL)
143 #define FAT_SECT_RSVD 64
147 extern volatile int _stream_list_lock;
148 #define STREAM_LIST_LOCK _stream_list_lock;
150 #define STREAM_LIST_LOCK
154 #define FAT_HANDLE_COUNT ((FAT_MAX_OPEN_FILES > 0) ? FAT_MAX_OPEN_FILES : 1)
159 #define EFS_HANDLE_COUNT ((EFS_MAX_OPEN_FILES > 0) ? EFS_MAX_OPEN_FILES : 1)
169 #if (FAT_NAME_CACHE_SIZE == 0)
174 #if (FAT_NAME_CACHE_RELOC == 1)
175 #define __AT_FAT_NAME __attribute__ ((at(FAT_NAME_CACHE_ADDR)))
177 #define __AT_FAT_NAME
181 #define FAT_NAME_MAX_DEPTH 8
184 #define FAT_NAME_CB_SZ (16)
185 #define FAT_NAME_CB_POOL_SZ (FAT_NAME_CB_SZ * FS_FAT_NDRV)
188 #define FAT_NAME_DEPTH_CB_SZ (8)
189 #define FAT_NAME_DEPTH_POOL_SZ (FAT_NAME_DEPTH_CB_SZ * FAT_NAME_MAX_DEPTH * FS_FAT_NDRV)
192 #define FAT_NAME_LINK_SZ (48)
193 #define FAT_NAME_LINK_POOL_SZ (FAT_NAME_LINK_SZ * FAT_NAME_CACHE_SIZE)
196 #define FAT_NAME_POOL_SIZE (FAT_NAME_CB_POOL_SZ + \
197 FAT_NAME_DEPTH_POOL_SZ + \
198 FAT_NAME_LINK_POOL_SZ)
200 static uint32_t fat_name_pool[FAT_NAME_POOL_SIZE/4] __AT_FAT_NAME;
210 #define EXPAND_SYMBOL(name, port) name##port
211 #define CREATE_SYMBOL(name, port) EXPAND_SYMBOL(name, port)
217 static fsEFS_Volume nor0_vol;
219 extern ARM_DRIVER_NOR
CREATE_SYMBOL (Driver_NOR_, NOR0_NAME);
220 extern ARM_NOR_DEVICE
CREATE_SYMBOL (NOR_Device_, NOR0_NAME);
223 extern ARM_DRIVER_SPI
CREATE_SYMBOL (Driver_SPI, NOR0_SPI_DRIVER);
232 static fsEFS_Volume nor1_vol;
234 extern ARM_DRIVER_NOR
CREATE_SYMBOL (Driver_NOR_, NOR1_NAME);
235 extern ARM_NOR_DEVICE
CREATE_SYMBOL (NOR_Device_, NOR1_NAME);
238 extern ARM_DRIVER_SPI
CREATE_SYMBOL (Driver_SPI, NOR1_SPI_DRIVER);
247 static fsFAT_Volume mc0_vol;
248 static MCI_DEV mc0_dev;
250 #if (MC0_FAT_JOURNAL)
251 static FSJOUR mc0_fsj;
254 extern ARM_DRIVER_MCI
CREATE_SYMBOL (Driver_MCI, MC0_MCI_DRIVER);
256 #if (MC0_CACHE_RELOC == 1)
257 #define __AT_MC0 __attribute__ ((at(MC0_CACHE_ADDR)))
263 static uint32_t mc0_cache[(MC0_CACHE_SIZE+1) * 256 + MC0_FAT_JOURNAL * 128] __AT_MC0;
267 #define MC0_INIT(m) mc_mci_Init (m, &mc0_dev)
268 #define MC0_UNINIT(m) mc_mci_UnInit (m, &mc0_dev)
269 #define MC0_RDSEC(s,b,c) mc_mci_ReadSector (s, b, c, &mc0_dev)
270 #define MC0_WRSEC(s,b,c) mc_mci_WriteSector (s, b, c, &mc0_dev)
271 #define MC0_RDINFO(i) mc_mci_ReadInfo (i, &mc0_dev)
272 #define MC0_DEVCTRL(c,p) mc_mci_DevCtrl (c, p, &mc0_dev)
275 #define MC0_INIT(m) mc_spi_Init (m, &mc0_dev)
276 #define MC0_UNINIT(m) mc_spi_UnInit (m, &mc0_dev)
277 #define MC0_RDSEC(s,b,c) mc_spi_ReadSector (s, b, c, &mc0_dev)
278 #define MC0_WRSEC(s,b,c) mc_spi_WriteSector (s, b, c, &mc0_dev)
279 #define MC0_RDINFO(i) mc_spi_ReadInfo (i, &mc0_dev)
280 #define MC0_DEVCTRL(c,p) mc_spi_DevCtrl (c, p, &mc0_dev)
282 extern ARM_DRIVER_SPI
CREATE_SYMBOL (Driver_SPI, MC0_SPI_DRIVER);
286 static uint32_t mc0_Init (uint32_t mode) {
287 return (MC0_INIT (mode));
289 static uint32_t mc0_UnInit (uint32_t mode) {
290 return (MC0_UNINIT (mode));
292 static uint32_t mc0_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
293 return (MC0_RDSEC (sect, buf, cnt));
295 static uint32_t mc0_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
296 return (MC0_WRSEC (sect, buf, cnt));
299 return (MC0_RDINFO (info));
302 return (MC0_DEVCTRL (code, p));
316 static void MC0_MCI_SignalEvent (ARM_MCI_EVENT event) {
317 mc_mci_DrvEvent (event, &mc0_dev);
320 static void MC0_SPI_SignalEvent (ARM_SPI_EVENT event) {
321 mc_spi_DrvEvent (event, &mc0_dev);
330 static fsFAT_Volume mc1_vol;
331 static MCI_DEV mc1_dev;
333 #if (MC1_FAT_JOURNAL)
334 static FSJOUR mc1_fsj;
337 extern ARM_DRIVER_MCI
CREATE_SYMBOL (Driver_MCI, MC1_MCI_DRIVER);
339 #if (MC1_CACHE_RELOC == 1)
340 #define __AT_MC1 __attribute__ ((at(MC1_CACHE_ADDR)))
346 static uint32_t mc1_cache[(MC1_CACHE_SIZE+1) * 256 + MC1_FAT_JOURNAL * 128] __AT_MC1;
350 #define MC1_INIT(m) mc_mci_Init (m, &mc1_dev)
351 #define MC1_UNINIT(m) mc_mci_UnInit (m, &mc1_dev)
352 #define MC1_RDSEC(s,b,c) mc_mci_ReadSector (s, b, c, &mc1_dev)
353 #define MC1_WRSEC(s,b,c) mc_mci_WriteSector (s, b, c, &mc1_dev)
354 #define MC1_RDINFO(i) mc_mci_ReadInfo (i, &mc1_dev)
355 #define MC1_DEVCTRL(c,p) mc_mci_DevCtrl (c, p, &mc1_dev)
358 #define MC1_INIT(m) mc_spi_Init (m, &mc1_dev)
359 #define MC1_UNINIT(m) mc_spi_UnInit (m, &mc1_dev)
360 #define MC1_RDSEC(s,b,c) mc_spi_ReadSector (s, b, c, &mc1_dev)
361 #define MC1_WRSEC(s,b,c) mc_spi_WriteSector (s, b, c, &mc1_dev)
362 #define MC1_RDINFO(i) mc_spi_ReadInfo (i, &mc1_dev)
363 #define MC1_DEVCTRL(c,p) mc_spi_DevCtrl (c, p, &mc1_dev)
365 extern ARM_DRIVER_SPI
CREATE_SYMBOL (Driver_SPI, MC1_SPI_DRIVER);
369 static uint32_t mc1_Init (uint32_t mode) {
370 return (MC1_INIT (mode));
372 static uint32_t mc1_UnInit (uint32_t mode) {
373 return (MC1_UNINIT (mode));
375 static uint32_t mc1_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
376 return (MC1_RDSEC (sect, buf, cnt));
378 static uint32_t mc1_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
379 return (MC1_WRSEC (sect, buf, cnt));
382 return (MC1_RDINFO (info));
385 return (MC1_DEVCTRL (code, p));
399 static void MC1_MCI_SignalEvent (ARM_MCI_EVENT event) {
400 mc_mci_DrvEvent (event, &mc1_dev);
403 static void MC1_SPI_SignalEvent (ARM_SPI_EVENT event) {
404 mc_spi_DrvEvent (event, &mc1_dev);
412 #ifdef RTE_FileSystem_Drive_NAND_0
414 #define NAND_INFO_0_DEV_0
416 #if ((NAND1_ENABLE) && (NAND1_DRIVER == NAND0_DRIVER))
417 #if (NAND1_DEV_NUM == NAND0_DEV_NUM)
418 #error "::File System:Drive:NAND: NAND ports for different drives must be different"
420 #define NAND_INFO_0_DEV_1
425 #ifdef RTE_FileSystem_Drive_NAND_1
426 #if (((NAND0_ENABLE == 0) && NAND1_ENABLE) || ((NAND0_ENABLE && NAND1_ENABLE) && (NAND1_DRIVER != NAND0_DRIVER)))
427 #define NAND_INFO_1_DEV_0
432 static fsFAT_Volume nand0_vol;
433 static NAND_FTL_DEV nand0_dev;
435 #if (NAND0_FAT_JOURNAL)
436 static FSJOUR nand0_fsj;
439 extern ARM_DRIVER_NAND
CREATE_SYMBOL (Driver_NAND, NAND0_DRIVER);
443 static fsFAT_Volume nand1_vol;
444 static NAND_FTL_DEV nand1_dev;
446 #if (NAND1_FAT_JOURNAL)
447 static FSJOUR nand1_fsj;
450 #if defined(NAND_INFO_1_DEV_0)
451 extern ARM_DRIVER_NAND
CREATE_SYMBOL (Driver_NAND, NAND1_DRIVER);
455 #if defined(NAND_INFO_0_DEV_0)
456 #define NAND0_EVENT_HANDLER NAND_SignalEventHandler0
457 #if defined(NAND_INFO_0_DEV_1)
458 #define NAND1_EVENT_HANDLER NAND_SignalEventHandler0
461 void NAND_SignalEventHandler0 (uint32_t dev_num) {
463 case NAND0_DEV_NUM: ftl_DrvEvent (&nand0_dev);
break;
465 #if defined(NAND_INFO_0_DEV_1)
466 case NAND1_DEV_NUM: ftl_DrvEvent (&nand1_dev);
break;
473 ARM_NAND_DEVICE NAND_DevInfo0[] = {
480 NAND_SEC_BLOCK (NAND0_PAGE_COUNT, NAND0_PAGE_SIZE),
481 NAND_SEC_PAGE (NAND0_PAGE_SIZE),
482 NAND_ROW_CYCLES (NAND0_BLOCK_COUNT, NAND0_PAGE_COUNT),
483 NAND_COL_CYCLES (NAND0_PAGE_SIZE),
486 #if defined(NAND_INFO_0_DEV_1)
493 NAND_SEC_BLOCK (NAND1_PAGE_COUNT, NAND1_PAGE_SIZE),
494 NAND_SEC_PAGE (NAND1_PAGE_SIZE),
495 NAND_ROW_CYCLES (NAND1_BLOCK_COUNT, NAND1_PAGE_COUNT),
496 NAND_COL_CYCLES (NAND1_PAGE_SIZE),
501 #define NAND_INFO0 NAND_DevInfo0
502 #define NAND_INFO0_SZ (sizeof(NAND_DevInfo0) / sizeof(NAND_DevInfo0[0]))
504 #define NAND_INFO0 NULL
505 #define NAND_INFO0_SZ 0
508 #if defined(NAND_INFO_1_DEV_0)
509 #define NAND1_EVENT_HANDLER NAND_SignalEventHandler1
511 void NAND_SignalEventHandler1 (uint32_t dev_num) {
513 case NAND1_DEV_NUM: ftl_DrvEvent (&nand1_dev);
break;
519 ARM_NAND_DEVICE NAND_DevInfo1[] = {
526 NAND_SEC_BLOCK (NAND1_PAGE_COUNT, NAND1_PAGE_SIZE),
527 NAND_SEC_PAGE (NAND1_PAGE_SIZE),
528 NAND_ROW_CYCLES (NAND1_BLOCK_COUNT, NAND1_PAGE_COUNT),
529 NAND_COL_CYCLES (NAND1_PAGE_SIZE),
533 #define NAND_INFO1 NAND_DevInfo1
534 #define NAND_INFO1_SZ (sizeof(NAND_DevInfo1) / sizeof(NAND_DevInfo1[0]))
536 #define NAND_INFO1 NULL
537 #define NAND_INFO1_SZ 0
544 #if (NAND0_CACHE_RELOC == 1)
545 #define __AT_NAND0 __attribute__ ((at(NAND0_CACHE_ADDR)))
551 #define NAND0_CSZ ((NAND0_CACHE_SIZE + 1) * 1024 + \
552 (NAND0_PAGE_CACHE + 2) * NAND0_PAGE_SIZE + \
553 (NAND0_BLOCK_CACHE + 2) * NAND0_PAGE_COUNT)
554 #define NAND0_FSJBUF (NAND0_FAT_JOURNAL * 512)
556 static uint32_t nand0_cache[NAND0_CSZ/4 + NAND0_FSJBUF/4] __AT_NAND0;
557 static PAGE_CACHE nand0_capg [NAND0_PAGE_CACHE + 1];
558 static BLOCK_CACHE nand0_cabl [NAND0_BLOCK_CACHE + 2];
559 static uint32_t nand0_ttsn [NAND_TSN_SIZE(NAND0_BLOCK_COUNT, NAND0_PAGE_SIZE)];
562 static NAND_FTL_CFG nand0_cfg = {
565 NAND_BTT_SIZE (NAND0_BLOCK_COUNT),
568 NAND_BTT_SIZE (NAND0_BLOCK_COUNT) + 1,
569 NAND0_BLOCK_COUNT - 1,
572 NAND0_BLOCK_CACHE + 2,
573 NAND0_PAGE_CACHE + 1,
574 NAND_TSN_SIZE(NAND0_BLOCK_COUNT, NAND0_PAGE_SIZE),
577 (uint8_t *)&nand0_cache[(NAND0_CACHE_SIZE+1)*256],
579 (uint8_t *)&nand0_cache[(NAND0_CACHE_SIZE+1)*256+(NAND0_PAGE_CACHE+2)*NAND0_PAGE_SIZE/4],
581 (uint8_t *)&nand0_cache[(NAND0_CACHE_SIZE+1)*256+NAND0_PAGE_SIZE/4],
586 static uint32_t nand0_Init (uint32_t mode) {
589 static uint32_t nand0_UnInit (uint32_t mode) {
590 return (ftl_UnInit (mode, &nand0_dev));
592 static uint32_t nand0_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
593 uint32_t retv = ftl_ReadSect (sect, buf, cnt, &nand0_dev);
594 if (retv < 2)
return (
true);
597 static uint32_t nand0_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
598 uint32_t retv = ftl_WriteSect (sect, buf, cnt, &nand0_dev);
599 if (retv < 2)
return (
true);
603 return (ftl_ReadInfo (info, &nand0_dev));
606 return (ftl_DevCtrl (code, p, &nand0_dev));
609 FAT_DRV nand0_drv = {
623 #if (NAND1_CACHE_RELOC == 1)
624 #define __AT_NAND1 __attribute__ ((at(NAND1_CACHE_ADDR)))
630 #define NAND1_CSZ ((NAND1_CACHE_SIZE + 1) * 1024 + \
631 (NAND1_PAGE_CACHE + 2) * NAND1_PAGE_SIZE + \
632 (NAND1_BLOCK_CACHE + 2) * NAND1_PAGE_COUNT)
633 #define NAND1_FSJBUF (NAND1_FAT_JOURNAL * 512)
635 static uint32_t nand1_cache[NAND1_CSZ/4 + NAND1_FSJBUF/4] __AT_NAND1;
636 static PAGE_CACHE nand1_capg [NAND1_PAGE_CACHE + 1];
637 static BLOCK_CACHE nand1_cabl [NAND1_BLOCK_CACHE + 2];
638 static uint32_t nand1_ttsn [NAND_TSN_SIZE(NAND1_BLOCK_COUNT, NAND1_PAGE_SIZE)];
641 static NAND_FTL_CFG nand1_cfg = {
644 NAND_BTT_SIZE (NAND1_BLOCK_COUNT),
647 NAND_BTT_SIZE (NAND1_BLOCK_COUNT) + 1,
648 NAND1_BLOCK_COUNT - 1,
651 NAND1_BLOCK_CACHE + 2,
652 NAND1_PAGE_CACHE + 1,
653 NAND_TSN_SIZE(NAND1_BLOCK_COUNT, NAND1_PAGE_SIZE),
656 (uint8_t *)&nand1_cache[(NAND1_CACHE_SIZE+1)*256],
658 (uint8_t *)&nand1_cache[(NAND1_CACHE_SIZE+1)*256+(NAND1_PAGE_CACHE+2)*NAND1_PAGE_SIZE/4],
660 (uint8_t *)&nand1_cache[(NAND1_CACHE_SIZE+1)*256+NAND1_PAGE_SIZE/4],
665 static uint32_t nand1_Init (uint32_t mode) {
668 static uint32_t nand1_UnInit (uint32_t mode) {
669 return (ftl_UnInit (mode, &nand1_dev));
671 static uint32_t nand1_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
672 uint32_t retv = ftl_ReadSect (sect, buf, cnt, &nand1_dev);
673 if (retv < 2)
return (
true);
676 static uint32_t nand1_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
677 uint32_t retv = ftl_WriteSect (sect, buf, cnt, &nand1_dev);
678 if (retv < 2)
return (
true);
682 return (ftl_ReadInfo (info, &nand1_dev));
685 return (ftl_DevCtrl (code, p, &nand1_dev));
688 FAT_DRV nand1_drv = {
702 static fsFAT_Volume ram0_vol;
704 #if (RAM0_SIZE < 0x4A00)
705 #error "::File System:Drive:RAM requires minimum of 0x4A00 bytes of memory"
708 #if (RAM0_RELOC == 1)
709 #define __AT_RAM0 __attribute__ ((at(RAM0_BASE_ADDR)))
715 static uint32_t ram0_buf[256 + (RAM0_SIZE/4)] __AT_RAM0;
718 static RAM_DEV ram0_dev = {
719 (uint8_t *)&ram0_buf[256],
724 static uint32_t ram0_Init (uint32_t mode) {
725 return (ram_Init (mode, &ram0_dev));
727 static uint32_t ram0_UnInit (uint32_t mode) {
728 return (ram_UnInit (mode, &ram0_dev));
730 static uint32_t ram0_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
731 return (ram_ReadSector (sect, buf, cnt, &ram0_dev));
733 static uint32_t ram0_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
734 return (ram_WriteSector (sect, buf, cnt, &ram0_dev));
737 return (ram_ReadInfo (info, &ram0_dev));
740 return (ram_DevCtrl (code, p, &ram0_dev));
758 extern FAT_DRV usb0_drv;
760 #if (USB0_FAT_JOURNAL)
761 static FSJOUR usb0_fsj;
765 static uint32_t usb0_cache[(USB0_CACHE_SIZE+1) * 256 + USB0_FAT_JOURNAL * 128];
766 static fsFAT_Volume usb0_vol;
769 static uint32_t usb0_Init (uint32_t mode) {
770 return (FS_USBH_MSC_Initialize (0, mode));
772 static uint32_t usb0_UnInit (uint32_t mode) {
773 return (FS_USBH_MSC_Uninitialize (0, mode));
775 static uint32_t usb0_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
776 return (FS_USBH_MSC_ReadSectors (0, sect, cnt, buf));
778 static uint32_t usb0_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
779 return (FS_USBH_MSC_WriteSectors (0, sect, cnt, buf));
782 return (FS_USBH_MSC_ReadInfo (0, info));
785 return (FS_USBH_MSC_DeviceCtrl (0, code, p));
802 extern FAT_DRV usb1_drv;
804 #if (USB1_FAT_JOURNAL)
805 static FSJOUR usb1_fsj;
809 static uint32_t usb1_cache[(USB1_CACHE_SIZE+1) * 256 + USB1_FAT_JOURNAL * 128];
810 static fsFAT_Volume usb1_vol;
813 static uint32_t usb1_Init (uint32_t mode) {
814 return (FS_USBH_MSC_Initialize (1, mode));
816 static uint32_t usb1_UnInit (uint32_t mode) {
817 return (FS_USBH_MSC_Uninitialize (1, mode));
819 static uint32_t usb1_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
820 return (FS_USBH_MSC_ReadSectors (1, sect, cnt, buf));
822 static uint32_t usb1_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
823 return (FS_USBH_MSC_WriteSectors (1, sect, cnt, buf));
826 return (FS_USBH_MSC_ReadInfo (1, info));
829 return (FS_USBH_MSC_DeviceCtrl (1, code, p));
883 nor0_vol.BaseAdr = NOR0_BASE_ADDR;
884 nor0_vol.InitVal =
CREATE_SYMBOL (NOR_Device_, NOR0_NAME).erased_value * 0x01010101;
885 nor0_vol.NumSect =
CREATE_SYMBOL (NOR_Device_, NOR0_NAME).sector_count;
887 nor0_vol.DevCfg =
CREATE_SYMBOL (NOR_Device_, NOR0_NAME).sector_info;
892 nor1_vol.BaseAdr = NOR1_BASE_ADDR;
893 nor1_vol.InitVal =
CREATE_SYMBOL (NOR_Device_, NOR1_NAME).erased_value * 0x01010101;
894 nor1_vol.NumSect =
CREATE_SYMBOL (NOR_Device_, NOR1_NAME).sector_count;
896 nor1_vol.DevCfg =
CREATE_SYMBOL (NOR_Device_, NOR1_NAME).sector_info;
900 mc0_vol.Drv = &mc0_drv;
901 mc0_vol.CaBuf = mc0_cache;
902 mc0_vol.CaSize = MC0_CACHE_SIZE * 2;
905 mc0_dev.DrvMci = &
CREATE_SYMBOL (Driver_MCI, MC0_MCI_DRIVER);
906 mc0_dev.MCI_Callback = MC0_MCI_SignalEvent;
909 mc0_dev.DrvSpi = &
CREATE_SYMBOL (Driver_SPI, MC0_SPI_DRIVER);
910 mc0_dev.SPI_Callback = MC0_SPI_SignalEvent;
913 #if (MC0_FAT_JOURNAL)
915 mc0_fsj.buf = (uint8_t *)&mc0_cache[(MC0_CACHE_SIZE+1) * 256];
916 mc0_vol.fsj = &mc0_fsj;
925 mc1_vol.Drv = &mc1_drv;
926 mc1_vol.CaBuf = mc1_cache;
927 mc1_vol.CaSize = MC1_CACHE_SIZE * 2;
930 mc1_dev.DrvMci = &
CREATE_SYMBOL (Driver_MCI, MC1_MCI_DRIVER);
931 mc1_dev.MCI_Callback = MC1_MCI_SignalEvent;
934 mc1_dev.DrvSpi = &
CREATE_SYMBOL (Driver_SPI, MC1_SPI_DRIVER);
935 mc1_dev.SPI_Callback = MC1_SPI_SignalEvent;
938 #if (MC1_FAT_JOURNAL)
940 mc1_fsj.buf = (uint8_t *)&mc1_cache[(MC1_CACHE_SIZE+1) * 256];
941 mc1_vol.fsj = &mc1_fsj;
950 nand0_vol.Drv = &nand0_drv;
951 nand0_vol.CaBuf = nand0_cache;
952 nand0_vol.CaSize = NAND0_CACHE_SIZE * 2;
955 nand0_dev.Dev = &NAND_DevInfo0[0];
956 nand0_dev.Cfg = &nand0_cfg;
957 nand0_dev.Callback = NAND0_EVENT_HANDLER;
959 #if (NAND0_FAT_JOURNAL)
961 nand0_fsj.buf = (uint8_t *)&nand0_cache[NAND0_CSZ/4];
962 nand0_vol.fsj = &nand0_fsj;
965 nand0_vol.fsj = NULL;
971 nand1_vol.Drv = &nand1_drv;
972 nand1_vol.CaBuf = nand1_cache;
973 nand1_vol.CaSize = NAND1_CACHE_SIZE * 2;
976 #if defined(NAND_INFO_0_DEV_1)
977 nand1_dev.Dev = &NAND_DevInfo0[1];
979 nand1_dev.Dev = &NAND_DevInfo1[0];
981 nand1_dev.Cfg = &nand1_cfg;
982 nand1_dev.Callback = NAND1_EVENT_HANDLER;
984 #if (NAND1_FAT_JOURNAL)
986 nand1_fsj.buf = (uint8_t *)&nand1_cache[NAND1_CSZ/4];
987 nand1_vol.fsj = &nand1_fsj;
990 nand1_vol.fsj = NULL;
996 ram0_vol.Drv = &ram0_drv;
997 ram0_vol.CaBuf = ram0_buf;
1000 ram0_vol.fsj = NULL;
1004 usb0_vol.Drv = &usb0_drv;
1005 usb0_vol.CaBuf = usb0_cache;
1006 usb0_vol.CaSize = USB0_CACHE_SIZE * 2;
1008 #if (USB0_FAT_JOURNAL)
1010 usb0_fsj.buf = (uint8_t *)&usb0_cache[(USB0_CACHE_SIZE+1) * 256];
1011 usb0_vol.fsj = &usb0_fsj;
1014 usb0_vol.fsj = NULL;
1020 usb1_vol.Drv = &usb1_drv;
1021 usb1_vol.CaSize = USB1_CACHE_SIZE * 2;
1022 usb1_vol.CaBuf = usb1_cache;
1025 #if (USB1_FAT_JOURNAL)
1027 usb1_fsj.buf = (uint8_t *)&usb1_cache[(USB1_CACHE_SIZE+1) * 256];
1028 usb1_vol.fsj = &usb1_fsj;
1031 usb1_vol.fsj = NULL;
1046 int32_t
efs_read (int32_t handle, uint8_t *buf, uint32_t len) {
return (0); }
1047 int32_t
efs_write (int32_t handle,
const uint8_t *buf, uint32_t len) {
return (-1); }
1066 int32_t
fat_read (int32_t handle, uint8_t *buf, uint32_t len) {
return(-1); }
1067 int32_t
fat_write(int32_t handle,
const uint8_t *buf, uint32_t len) {
return(-1); }
1084 uint32_t
fat_jour_init (fsFAT_Volume *vol) {
return (
true); }
1085 uint32_t fat_jour_prep (fsFAT_Volume *vol) {
return (
true); }
1086 uint32_t fsj_set_space (FSJOUR *fsj, uint32_t start_sect, uint32_t cnt) {
1088 uint32_t fsj_write (FSJOUR *fsj, uint32_t sect, uint32_t cnt, uint8_t *buf) {
1090 uint32_t fsj_init (FSJOUR *fsj, FAT_DRV *drv) {
return (
false); }
1094 #if (FAT_NAME_CACHE_SIZE == 0)
1101 uint32_t
elink_scan (uint32_t i,
void **pp, uint32_t j) {
return (1); }
1109 #pragma import(__use_no_semihosting_swi)
1111 #ifndef STDIO_DISABLE
1114 #define STDIN 0x8001
1115 #define STDOUT 0x8002
1116 #define STDERR 0x8003
1123 #if (__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M)
1149 #ifndef STDIO_DISABLE
1150 #ifndef STDOUT_LF_CR_DISABLE
1175 #ifndef STDIO_DISABLE
1176 if (strcmp(name,
"STDIN") == 0) {
1179 if (strcmp(name,
"STDOUT") == 0) {
1182 if (strcmp(name,
"STDERR") == 0) {
1186 return (__sys_open (name, openmode));
1202 #ifndef STDIO_DISABLE
1210 return (__sys_close (fh));
1232 int _sys_write (FILEHANDLE fh,
const uint8_t *buf, uint32_t len,
int mode) {
1233 #ifndef STDIO_DISABLE
1239 for ( ; len; len--) {
1241 #ifndef STDOUT_LF_CR_DISABLE
1252 return (__sys_write (fh, buf, len));
1283 int _sys_read (FILEHANDLE fh, uint8_t *buf, uint32_t len,
int mode) {
1284 #ifndef STDIO_DISABLE
1293 *buf++ = (uint8_t)ch;
1295 for ( ; len; len--) {
1298 *buf++ = (uint8_t)ch;
1306 return (__sys_read (fh, buf, len));
1326 #ifndef STDIO_DISABLE
1353 #ifndef STDIO_DISABLE
1361 return (__sys_seek (fh, pos));
1371 #ifndef STDIO_DISABLE
1379 return (__sys_ensure (fh));
1399 #ifndef STDIO_DISABLE
1407 return (__sys_flen (fh));