File System Component  Version 6.0
MDK-Professional Middleware for Devices with Flash File System
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fs_config.h
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1 /*------------------------------------------------------------------------------
2  * MDK Middleware - Component ::File System
3  * Copyright (c) 2004-2014 ARM Germany GmbH. All rights reserved.
4  *------------------------------------------------------------------------------
5  * Name: fs_config.h
6  * Purpose: File System Library Configuration
7  * Rev.: V6.01
8  *----------------------------------------------------------------------------*/
9 
10 #include <string.h>
11 #include <rt_sys.h>
12 #include "rl_fs_lib.h"
13 
14 #pragma thumb
15 #pragma O3
16 
17 /*-----------------------------------------------------------------------------
18  * File System Configuration File
19  *----------------------------------------------------------------------------*/
20 
21 #ifdef __MICROLIB
22  #error "File System does not work with MicroLIB"
23 #endif
24 
25 /* ---------------------------------------------------------------------------*/
26 
27 #ifndef NOR0_ENABLE
28  #define NOR0_ENABLE 0
29  #define NOR0_DEFAULT_DRIVE 0
30 #endif
31 
32 #ifndef NOR1_ENABLE
33  #define NOR1_ENABLE 0
34  #define NOR1_DEFAULT_DRIVE 0
35 #endif
36 
37 #ifndef RAM0_ENABLE
38  #define RAM0_ENABLE 0
39  #define RAM0_DEFAULT_DRIVE 0
40 #endif
41 
42 /* If MC0 drive not defined */
43 #ifndef MC0_ENABLE
44  #define MC0_ENABLE 0
45  #define MC0_DEFAULT_DRIVE 0
46 #endif
47 
48 /* If MC1 drive not defined */
49 #ifndef MC1_ENABLE
50  #define MC1_ENABLE 0
51  #define MC1_DEFAULT_DRIVE 0
52 #endif
53 
54 /* If NAND0 drive not defined */
55 #ifndef NAND0_ENABLE
56  #define NAND0_ENABLE 0
57  #define NAND0_DEFAULT_DRIVE 0
58 #endif
59 
60 /* If NAND1 drive not defined */
61 #ifndef NAND1_ENABLE
62  #define NAND1_ENABLE 0
63  #define NAND1_DEFAULT_DRIVE 0
64 #endif
65 
66 /* If USB0 drive not defined */
67 #ifndef USB0_ENABLE
68  #define USB0_ENABLE 0
69  #define USB0_DEFAULT_DRIVE 0
70 #endif
71 
72 /* If USB1 drive not defined */
73 #ifndef USB1_ENABLE
74  #define USB1_ENABLE 0
75  #define USB1_DEFAULT_DRIVE 0
76 #endif
77 
78 /* FS_Config V5.00 compatibility */
79 #ifndef FAT_MAX_OPEN_FILES
80  #define FAT_MAX_OPEN_FILES NUM_FILES
81 #endif
82 #ifndef EFS_MAX_OPEN_FILES
83  #define EFS_MAX_OPEN_FILES NUM_FILES
84 #endif
85 
86 /* ---------------------------------------------------------------------------*/
87 
88 /* Check number of enabled drives */
89 #define FS_NDRV (NOR0_ENABLE + NOR1_ENABLE + \
90  RAM0_ENABLE + \
91  MC0_ENABLE + MC1_ENABLE + \
92  USB0_ENABLE + USB1_ENABLE + \
93  NAND0_ENABLE + NAND1_ENABLE)
94 #if (FS_NDRV == 0)
95  #error "No drive enabled, File System requires at least on component ::File System:Drive"
96 #endif
97 
98 /* Count number of enabled FAT drives */
99 #define FS_FAT_NDRV (RAM0_ENABLE + \
100  MC0_ENABLE + MC1_ENABLE + \
101  USB0_ENABLE + USB1_ENABLE + \
102  NAND0_ENABLE + NAND1_ENABLE)
103 
104 /* Count number of enabled NAND devices */
105 #define FS_NAND_NDRV (NAND0_ENABLE + NAND1_ENABLE)
106 
107 /* Check Default drive settings */
108 #define __DEF ((NOR0_DEFAULT_DRIVE & NOR0_ENABLE) + \
109  (NOR1_DEFAULT_DRIVE & NOR1_ENABLE) + \
110  (RAM0_DEFAULT_DRIVE & RAM0_ENABLE) + \
111  (MC0_DEFAULT_DRIVE & MC0_ENABLE) + \
112  (MC1_DEFAULT_DRIVE & MC1_ENABLE) + \
113  (USB0_DEFAULT_DRIVE & USB0_ENABLE) + \
114  (USB1_DEFAULT_DRIVE & USB1_ENABLE) + \
115  (NAND0_DEFAULT_DRIVE & NAND0_ENABLE) + \
116  (NAND1_DEFAULT_DRIVE & NAND1_ENABLE))
117 #if (__DEF == 0)
118  #error "Default ::File System:Drive not specified"
119 #elif (__DEF > 1)
120  #error "Multiple default ::File System:Drive: enabled"
121 #endif
122 
123 /* Check MCI port consistency */
124 #if (MC0_ENABLE && MC1_ENABLE)
125  #if ((MC0_SPI == 0) && (MC1_SPI == 0))
126  #if (MC0_MCI_DRIVER == MC1_MCI_DRIVER)
127  #error "::File System:Drive:Memory Card: MCI ports for different drives must be different"
128  #endif
129  #elif ((MC0_SPI == 1) && (MC1_SPI == 1))
130  #if (MC0_SPI_DRIVER == MC1_SPI_DRIVER)
131  #error "::File System:Drive:Memory Card: SPI ports for different drives must be different"
132  #endif
133  #endif
134 #endif
135 
136 /* Check FS usage */
137 #define EFS_USE (NOR0_ENABLE + NOR1_ENABLE)
138 #define FAT_USE (RAM0_ENABLE + MC0_ENABLE + MC1_ENABLE + USB0_ENABLE + USB1_ENABLE + NAND0_ENABLE + NAND1_ENABLE)
139 
140 /* Check journal usage */
141 #define FSJ_USE (MC0_ENABLE * MC0_FAT_JOURNAL + \
142  MC1_ENABLE * MC1_FAT_JOURNAL + \
143  USB0_ENABLE * USB0_FAT_JOURNAL + \
144  USB1_ENABLE * USB1_FAT_JOURNAL + \
145  NAND0_ENABLE * NAND0_FAT_JOURNAL + \
146  NAND1_ENABLE * NAND1_FAT_JOURNAL)
147 
148 /* Reserved sector count */
149 #define FAT_SECT_RSVD 64
150 
151 /* Make sure to resolve a weak stdlib symbol. */
152 #ifdef __RTX
153 extern volatile int _stream_list_lock;
154  #define STREAM_LIST_LOCK _stream_list_lock;
155 #else
156  #define STREAM_LIST_LOCK
157 #endif
158 
159 /* File Control Blocks for the FAT File System */
160 #define FAT_HANDLE_COUNT ((FAT_MAX_OPEN_FILES > 0) ? FAT_MAX_OPEN_FILES : 1)
163 
164 /* File Control Blocks for the Embedded File System */
165 #define EFS_HANDLE_COUNT ((EFS_MAX_OPEN_FILES > 0) ? EFS_MAX_OPEN_FILES : 1)
168 
169 /* Number of enabled drives */
170 uint8_t const _NDRV = FS_NDRV;
171 
172 /* Embedded File System Operation Timeouts (in seconds) */
173 uint16_t const fs_efs_timeout_erase_chip = 300;
174 uint8_t const fs_efs_timeout_erase_sector = 5;
175 uint8_t const fs_efs_timeout_write = 1;
176 uint8_t const fs_efs_timeout_read = 1;
177 
178 /*----------------------------------------------------------------------------
179  * FAT Name Cache definition and configuration
180  *---------------------------------------------------------------------------*/
181 #if (FAT_NAME_CACHE_SIZE == 0)
182  FAT_NCACHE_CFG fat_ncache = {
183  0, 0, 0, NULL
184  };
185 #else
186  #if (FAT_NAME_CACHE_RELOC == 1)
187  #define __AT_FAT_NAME __attribute__ ((at(FAT_NAME_CACHE_ADDR)))
188  #else
189  #define __AT_FAT_NAME
190  #endif
191 
192  /* FAT name cache max folder depth */
193  #define FAT_NAME_MAX_DEPTH 8
194 
195  /* FAT name cache control block size and count */
196  #define FAT_NAME_CB_SZ (16)
197  #define FAT_NAME_CB_POOL_SZ (FAT_NAME_CB_SZ * FS_FAT_NDRV)
198 
199  /* FAT name cache folder depth control block size */
200  #define FAT_NAME_DEPTH_CB_SZ (8)
201  #define FAT_NAME_DEPTH_POOL_SZ (FAT_NAME_DEPTH_CB_SZ * FAT_NAME_MAX_DEPTH * FS_FAT_NDRV)
202 
203  /* FAT name cache pool size */
204  #define FAT_NAME_LINK_SZ (48)
205  #define FAT_NAME_LINK_POOL_SZ (FAT_NAME_LINK_SZ * FAT_NAME_CACHE_SIZE)
206 
207  /* FAT name cache buffer size in bytes */
208  #define FAT_NAME_POOL_SIZE (FAT_NAME_CB_POOL_SZ + \
209  FAT_NAME_DEPTH_POOL_SZ + \
210  FAT_NAME_LINK_POOL_SZ)
211 
212  static uint32_t fat_name_pool[FAT_NAME_POOL_SIZE/4] __AT_FAT_NAME;
213 
214  FAT_NCACHE_CFG fat_ncache = {
215  FAT_NAME_MAX_DEPTH,
216  FS_FAT_NDRV,
217  FAT_NAME_POOL_SIZE,
218  fat_name_pool
219  };
220 #endif /* FAT_NAME_CACNT */
221 
222 #define EXPAND_SYMBOL(name, port) name##port
223 #define CREATE_SYMBOL(name, port) EXPAND_SYMBOL(name, port)
224 
225 /*----------------------------------------------------------------------------
226  * Drive F0: NOR Flash device NOR0 configuration
227  *---------------------------------------------------------------------------*/
228 #if (NOR0_ENABLE)
229  static fsEFS_Volume nor0_vol;
230 
231  /* EFS Driver Event Callback */
232  static void NOR0_DriverEvent (uint32_t event) {
233  efs_DrvEvent (event, &nor0_vol);
234  }
235 
236  extern ARM_DRIVER_FLASH CREATE_SYMBOL (Driver_Flash, NOR0_DRIVER);
237 #endif
238 
239 /*----------------------------------------------------------------------------
240  * Drive F1: NOR Flash device NOR1 configuration
241  *---------------------------------------------------------------------------*/
242 #if (NOR1_ENABLE)
243  static fsEFS_Volume nor1_vol;
244 
245  /* EFS Driver Event Callback */
246  static void NOR1_DriverEvent (uint32_t event) {
247  efs_DrvEvent (event, &nor1_vol);
248  }
249 
250  extern ARM_DRIVER_FLASH CREATE_SYMBOL (Driver_Flash, NOR1_DRIVER);
251 #endif
252 
253 /*----------------------------------------------------------------------------
254  * Drive M0: Memory Card device MC0 configuration
255  *---------------------------------------------------------------------------*/
256 #if (MC0_ENABLE)
257  static fsFAT_Volume mc0_vol;
258  static MCI_DEV mc0_dev;
259 
260  #if (MC0_FAT_JOURNAL)
261  static FSJOUR mc0_fsj;
262  #endif
263 
264  #if (MC0_CACHE_RELOC == 1)
265  #define __AT_MC0 __attribute__ ((at(MC0_CACHE_ADDR)))
266  #else
267  #define __AT_MC0
268  #endif
269 
270  /* MC0 Cache Buffer for Data and FAT Caching */
271  static uint32_t mc0_cache[(MC0_CACHE_SIZE+1) * 256 + MC0_FAT_JOURNAL * 128] __AT_MC0;
272 
273  #if (MC0_SPI == 0)
274  /* SD Native bus mode */
275  #define MC0_INIT(m) mc_mci_Init (m, &mc0_dev)
276  #define MC0_UNINIT(m) mc_mci_UnInit (m, &mc0_dev)
277  #define MC0_RDSEC(s,b,c) mc_mci_ReadSector (s, b, c, &mc0_dev)
278  #define MC0_WRSEC(s,b,c) mc_mci_WriteSector (s, b, c, &mc0_dev)
279  #define MC0_RDINFO(i) mc_mci_ReadInfo (i, &mc0_dev)
280  #define MC0_DEVCTRL(c,p) mc_mci_DevCtrl (c, p, &mc0_dev)
281 
282  extern ARM_DRIVER_MCI CREATE_SYMBOL (Driver_MCI, MC0_MCI_DRIVER);
283  #else
284  /* SPI bus mode */
285  #define MC0_INIT(m) mc_spi_Init (m, &mc0_dev)
286  #define MC0_UNINIT(m) mc_spi_UnInit (m, &mc0_dev)
287  #define MC0_RDSEC(s,b,c) mc_spi_ReadSector (s, b, c, &mc0_dev)
288  #define MC0_WRSEC(s,b,c) mc_spi_WriteSector (s, b, c, &mc0_dev)
289  #define MC0_RDINFO(i) mc_spi_ReadInfo (i, &mc0_dev)
290  #define MC0_DEVCTRL(c,p) mc_spi_DevCtrl (c, p, &mc0_dev)
291 
292  extern ARM_DRIVER_SPI CREATE_SYMBOL (Driver_SPI, MC0_SPI_DRIVER);
293  #endif
294 
295  /* MC0 wrapper functions */
296  static uint32_t mc0_Init (uint32_t mode) {
297  return (MC0_INIT (mode));
298  }
299  static uint32_t mc0_UnInit (uint32_t mode) {
300  return (MC0_UNINIT (mode));
301  }
302  static uint32_t mc0_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
303  return (MC0_RDSEC (sect, buf, cnt));
304  }
305  static uint32_t mc0_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
306  return (MC0_WRSEC (sect, buf, cnt));
307  }
308  static uint32_t mc0_RdInfo (fsMediaInfo *info) {
309  return (MC0_RDINFO (info));
310  }
311  static fsStatus mc0_DevCtrl (fsDevCtrlCode code, void *p) {
312  return (MC0_DEVCTRL (code, p));
313  }
314 
315  /* MC0 FAT device driver */
316  FAT_DRV mc0_drv = {
317  mc0_Init,
318  mc0_UnInit,
319  mc0_RdSect,
320  mc0_WrSect,
321  mc0_RdInfo,
322  mc0_DevCtrl
323  };
324 
325  /* ------- MC0 MCI/SPI Callback ------- */
326  #if (MC0_SPI == 0)
327  static void MC0_MCI_SignalEvent (uint32_t event) {
328  mc_mci_DrvEvent (event, &mc0_dev);
329  }
330  #endif
331  #if (MC0_SPI == 1)
332  static void MC0_SPI_SignalEvent (uint32_t event) {
333  mc_spi_DrvEvent (event, &mc0_dev);
334  }
335  #endif
336 #endif
337 
338 /*----------------------------------------------------------------------------
339  * Drive M1: Memory Card device MC1 configuration
340  *---------------------------------------------------------------------------*/
341 #if (MC1_ENABLE)
342  static fsFAT_Volume mc1_vol;
343  static MCI_DEV mc1_dev;
344 
345  #if (MC1_FAT_JOURNAL)
346  static FSJOUR mc1_fsj;
347  #endif
348 
349  #if (MC1_CACHE_RELOC == 1)
350  #define __AT_MC1 __attribute__ ((at(MC1_CACHE_ADDR)))
351  #else
352  #define __AT_MC1
353  #endif
354 
355  /* MC1 Cache Buffer for Data and FAT Caching */
356  static uint32_t mc1_cache[(MC1_CACHE_SIZE+1) * 256 + MC1_FAT_JOURNAL * 128] __AT_MC1;
357 
358  #if (MC1_SPI == 0)
359  /* SD Native bus mode */
360  #define MC1_INIT(m) mc_mci_Init (m, &mc1_dev)
361  #define MC1_UNINIT(m) mc_mci_UnInit (m, &mc1_dev)
362  #define MC1_RDSEC(s,b,c) mc_mci_ReadSector (s, b, c, &mc1_dev)
363  #define MC1_WRSEC(s,b,c) mc_mci_WriteSector (s, b, c, &mc1_dev)
364  #define MC1_RDINFO(i) mc_mci_ReadInfo (i, &mc1_dev)
365  #define MC1_DEVCTRL(c,p) mc_mci_DevCtrl (c, p, &mc1_dev)
366 
367  extern ARM_DRIVER_MCI CREATE_SYMBOL (Driver_MCI, MC1_MCI_DRIVER);
368  #else
369  /* SPI bus mode */
370  #define MC1_INIT(m) mc_spi_Init (m, &mc1_dev)
371  #define MC1_UNINIT(m) mc_spi_UnInit (m, &mc1_dev)
372  #define MC1_RDSEC(s,b,c) mc_spi_ReadSector (s, b, c, &mc1_dev)
373  #define MC1_WRSEC(s,b,c) mc_spi_WriteSector (s, b, c, &mc1_dev)
374  #define MC1_RDINFO(i) mc_spi_ReadInfo (i, &mc1_dev)
375  #define MC1_DEVCTRL(c,p) mc_spi_DevCtrl (c, p, &mc1_dev)
376 
377  extern ARM_DRIVER_SPI CREATE_SYMBOL (Driver_SPI, MC1_SPI_DRIVER);
378  #endif
379 
380  /* MC1 wrapper functions */
381  static uint32_t mc1_Init (uint32_t mode) {
382  return (MC1_INIT (mode));
383  }
384  static uint32_t mc1_UnInit (uint32_t mode) {
385  return (MC1_UNINIT (mode));
386  }
387  static uint32_t mc1_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
388  return (MC1_RDSEC (sect, buf, cnt));
389  }
390  static uint32_t mc1_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
391  return (MC1_WRSEC (sect, buf, cnt));
392  }
393  static uint32_t mc1_RdInfo (fsMediaInfo *info) {
394  return (MC1_RDINFO (info));
395  }
396  static fsStatus mc1_DevCtrl (fsDevCtrlCode code, void *p) {
397  return (MC1_DEVCTRL (code, p));
398  }
399 
400  /* MC1 FAT device driver */
401  FAT_DRV mc1_drv = {
402  mc1_Init,
403  mc1_UnInit,
404  mc1_RdSect,
405  mc1_WrSect,
406  mc1_RdInfo,
407  mc1_DevCtrl
408  };
409 
410  /* ------- MC1 MCI/SPI Callback ------- */
411  #if (MC1_SPI == 0)
412  static void MC1_MCI_SignalEvent (uint32_t event) {
413  mc_mci_DrvEvent (event, &mc1_dev);
414  }
415  #endif
416  #if (MC1_SPI == 1)
417  static void MC1_SPI_SignalEvent (uint32_t event) {
418  mc_spi_DrvEvent (event, &mc1_dev);
419  }
420  #endif
421 #endif
422 
423 /*----------------------------------------------------------------------------
424  * General NAND Flash device configuration
425  *---------------------------------------------------------------------------*/
426 #if (NAND0_ENABLE)
427  static NAND_MEDIA_HANDLE nand0_media_handle;
428  static NAND_FTL_DEV nand0_handle;
429 #endif
430 
431 #if (NAND1_ENABLE)
432  static NAND_MEDIA_HANDLE nand1_media_handle;
433  static NAND_FTL_DEV nand1_handle;
434 #endif
435 
436 #if (NAND0_ENABLE || NAND1_ENABLE)
437  extern void nand_DrvEvent (uint32_t event, NAND_MEDIA_HANDLE *h);
438  extern void nand_MediaEvent (NAND_FTL_DEV *ftl);
439 #endif
440 
441 #ifdef RTE_FileSystem_Drive_NAND_0
442  #if (NAND0_ENABLE)
443  extern ARM_DRIVER_NAND CREATE_SYMBOL (Driver_NAND, NAND0_DRIVER);
444 
445  static NAND_HW_DRIVER nand0_hw_driver;
446 
447 
448  #if ((NAND1_ENABLE) && (NAND1_DRIVER == NAND0_DRIVER))
449  #if (NAND1_DEV_NUM == NAND0_DEV_NUM)
450  #error "::File System:Drive:NAND: NAND ports for different drives must be different"
451  #endif
452 
453  #define NAND0_DEVICE1
454 
455  /* NAND0 Device1 Configuration Part */
456  #define NAND1_MEDIA_EVENT_HANDLER NAND0_Media_SignalEventHandler
457  #define NAND1_HW_EVENT_HANDLER NAND0_HW_SignalEventHandler
458  #define NAND1_HW_DRIVER nand0_hw_driver
459  #define NAND1_DRIVER_CONFIG 0
460  #endif
461 
462  static void NAND0_HW_SignalEventHandler (uint32_t dev_num, uint32_t event) {
463  /* Event from nand_driver to nand_media */
464  switch (dev_num) {
465  case NAND0_DEV_NUM: nand_DrvEvent (event, &nand0_media_handle); break;
466 
467  #if defined(NAND0_DEVICE1)
468  case NAND1_DEV_NUM: nand_DrvEvent (event, &nand1_media_handle); break;
469  #endif
470 
471  default: return;
472  }
473  }
474 
475  static void NAND0_Media_SignalEventHandler (uint32_t dev_num, uint32_t event) {
476  /* Event from nand_media to nftl */
477  switch (dev_num) {
478  case NAND0_DEV_NUM: nand_MediaEvent (&nand0_handle); break;
479 
480  #if defined(NAND0_DEVICE1)
481  case NAND1_DEV_NUM: nand_MediaEvent (&nand1_handle); break;
482  #endif
483 
484  default: return;
485  }
486  }
487  #endif
488 #endif
489 
490 #ifdef RTE_FileSystem_Drive_NAND_1
491  #if (((NAND0_ENABLE == 0) && NAND1_ENABLE) || ((NAND0_ENABLE && NAND1_ENABLE) && (NAND1_DRIVER != NAND0_DRIVER)))
492  extern ARM_DRIVER_NAND CREATE_SYMBOL (Driver_NAND, NAND1_DRIVER);
493 
494  static NAND_HW_DRIVER nand1_hw_driver;
495 
496  /* NAND1 Device0 Configuration Part */
497  #define NAND1_MEDIA_EVENT_HANDLER NAND1_Media_SignalEventHandler
498  #define NAND1_HW_EVENT_HANDLER NAND1_HW_SignalEventHandler
499  #define NAND1_HW_DRIVER nand1_hw_driver
500  #define NAND1_DRIVER_CONFIG 1
501 
502  static void NAND1_HW_SignalEventHandler (uint32_t dev_num, uint32_t event) {
503  switch (dev_num) {
504  case NAND1_DEV_NUM: nand_DrvEvent (event, &nand1_media_handle); break;
505 
506  default: return;
507  }
508  }
509 
510  static void NAND1_Media_SignalEventHandler (uint32_t dev_num, uint32_t event) {
511  /* Event from nand_media to nftl */
512  switch (dev_num) {
513  case NAND1_DEV_NUM: nand_MediaEvent (&nand1_handle); break;
514 
515  default: return;
516  }
517  }
518  #endif
519 #endif
520 
521 
522 /*----------------------------------------------------------------------------
523  * Drive N0: NAND Flash device NAND0 configuration
524  *---------------------------------------------------------------------------*/
525 #if (NAND0_ENABLE)
526  extern ARM_DRIVER_NAND CREATE_SYMBOL (Driver_NAND, NAND0_DRIVER);
527 
528  #if (NAND0_CACHE_RELOC == 1)
529  #define __AT_NAND0 __attribute__ ((at(NAND0_CACHE_ADDR)))
530  #else
531  #define __AT_NAND0
532  #endif
533 
534  /* NAND Cache Buffer for FAT, Page and Block Caching */
535  #define NAND0_CSZ ((NAND0_CACHE_SIZE + 1) * 1024 + \
536  (NAND0_PAGE_CACHE + 2) * NAND0_PAGE_SIZE + \
537  (NAND0_BLOCK_CACHE + 2) * NAND0_PAGE_COUNT)
538  #define NAND0_FSJBUF (NAND0_FAT_JOURNAL * 512)
539 
540  static uint32_t nand0_cache[NAND0_CSZ/4 + NAND0_FSJBUF/4] __AT_NAND0;
541  static PAGE_CACHE nand0_capg [NAND0_PAGE_CACHE + 1];
542  static BLOCK_CACHE nand0_cabl [NAND0_BLOCK_CACHE + 2];
543  static uint32_t nand0_ttsn [NAND_TSN_SIZE(NAND0_BLOCK_COUNT, NAND0_PAGE_SIZE)];
544 
545  static fsFAT_Volume nand0_vol;
546  #if (NAND0_FAT_JOURNAL)
547  static FSJOUR nand0_fsj;
548  #endif
549 
550  const NAND_DEVICE nand0_device = {
551  &nand0_handle.PgLay,
552  NAND0_BUS_WIDTH,
553  NAND0_DEV_NUM,
554  NAND0_PAGE_SIZE,
555  NAND0_BLOCK_COUNT,
556  NAND0_PAGE_COUNT,
557  NAND_SEC_BLOCK (NAND0_PAGE_COUNT, NAND0_PAGE_SIZE),
558  NAND_SEC_PAGE (NAND0_PAGE_SIZE),
559  NAND_ROW_CYCLES (NAND0_BLOCK_COUNT, NAND0_PAGE_COUNT),
560  NAND_COL_CYCLES (NAND0_PAGE_SIZE),
561  NAND0_SW_ECC
562  };
563 
564  /* NAND Flash Configuration */
565  static NAND_FTL_CFG nand0_cfg = {
566  /* Block Translation Table Space */
567  1,
568  NAND_BTT_SIZE (NAND0_BLOCK_COUNT),
569 
570  /* Data Space */
571  NAND_BTT_SIZE (NAND0_BLOCK_COUNT) + 1,
572  NAND0_BLOCK_COUNT - 1,
573 
574  /* Caching */
575  NAND0_BLOCK_CACHE + 2,
576  NAND0_PAGE_CACHE + 1,
577  NAND_TSN_SIZE(NAND0_BLOCK_COUNT, NAND0_PAGE_SIZE),
578 
579  /* Page buffer & Caches */
580  (uint8_t *)&nand0_cache[(NAND0_CACHE_SIZE+1)*256],
581  &nand0_cabl[0],
582  (uint8_t *)&nand0_cache[(NAND0_CACHE_SIZE+1)*256+(NAND0_PAGE_CACHE+2)*NAND0_PAGE_SIZE/4],
583  &nand0_capg[0],
584  (uint8_t *)&nand0_cache[(NAND0_CACHE_SIZE+1)*256+NAND0_PAGE_SIZE/4],
585  &nand0_ttsn[0]
586  };
587 
588  /* NAND0 wrapper functions */
589  static uint32_t nand0_Init (uint32_t mode) {
590  return (ftl_Init (mode, &nand0_handle));
591  }
592  static uint32_t nand0_UnInit (uint32_t mode) {
593  return (ftl_UnInit (mode, &nand0_handle));
594  }
595  static uint32_t nand0_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
596  uint32_t retv = ftl_ReadSect (sect, buf, cnt, &nand0_handle);
597  if (retv < 2) return (true);
598  else return (false);
599  }
600  static uint32_t nand0_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
601  uint32_t retv = ftl_WriteSect (sect, buf, cnt, &nand0_handle);
602  if (retv < 2) return (true);
603  else return (false);
604  }
605  static uint32_t nand0_RdInfo (fsMediaInfo *info) {
606  return (ftl_ReadInfo (info, &nand0_handle));
607  }
608  static fsStatus nand0_DevCtrl (fsDevCtrlCode code, void *p) {
609  return (ftl_DevCtrl (code, p, &nand0_handle));
610  }
611 
612  FAT_DRV nand0_drv = {
613  nand0_Init,
614  nand0_UnInit,
615  nand0_RdSect,
616  nand0_WrSect,
617  nand0_RdInfo,
618  nand0_DevCtrl
619  };
620 #endif
621 
622 /*----------------------------------------------------------------------------
623  * Drive N1: NAND Flash device NAND1 configuration
624  *---------------------------------------------------------------------------*/
625 #if (NAND1_ENABLE)
626  #if defined(NAND1_DEVICE0)
627  extern ARM_DRIVER_NAND CREATE_SYMBOL (Driver_NAND, NAND1_DRIVER);
628  #endif
629 
630  #if (NAND1_CACHE_RELOC == 1)
631  #define __AT_NAND1 __attribute__ ((at(NAND1_CACHE_ADDR)))
632  #else
633  #define __AT_NAND1
634  #endif
635 
636  /* NAND Cache Buffer for FAT, Page and Block Caching */
637  #define NAND1_CSZ ((NAND1_CACHE_SIZE + 1) * 1024 + \
638  (NAND1_PAGE_CACHE + 2) * NAND1_PAGE_SIZE + \
639  (NAND1_BLOCK_CACHE + 2) * NAND1_PAGE_COUNT)
640  #define NAND1_FSJBUF (NAND1_FAT_JOURNAL * 512)
641 
642  static uint32_t nand1_cache[NAND1_CSZ/4 + NAND1_FSJBUF/4] __AT_NAND1;
643  static PAGE_CACHE nand1_capg [NAND1_PAGE_CACHE + 1];
644  static BLOCK_CACHE nand1_cabl [NAND1_BLOCK_CACHE + 2];
645  static uint32_t nand1_ttsn [NAND_TSN_SIZE(NAND1_BLOCK_COUNT, NAND1_PAGE_SIZE)];
646 
647  static fsFAT_Volume nand1_vol;
648  #if (NAND1_FAT_JOURNAL)
649  static FSJOUR nand1_fsj;
650  #endif
651 
652  const NAND_DEVICE nand1_device = {
653  &nand1_handle.PgLay,
654  NAND1_BUS_WIDTH,
655  NAND1_DEV_NUM,
656  NAND1_PAGE_SIZE,
657  NAND1_BLOCK_COUNT,
658  NAND1_PAGE_COUNT,
659  NAND_SEC_BLOCK (NAND1_PAGE_COUNT, NAND1_PAGE_SIZE),
660  NAND_SEC_PAGE (NAND1_PAGE_SIZE),
661  NAND_ROW_CYCLES (NAND1_BLOCK_COUNT, NAND1_PAGE_COUNT),
662  NAND_COL_CYCLES (NAND1_PAGE_SIZE),
663  NAND1_SW_ECC
664  };
665 
666  /* NAND Flash Configuration */
667  static NAND_FTL_CFG nand1_cfg = {
668  /* Block Translation Table Space */
669  1,
670  NAND_BTT_SIZE (NAND1_BLOCK_COUNT),
671 
672  /* Data Space */
673  NAND_BTT_SIZE (NAND1_BLOCK_COUNT) + 1,
674  NAND1_BLOCK_COUNT - 1,
675 
676  /* Caching */
677  NAND1_BLOCK_CACHE + 2,
678  NAND1_PAGE_CACHE + 1,
679  NAND_TSN_SIZE(NAND1_BLOCK_COUNT, NAND1_PAGE_SIZE),
680 
681  /* Page buffer & Caches */
682  (uint8_t *)&nand1_cache[(NAND1_CACHE_SIZE+1)*256],
683  &nand1_cabl[0],
684  (uint8_t *)&nand1_cache[(NAND1_CACHE_SIZE+1)*256+(NAND1_PAGE_CACHE+2)*NAND1_PAGE_SIZE/4],
685  &nand1_capg[0],
686  (uint8_t *)&nand1_cache[(NAND1_CACHE_SIZE+1)*256+NAND1_PAGE_SIZE/4],
687  &nand1_ttsn[0],
688  };
689 
690  /* NAND1 wrapper functions */
691  static uint32_t nand1_Init (uint32_t mode) {
692  return (ftl_Init(mode, &nand1_handle));
693  }
694  static uint32_t nand1_UnInit (uint32_t mode) {
695  return (ftl_UnInit (mode, &nand1_handle));
696  }
697  static uint32_t nand1_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
698  uint32_t retv = ftl_ReadSect (sect, buf, cnt, &nand1_handle);
699  if (retv < 2) return (true);
700  else return (false);
701  }
702  static uint32_t nand1_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
703  uint32_t retv = ftl_WriteSect (sect, buf, cnt, &nand1_handle);
704  if (retv < 2) return (true);
705  else return (false);
706  }
707  static uint32_t nand1_RdInfo (fsMediaInfo *info) {
708  return (ftl_ReadInfo (info, &nand1_handle));
709  }
710  static fsStatus nand1_DevCtrl (fsDevCtrlCode code, void *p) {
711  return (ftl_DevCtrl (code, p, &nand1_handle));
712  }
713 
714  FAT_DRV nand1_drv = {
715  nand1_Init,
716  nand1_UnInit,
717  nand1_RdSect,
718  nand1_WrSect,
719  nand1_RdInfo,
720  nand1_DevCtrl
721  };
722 #endif
723 
724 /*----------------------------------------------------------------------------
725  * Drive R0: RAM device RAM0 configuration
726  *---------------------------------------------------------------------------*/
727 #if (RAM0_ENABLE)
728  static fsFAT_Volume ram0_vol;
729 
730  #if (RAM0_SIZE < 0x4A00)
731  #error "::File System:Drive:RAM requires minimum of 0x4A00 bytes of memory"
732  #endif
733 
734  #if (RAM0_RELOC == 1)
735  #define __AT_RAM0 __attribute__ ((at(RAM0_BASE_ADDR)))
736  #else
737  #define __AT_RAM0
738  #endif
739 
740  /* RAM0 Device data buffer */
741  static uint32_t ram0_buf[256 + (RAM0_SIZE/4)] __AT_RAM0;
742 
743  /* RAM0 device info */
744  static RAM_DEV ram0_dev = {
745  (uint8_t *)&ram0_buf[256],
746  RAM0_SIZE
747  };
748 
749  /* RAM0 wrapper functions */
750  static uint32_t ram0_Init (uint32_t mode) {
751  return (ram_Init (mode, &ram0_dev));
752  }
753  static uint32_t ram0_UnInit (uint32_t mode) {
754  return (ram_UnInit (mode, &ram0_dev));
755  }
756  static uint32_t ram0_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
757  return (ram_ReadSector (sect, buf, cnt, &ram0_dev));
758  }
759  static uint32_t ram0_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
760  return (ram_WriteSector (sect, buf, cnt, &ram0_dev));
761  }
762  static uint32_t ram0_RdInfo (fsMediaInfo *info) {
763  return (ram_ReadInfo (info, &ram0_dev));
764  }
765  static fsStatus ram0_DevCtrl (fsDevCtrlCode code, void *p) {
766  return (ram_DevCtrl (code, p, &ram0_dev));
767  }
768 
769  /* FAT RAM Driver Control Block */
770  FAT_DRV ram0_drv = {
771  ram0_Init,
772  ram0_UnInit,
773  ram0_RdSect,
774  ram0_WrSect,
775  ram0_RdInfo,
776  ram0_DevCtrl
777  };
778 #endif
779 
780 /*----------------------------------------------------------------------------
781  * Drive U0: USB Flash device USB0 configuration
782  *---------------------------------------------------------------------------*/
783 #if (USB0_ENABLE)
784  extern FAT_DRV usb0_drv;
785 
786  #if (USB0_FAT_JOURNAL)
787  static FSJOUR usb0_fsj;
788  #endif
789 
790  /* USB Cache Buffer for Data and FAT Caching */
791  static uint32_t usb0_cache[(USB0_CACHE_SIZE+1) * 256 + USB0_FAT_JOURNAL * 128];
792  static fsFAT_Volume usb0_vol;
793 
794  /* USB0 wrapper functions */
795  static uint32_t usb0_Init (uint32_t mode) {
796  return (FS_USBH_MSC_Initialize (0, mode));
797  }
798  static uint32_t usb0_UnInit (uint32_t mode) {
799  return (FS_USBH_MSC_Uninitialize (0, mode));
800  }
801  static uint32_t usb0_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
802  return (FS_USBH_MSC_ReadSectors (0, sect, cnt, buf));
803  }
804  static uint32_t usb0_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
805  return (FS_USBH_MSC_WriteSectors (0, sect, cnt, buf));
806  }
807  static uint32_t usb0_RdInfo (fsMediaInfo *info) {
808  return (FS_USBH_MSC_ReadInfo (0, info));
809  }
810  static fsStatus usb0_DevCtrl (fsDevCtrlCode code, void *p) {
811  return (FS_USBH_MSC_DeviceCtrl (0, code, p));
812  }
813 
814  FAT_DRV usb0_drv = {
815  usb0_Init,
816  usb0_UnInit,
817  usb0_RdSect,
818  usb0_WrSect,
819  usb0_RdInfo,
820  usb0_DevCtrl
821  };
822 #endif
823 
824 /*----------------------------------------------------------------------------
825  * Drive U1: USB Flash device USB1 configuration
826  *---------------------------------------------------------------------------*/
827 #if (USB1_ENABLE)
828  extern FAT_DRV usb1_drv;
829 
830  #if (USB1_FAT_JOURNAL)
831  static FSJOUR usb1_fsj;
832  #endif
833 
834  /* USB Cache Buffer for Data and FAT Caching */
835  static uint32_t usb1_cache[(USB1_CACHE_SIZE+1) * 256 + USB1_FAT_JOURNAL * 128];
836  static fsFAT_Volume usb1_vol;
837 
838  /* USB1 wrapper functions */
839  static uint32_t usb1_Init (uint32_t mode) {
840  return (FS_USBH_MSC_Initialize (1, mode));
841  }
842  static uint32_t usb1_UnInit (uint32_t mode) {
843  return (FS_USBH_MSC_Uninitialize (1, mode));
844  }
845  static uint32_t usb1_RdSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
846  return (FS_USBH_MSC_ReadSectors (1, sect, cnt, buf));
847  }
848  static uint32_t usb1_WrSect (uint32_t sect, uint8_t *buf, uint32_t cnt) {
849  return (FS_USBH_MSC_WriteSectors (1, sect, cnt, buf));
850  }
851  static uint32_t usb1_RdInfo (fsMediaInfo *info) {
852  return (FS_USBH_MSC_ReadInfo (1, info));
853  }
854  static fsStatus usb1_DevCtrl (fsDevCtrlCode code, void *p) {
855  return (FS_USBH_MSC_DeviceCtrl (1, code, p));
856  }
857 
858  FAT_DRV usb1_drv = {
859  usb1_Init,
860  usb1_UnInit,
861  usb1_RdSect,
862  usb1_WrSect,
863  usb1_RdInfo,
864  usb1_DevCtrl
865  };
866 #endif
867 
868 
869 /*-----------------------------------------------------------------------------
870  * An array of installed Device drivers
871  *----------------------------------------------------------------------------*/
872 FS_DEV fs_DevPool[FS_NDRV] = {
873 #if (NOR0_ENABLE)
874  { &nor0_vol, "F0", FS_EMB | NOR0_DEFAULT_DRIVE },
875 #endif
876 #if (NOR1_ENABLE)
877  { &nor1_vol, "F1", FS_EMB | NOR1_DEFAULT_DRIVE },
878 #endif
879 #if (MC0_ENABLE)
880  { &mc0_vol, "M0", FS_FAT | MC0_DEFAULT_DRIVE | FS_IOC },
881 #endif
882 #if (MC1_ENABLE)
883  { &mc1_vol, "M1", FS_FAT | MC1_DEFAULT_DRIVE | FS_IOC },
884 #endif
885 #if (NAND0_ENABLE)
886  { &nand0_vol,"N0", FS_FAT | NAND0_DEFAULT_DRIVE | FS_IOC },
887 #endif
888 #if (NAND1_ENABLE)
889  { &nand1_vol,"N1", FS_FAT | NAND1_DEFAULT_DRIVE | FS_IOC },
890 #endif
891 #if (RAM0_ENABLE)
892  { &ram0_vol, "R0", FS_FAT | RAM0_DEFAULT_DRIVE },
893 #endif
894 #if (USB0_ENABLE)
895  { &usb0_vol, "U0", FS_FAT | USB0_DEFAULT_DRIVE },
896 #endif
897 #if (USB1_ENABLE)
898  { &usb1_vol, "U1", FS_FAT | USB1_DEFAULT_DRIVE },
899 #endif
900 };
901 
902 /*-----------------------------------------------------------------------------
903  * Configure Flash File System
904  *----------------------------------------------------------------------------*/
905 void fs_config (void) {
906 
907 #if (NOR0_ENABLE)
908  nor0_vol.Drv = &CREATE_SYMBOL (Driver_Flash, NOR0_DRIVER);
909  nor0_vol.Callback = &NOR0_DriverEvent;
910 #endif
911 
912 #if (NOR1_ENABLE)
913  nor1_vol.Drv = &CREATE_SYMBOL (Driver_Flash, NOR1_DRIVER);
914  nor1_vol.Callback = &NOR1_DriverEvent;
915 #endif
916 
917 #if (MC0_ENABLE)
918  mc0_vol.Drv = &mc0_drv;
919  mc0_vol.CaBuf = mc0_cache;
920  mc0_vol.CaSize = MC0_CACHE_SIZE * 2;
921 
922  mc0_dev.Instance = 0;
923  /* Register MCI driver for Native mode */
924  #if (MC0_SPI == 0)
925  mc0_dev.DrvMci = &CREATE_SYMBOL (Driver_MCI, MC0_MCI_DRIVER);
926  mc0_dev.MCI_Callback = MC0_MCI_SignalEvent;
927  #elif (MC0_SPI == 1)
928  /* Register SPI driver for SPI mode */
929  mc0_dev.DrvSpi = &CREATE_SYMBOL (Driver_SPI, MC0_SPI_DRIVER);
930  mc0_dev.SPI_Callback = MC0_SPI_SignalEvent;
931  #else
932  #error "Memory Card Interface Mode Invalid in FS_Config_MC_0.h"
933  #endif
934 
935  #if (MC0_FAT_JOURNAL)
936  /* Register file system journal */
937  mc0_fsj.buf = (uint8_t *)&mc0_cache[(MC0_CACHE_SIZE+1) * 256];
938  mc0_vol.fsj = &mc0_fsj;
939  mc0_vol.RsvdS = FAT_SECT_RSVD;
940  #else
941  mc0_vol.fsj = NULL;
942  mc0_vol.RsvdS = 0;
943  #endif
944 #endif
945 
946 #if (MC1_ENABLE)
947  mc1_vol.Drv = &mc1_drv;
948  mc1_vol.CaBuf = mc1_cache;
949  mc1_vol.CaSize = MC1_CACHE_SIZE * 2;
950 
951  mc1_dev.Instance = 1;
952  /* Register MCI driver for Native mode */
953  #if (MC1_SPI == 0)
954  mc1_dev.DrvMci = &CREATE_SYMBOL (Driver_MCI, MC1_MCI_DRIVER);
955  mc1_dev.MCI_Callback = MC1_MCI_SignalEvent;
956  #elif (MC1_SPI == 1)
957  /* Register SPI driver for SPI mode */
958  mc1_dev.DrvSpi = &CREATE_SYMBOL (Driver_SPI, MC1_SPI_DRIVER);
959  mc1_dev.SPI_Callback = MC1_SPI_SignalEvent;
960  #else
961  #error "Memory Card Interface Mode Invalid in FS_Config_MC_1.h"
962  #endif
963 
964  #if (MC1_FAT_JOURNAL)
965  /* Register file system journal */
966  mc1_fsj.buf = (uint8_t *)&mc1_cache[(MC1_CACHE_SIZE+1) * 256];
967  mc1_vol.fsj = &mc1_fsj;
968  mc1_vol.RsvdS = FAT_SECT_RSVD;
969  #else
970  mc1_vol.fsj = NULL;
971  mc1_vol.RsvdS = 0;
972  #endif
973 #endif
974 
975 #if (NAND0_ENABLE)
976  nand0_vol.Drv = &nand0_drv;
977  nand0_vol.CaBuf = nand0_cache;
978  nand0_vol.CaSize = NAND0_CACHE_SIZE * 2;
979 
980  nand0_handle.Media = &nand0_media_handle;
981  nand0_handle.Cfg = &nand0_cfg;
982 
983  nand0_hw_driver.hw_cb = &NAND0_HW_SignalEventHandler;
984  nand0_hw_driver.drv = &CREATE_SYMBOL (Driver_NAND, NAND0_DRIVER);
985  nand0_hw_driver.init = 0;
986 
987  nand0_media_handle.media_cb = &NAND0_Media_SignalEventHandler;
988  nand0_media_handle.hw = &nand0_hw_driver;
989  nand0_media_handle.dev = &nand0_device;
990  nand0_media_handle.status = 0;
991 
992  #if (NAND0_FAT_JOURNAL)
993  /* Register file system journal */
994  nand0_fsj.buf = (uint8_t *)&nand0_cache[NAND0_CSZ/4];
995  nand0_vol.fsj = &nand0_fsj;
996  nand0_vol.RsvdS = FAT_SECT_RSVD;
997  #else
998  nand0_vol.fsj = NULL;
999  nand0_vol.RsvdS = 0;
1000  #endif
1001 #endif
1002 
1003 #if (NAND1_ENABLE)
1004  nand1_vol.Drv = &nand1_drv;
1005  nand1_vol.CaBuf = nand1_cache;
1006  nand1_vol.CaSize = NAND1_CACHE_SIZE * 2;
1007 
1008  nand1_handle.Media = &nand1_media_handle;
1009  nand1_handle.Cfg = &nand1_cfg;
1010 
1011  #if NAND1_DRIVER_CONFIG
1012  nand1_hw_driver.hw_cb = &NAND1_HW_EVENT_HANDLER;
1013  nand1_hw_driver.drv = &CREATE_SYMBOL (Driver_NAND, NAND1_DRIVER);
1014  nand1_hw_driver.init = 0;
1015  #endif
1016 
1017  nand1_media_handle.media_cb = &NAND1_MEDIA_EVENT_HANDLER;
1018  nand1_media_handle.hw = &NAND1_HW_DRIVER;
1019  nand1_media_handle.dev = &nand1_device;
1020  nand1_media_handle.status = 0;
1021 
1022  #if (NAND1_FAT_JOURNAL)
1023  /* Register file system journal */
1024  nand1_fsj.buf = (uint8_t *)&nand1_cache[NAND1_CSZ/4];
1025  nand1_vol.fsj = &nand1_fsj;
1026  nand1_vol.RsvdS = FAT_SECT_RSVD;
1027  #else
1028  nand1_vol.fsj = NULL;
1029  nand1_vol.RsvdS = 0;
1030  #endif
1031 #endif
1032 
1033 #if (RAM0_ENABLE)
1034  ram0_vol.Drv = &ram0_drv;
1035  ram0_vol.CaBuf = ram0_buf;
1036  ram0_vol.CaSize = 0;
1037  ram0_vol.RsvdS = 0;
1038  ram0_vol.fsj = NULL;
1039 #endif
1040 
1041 #if (USB0_ENABLE)
1042  usb0_vol.Drv = &usb0_drv;
1043  usb0_vol.CaBuf = usb0_cache;
1044  usb0_vol.CaSize = USB0_CACHE_SIZE * 2;
1045 
1046  #if (USB0_FAT_JOURNAL)
1047  /* Register file system journal */
1048  usb0_fsj.buf = (uint8_t *)&usb0_cache[(USB0_CACHE_SIZE+1) * 256];
1049  usb0_vol.fsj = &usb0_fsj;
1050  usb0_vol.RsvdS = FAT_SECT_RSVD;
1051  #else
1052  usb0_vol.fsj = NULL;
1053  usb0_vol.RsvdS = 0;
1054  #endif
1055 #endif
1056 
1057 #if (USB1_ENABLE)
1058  usb1_vol.Drv = &usb1_drv;
1059  usb1_vol.CaSize = USB1_CACHE_SIZE * 2;
1060  usb1_vol.CaBuf = usb1_cache;
1061 
1062 
1063  #if (USB1_FAT_JOURNAL)
1064  /* Register file system journal */
1065  usb1_fsj.buf = (uint8_t *)&usb1_cache[(USB1_CACHE_SIZE+1) * 256];
1066  usb1_vol.fsj = &usb1_fsj;
1067  usb1_vol.RsvdS = FAT_SECT_RSVD;
1068  #else
1069  usb1_vol.fsj = NULL;
1070  usb1_vol.RsvdS = 0;
1071  #endif
1072 #endif
1073 
1075 }
1076 
1077 
1078 #if (EFS_USE == 0)
1079  /* Empty functions to reduce image size when EFS not used */
1080  bool efs_path_valid (const char *path) { return (false); }
1081  int32_t efs_handle_get (fsEFS_Volume *vol) { return (-1); }
1082  fsStatus efs_open (int32_t handle, const char *fn, int openmode) { return (fsError); }
1083  fsStatus efs_close (int32_t handle) { return (fsError); }
1084  int32_t efs_read (int32_t handle, uint8_t *buf, uint32_t len) { return (0); }
1085  int32_t efs_write (int32_t handle, const uint8_t *buf, uint32_t len) { return (-1); }
1086  fsStatus efs_flush (int32_t handle) { return (fsError); }
1087  int32_t efs_flen (int32_t handle) { return (-1); }
1088  fsStatus efs_seek (int32_t handle, uint32_t pos) { return (fsError); }
1089  fsStatus efs_ffind (int32_t handle, fsFileInfo *info) { return (fsError); }
1090  fsStatus efs_find (int32_t handle, const char *fname) { return (fsError); }
1091  fsStatus efs_delete(int32_t handle) { return (fsError); }
1092  int32_t efs_analyse(fsEFS_Volume *vol) { return (0); }
1093  fsStatus efs_check (fsEFS_Volume *vol) { return (fsError); }
1094  fsStatus efs_format (fsEFS_Volume *vol) { return (fsError); }
1095  uint32_t efs_free (fsEFS_Volume *vol) { return (0); }
1096  fsStatus efs_defrag (fsEFS_Volume *vol) { return (fsError); }
1097 #endif /* EFS_USE */
1098 
1099 #if (FAT_USE == 0)
1100  /* Empty functions to reduce image size when FAT not used */
1101  int32_t fat_handle_get (fsFAT_Volume *vol) { return (-1); }
1102  fsStatus fat_open (int32_t handle, const char *path, int32_t openmode){ return (fsError); }
1103  fsStatus fat_close(int32_t handle) { return (fsError); }
1104  int32_t fat_read (int32_t handle, uint8_t *buf, uint32_t len) { return(-1); }
1105  int32_t fat_write(int32_t handle, const uint8_t *buf, uint32_t len) { return(-1); }
1106  int32_t fat_flen (int32_t handle) { return (-1); }
1107  fsStatus fat_seek (int32_t handle, uint32_t pos) { return(fsError); }
1108  int32_t fat_init (fsFAT_Volume *vol) { return (0); }
1109  fsStatus fat_ffind (const char *fn, fsFileInfo *info, fsFAT_Volume *vol) { return (fsError); }
1110  fsStatus fat_delete (const char *fn, fsFAT_Volume *vol) { return(fsError); }
1111  fsStatus fat_rename (const char *path, const char *newname, fsFAT_Volume *vol) { return (fsError); }
1112  fsStatus fat_format (fsFAT_Volume *vol, const char *opt) { return (fsError); }
1113  uint64_t fat_free (fsFAT_Volume *vol) { return (0); }
1114  fsStatus fat_attrib (fsFAT_Volume *vol, const char *fn, uint32_t attrib) { return (fsError); }
1115  fsStatus fat_read_label (fsFAT_Volume *vol, char *buf) { return (fsError); }
1116  fsStatus fat_read_serial (fsFAT_Volume *vol, uint32_t *serial) { return (fsError); }
1117  fsStatus fat_mkdir (const char *path, fsFAT_Volume *vol) { return (fsError); }
1118  uint32_t fat_jour_init (fsFAT_Volume *vi) { return (true); }
1119 #else
1120  #if (FSJ_USE == 0)
1121  /* Empty functions to reduce image size when journal not used */
1122  uint32_t fat_jour_init (fsFAT_Volume *vol) { return (true); }
1123  uint32_t fat_jour_prep (fsFAT_Volume *vol) { return (true); }
1124  uint32_t fsj_set_space (FSJOUR *fsj, uint32_t start_sect, uint32_t cnt) {
1125  return (false); }
1126  uint32_t fsj_write (FSJOUR *fsj, uint32_t sect, uint32_t cnt, uint8_t *buf) {
1127  return (false); }
1128  uint32_t fsj_init (FSJOUR *fsj, FAT_DRV *drv) { return (false); }
1129  #endif
1130 #endif /* FAT_USE */
1131 
1132 #if (FAT_NAME_CACHE_SIZE == 0)
1133  uint32_t elink_init (void) { return (1); }
1134  uint32_t elink_init_path (const char *drvLet) { return (0xFF); }
1135  uint32_t elink_flush (const char *drvLet) { return (1); }
1136  uint32_t elink_cmd (uint32_t i, uint32_t j) { return (0); }
1137  uint32_t elink_insert (void *p, uint32_t i, uint32_t j) { return (1); }
1138  uint32_t elink_delete (void *p, uint32_t i) { return (0); }
1139  uint32_t elink_scan (uint32_t i, void **pp, uint32_t j) { return (1); }
1140 #endif
1141 
1142 
1143 /*-----------------------------------------------------------------------------
1144  * Retarget low level functions
1145  *----------------------------------------------------------------------------*/
1146 
1147 #pragma import(__use_no_semihosting_swi)
1148 
1149 #ifndef STDIO_DISABLE
1150 
1151 /* Standard IO device handles. */
1152 #define STDIN 0x8001
1153 #define STDOUT 0x8002
1154 #define STDERR 0x8003
1155 
1156 /* Standard IO device name defines. */
1157 const char __stdin_name[] = "STDIN";
1158 const char __stdout_name[] = "STDOUT";
1159 const char __stderr_name[] = "STDERR";
1160 
1161 #if (__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M)
1162 /* Redirected to ITM by default */
1163 extern int stdio_getc (void);
1164 extern int stdio_putc (int ch);
1165 #else
1166 /* Dummy implementation */
1167 __weak int stdio_getc (void) { return (-1); }
1168 __weak int stdio_putc (int ch) {}
1169 #endif
1170 
1171 #endif
1172 
1173 
1186 __weak void _ttywrch (int ch) {
1187 #ifndef STDIO_DISABLE
1188 #ifndef STDOUT_LF_CR_DISABLE
1189  if (ch == '\n') stdio_putc ('\r');
1190 #endif
1191  stdio_putc (ch);
1192 #endif
1193 }
1194 
1195 
1211 __weak FILEHANDLE _sys_open (const char *name, int openmode) {
1212  /* Register standard Input Output devices. */
1213 #ifndef STDIO_DISABLE
1214  if (strcmp(name, "STDIN") == 0) {
1215  return (STDIN);
1216  }
1217  if (strcmp(name, "STDOUT") == 0) {
1218  return (STDOUT);
1219  }
1220  if (strcmp(name, "STDERR") == 0) {
1221  return (STDERR);
1222  }
1223 #endif
1224  return (__sys_open (name, openmode));
1225 }
1226 
1227 
1239 __weak int _sys_close (FILEHANDLE fh) {
1240 #ifndef STDIO_DISABLE
1241  switch (fh) {
1242  case STDOUT:
1243  case STDIN:
1244  case STDERR:
1245  return (0);
1246  }
1247 #endif
1248  return (__sys_close (fh));
1249 }
1250 
1251 
1270 __weak int _sys_write (FILEHANDLE fh, const uint8_t *buf, uint32_t len, int mode) {
1271 #ifndef STDIO_DISABLE
1272  int ch;
1273 
1274  switch (fh) {
1275  case STDOUT:
1276  /* Standard Output device. */
1277  for ( ; len; len--) {
1278  ch = *buf++;
1279 #ifndef STDOUT_LF_CR_DISABLE
1280  if (ch == '\n') stdio_putc ('\r');
1281 #endif
1282  stdio_putc (ch);
1283  }
1284  return (0);
1285  case STDIN:
1286  case STDERR:
1287  return (-1);
1288  }
1289 #endif
1290  return (__sys_write (fh, buf, len));
1291 }
1292 
1293 
1321 __weak int _sys_read (FILEHANDLE fh, uint8_t *buf, uint32_t len, int mode) {
1322 #ifndef STDIO_DISABLE
1323  int ch;
1324 
1325  switch (fh) {
1326  case STDIN:
1327  /* Standard Input device. */
1328  do {
1329  ch = stdio_getc ();
1330  } while (ch < 0);
1331  *buf++ = (uint8_t)ch;
1332  len--;
1333  for ( ; len; len--) {
1334  ch = stdio_getc ();
1335  if (ch < 0) break;
1336  *buf++ = (uint8_t)ch;
1337  }
1338  return (len);
1339  case STDOUT:
1340  case STDERR:
1341  return (-1);
1342  }
1343 #endif
1344  return (__sys_read (fh, buf, len));
1345 }
1346 
1347 
1363 __weak int _sys_istty (FILEHANDLE fh) {
1364 #ifndef STDIO_DISABLE
1365  switch (fh) {
1366  case STDOUT:
1367  case STDIN:
1368  case STDERR:
1369  return (1);
1370  }
1371 #endif
1372  return (0);
1373 }
1374 
1375 
1390 __weak int _sys_seek (FILEHANDLE fh, long pos) {
1391 #ifndef STDIO_DISABLE
1392  switch (fh) {
1393  case STDOUT:
1394  case STDIN:
1395  case STDERR:
1396  return (-1);
1397  }
1398 #endif
1399  return (__sys_seek (fh, pos));
1400 }
1401 
1402 
1408 __weak int _sys_ensure (FILEHANDLE fh) {
1409 #ifndef STDIO_DISABLE
1410  switch (fh) {
1411  case STDOUT:
1412  case STDIN:
1413  case STDERR:
1414  return (-1);
1415  }
1416 #endif
1417  return (__sys_ensure (fh));
1418 }
1419 
1420 
1436 __weak long _sys_flen (FILEHANDLE fh) {
1437 #ifndef STDIO_DISABLE
1438  switch (fh) {
1439  case STDOUT:
1440  case STDIN:
1441  case STDERR:
1442  return (0);
1443  }
1444 #endif
1445  return (__sys_flen (fh));
1446 }
1447 
1448 
1465 __weak void _sys_exit (int return_code) {
1466  /* Endless loop. */
1467  while (1);
1468 }