57 #if !defined(S32K144_FEATURES_H)
58 #define S32K144_FEATURES_H
91 #define FEATURE_PCC_HAS_IN_USE_FEATURE (0)
95 #define FEATURE_PINS_DRIVER_USING_PORT (1)
97 #define FEATURE_PORT_HAS_PIN_CONTROL_LOCK (1)
99 #define FEATURE_PINS_HAS_OPEN_DRAIN (0)
101 #define FEATURE_PORT_HAS_DIGITAL_FILTER (1)
103 #define FEATURE_PORT_HAS_DMA_REQUEST (1)
105 #define FEATURE_PINS_HAS_PULL_SELECTION (1)
107 #define FEATURE_PINS_HAS_SLEW_RATE (0)
109 #define FEATURE_PORT_HAS_PASSIVE_FILTER (1)
111 #define FEATURE_PINS_HAS_DRIVE_STRENGTH (1)
113 #define FEATURE_PINS_HAS_DRIVE_STRENGTH_CONTROL (0)
118 #define FEATURE_SOC_PORT_COUNT (5)
120 #define FEATURE_SOC_SCG_COUNT (1)
122 #define FEATURE_SCG_SIRC_LOW_RANGE_FREQ (2000000U)
124 #define FEATURE_SCG_SIRC_HIGH_RANGE_FREQ (8000000U)
127 #define FEATURE_SCG_FIRC_FREQ0 (48000000U)
129 #define FEATURE_SCG_FIRC_FREQ1 (52000000U)
131 #define FEATURE_SCG_FIRC_FREQ2 (56000000U)
133 #define FEATURE_SCG_FIRC_FREQ3 (60000000U)
138 #define FEATURE_FLS_IS_FTFA (0u)
140 #define FEATURE_FLS_IS_FTFC (1u)
142 #define FEATURE_FLS_IS_FTFE (0u)
144 #define FEATURE_FLS_IS_FTFL (0u)
146 #define FEATURE_FLS_HAS_FLEX_RAM_FLAGS (1u)
148 #define FEATURE_FLS_HAS_PF_SWAPPING_STATUS_FLAG (0u)
150 #define FEATURE_FLS_HAS_EEROM_REGION_PROTECTION (1u)
152 #define FEATURE_FLS_HAS_DATA_FLS_REGION_PROTECTION (1u)
154 #define FEATURE_FLS_PF_BLOCK_COUNT (1u)
156 #define FEATURE_FLS_PF_BLOCK_SIZE (524288u)
158 #define FEATURE_FLS_PF_BLOCK_SECTOR_SIZE (4096u)
160 #define FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE (8u)
162 #define FEATURE_FLS_HAS_PF_BLOCK_SWAP (0u)
164 #define FEATURE_FLS_HAS_FLEX_NVM (1u)
166 #define FEATURE_FLS_DF_BLOCK_COUNT (1u)
168 #define FEATURE_FLS_DF_BLOCK_SIZE (65536u)
170 #define FEATURE_FLS_DF_BLOCK_SECTOR_SIZE (2048u)
172 #define FEATURE_FLS_DF_BLOCK_WRITE_UNIT_SIZE (8u)
174 #define FEATURE_FLS_DF_START_ADDRESS (0x10000000u)
176 #define FEATURE_FLS_HAS_FLEX_RAM (1u)
178 #define FEATURE_FLS_FLEX_RAM_SIZE (4096u)
180 #define FEATURE_FLS_FLEX_RAM_START_ADDRESS (0x14000000u)
182 #define FEATURE_FLS_HAS_READ_1S_BLOCK_CMD (1u)
184 #define FEATURE_FLS_HAS_READ_1S_SECTION_CMD (1u)
186 #define FEATURE_FLS_HAS_PROGRAM_CHECK_CMD (1u)
188 #define FEATURE_FLS_HAS_READ_RESOURCE_CMD (0u)
190 #define FEATURE_FLS_HAS_PROGRAM_LONGWORD_CMD (0u)
192 #define FEATURE_FLS_HAS_PROGRAM_PHRASE_CMD (1u)
194 #define FEATURE_FLS_HAS_ERASE_BLOCK_CMD (1u)
196 #define FEATURE_FLS_HAS_ERASE_SECTOR_CMD (1u)
198 #define FEATURE_FLS_HAS_PROGRAM_SECTION_CMD (1u)
200 #define FEATURE_FLS_HAS_READ_1S_ALL_BLOCKS_CMD (1u)
202 #define FEATURE_FLS_HAS_READ_ONCE_CMD (1u)
204 #define FEATURE_FLS_HAS_PROGRAM_ONCE_CMD (1u)
206 #define FEATURE_FLS_HAS_ERASE_ALL_CMD (1u)
208 #define FEATURE_FLS_HAS_VERIFY_BACKDOOR_ACCESS_KEY_CMD (1u)
210 #define FEATURE_FLS_HAS_SWAP_CONTROL_CMD (0u)
212 #define FEATURE_FLS_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD (1u)
214 #define FEATURE_FLS_HAS_PROGRAM_PARTITION_CMD (1u)
216 #define FEATURE_FLS_HAS_SET_FLEXRAM_FUNCTION_CMD (1u)
218 #define FEATURE_FLS_PF_BLOCK_CMD_ADDRESS_ALIGMENT (16u)
220 #define FEATURE_FLS_PF_SECTOR_CMD_ADDRESS_ALIGMENT (16u)
222 #define FEATURE_FLS_PF_SECTION_CMD_ADDRESS_ALIGMENT (16u)
224 #define FEATURE_FLS_PF_RESOURCE_CMD_ADDRESS_ALIGMENT (8u)
226 #define FEATURE_FLS_PF_CHECK_CMD_ADDRESS_ALIGMENT (4u)
228 #define FEATURE_FLS_PF_SWAP_CONTROL_CMD_ADDRESS_ALIGMENT (0u)
230 #define FEATURE_FLS_DF_BLOCK_CMD_ADDRESS_ALIGMENT (8u)
232 #define FEATURE_FLS_DF_SECTOR_CMD_ADDRESS_ALIGMENT (8u)
234 #define FEATURE_FLS_DF_SECTION_CMD_ADDRESS_ALIGMENT (8u)
236 #define FEATURE_FLS_DF_RESOURCE_CMD_ADDRESS_ALIGMENT (8u)
238 #define FEATURE_FLS_DF_CHECK_CMD_ADDRESS_ALIGMENT (4u)
240 #define FEATURE_FLS_DF_SIZE_0000 (0x00010000u)
242 #define FEATURE_FLS_DF_SIZE_0001 (0xFFFFFFFFu)
244 #define FEATURE_FLS_DF_SIZE_0010 (0xFFFFFFFFu)
246 #define FEATURE_FLS_DF_SIZE_0011 (0x00008000u)
248 #define FEATURE_FLS_DF_SIZE_0100 (0x00000000u)
250 #define FEATURE_FLS_DF_SIZE_0101 (0xFFFFFFFFu)
252 #define FEATURE_FLS_DF_SIZE_0110 (0xFFFFFFFFu)
254 #define FEATURE_FLS_DF_SIZE_0111 (0xFFFFFFFFu)
256 #define FEATURE_FLS_DF_SIZE_1000 (0x00000000u)
258 #define FEATURE_FLS_DF_SIZE_1001 (0xFFFFFFFFu)
260 #define FEATURE_FLS_DF_SIZE_1010 (0x00004000u)
262 #define FEATURE_FLS_DF_SIZE_1011 (0x00008000u)
264 #define FEATURE_FLS_DF_SIZE_1100 (0x00010000u)
266 #define FEATURE_FLS_DF_SIZE_1101 (0xFFFFFFFFu)
268 #define FEATURE_FLS_DF_SIZE_1110 (0xFFFFFFFFu)
270 #define FEATURE_FLS_DF_SIZE_1111 (0x00010000u)
272 #define FEATURE_FLS_EE_SIZE_0000 (0xFFFFu)
274 #define FEATURE_FLS_EE_SIZE_0001 (0xFFFFu)
276 #define FEATURE_FLS_EE_SIZE_0010 (0x1000u)
278 #define FEATURE_FLS_EE_SIZE_0011 (0x0800u)
280 #define FEATURE_FLS_EE_SIZE_0100 (0x0400u)
282 #define FEATURE_FLS_EE_SIZE_0101 (0x0200u)
284 #define FEATURE_FLS_EE_SIZE_0110 (0x0100u)
286 #define FEATURE_FLS_EE_SIZE_0111 (0x0080u)
288 #define FEATURE_FLS_EE_SIZE_1000 (0x0040u)
290 #define FEATURE_FLS_EE_SIZE_1001 (0x0020u)
292 #define FEATURE_FLS_EE_SIZE_1010 (0xFFFFu)
294 #define FEATURE_FLS_EE_SIZE_1011 (0xFFFFu)
296 #define FEATURE_FLS_EE_SIZE_1100 (0xFFFFu)
298 #define FEATURE_FLS_EE_SIZE_1101 (0xFFFFu)
300 #define FEATURE_FLS_EE_SIZE_1110 (0xFFFFu)
302 #define FEATURE_FLS_EE_SIZE_1111 (0x0000u)
307 #define FEATURE_CAN_RXFIFO_FRAME_AVAILABLE (5U)
309 #define FEATURE_CAN_RXFIFO_WARNING (6U)
311 #define FEATURE_CAN_RXFIFO_OVERFLOW (7U)
313 #define FEATURE_CAN0_HAS_FD (1)
315 #define FEATURE_CAN1_HAS_FD (0)
317 #define FEATURE_CAN2_HAS_FD (0)
319 #define FEATURE_CAN0_MAX_MB_NUM (32U)
321 #define FEATURE_CAN1_MAX_MB_NUM (16U)
323 #define FEATURE_CAN2_MAX_MB_NUM (16U)
325 #define FEATURE_CAN_HAS_PE_CLKSRC_SELECT (1)
327 #define FEATURE_CAN_HAS_DMA_ENABLE (1)
329 #define FEATURE_CAN_MAX_MB_NUM (32U)
331 #define FEATURE_CAN_MAX_MB_NUM_ARRAY { FEATURE_CAN0_MAX_MB_NUM, \
332 FEATURE_CAN1_MAX_MB_NUM, \
333 FEATURE_CAN2_MAX_MB_NUM }
335 #define FEATURE_CAN_HAS_PRETENDED_NETWORKING (1)
337 #define FEATURE_CAN_HAS_STFCNTEN_ENABLE (0)
339 #define FEATURE_CAN_HAS_ISOCANFDEN_ENABLE (1)
341 #define FEATURE_CAN_HAS_MBDSR1 (0)
343 #define FEATURE_CAN_HAS_MBDSR2 (0)
345 #define FEATURE_CAN_EDMA_REQUESTS { EDMA_REQ_FLEXCAN0, \
351 #define FEATURE_CAN_MB_IRQS_MAX_COUNT (2U)
353 #define FEATURE_CAN_MB_IRQS { CAN_ORed_0_15_MB_IRQS, \
354 CAN_ORed_16_31_MB_IRQS }
356 #define FEATURE_CAN_HAS_WAKE_UP_IRQ (1)
358 #if FEATURE_CAN_HAS_PE_CLKSRC_SELECT
360 #define FEATURE_CAN_PE_CLK_NUM 2U
367 #define FLEXCAN_PE_CLOCK_NAMES { FLEXCAN_CLK_SOURCE_SOSCDIV2, FLEXCAN_CLK_SOURCE_SYS }
370 #define FEATURE_CAN_HAS_SELF_WAKE_UP (0)
375 #define FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS (1)
377 #define FEATURE_LPUART_HAS_MODEM_SUPPORT (1)
379 #define FEATURE_LPUART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT (1)
381 #define FEATURE_LPUART_HAS_BOTH_EDGE_SAMPLING_SUPPORT (1)
383 #define FEATURE_LPUART_FIFO_SIZE (4U)
385 #define FEATURE_LPUART_HAS_ADDRESS_MATCHING (1)
387 #define FEATURE_LPUART_HAS_DMA_ENABLE (1)
389 #define FEATURE_LPUART_STAT_REG_FLAGS_MASK (0xC01FC000U)
391 #define FEATURE_LPUART_FIFO_REG_FLAGS_MASK (0x00030000U)
393 #define FEATURE_LPUART_DEFAULT_OSR (0x0FUL)
395 #define FEATURE_LPUART_DEFAULT_SBR (0x04UL)
397 #define LPUART_CLOCK_NAMES {LPUART0_CLK, LPUART1_CLK, LPUART2_CLK}
402 #define FEATURE_FLEXIO_MAX_SHIFTER_COUNT (4U)
404 #define FEATURE_FLEXIO_DMA_REQ_0 EDMA_REQ_FLEXIO_SHIFTER0
405 #define FEATURE_FLEXIO_DMA_REQ_1 EDMA_REQ_FLEXIO_SHIFTER1
406 #define FEATURE_FLEXIO_DMA_REQ_2 EDMA_REQ_FLEXIO_SHIFTER2
407 #define FEATURE_FLEXIO_DMA_REQ_3 EDMA_REQ_FLEXIO_SHIFTER3
412 #define LPSPI_DMA_INSTANCE 0U
417 #define LPI2C_DMA_INSTANCE 0U
420 #define LPI2C_EDMA_REQ {{(uint8_t)EDMA_REQ_LPI2C0_TX, (uint8_t)EDMA_REQ_LPI2C0_RX}}
422 #define LPI2C_PCC_CLOCKS {LPI2C0_CLK}
427 #define FEATURE_PDB_ADC_CHANNEL_COUNT (2U)
429 #define FEATURE_PDB_ADC_PRE_CHANNEL_COUNT (8U)
431 #define FEATURE_PDB_PODLY_COUNT (1U)
436 #define FEATURE_INTERRUPT_IRQ_MIN (NonMaskableInt_IRQn)
438 #define FEATURE_INTERRUPT_IRQ_MAX (FTM3_Ovf_Reload_IRQn)
440 #define FEATURE_NVIC_PRIO_BITS (4U)
442 #define FEATURE_INTERRUPT_HAS_SOFTWARE_IRQ (0u)
444 #define FEATURE_INTERRUPT_HAS_PENDING_STATE (1u)
446 #define FEATURE_INTERRUPT_HAS_ACTIVE_STATE (1u)
452 #define FEATURE_SCB_VECTKEY (0x05FAU)
458 #define FEATURE_SMC_HAS_STOPO (1)
460 #define FEATURE_SMC_HAS_PSTOPO (0)
462 #define FEATURE_SMC_HAS_WAIT_VLPW (0)
464 #define FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE (1)
470 #define FEATURE_MPU_HARDWARE_REVISION_LEVEL (1U)
472 #define FEATURE_MPU_HAS_PROCESS_IDENTIFIER (1U)
474 #define FEATURE_MPU_MASTER_COUNT (3U)
478 #define FEATURE_MPU_MAX_LOW_MASTER_NUMBER (3U)
482 #define FEATURE_MPU_MAX_HIGH_MASTER_NUMBER (7U)
488 #define FEATURE_MPU_LOW_MASTER_CONTROL_WIDTH (6U)
492 #define FEATURE_MPU_HIGH_MASTER_CONTROL_WIDTH (2U)
495 #define FEATURE_MPU_MASTER_CORE (0U)
497 #define FEATURE_MPU_MASTER_DEBUGGER (1U)
499 #define FEATURE_MPU_MASTER_DMA (2U)
501 #define FEATURE_MPU_MASTER \
503 FEATURE_MPU_MASTER_CORE, \
504 FEATURE_MPU_MASTER_DEBUGGER, \
505 FEATURE_MPU_MASTER_DMA, \
509 #define FEATURE_MPU_SLAVE_COUNT (4U)
511 #define FEATURE_MPU_SLAVE_FLASH_BOOTROM (0U)
513 #define FEATURE_MPU_SLAVE_SRAM_BACKDOOR (1U)
515 #define FEATURE_MPU_SLAVE_SRAM_L_FRONTDOOR (2U)
517 #define FEATURE_MPU_SLAVE_SRAM_U_FRONTDOOR (3U)
519 #define FEATURE_MPU_SLAVE_MASK (0xF0000000U)
520 #define FEATURE_MPU_SLAVE_SHIFT (28u)
521 #define FEATURE_MPU_SLAVE_WIDTH (4u)
522 #define FEATURE_MPU_SLAVE(x) (((uint32_t)(((uint32_t)(x))<<FEATURE_MPU_SLAVE_SHIFT))&FEATURE_MPU_SLAVE_MASK)
527 #define FEATURE_WDOG_UNLOCK_VALUE (0xD928C520U)
529 #define FEATURE_WDOG_TRIGGER_VALUE (0xB480A602U)
531 #define FEATURE_WDOG_TO_RESET_VALUE (0x400U)
533 #define FEATURE_WDOG_MINIMUM_TIMEOUT_VALUE (0x0U)
535 #define FEATURE_WDOG_WIN_RESET_VALUE (0x0U)
537 #define FEATURE_WDOG_CS_RESERVED_MASK (0x2000U)
539 #define FEATURE_WDOG_CLK_FROM_LPO (0x1UL)
541 #define FEATURE_WDOG_UNLOCK16_FIRST_VALUE (0xC520U)
543 #define FEATURE_WDOG_UNLOCK16_SECOND_VALUE (0xD928U)
545 #define FEATURE_WDOG_TRIGGER16_FIRST_VALUE (0xA602U)
547 #define FEATURE_WDOG_TRIGGER16_SECOND_VALUE (0xB480U)
552 #define FEATURE_CRC_DRIVER_S32K1xx (1)
554 #define CRC_DEFAULT_WIDTH CRC_BITS_16
556 #define CRC_DEFAULT_READ_TRANSPOSE CRC_TRANSPOSE_NONE
558 #define CRC_DEFAULT_POLYNOMIAL (0x1021U)
563 #define FEATURE_EDMA_MODULE_CHANNELS (16U)
565 #define FEATURE_CHANNEL_INTERRUPT_LINES (16U)
567 #define FEATURE_ERROR_INTERRUPT_LINES (1U)
569 #define FEATURE_EDMA_HAS_ERROR_IRQ
571 #define FEATURE_EDMA_SEPARATE_IRQ_LINES_PER_CHN
573 #define FEATURE_EDMA_CHN_TO_DCHPRI_INDEX(x) ((x) ^ 3U)
575 #define FEATURE_EDMA_CHANNEL_GROUP_COUNT (1U)
577 #define FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT (16U)
579 #define EDMA_CLOCK_NAMES {SIM_DMA_CLK}
584 #define FEATURE_DMAMUX_MODULE_CHANNELS (16U)
586 #define FEATURE_DMAMUX_HAS_TRIG (1)
588 #define FEATURE_DMAMUX_REQ_SRC_TO_CHN(x) (x)
590 #define FEATURE_DMAMUX_REQ_SRC_TO_INSTANCE(x) (0U)
592 #define FEATURE_DMAMUX_CHN_FOR_EDMA_CHN(x) (x)
594 #define FEATURE_DMAMUX_CHN_REG_INDEX(x) (x)
596 #define DMAMUX_CLOCK_NAMES {DMAMUX0_CLK}
664 #define LPI2C_HAS_FAST_PLUS_MODE (0U)
665 #define LPI2C_HAS_HIGH_SPEED_MODE (0U)
666 #define LPI2C_HAS_ULTRA_FAST_MODE (0U)
670 #define FEATURE_FTM_CHANNEL_COUNT (8U)
672 #define FTM_FEATURE_FAULT_CHANNELS (4U)
674 #define FTM_FEATURE_COMBINE_CHAN_CTRL_WIDTH (8U)
676 #define FTM_FEATURE_OUTPUT_CHANNEL_OFFSET (16U)
678 #define FTM_FEATURE_CNT_MAX_VALUE_U32 (0x0000FFFFU)
680 #define FTM_FEATURE_INPUT_CAPTURE_SINGLE_SHOT (2U)
682 #define FEATURE_FTM_HAS_SUPPORTED_DITHERING (0U)
687 #define FEATURE_EWM_KEY_FIRST_BYTE (0xB4U)
689 #define FEATURE_EWM_KEY_SECOND_BYTE (0x2CU)
691 #define FEATURE_EWM_CMPH_MAX_VALUE (0xFEU)
693 #define FEATURE_EWM_CMPL_MIN_VALUE (0x00U)
785 #define PCC_INVALID_INDEX 0
792 #define PCC_CLOCK_NAME_MAPPINGS \
846 PCC_FlexCAN0_INDEX, \
847 PCC_FlexCAN1_INDEX, \
848 PCC_FlexCAN2_INDEX, \
878 #define NO_PERIPHERAL_FEATURE (0U)
879 #define HAS_CLOCK_GATING_IN_SIM (1U << 0U)
880 #define HAS_MULTIPLIER (1U << 1U)
881 #define HAS_DIVIDER (1U << 2U)
882 #define HAS_PROTOCOL_CLOCK_FROM_ASYNC1 (1U << 3U)
883 #define HAS_PROTOCOL_CLOCK_FROM_ASYNC2 (1U << 4U)
884 #define HAS_INT_CLOCK_FROM_BUS_CLOCK (1U << 5U)
885 #define HAS_INT_CLOCK_FROM_SYS_CLOCK (1U << 6U)
886 #define HAS_INT_CLOCK_FROM_SLOW_CLOCK (1U << 7U)
892 #define PERIPHERAL_FEATURES \
894 (NO_PERIPHERAL_FEATURE), \
895 (NO_PERIPHERAL_FEATURE), \
896 (NO_PERIPHERAL_FEATURE), \
897 (NO_PERIPHERAL_FEATURE), \
898 (NO_PERIPHERAL_FEATURE), \
899 (NO_PERIPHERAL_FEATURE), \
900 (NO_PERIPHERAL_FEATURE), \
901 (NO_PERIPHERAL_FEATURE), \
902 (NO_PERIPHERAL_FEATURE), \
903 (NO_PERIPHERAL_FEATURE), \
904 (NO_PERIPHERAL_FEATURE), \
905 (NO_PERIPHERAL_FEATURE), \
906 (NO_PERIPHERAL_FEATURE), \
907 (NO_PERIPHERAL_FEATURE), \
908 (NO_PERIPHERAL_FEATURE), \
909 (NO_PERIPHERAL_FEATURE), \
910 (NO_PERIPHERAL_FEATURE), \
911 (NO_PERIPHERAL_FEATURE), \
912 (NO_PERIPHERAL_FEATURE), \
913 (NO_PERIPHERAL_FEATURE), \
914 (NO_PERIPHERAL_FEATURE), \
915 (NO_PERIPHERAL_FEATURE), \
916 (NO_PERIPHERAL_FEATURE), \
917 (NO_PERIPHERAL_FEATURE), \
918 (NO_PERIPHERAL_FEATURE), \
919 (NO_PERIPHERAL_FEATURE), \
920 (NO_PERIPHERAL_FEATURE), \
921 (NO_PERIPHERAL_FEATURE), \
922 (NO_PERIPHERAL_FEATURE), \
923 (NO_PERIPHERAL_FEATURE), \
924 (NO_PERIPHERAL_FEATURE), \
925 (HAS_CLOCK_GATING_IN_SIM | HAS_INT_CLOCK_FROM_SYS_CLOCK), \
926 (HAS_CLOCK_GATING_IN_SIM | HAS_INT_CLOCK_FROM_SYS_CLOCK), \
927 (HAS_CLOCK_GATING_IN_SIM | HAS_INT_CLOCK_FROM_SYS_CLOCK), \
928 (HAS_CLOCK_GATING_IN_SIM | HAS_INT_CLOCK_FROM_SYS_CLOCK), \
929 (HAS_CLOCK_GATING_IN_SIM | HAS_INT_CLOCK_FROM_SYS_CLOCK), \
930 (NO_PERIPHERAL_FEATURE), \
931 (NO_PERIPHERAL_FEATURE), \
932 (NO_PERIPHERAL_FEATURE), \
933 (NO_PERIPHERAL_FEATURE), \
934 (NO_PERIPHERAL_FEATURE), \
935 (HAS_INT_CLOCK_FROM_BUS_CLOCK), \
936 (HAS_INT_CLOCK_FROM_BUS_CLOCK), \
937 (HAS_INT_CLOCK_FROM_BUS_CLOCK), \
938 (HAS_INT_CLOCK_FROM_BUS_CLOCK), \
939 (HAS_INT_CLOCK_FROM_BUS_CLOCK), \
940 (HAS_INT_CLOCK_FROM_BUS_CLOCK), \
941 (HAS_INT_CLOCK_FROM_BUS_CLOCK), \
942 (HAS_INT_CLOCK_FROM_BUS_CLOCK), \
943 (HAS_INT_CLOCK_FROM_BUS_CLOCK), \
944 (HAS_INT_CLOCK_FROM_BUS_CLOCK), \
945 (NO_PERIPHERAL_FEATURE), \
946 (HAS_INT_CLOCK_FROM_SYS_CLOCK), \
947 (HAS_INT_CLOCK_FROM_SYS_CLOCK), \
948 (HAS_INT_CLOCK_FROM_SYS_CLOCK), \
949 (HAS_INT_CLOCK_FROM_SYS_CLOCK), \
950 (HAS_INT_CLOCK_FROM_SYS_CLOCK), \
951 (NO_PERIPHERAL_FEATURE), \
952 (HAS_INT_CLOCK_FROM_SLOW_CLOCK), \
953 (NO_PERIPHERAL_FEATURE), \
954 (HAS_PROTOCOL_CLOCK_FROM_ASYNC1 | HAS_INT_CLOCK_FROM_SYS_CLOCK), \
955 (HAS_PROTOCOL_CLOCK_FROM_ASYNC1 | HAS_INT_CLOCK_FROM_SYS_CLOCK), \
956 (HAS_PROTOCOL_CLOCK_FROM_ASYNC1 | HAS_INT_CLOCK_FROM_SYS_CLOCK), \
957 (HAS_PROTOCOL_CLOCK_FROM_ASYNC1 | HAS_INT_CLOCK_FROM_SYS_CLOCK), \
958 (NO_PERIPHERAL_FEATURE), \
959 (HAS_PROTOCOL_CLOCK_FROM_ASYNC2 | HAS_INT_CLOCK_FROM_BUS_CLOCK), \
960 (HAS_PROTOCOL_CLOCK_FROM_ASYNC2 | HAS_INT_CLOCK_FROM_BUS_CLOCK), \
961 (HAS_PROTOCOL_CLOCK_FROM_ASYNC2 | HAS_INT_CLOCK_FROM_BUS_CLOCK), \
962 (HAS_PROTOCOL_CLOCK_FROM_ASYNC2 | HAS_INT_CLOCK_FROM_BUS_CLOCK), \
963 (HAS_PROTOCOL_CLOCK_FROM_ASYNC2 | HAS_INT_CLOCK_FROM_BUS_CLOCK), \
964 (HAS_PROTOCOL_CLOCK_FROM_ASYNC2 | HAS_INT_CLOCK_FROM_BUS_CLOCK), \
965 (HAS_PROTOCOL_CLOCK_FROM_ASYNC2 | HAS_INT_CLOCK_FROM_BUS_CLOCK), \
966 (HAS_PROTOCOL_CLOCK_FROM_ASYNC2 | HAS_INT_CLOCK_FROM_BUS_CLOCK), \
967 (HAS_MULTIPLIER | HAS_DIVIDER | HAS_PROTOCOL_CLOCK_FROM_ASYNC2 | HAS_INT_CLOCK_FROM_BUS_CLOCK), \
968 (HAS_PROTOCOL_CLOCK_FROM_ASYNC2 | HAS_INT_CLOCK_FROM_BUS_CLOCK), \
969 (HAS_PROTOCOL_CLOCK_FROM_ASYNC2 | HAS_INT_CLOCK_FROM_BUS_CLOCK), \
970 (HAS_PROTOCOL_CLOCK_FROM_ASYNC2 | HAS_INT_CLOCK_FROM_BUS_CLOCK), \
971 (NO_PERIPHERAL_FEATURE), \
972 (NO_PERIPHERAL_FEATURE), \
977 #define SIRC_STABILIZATION_TIMEOUT 26U;
981 #define FIRC_STABILIZATION_TIMEOUT 10U;
985 #define SOSC_STABILIZATION_TIMEOUT 3205000U;
989 #define SPLL_STABILIZATION_TIMEOUT 1000U;
1001 #define MAX_FREQ_VLPR 0U
1002 #define MAX_FREQ_RUN 1U
1003 #define MAX_FREQ_HSRUN 2U
1005 #define MAX_FREQ_SYS_CLK 0U
1006 #define MAX_FREQ_BUS_CLK 1U
1007 #define MAX_FREQ_SLOW_CLK 2U
1009 #define MAX_FREQ_MODES_NO 3U
1010 #define MAX_FREQ_CLK_NO 3U
1012 #define CLOCK_MAX_FREQUENCIES \
1014 { 4000000, 4000000, 1000000}, \
1015 { 80000000,40000000,26670000}, \
1016 {112000000,56000000,28000000}, \
1030 #define TMP_SIRC_CLK 0U
1031 #define TMP_FIRC_CLK 1U
1032 #define TMP_SOSC_CLK 2U
1033 #define TMP_SPLL_CLK 3U
1035 #define TMP_SYS_DIV 0U
1036 #define TMP_BUS_DIV 1U
1037 #define TMP_SLOW_DIV 2U
1039 #define TMP_SYS_CLK_NO 4U
1040 #define TMP_SYS_DIV_NO 3U
1042 #define TMP_SYSTEM_CLOCK_CONFIGS \
1044 { SCG_SYSTEM_CLOCK_DIV_BY_1, SCG_SYSTEM_CLOCK_DIV_BY_1, SCG_SYSTEM_CLOCK_DIV_BY_1}, \
1045 { SCG_SYSTEM_CLOCK_DIV_BY_1, SCG_SYSTEM_CLOCK_DIV_BY_2, SCG_SYSTEM_CLOCK_DIV_BY_4}, \
1046 { SCG_SYSTEM_CLOCK_DIV_BY_1, SCG_SYSTEM_CLOCK_DIV_BY_2, SCG_SYSTEM_CLOCK_DIV_BY_2}, \
1047 { SCG_SYSTEM_CLOCK_DIV_BY_3, SCG_SYSTEM_CLOCK_DIV_BY_2, SCG_SYSTEM_CLOCK_DIV_BY_2}, \
1058 #if !defined(DO_NOT_USE_DEPRECATED_SYMBOLS)
1059 #define CORE_CLOCK CORE_CLK
1060 #define BUS_CLOCK BUS_CLK
1061 #define SLOW_CLOCK SLOW_CLK
1062 #define CLKOUT_CLOCK CLKOUT_CLK
1063 #define SIRC_CLOCK SIRC_CLK
1064 #define FIRC_CLOCK FIRC_CLK
1065 #define SOSC_CLOCK SOSC_CLK
1066 #define SPLL_CLOCK SPLL_CLK
1067 #define RTC_CLKIN_CLOCK RTC_CLKIN_CLK
1068 #define SCG_CLKOUT_CLOCK SCG_CLKOUT_CLK
1069 #define SIM_RTCCLK_CLOCK SIM_RTCCLK_CLK
1070 #define SIM_LPO_CLOCK SIM_LPO_CLK
1071 #define SIM_LPO_1K_CLOCK SIM_LPO_1K_CLK
1072 #define SIM_LPO_32K_CLOCK SIM_LPO_32K_CLK
1073 #define SIM_LPO_128K_CLOCK SIM_LPO_128K_CLK
1074 #define SIM_EIM_CLOCK SIM_EIM_CLK
1075 #define SIM_ERM_CLOCK SIM_ERM_CLK
1076 #define SIM_DMA_CLOCK SIM_DMA_CLK
1077 #define SIM_MPU_CLOCK SIM_MPU_CLK
1078 #define SIM_MSCM_CLOCK SIM_MSCM_CLK
1079 #define PCC_DMAMUX0_CLOCK DMAMUX0_CLK
1080 #define PCC_CRC0_CLOCK CRC0_CLK
1081 #define PCC_RTC0_CLOCK RTC0_CLK
1082 #define PCC_PORTA_CLOCK PORTA_CLK
1083 #define PCC_PORTB_CLOCK PORTB_CLK
1084 #define PCC_PORTC_CLOCK PORTC_CLK
1085 #define PCC_PORTD_CLOCK PORTD_CLK
1086 #define PCC_PORTE_CLOCK PORTE_CLK
1087 #define PCC_EWM0_CLOCK EWM0_CLK
1088 #define PCC_CMP0_CLOCK CMP0_CLK
1089 #define PCC_FlexCAN0_CLOCK FlexCAN0_CLK
1090 #define PCC_FlexCAN1_CLOCK FlexCAN1_CLK
1091 #define PCC_FlexCAN2_CLOCK FlexCAN2_CLK
1092 #define PCC_PDB1_CLOCK PDB1_CLK
1093 #define PCC_PDB0_CLOCK PDB0_CLK
1094 #define PCC_FTFC0_CLOCK FTFC0_CLK
1095 #define PCC_FTM0_CLOCK FTM0_CLK
1096 #define PCC_FTM1_CLOCK FTM1_CLK
1097 #define PCC_FTM2_CLOCK FTM2_CLK
1098 #define PCC_FTM3_CLOCK FTM3_CLK
1099 #define PCC_ADC1_CLOCK ADC1_CLK
1100 #define PCC_LPSPI0_CLOCK LPSPI0_CLK
1101 #define PCC_LPSPI1_CLOCK LPSPI1_CLK
1102 #define PCC_LPSPI2_CLOCK LPSPI2_CLK
1103 #define PCC_LPIT0_CLOCK LPIT0_CLK
1104 #define PCC_ADC0_CLOCK ADC0_CLK
1105 #define PCC_LPTMR0_CLOCK LPTMR0_CLK
1106 #define PCC_FLEXIO0_CLOCK FLEXIO0_CLK
1107 #define PCC_LPI2C0_CLOCK LPI2C0_CLK
1108 #define PCC_LPUART0_CLOCK LPUART0_CLK
1109 #define PCC_LPUART1_CLOCK LPUART1_CLK
1110 #define PCC_LPUART2_CLOCK LPUART2_CLK
1118 #define FEATURE_CSEC_PAGE_LENGTH_OFFSET (0xEU)
1121 #define FEATURE_CSEC_MESSAGE_LENGTH_OFFSET (0xCU)
1124 #define FEATURE_CSEC_MAC_LENGTH_OFFSET (0x8U)
1127 #define FEATURE_CSEC_BOOT_SIZE_OFFSET (0x1CU)
1130 #define FEATURE_CSEC_BOOT_FLAVOR_OFFSET (0x1BU)
1133 #define FEATURE_CSEC_FLASH_START_ADDRESS_OFFSET (0x10U)
1136 #define FEATURE_CSEC_VERIFICATION_STATUS_OFFSET (0x14U)
1138 #define FEATURE_CSEC_ERROR_BITS_OFFSET (0x4U)
1141 #define FEATURE_CSEC_SREG_OFFSET (0x2FU)
1144 #define FEATURE_CSEC_PAGE_0_OFFSET (0x0U)
1146 #define FEATURE_CSEC_PAGE_1_OFFSET (0x10U)
1148 #define FEATURE_CSEC_PAGE_2_OFFSET (0x20U)
1150 #define FEATURE_CSEC_PAGE_3_OFFSET (0x30U)
1152 #define FEATURE_CSEC_PAGE_4_OFFSET (0x40U)
1154 #define FEATURE_CSEC_PAGE_5_OFFSET (0x50U)
1156 #define FEATURE_CSEC_PAGE_6_OFFSET (0x60U)
1158 #define FEATURE_CSEC_PAGE_7_OFFSET (0x70U)
1165 #define FEATURE_ADC_HAS_EXTRA_NUM_REGS (0)
1170 #define FEATURE_ADC_MAX_NUM_EXT_CHANS (16)
1173 #if FEATURE_ADC_HAS_EXTRA_NUM_REGS
1174 #define ADC_CTRL_CHANS_COUNT ADC_aSC1_COUNT
1176 #define ADC_CTRL_CHANS_COUNT ADC_SC1_COUNT
1180 #define ADC_DEFAULT_SAMPLE_TIME (0x0CU)
1182 #define ADC_DEFAULT_USER_GAIN (0x04U)
1187 #define FEATURE_MSCM_HAS_INTERRUPT_ROUTER (0)
1189 #define FEATURE_MSCM_HAS_CPU_INTERRUPT_ROUTER (0)
1193 #define FEATURE_OSIF_USE_SYSTICK (1)
1194 #define FEATURE_OSIF_FREERTOS_ISR_CONTEXT_METHOD (1)
1198 #define FEATURE_TRGMUX_HAS_EXTENDED_NUM_TRIGS (0)
1202 #define FEATURE_LPSPI_STATE_STRUCTURES_NULL {NULL, NULL, NULL}
dma_request_source_t
Structure for the DMA hardware request.
clock_names_t
Clock names.