S32 SDK
device_registers.h
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1 /*
2 ** ###################################################################
3 ** Abstract:
4 ** Common include file for CMSIS register access layer headers.
5 **
6 ** Copyright (c) 2015 Freescale Semiconductor, Inc.
7 ** Copyright 2016-2017 NXP
8 ** All rights reserved.
9 **
10 ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
11 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
12 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
13 ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
14 ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
15 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
16 ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
17 ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
18 ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
19 ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
20 ** THE POSSIBILITY OF SUCH DAMAGE.
21 **
22 ** http: www.nxp.com
23 ** mail: support@nxp.com
24 ** ###################################################################
25 */
26 
27 #ifndef DEVICE_REGISTERS_H
28 #define DEVICE_REGISTERS_H
29 
40 /*
41  * Include the cpu specific register header files.
42  *
43  * The CPU macro should be declared in the project or makefile.
44  */
45 
46 #if (defined(CPU_S32K148) || defined(CPU_S32K146) || defined(CPU_S32K144HFT0VLLT) || defined(CPU_S32K144LFT0MLLT) || defined(CPU_S32K142))
47 
48  #define S32K14x_SERIES
49 
50  /* Specific core definitions */
51  #include "common/s32_core_cm4.h"
52 
53  #if defined(CPU_S32K148)
54 
55  #define S32K148_SERIES
56 
57  /* Register definitions */
58  #include "S32K148/include/S32K148.h"
59  /* CPU specific feature definitions */
60  #include "S32K148/include/S32K148_features.h"
61 
62  #elif defined(CPU_S32K146)
63 
64  #define S32K146_SERIES
65 
66  /* Register definitions */
67  #include "S32K146/include/S32K146.h"
68  /* CPU specific feature definitions */
69  #include "S32K146/include/S32K146_features.h"
70 
71  #elif (defined(CPU_S32K144HFT0VLLT) || defined(CPU_S32K144LFT0MLLT))
72 
73  #define S32K144_SERIES
74 
75  /* Register definitions */
76  #include "S32K144/include/S32K144.h"
77  /* CPU specific feature definitions */
78  #include "S32K144/include/S32K144_features.h"
79 
80  #elif defined(CPU_S32K142)
81 
82  #define S32K142_SERIES
83 
84  /* Register definitions */
85  #include "S32K142/include/S32K142.h"
86  /* CPU specific feature definitions */
88 
89  #endif
90 
91 #elif defined(CPU_S32V234)
92 
93  #define S32V234_SERIES
94 
95  /* Specific core definitions */
96  #include "common/s32_core_cm4.h"
97  /* Register definitions */
98  #include "S32V234/include/S32V234.h"
99  /* CPU specific feature definitions */
100  #include "S32V234/include/S32V234_features.h"
101 
102 #elif (defined(CPU_MPC5748G) || defined(CPU_MPC5746C))
103 
104  #define MPC574x_SERIES
105 
106  /* Specific core definitions */
107  #include "common/s32_core_e200.h"
108 
109  #if (defined(CPU_MPC5748G))
110 
111  #define MPC5748G_SERIES
112 
113  /* Register definitions */
114  #include "MPC5748G/include/MPC5748G.h"
115  /* CPU specific feature definitions */
116  #include "MPC5748G/include/MPC5748G_features.h"
117 
118  #elif defined(CPU_MPC5746C)
119 
120  #define MPC5746C_SERIES
121 
122  /* Register definitions */
123  #include "MPC5746C/include/MPC5746C.h"
124  /* CPU specific feature definitions */
125  #include "MPC5746C/include/MPC5746C_features.h"
126 
127  #endif
128 #elif (defined(CPU_S32MTV))
129 
130  #define S32MTV_SERIES
131 
132  /* Specific core definitions */
133  #include "common/s32_core_cm4.h"
134 
135  /* Register definitions */
136  #include "S32MTV/include/S32MTV.h"
137  /* CPU specific feature definitions */
138  #include "S32MTV/include/S32MTV_features.h"
139 
140 #else
141  #error "No valid CPU defined!"
142 #endif
143 
144 #include "devassert.h"
145 
146 #endif /* DEVICE_REGISTERS_H */
147 
148 /*******************************************************************************
149  * EOF
150  ******************************************************************************/
Chip specific module features.
Peripheral Access Layer for S32K142.