S32 SDK
Clock_manager_s32k1xx

Detailed Description

Data Structures

struct  sim_clock_out_config_t
 SIM ClockOut configuration. Implements sim_clock_out_config_t_Class. More...
 
struct  sim_lpo_clock_config_t
 SIM LPO Clocks configuration. Implements sim_lpo_clock_config_t_Class. More...
 
struct  sim_tclk_config_t
 SIM Platform Gate Clock configuration. Implements sim_tclk_config_t_Class. More...
 
struct  sim_plat_gate_config_t
 SIM Platform Gate Clock configuration. Implements sim_plat_gate_config_t_Class. More...
 
struct  sim_qspi_ref_clk_gating_t
 SIM QSPI reference clock gating. Implements sim_qspi_ref_clk_gating_t_Class. More...
 
struct  sim_trace_clock_config_t
 SIM Debug Trace clock configuration. Implements sim_trace_clock_config_t_Class. More...
 
struct  sim_clock_config_t
 SIM configure structure. Implements sim_clock_config_t_Class. More...
 
struct  scg_system_clock_config_t
 SCG system clock configuration. Implements scg_system_clock_config_t_Class. More...
 

Macros

#define NUMBER_OF_TCLK_INPUTS   3U
 

Enumerations

enum  sim_rtc_clk_sel_src_t { SIM_RTCCLK_SEL_SOSCDIV1_CLK = 0x0U, SIM_RTCCLK_SEL_LPO_32K = 0x1U, SIM_RTCCLK_SEL_RTC_CLKIN = 0x2U, SIM_RTCCLK_SEL_FIRCDIV1_CLK = 0x3U }
 SIM CLK32KSEL clock source select Implements sim_rtc_clk_sel_src_t_Class. More...
 
enum  sim_lpoclk_sel_src_t { SIM_LPO_CLK_SEL_LPO_128K = 0x0, SIM_LPO_CLK_SEL_NO_CLOCK = 0x1, SIM_LPO_CLK_SEL_LPO_32K = 0x2, SIM_LPO_CLK_SEL_LPO_1K = 0x3 }
 SIM LPOCLKSEL clock source select Implements sim_lpoclk_sel_src_t_Class. More...
 
enum  sim_clkout_src_t {
  SIM_CLKOUT_SEL_SYSTEM_SCG_CLKOUT = 0x0U, SIM_CLKOUT_SEL_SYSTEM_SOSC_DIV2_CLK = 0x2U, SIM_CLKOUT_SEL_SYSTEM_SIRC_DIV2_CLK = 0x4U, SIM_CLKOUT_SEL_SYSTEM_FIRC_DIV2_CLK = 0x6U,
  SIM_CLKOUT_SEL_SYSTEM_HCLK = 0x7U, SIM_CLKOUT_SEL_SYSTEM_SPLL_DIV2_CLK = 0x8U, SIM_CLKOUT_SEL_SYSTEM_BUS_CLK = 0x9U, SIM_CLKOUT_SEL_SYSTEM_LPO_128K_CLK = 0x10U,
  SIM_CLKOUT_SEL_SYSTEM_LPO_CLK = 0x12U, SIM_CLKOUT_SEL_SYSTEM_RTC_CLK = 0x14U
}
 SIM CLKOUT select. More...
 
enum  sim_clkout_div_t {
  SIM_CLKOUT_DIV_BY_1 = 0x0U, SIM_CLKOUT_DIV_BY_2 = 0x1U, SIM_CLKOUT_DIV_BY_3 = 0x2U, SIM_CLKOUT_DIV_BY_4 = 0x3U,
  SIM_CLKOUT_DIV_BY_5 = 0x4U, SIM_CLKOUT_DIV_BY_6 = 0x5U, SIM_CLKOUT_DIV_BY_7 = 0x6U, SIM_CLKOUT_DIV_BY_8 = 0x7U
}
 SIM CLKOUT divider. More...
 
enum  clock_trace_src_t { CLOCK_TRACE_SRC_CORE_CLK = 0x0, CLOCK_TRACE_SRC_PLATFORM_CLK = 0x1 }
 Debug trace clock source select Implements clock_trace_src_t_Class. More...
 
enum  scg_system_clock_src_t {
  SCG_SYSTEM_CLOCK_SRC_SYS_OSC = 1U, SCG_SYSTEM_CLOCK_SRC_SIRC = 2U, SCG_SYSTEM_CLOCK_SRC_FIRC = 3U, SCG_SYSTEM_CLOCK_SRC_SYS_PLL = 6U,
  SCG_SYSTEM_CLOCK_SRC_NONE = 255U
}
 SCG system clock source. Implements scg_system_clock_src_t_Class. More...
 
enum  scg_system_clock_div_t {
  SCG_SYSTEM_CLOCK_DIV_BY_1 = 0U, SCG_SYSTEM_CLOCK_DIV_BY_2 = 1U, SCG_SYSTEM_CLOCK_DIV_BY_3 = 2U, SCG_SYSTEM_CLOCK_DIV_BY_4 = 3U,
  SCG_SYSTEM_CLOCK_DIV_BY_5 = 4U, SCG_SYSTEM_CLOCK_DIV_BY_6 = 5U, SCG_SYSTEM_CLOCK_DIV_BY_7 = 6U, SCG_SYSTEM_CLOCK_DIV_BY_8 = 7U,
  SCG_SYSTEM_CLOCK_DIV_BY_9 = 8U, SCG_SYSTEM_CLOCK_DIV_BY_10 = 9U, SCG_SYSTEM_CLOCK_DIV_BY_11 = 10U, SCG_SYSTEM_CLOCK_DIV_BY_12 = 11U,
  SCG_SYSTEM_CLOCK_DIV_BY_13 = 12U, SCG_SYSTEM_CLOCK_DIV_BY_14 = 13U, SCG_SYSTEM_CLOCK_DIV_BY_15 = 14U, SCG_SYSTEM_CLOCK_DIV_BY_16 = 15U
}
 SCG system clock divider value. Implements scg_system_clock_div_t_Class. More...
 

Variables

const uint8_t peripheralFeaturesList [CLOCK_NAME_COUNT]
 Peripheral features list Constant array storing the mappings between clock names of the peripherals and feature lists. More...
 
uint32_t g_TClkFreq [NUMBER_OF_TCLK_INPUTS]
 
uint32_t g_xtal0ClkFreq
 
uint32_t g_RtcClkInFreq
 

Macro Definition Documentation

#define NUMBER_OF_TCLK_INPUTS   3U

Definition at line 49 of file clock_S32K1xx.h.

Enumeration Type Documentation

Debug trace clock source select Implements clock_trace_src_t_Class.

Enumerator
CLOCK_TRACE_SRC_CORE_CLK 

core clock

CLOCK_TRACE_SRC_PLATFORM_CLK 

platform clock

Definition at line 179 of file clock_S32K1xx.h.

SCG system clock divider value. Implements scg_system_clock_div_t_Class.

Enumerator
SCG_SYSTEM_CLOCK_DIV_BY_1 

Divided by 1.

SCG_SYSTEM_CLOCK_DIV_BY_2 

Divided by 2.

SCG_SYSTEM_CLOCK_DIV_BY_3 

Divided by 3.

SCG_SYSTEM_CLOCK_DIV_BY_4 

Divided by 4.

SCG_SYSTEM_CLOCK_DIV_BY_5 

Divided by 5.

SCG_SYSTEM_CLOCK_DIV_BY_6 

Divided by 6.

SCG_SYSTEM_CLOCK_DIV_BY_7 

Divided by 7.

SCG_SYSTEM_CLOCK_DIV_BY_8 

Divided by 8.

SCG_SYSTEM_CLOCK_DIV_BY_9 

Divided by 9.

SCG_SYSTEM_CLOCK_DIV_BY_10 

Divided by 10.

SCG_SYSTEM_CLOCK_DIV_BY_11 

Divided by 11.

SCG_SYSTEM_CLOCK_DIV_BY_12 

Divided by 12.

SCG_SYSTEM_CLOCK_DIV_BY_13 

Divided by 13.

SCG_SYSTEM_CLOCK_DIV_BY_14 

Divided by 14.

SCG_SYSTEM_CLOCK_DIV_BY_15 

Divided by 15.

SCG_SYSTEM_CLOCK_DIV_BY_16 

Divided by 16.

Definition at line 231 of file clock_S32K1xx.h.

SCG system clock source. Implements scg_system_clock_src_t_Class.

Enumerator
SCG_SYSTEM_CLOCK_SRC_SYS_OSC 

System OSC.

SCG_SYSTEM_CLOCK_SRC_SIRC 

Slow IRC.

SCG_SYSTEM_CLOCK_SRC_FIRC 

Fast IRC.

SCG_SYSTEM_CLOCK_SRC_SYS_PLL 

System PLL.

SCG_SYSTEM_CLOCK_SRC_NONE 

MAX value.

Definition at line 218 of file clock_S32K1xx.h.

SIM CLKOUT divider.

Enumerator
SIM_CLKOUT_DIV_BY_1 

Divided by 1

SIM_CLKOUT_DIV_BY_2 

Divided by 2

SIM_CLKOUT_DIV_BY_3 

Divided by 3

SIM_CLKOUT_DIV_BY_4 

Divided by 4

SIM_CLKOUT_DIV_BY_5 

Divided by 5

SIM_CLKOUT_DIV_BY_6 

Divided by 6

SIM_CLKOUT_DIV_BY_7 

Divided by 7

SIM_CLKOUT_DIV_BY_8 

Divided by 8

Definition at line 102 of file clock_S32K1xx.h.

SIM CLKOUT select.

Enumerator
SIM_CLKOUT_SEL_SYSTEM_SCG_CLKOUT 

SCG CLKOUT

SIM_CLKOUT_SEL_SYSTEM_SOSC_DIV2_CLK 

SOSC DIV2 CLK

SIM_CLKOUT_SEL_SYSTEM_SIRC_DIV2_CLK 

SIRC DIV2 CLK

SIM_CLKOUT_SEL_SYSTEM_FIRC_DIV2_CLK 

FIRC DIV2 CLK

SIM_CLKOUT_SEL_SYSTEM_HCLK 

HCLK

SIM_CLKOUT_SEL_SYSTEM_SPLL_DIV2_CLK 

SPLL DIV2 CLK

SIM_CLKOUT_SEL_SYSTEM_BUS_CLK 

BUS_CLK

SIM_CLKOUT_SEL_SYSTEM_LPO_128K_CLK 

LPO_CLK 128 Khz

SIM_CLKOUT_SEL_SYSTEM_LPO_CLK 

LPO_CLK as selected by SIM LPO CLK Select

SIM_CLKOUT_SEL_SYSTEM_RTC_CLK 

RTC CLK as selected by SIM CLK 32 KHz Select

Definition at line 85 of file clock_S32K1xx.h.

SIM LPOCLKSEL clock source select Implements sim_lpoclk_sel_src_t_Class.

Enumerator
SIM_LPO_CLK_SEL_LPO_128K 
SIM_LPO_CLK_SEL_NO_CLOCK 
SIM_LPO_CLK_SEL_LPO_32K 
SIM_LPO_CLK_SEL_LPO_1K 

Definition at line 74 of file clock_S32K1xx.h.

SIM CLK32KSEL clock source select Implements sim_rtc_clk_sel_src_t_Class.

Enumerator
SIM_RTCCLK_SEL_SOSCDIV1_CLK 
SIM_RTCCLK_SEL_LPO_32K 
SIM_RTCCLK_SEL_RTC_CLKIN 
SIM_RTCCLK_SEL_FIRCDIV1_CLK 

Definition at line 62 of file clock_S32K1xx.h.

Variable Documentation

uint32_t g_RtcClkInFreq

Definition at line 72 of file clock_S32K1xx.c.

uint32_t g_TClkFreq[NUMBER_OF_TCLK_INPUTS]

Definition at line 69 of file clock_S32K1xx.c.

uint32_t g_xtal0ClkFreq

Definition at line 75 of file clock_S32K1xx.c.

const uint8_t peripheralFeaturesList[CLOCK_NAME_COUNT]

Peripheral features list Constant array storing the mappings between clock names of the peripherals and feature lists.

Definition at line 131 of file clock_S32K1xx.c.