S32 SDK
quadspi_driver.h File Reference
#include <stddef.h>
#include <stdbool.h>
#include "device_registers.h"
#include "status.h"

Go to the source code of this file.

Data Structures

struct  qspi_user_config_t
 Driver configuration structure. More...
 
struct  qspi_ahb_config_t
 AHB configuration structure. More...
 
struct  qspi_state_t
 Driver internal context structure. More...
 

Macros

#define QSPI_AHB_BUFFERS   4
 Number of AHB buffers in the device. More...
 
#define QSPI_LUT_LOCK_KEY   0x5AF05AF0U
 Key to lock/unlock LUT. More...
 

Typedefs

typedef void(* qspi_callback_t) (uint32_t instance, void *param)
 QuadSPI callback function type. More...
 

Enumerations

enum  qspi_lut_commands_t {
  QSPI_LUT_CMD_STOP = 0U, QSPI_LUT_CMD_CMD = 1U, QSPI_LUT_CMD_ADDR = 2U, QSPI_LUT_CMD_DUMMY = 3U,
  QSPI_LUT_CMD_MODE = 4U, QSPI_LUT_CMD_MODE2 = 5U, QSPI_LUT_CMD_MODE4 = 6U, QSPI_LUT_CMD_READ = 7U,
  QSPI_LUT_CMD_WRITE = 8U, QSPI_LUT_CMD_JMP_ON_CS = 9U, QSPI_LUT_CMD_ADDR_DDR = 10U, QSPI_LUT_CMD_MODE_DDR = 11U,
  QSPI_LUT_CMD_MODE2_DDR = 12U, QSPI_LUT_CMD_MODE4_DDR = 13U, QSPI_LUT_CMD_READ_DDR = 14U, QSPI_LUT_CMD_WRITE_DDR = 15U,
  QSPI_LUT_CMD_CMD_DDR = 17U, QSPI_LUT_CMD_CADDR = 18U, QSPI_LUT_CMD_CADDR_DDR = 19U
}
 Lut commands Implements : qspi_lut_commands_t_Class. More...
 
enum  qspi_lut_pads_t { QSPI_LUT_PADS_1 = 0U, QSPI_LUT_PADS_2 = 1U, QSPI_LUT_PADS_4 = 2U, QSPI_LUT_PADS_8 = 3U }
 Lut pad options Implements : qspi_lut_pads_t_Class. More...
 
enum  qspi_transfer_type_t { QSPI_TRANSFER_TYPE_SYNC = 0U, QSPI_TRANSFER_TYPE_ASYNC_INT = 1U, QSPI_TRANSFER_TYPE_ASYNC_DMA = 2U }
 Driver type Implements : qspi_transfer_type_t_Class. More...
 
enum  qspi_read_mode_t { QSPI_READ_MODE_INTERNAL_SAMPLING = 0U, QSPI_READ_MODE_INTERNAL_DQS = 1U, QSPI_READ_MODE_EXTERNAL_DQS = 2U }
 Read mode Implements : qspi_read_mode_t_Class. More...
 
enum  qspi_endianess_t { QSPI_END_64BIT_BE = 0U, QSPI_END_32BIT_LE = 1U, QSPI_END_32BIT_BE = 2U, QSPI_END_64BIT_LE = 3U }
 Endianess options Implements : qspi_endianess_t_Class. More...
 
enum  qspi_clock_src_t { QSPI_CLK_SRC_PLL_DIV1 = 0U, QSPI_CLK_SRC_FIRC_DIV1 = 1U }
 Source of QuadSPI internal reference clock Implements : qspi_clock_src_t_Class. More...
 
enum  qspi_date_rate_t { QSPI_DATE_RATE_SDR = 0U, QSPI_DATE_RATE_DDR = 1U }
 Clock phase used for sampling Rx data Implements : qspi_date_rate_t_Class. More...
 
enum  qspi_flash_side_t { QSPI_FLASH_SIDE_A = 0U, QSPI_FLASH_SIDE_B = 1U }
 External flash connection options (side A/B) Implements : qspi_flash_side_t_Class. More...
 
enum  qspi_sample_delay_t { QSPI_SAMPLE_DELAY_1 = 0U, QSPI_SAMPLE_DELAY_2 = 1U }
 Delay used for sampling Rx data Implements : qspi_sample_delay_t_Class. More...
 
enum  qspi_sample_phase_t { QSPI_SAMPLE_PHASE_NON_INVERTED = 0U, QSPI_SAMPLE_PHASE_INVERTED = 1U }
 Clock phase used for sampling Rx data Implements : qspi_sample_phase_t_Class. More...
 

Functions

QuadSPI Driver
status_t QSPI_DRV_Init (uint32_t instance, const qspi_user_config_t *userConfigPtr, qspi_state_t *state)
 Initializes the qspi driver. More...
 
status_t QSPI_DRV_Deinit (uint32_t instance)
 De-initialize the qspi driver. More...
 
status_t QSPI_DRV_GetDefaultConfig (qspi_user_config_t *userConfigPtr)
 Returns default configuration structure for QuadSPI. More...
 
status_t QSPI_DRV_AhbSetup (uint32_t instance, const qspi_ahb_config_t *config)
 Sets up AHB accesses to the serial flash. More...
 
static void QSPI_DRV_SetLut (uint32_t instance, uint8_t lut, qspi_lut_commands_t instr0, qspi_lut_pads_t pad0, uint8_t oprnd0, qspi_lut_commands_t instr1, qspi_lut_pads_t pad1, uint8_t oprnd1)
 Configures LUT commands. More...
 
static void QSPI_DRV_LockLut (uint32_t instance)
 Locks LUT table. More...
 
static void QSPI_DRV_UnlockLut (uint32_t instance)
 Unlocks LUT table. More...
 
static void QSPI_DRV_ClearIpSeqPointer (uint32_t instance)
 Clears IP sequence pointer. More...
 
static void QSPI_DRV_ClearAHBSeqPointer (uint32_t instance)
 Clears AHB sequence pointer. More...
 
static void QSPI_DRV_SetAhbSeqId (uint32_t instance, uint8_t seqID)
 Sets sequence ID for AHB operations. More...
 
status_t QSPI_DRV_IpCommand (uint32_t instance, uint8_t lut, uint32_t timeout)
 Launches a simple IP command. More...
 
status_t QSPI_DRV_IpRead (uint32_t instance, uint8_t lut, uint32_t addr, uint8_t *dataRead, const uint8_t *dataCmp, uint32_t size, qspi_transfer_type_t transferType, uint32_t timeout)
 Launches an IP read command. More...
 
status_t QSPI_DRV_IpWrite (uint32_t instance, uint8_t lut, uint32_t addr, uint8_t *data, uint32_t size, qspi_transfer_type_t transferType, uint32_t timeout)
 Launches an IP write command. More...
 
status_t QSPI_DRV_IpErase (uint32_t instance, uint8_t lut, uint32_t addr)
 Launches an IP erase command. More...
 
status_t QSPI_DRV_IpGetStatus (uint32_t instance)
 Checks the status of the currently running IP command. More...
 

Variables

QuadSPI_Type *const g_qspiBase []
 Table of base addresses for QuadSPI instances. More...