S32 SDK

#include <S32K142.h>

Data Fields

__I uint32_t VERID
 
__I uint32_t PARAM
 
uint8_t RESERVED_0 [8]
 
__I uint32_t CSR
 
__IO uint32_t RCCR
 
__IO uint32_t VCCR
 
__IO uint32_t HCCR
 
__IO uint32_t CLKOUTCNFG
 
uint8_t RESERVED_1 [220]
 
__IO uint32_t SOSCCSR
 
__IO uint32_t SOSCDIV
 
__IO uint32_t SOSCCFG
 
uint8_t RESERVED_2 [244]
 
__IO uint32_t SIRCCSR
 
__IO uint32_t SIRCDIV
 
__IO uint32_t SIRCCFG
 
uint8_t RESERVED_3 [244]
 
__IO uint32_t FIRCCSR
 
__IO uint32_t FIRCDIV
 
__IO uint32_t FIRCCFG
 
uint8_t RESERVED_4 [756]
 
__IO uint32_t SPLLCSR
 
__IO uint32_t SPLLDIV
 
__IO uint32_t SPLLCFG
 

Detailed Description

SCG - Size of Registers Arrays SCG - Register Layout Typedef

Definition at line 10288 of file S32K142.h.

Field Documentation

__IO uint32_t CLKOUTCNFG

SCG CLKOUT Configuration Register, offset: 0x20

Definition at line 10296 of file S32K142.h.

__I uint32_t CSR

Clock Status Register, offset: 0x10

Definition at line 10292 of file S32K142.h.

__IO uint32_t FIRCCFG

Fast IRC Configuration Register, offset: 0x308

Definition at line 10308 of file S32K142.h.

__IO uint32_t FIRCCSR

Fast IRC Control Status Register, offset: 0x300

Definition at line 10306 of file S32K142.h.

__IO uint32_t FIRCDIV

Fast IRC Divide Register, offset: 0x304

Definition at line 10307 of file S32K142.h.

__IO uint32_t HCCR

HSRUN Clock Control Register, offset: 0x1C

Definition at line 10295 of file S32K142.h.

__I uint32_t PARAM

Parameter Register, offset: 0x4

Definition at line 10290 of file S32K142.h.

__IO uint32_t RCCR

Run Clock Control Register, offset: 0x14

Definition at line 10293 of file S32K142.h.

uint8_t RESERVED_0[8]

Definition at line 10291 of file S32K142.h.

uint8_t RESERVED_1[220]

Definition at line 10297 of file S32K142.h.

uint8_t RESERVED_2[244]

Definition at line 10301 of file S32K142.h.

uint8_t RESERVED_3[244]

Definition at line 10305 of file S32K142.h.

uint8_t RESERVED_4[756]

Definition at line 10309 of file S32K142.h.

__IO uint32_t SIRCCFG

Slow IRC Configuration Register, offset: 0x208

Definition at line 10304 of file S32K142.h.

__IO uint32_t SIRCCSR

Slow IRC Control Status Register, offset: 0x200

Definition at line 10302 of file S32K142.h.

__IO uint32_t SIRCDIV

Slow IRC Divide Register, offset: 0x204

Definition at line 10303 of file S32K142.h.

__IO uint32_t SOSCCFG

System Oscillator Configuration Register, offset: 0x108

Definition at line 10300 of file S32K142.h.

__IO uint32_t SOSCCSR

System OSC Control Status Register, offset: 0x100

Definition at line 10298 of file S32K142.h.

__IO uint32_t SOSCDIV

System OSC Divide Register, offset: 0x104

Definition at line 10299 of file S32K142.h.

__IO uint32_t SPLLCFG

System PLL Configuration Register, offset: 0x608

Definition at line 10312 of file S32K142.h.

__IO uint32_t SPLLCSR

System PLL Control Status Register, offset: 0x600

Definition at line 10310 of file S32K142.h.

__IO uint32_t SPLLDIV

System PLL Divide Register, offset: 0x604

Definition at line 10311 of file S32K142.h.

__IO uint32_t VCCR

VLPR Clock Control Register, offset: 0x18

Definition at line 10294 of file S32K142.h.

__I uint32_t VERID

Version ID Register, offset: 0x0

Definition at line 10289 of file S32K142.h.


The documentation for this struct was generated from the following file: