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S32 SDK
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Modules | |
SAI Register Masks | |
Data Structures | |
struct | SAI_Type |
Macros | |
#define | SAI_TDR_COUNT 4u |
#define | SAI_TFR_COUNT 4u |
#define | SAI_RDR_COUNT 4u |
#define | SAI_RFR_COUNT 4u |
#define | SAI_INSTANCE_COUNT (2u) |
#define | SAI0_BASE (0x40054000u) |
#define | SAI0 ((SAI_Type *)SAI0_BASE) |
#define | SAI1_BASE (0x40055000u) |
#define | SAI1 ((SAI_Type *)SAI1_BASE) |
#define | SAI_BASE_ADDRS { SAI0_BASE, SAI1_BASE } |
#define | SAI_BASE_PTRS { SAI0, SAI1 } |
#define | SAI_IRQS_ARR_COUNT (2u) |
#define | SAI_RX_IRQS_CH_COUNT (1u) |
#define | SAI_TX_IRQS_CH_COUNT (1u) |
#define | SAI_RX_IRQS { SAI0_Rx_IRQn, SAI1_Rx_IRQn } |
#define | SAI_TX_IRQS { SAI0_Tx_IRQn, SAI1_Tx_IRQn } |
Typedefs | |
typedef struct SAI_Type * | SAI_MemMapPtr |
#define SAI0_BASE (0x40054000u) |
#define SAI1_BASE (0x40055000u) |
#define SAI_INSTANCE_COUNT (2u) |
#define SAI_IRQS_ARR_COUNT (2u) |
#define SAI_RX_IRQS { SAI0_Rx_IRQn, SAI1_Rx_IRQn } |
#define SAI_RX_IRQS_CH_COUNT (1u) |
#define SAI_TX_IRQS { SAI0_Tx_IRQn, SAI1_Tx_IRQn } |
#define SAI_TX_IRQS_CH_COUNT (1u) |
typedef struct SAI_Type * SAI_MemMapPtr |