69 #include "flexcan_hw_access.h"
77 #define FLEXCAN_MB_HANDLE_RXFIFO 0U
87 #if FEATURE_CAN_HAS_WAKE_UP_IRQ
106 const uint8_t *mb_data,
122 #if FEATURE_CAN_HAS_DMA_ENABLE
123 static void FLEXCAN_CompleteRxFifoDataDMA(
void *parameter,
edma_chn_status_t status);
144 CAN_Type * base = g_flexcanBase[instance];
145 bool fdEnabled = FLEXCAN_IsFDEnabled(base);
147 FLEXCAN_EnterFreezeMode(base);
152 FLEXCAN_SetExtendedTimeSegments(base, bitrate);
157 FLEXCAN_SetTimeSegments(base, bitrate);
160 FLEXCAN_ExitFreezeMode(base);
178 CAN_Type * base = g_flexcanBase[instance];
180 FLEXCAN_EnterFreezeMode(base);
183 FLEXCAN_SetFDTimeSegments(base, bitrate);
185 FLEXCAN_ExitFreezeMode(base);
202 CAN_Type * base = g_flexcanBase[instance];
204 FLEXCAN_EnterFreezeMode(base);
207 FLEXCAN_GetTimeSegments(base, bitrate);
209 FLEXCAN_ExitFreezeMode(base);
226 CAN_Type * base = g_flexcanBase[instance];
228 FLEXCAN_EnterFreezeMode(base);
231 FLEXCAN_GetFDTimeSegments(base, bitrate);
233 FLEXCAN_ExitFreezeMode(base);
249 CAN_Type * base = g_flexcanBase[instance];
251 FLEXCAN_EnterFreezeMode(base);
253 FLEXCAN_SetRxMaskType(base, type);
255 FLEXCAN_ExitFreezeMode(base);
273 CAN_Type * base = g_flexcanBase[instance];
275 FLEXCAN_EnterFreezeMode(base);
280 FLEXCAN_SetRxFifoGlobalStdMask(base, mask);
285 FLEXCAN_SetRxFifoGlobalExtMask(base, mask);
291 FLEXCAN_ExitFreezeMode(base);
309 CAN_Type * base = g_flexcanBase[instance];
311 FLEXCAN_EnterFreezeMode(base);
316 FLEXCAN_SetRxMsgBuffGlobalStdMask(base, mask);
321 FLEXCAN_SetRxMsgBuffGlobalExtMask(base, mask);
327 FLEXCAN_ExitFreezeMode(base);
345 CAN_Type * base = g_flexcanBase[instance];
347 FLEXCAN_EnterFreezeMode(base);
352 FLEXCAN_SetRxMsgBuff14StdMask(base, mask);
357 FLEXCAN_SetRxMsgBuff14ExtMask(base, mask);
363 FLEXCAN_ExitFreezeMode(base);
381 CAN_Type * base = g_flexcanBase[instance];
383 FLEXCAN_EnterFreezeMode(base);
388 FLEXCAN_SetRxMsgBuff15StdMask(base, mask);
393 FLEXCAN_SetRxMsgBuff15ExtMask(base, mask);
399 FLEXCAN_ExitFreezeMode(base);
418 CAN_Type * base = g_flexcanBase[instance];
421 FLEXCAN_EnterFreezeMode(base);
423 if (mb_idx >= FLEXCAN_GetMaxMsgBuffNum(base))
431 FLEXCAN_SetRxIndividualStdMask(base, mb_idx, mask);
436 FLEXCAN_SetRxIndividualExtMask(base, mb_idx, mask);
442 FLEXCAN_ExitFreezeMode(base);
467 CAN_Type * base = g_flexcanBase[instance];
472 FLEXCAN_Disable(base);
474 #if FEATURE_CAN_HAS_PE_CLKSRC_SELECT
476 FLEXCAN_SelectClock(base, data->pe_clock);
480 FLEXCAN_Enable(base);
482 FLEXCAN_EnterFreezeMode(base);
489 FLEXCAN_SetFDEnabled(base, data->
fd_enable);
490 if (FLEXCAN_IsFDEnabled(base) != data->
fd_enable)
497 FLEXCAN_SetStuffBitCount(base, data->
fd_enable);
502 FLEXCAN_SetSelfReception(base,
false);
509 result = FLEXCAN_EnableRxFifo(base, (uint32_t)data->
num_id_filters);
516 #if FEATURE_CAN_HAS_DMA_ENABLE
520 if (FLEXCAN_IsRxFifoEnabled(base))
522 FLEXCAN_SetRxFifoDMA(base,
true);
535 FLEXCAN_SetPayloadSize(base, data->
payload);
537 result = FLEXCAN_SetMaxMsgBuffNum(base, data->
max_num_mb);
544 if (FLEXCAN_IsFDEnabled(base))
547 FLEXCAN_SetExtendedTimeSegments(base, &bitrate);
549 FLEXCAN_SetFDTimeSegments(base, &bitrate);
554 FLEXCAN_SetTimeSegments(base, &bitrate);
557 FLEXCAN_ExitFreezeMode(base);
560 #if FEATURE_CAN_HAS_WAKE_UP_IRQ
581 for (j = 0; j < i; j++)
594 #if FEATURE_CAN_HAS_DMA_ENABLE
599 g_flexcanStatePtr[instance] = state;
625 flexcan_msgbuff_code_status_t cs;
626 CAN_Type * base = g_flexcanBase[instance];
633 cs.code = (uint32_t)FLEXCAN_TX_REMOTE;
637 cs.code = (uint32_t)FLEXCAN_TX_INACTIVE;
639 return FLEXCAN_SetTxMsgBuff(base, mb_idx, &cs, msg_id, NULL);
656 const uint8_t *mb_data,
664 CAN_Type * base = g_flexcanBase[instance];
673 (void)FLEXCAN_SetMsgBuffIntCmd(base, mb_idx,
true);
675 FLEXCAN_SetErrIntCmd(base,FLEXCAN_INT_ERR,
true);
682 (void)FLEXCAN_SetMsgBuffIntCmd(base, mb_idx,
false);
684 FLEXCAN_SetErrIntCmd(base,FLEXCAN_INT_ERR,
false);
709 const uint8_t *mb_data)
715 CAN_Type * base = g_flexcanBase[instance];
721 result = FLEXCAN_SetMsgBuffIntCmd(base, mb_idx,
true);
723 FLEXCAN_SetErrIntCmd(base,FLEXCAN_INT_ERR,
true);
753 flexcan_msgbuff_code_status_t cs;
754 CAN_Type * base = g_flexcanBase[instance];
760 cs.code = (uint32_t)FLEXCAN_RX_NOT_USED;
761 result = FLEXCAN_SetRxMsgBuff(base, mb_idx, &cs, msg_id);
768 cs.code = (uint32_t)FLEXCAN_RX_INACTIVE;
769 result = FLEXCAN_SetRxMsgBuff(base, mb_idx, &cs, msg_id);
776 cs.code = (uint32_t)FLEXCAN_RX_EMPTY;
777 return FLEXCAN_SetRxMsgBuff(base, mb_idx, &cs, msg_id);
796 CAN_Type * base = g_flexcanBase[instance];
798 FLEXCAN_EnterFreezeMode(base);
801 FLEXCAN_SetRxFifoFilter(base, id_format, id_filter_table);
803 FLEXCAN_ExitFreezeMode(base);
825 CAN_Type * base = g_flexcanBase[instance];
837 result = FLEXCAN_GetMsgBuff(base, mb_idx, data);
842 (void)FLEXCAN_SetMsgBuffIntCmd(base, mb_idx,
false);
844 FLEXCAN_SetErrIntCmd(base,FLEXCAN_INT_ERR,
false);
896 CAN_Type * base = g_flexcanBase[instance];
912 FLEXCAN_SetErrIntCmd(base,FLEXCAN_INT_ERR,
false);
963 #if FEATURE_CAN_HAS_WAKE_UP_IRQ
980 FLEXCAN_Disable(g_flexcanBase[instance]);
1006 CAN_Type * base = g_flexcanBase[instance];
1008 FLEXCAN_EnterFreezeMode(base);
1011 FLEXCAN_SetTDCOffset(base, enable, offset);
1013 FLEXCAN_ExitFreezeMode(base);
1027 const CAN_Type * base = g_flexcanBase[instance];
1043 const CAN_Type * base = g_flexcanBase[instance];
1059 CAN_Type * base = g_flexcanBase[instance];
1076 uint32_t flag_reg = 0;
1077 CAN_Type * base = g_flexcanBase[instance];
1082 uint32_t mb_idx = 0;
1083 flag_reg = FLEXCAN_GetMsgBuffIntStatusFlag(base, mb_idx);
1085 while ((flag_reg & 1U) == 0U)
1088 flag_reg = FLEXCAN_GetMsgBuffIntStatusFlag(base, mb_idx);
1099 bool rxfifoEnabled = FLEXCAN_IsRxFifoEnabled(base);
1109 FLEXCAN_ClearMsgBuffIntStatusFlag(base, mb_idx);
1124 result = FLEXCAN_LockRxMsgBuff(base, mb_idx);
1128 result = FLEXCAN_GetMsgBuff(base, mb_idx, state->
mbs[mb_idx].
mb_message);
1133 FLEXCAN_UnlockRxMsgBuff(base);
1137 FLEXCAN_ClearMsgBuffIntStatusFlag(base, mb_idx);
1160 (void) FLEXCAN_LockRxMsgBuff(base, mb_idx);
1161 (void) FLEXCAN_GetMsgBuff(base, mb_idx, &mb);
1162 FLEXCAN_UnlockRxMsgBuff(base);
1164 if (((mb.
cs & CAN_CS_CODE_MASK) >> CAN_CS_CODE_SHIFT) == (uint32_t)FLEXCAN_RX_EMPTY)
1166 FLEXCAN_ClearMsgBuffIntStatusFlag(base, mb_idx);
1171 FLEXCAN_ClearMsgBuffIntStatusFlag(base, mb_idx);
1183 FLEXCAN_ClearErrIntStatusFlag(base);
1188 #if FEATURE_CAN_HAS_PRETENDED_NETWORKING
1199 void FLEXCAN_WakeUpHandler(uint8_t instance)
1203 CAN_Type * base = g_flexcanBase[instance];
1206 uint32_t flag = base->
WU_MTC;
1214 state->
callback(instance, FLEXCAN_EVENT_WAKEUP_TIMEOUT, state);
1219 state->
callback(instance, FLEXCAN_EVENT_WAKEUP_MATCH, state);
1297 const uint8_t *mb_data,
1305 flexcan_msgbuff_code_status_t cs;
1307 CAN_Type * base = g_flexcanBase[instance];
1325 cs.code = (uint32_t)FLEXCAN_TX_REMOTE;
1329 cs.code = (uint32_t)FLEXCAN_TX_DATA;
1331 result = FLEXCAN_SetTxMsgBuff(base, mb_idx, &cs, msg_id, mb_data);
1359 CAN_Type * base = g_flexcanBase[instance];
1372 result = FLEXCAN_SetMsgBuffIntCmd(base, mb_idx,
true);
1374 FLEXCAN_SetErrIntCmd(base,FLEXCAN_INT_ERR,
true);
1401 CAN_Type * base = g_flexcanBase[instance];
1403 #if FEATURE_CAN_HAS_DMA_ENABLE
1413 if (!FLEXCAN_IsRxFifoEnabled(base))
1425 #if FEATURE_CAN_HAS_DMA_ENABLE
1431 FLEXCAN_CompleteRxFifoDataDMA,
1432 (
void *)((uint32_t)instance));
1442 (uint32_t)(base->
RAMn),
1468 FLEXCAN_SetErrIntCmd(base,FLEXCAN_INT_ERR,
true);
1485 CAN_Type * base = g_flexcanBase[instance];
1489 (void)FLEXCAN_SetMsgBuffIntCmd(base, mb_idx,
false);
1491 FLEXCAN_SetErrIntCmd(base,FLEXCAN_INT_ERR,
false);
1501 #if FEATURE_CAN_HAS_DMA_ENABLE
1510 static void FLEXCAN_CompleteRxFifoDataDMA(
void *parameter,
edma_chn_status_t status)
1512 uint32_t instance = (uint32_t)parameter;
1531 CAN_Type * base = g_flexcanBase[instance];
1542 FLEXCAN_SetErrIntCmd(base,FLEXCAN_INT_ERR,
false);
1544 #if FEATURE_CAN_HAS_DMA_ENABLE
1548 uint32_t *msgData_32 = (uint32_t *)fifo_message->
data;
1552 if (((fifo_message->
cs) & CAN_CS_IDE_MASK) == 0U)
1554 fifo_message->
msgId = fifo_message->
msgId >> CAN_ID_STD_SHIFT;
1557 fifo_message->
dataLen = (uint8_t)((fifo_message->
cs & CAN_CS_DLC_MASK) >> CAN_CS_DLC_SHIFT);
1591 #if FEATURE_CAN_HAS_PRETENDED_NETWORKING
1600 void FLEXCAN_DRV_ConfigPN(uint8_t instance,
bool enable,
const flexcan_pn_config_t *pnConfig)
1604 CAN_Type * base = g_flexcanBase[instance];
1606 FLEXCAN_EnterFreezeMode(base);
1610 FLEXCAN_ConfigPN(base, pnConfig);
1611 #if FEATURE_CAN_HAS_SELF_WAKE_UP
1612 (void)FLEXCAN_SetSelfWakeUp(base,
false);
1616 FLEXCAN_SetPN(base, enable);
1618 FLEXCAN_ExitFreezeMode(base);
1628 void FLEXCAN_DRV_GetWMB(uint8_t instance, uint8_t wmbIndex,
flexcan_msgbuff_t *wmb)
1633 uint32_t *tmp, wmbData;
1634 const CAN_Type *base = g_flexcanBase[instance];
1636 tmp = (uint32_t *)&wmb->
data[0];
1640 tmp = (uint32_t *)&wmb->
data[4];
1646 if ((wmb->
cs & CAN_CS_IDE_MASK) != 0U)
1655 wmb->
dataLen = (uint8_t)((wmb->
cs & CAN_CS_DLC_MASK) >> 16);
1660 #if FEATURE_CAN_HAS_SELF_WAKE_UP
1670 status_t FLEXCAN_DRV_ConfigSelfWakeUp(uint8_t instance,
bool enable,
bool lowPassFilterEn)
1674 CAN_Type *base = g_flexcanBase[instance];
1678 status = FLEXCAN_SetSelfWakeUp(base, enable);
1682 FLEXCAN_EnterFreezeMode(base);
1685 FLEXCAN_SetWakSrc(base, lowPassFilterEn);
1687 FLEXCAN_ExitFreezeMode(base);
1707 #if FEATURE_CAN_HAS_PE_CLKSRC_SELECT
1733 #if FEATURE_CAN_HAS_PE_CLKSRC_SELECT
1735 config->pe_clock = flexcanPEClkNames[0];
status_t FLEXCAN_DRV_Receive(uint8_t instance, uint8_t mb_idx, flexcan_msgbuff_t *data)
Receives a CAN frame using the specified message buffer.
void FLEXCAN_DRV_GetBitrateFD(uint8_t instance, flexcan_time_segment_t *bitrate)
Gets the FlexCAN bit rate for the data phase of FD frames (BRS enabled).
status_t FLEXCAN_DRV_Deinit(uint8_t instance)
Shuts down a FlexCAN instance.
Internal driver state information.
flexcan_msgbuff_id_type_t
FlexCAN Message Buffer ID type Implements : flexcan_msgbuff_id_type_t_Class.
flexcan_operation_modes_t flexcanMode
flexcan_fd_payload_size_t payload
status_t FLEXCAN_DRV_ConfigTxMb(uint8_t instance, uint8_t mb_idx, const flexcan_data_info_t *tx_info, uint32_t msg_id)
FlexCAN transmit message buffer field configuration.
status_t OSIF_SemaDestroy(const semaphore_t *const pSem)
Destroys a previously created semaphore.
void FLEXCAN_DRV_GetDefaultConfig(flexcan_user_config_t *config)
Gets the default configuration structure.
flexcan_time_segment_t bitrate
static const IRQn_Type g_flexcanErrorIrqId[]
flexcan_rx_mask_type_t
FlexCAN Rx mask type. Implements : flexcan_rx_mask_type_t_Class.
__IO uint32_t RAMn[CAN_RAMn_COUNT]
static const IRQn_Type g_flexcanOredMessageBufferIrqId[FEATURE_CAN_MB_IRQS_MAX_COUNT][CAN_INSTANCE_COUNT]
flexcan_rx_fifo_id_filter_num_t num_id_filters
void FLEXCAN_DRV_SetTDCOffset(uint8_t instance, bool enable, uint8_t offset)
Enables/Disables the Transceiver Delay Compensation feature and sets the Transceiver Delay Compensati...
static status_t FLEXCAN_StartRxMessageFifoData(uint8_t instance, flexcan_msgbuff_t *data, bool isBlocking)
status_t FLEXCAN_DRV_RxFifo(uint8_t instance, flexcan_msgbuff_t *data)
Receives a CAN frame using the message FIFO.
status_t EDMA_DRV_StopChannel(uint8_t channel)
Stops the eDMA channel.
#define FEATURE_CAN_RXFIFO_WARNING
void FLEXCAN_DRV_ConfigRxFifo(uint8_t instance, flexcan_rx_fifo_id_element_format_t id_format, const flexcan_id_table_t *id_filter_table)
FlexCAN Rx FIFO field configuration.
#define CAN_FDCTRL_TDCFAIL_MASK
status_t FLEXCAN_DRV_GetTransferStatus(uint8_t instance, uint8_t mb_idx)
Returns whether the previous FlexCAN transfer has finished.
status_t OSIF_SemaCreate(semaphore_t *const pSem, const uint8_t initValue)
Creates a semaphore with a given value.
flexcan_msgbuff_id_type_t msg_id_type
void FLEXCAN_DRV_InstallEventCallback(uint8_t instance, flexcan_callback_t callback, void *callbackParam)
Installs a callback function for the IRQ handler.
#define CAN_WU_MTC_WTOF_MASK
static flexcan_state_t * g_flexcanStatePtr[CAN_INSTANCE_COUNT]
#define REV_BYTES_32(a, b)
Reverse byte order in a word.
void INT_SYS_DisableIRQ(IRQn_Type irqNumber)
Disables an interrupt for a given IRQ number.
#define FLEXCAN_MB_HANDLE_RXFIFO
#define CAN_INSTANCE_COUNT
static void FLEXCAN_CompleteTransfer(uint8_t instance, uint32_t mb_idx)
void FLEXCAN_DRV_ClearTDCFail(uint8_t instance)
Clears the TDC Fail flag.
static status_t FLEXCAN_StartSendData(uint8_t instance, uint8_t mb_idx, const flexcan_data_info_t *tx_info, uint32_t msg_id, const uint8_t *mb_data, bool isBlocking)
edma_chn_status_t
Channel status for eDMA channel.
flexcan_rxfifo_transfer_type_t transferType
status_t FLEXCAN_DRV_AbortTransfer(uint8_t instance, uint8_t mb_idx)
Ends a non-blocking FlexCAN transfer early.
static const IRQn_Type g_flexcanBusOffIrqId[]
void FLEXCAN_DRV_SetRxMb15Mask(uint8_t instance, flexcan_msgbuff_id_type_t id_type, uint32_t mask)
Sets the FlexCAN Rx MB 15 mask (standard or extended).
#define CAN_WU_MTC_WUMF_MASK
void FLEXCAN_DRV_SetRxMaskType(uint8_t instance, flexcan_rx_mask_type_t type)
Sets the Rx masking type.
FlexCAN bitrate related structures Implements : flexcan_time_segment_t_Class.
status_t FLEXCAN_DRV_ConfigRxMb(uint8_t instance, uint8_t mb_idx, const flexcan_data_info_t *rx_info, uint32_t msg_id)
FlexCAN receive message buffer field configuration.
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
void(* flexcan_callback_t)(uint8_t instance, flexcan_event_type_t eventType, flexcan_state_t *flexcanState)
FlexCAN Driver callback function type Implements : flexcan_callback_t_Class.
#define FEATURE_CAN_RXFIFO_FRAME_AVAILABLE
bool FLEXCAN_DRV_GetTDCFail(uint8_t instance)
Gets the value of the TDC Fail flag.
FlexCAN message buffer structure Implements : flexcan_msgbuff_t_Class.
flexcan_rx_fifo_id_element_format_t
ID formats for Rx FIFO Implements : flexcan_rx_fifo_id_element_format_t_Class.
status_t FLEXCAN_DRV_SendBlocking(uint8_t instance, uint8_t mb_idx, const flexcan_data_info_t *tx_info, uint32_t msg_id, const uint8_t *mb_data, uint32_t timeout_ms)
Sends a CAN frame using the specified message buffer, in a blocking manner.
#define CAN_FDCTRL_TDCVAL_MASK
FlexCAN Rx FIFO ID filter table structure Implements : flexcan_id_table_t_Class.
status_t FLEXCAN_DRV_RxFifoBlocking(uint8_t instance, flexcan_msgbuff_t *data, uint32_t timeout_ms)
Receives a CAN frame using the message FIFO, in a blocking manner.
void(* callback)(uint8_t instance, flexcan_event_type_t eventType, struct FlexCANState *state)
flexcan_time_segment_t bitrate_cbt
flexcan_rxfifo_transfer_type_t transfer_type
status_t OSIF_SemaWait(semaphore_t *const pSem, const uint32_t timeout)
Decrement a semaphore with timeout.
uint8_t FLEXCAN_DRV_GetTDCValue(uint8_t instance)
Gets the value of the Transceiver Delay Compensation.
status_t EDMA_DRV_StartChannel(uint8_t channel)
Starts an eDMA channel.
#define CAN_FDCTRL_TDCFAIL_SHIFT
void FLEXCAN_DRV_SetRxFifoGlobalMask(uint8_t instance, flexcan_msgbuff_id_type_t id_type, uint32_t mask)
Sets the FlexCAN Rx FIFO global mask (standard or extended).
status_t OSIF_SemaPost(semaphore_t *const pSem)
Increment a semaphore.
static CAN_Type *const g_flexcanBase[]
struct CAN_Type::@0 WMB[CAN_WMB_COUNT]
status_t FLEXCAN_DRV_ReceiveBlocking(uint8_t instance, uint8_t mb_idx, flexcan_msgbuff_t *data, uint32_t timeout_ms)
Receives a CAN frame using the specified message buffer, in a blocking manner.
static status_t FLEXCAN_StartRxMessageBufferData(uint8_t instance, uint8_t mb_idx, flexcan_msgbuff_t *data, bool isBlocking)
void FLEXCAN_DRV_SetBitrateCbt(uint8_t instance, const flexcan_time_segment_t *bitrate)
Sets the FlexCAN bit rate for the data phase of FD frames (BRS enabled).
#define FEATURE_CAN_MB_IRQS_MAX_COUNT
void FLEXCAN_IRQHandler(uint8_t instance)
Interrupt handler for a FlexCAN instance.
#define FEATURE_CAN_MB_IRQS
void INT_SYS_EnableIRQ(IRQn_Type irqNumber)
Enables an interrupt for a given IRQ number.
#define FLEXCAN_PE_CLOCK_NAMES
flexcan_msgbuff_t * mb_message
void FLEXCAN_DRV_SetRxMbGlobalMask(uint8_t instance, flexcan_msgbuff_id_type_t id_type, uint32_t mask)
Sets the FlexCAN Rx MB global mask (standard or extended).
FlexCAN data info from user Implements : flexcan_data_info_t_Class.
status_t FLEXCAN_DRV_Init(uint8_t instance, flexcan_state_t *state, const flexcan_user_config_t *data)
Initializes the FlexCAN peripheral.
status_t EDMA_DRV_ConfigSingleBlockTransfer(uint8_t channel, edma_transfer_type_t type, uint32_t srcAddr, uint32_t destAddr, edma_transfer_size_t transferSize, uint32_t dataBufferSize)
Configures a simple single block data transfer with DMA.
status_t FLEXCAN_DRV_Send(uint8_t instance, uint8_t mb_idx, const flexcan_data_info_t *tx_info, uint32_t msg_id, const uint8_t *mb_data)
Sends a CAN frame using the specified message buffer.
status_t FLEXCAN_DRV_SetRxIndividualMask(uint8_t instance, flexcan_msgbuff_id_type_t id_type, uint8_t mb_idx, uint32_t mask)
Sets the FlexCAN Rx individual mask (standard or extended).
volatile flexcan_mb_handle_t mbs[FEATURE_CAN_MAX_MB_NUM]
#define CAN_FDCTRL_TDCVAL_SHIFT
status_t EDMA_DRV_InstallCallback(uint8_t channel, edma_callback_t callback, void *parameter)
Registers the callback function and the parameter for eDMA channel.
void FLEXCAN_DRV_SetBitrate(uint8_t instance, const flexcan_time_segment_t *bitrate)
Sets the FlexCAN bit rate for standard frames or the arbitration phase of FD frames.
static void FLEXCAN_CompleteRxMessageFifoData(uint8_t instance)
#define FEATURE_CAN_RXFIFO_OVERFLOW
void FLEXCAN_DRV_SetRxMb14Mask(uint8_t instance, flexcan_msgbuff_id_type_t id_type, uint32_t mask)
Sets the FlexCAN Rx MB 14 mask (standard or extended).
void FLEXCAN_DRV_GetBitrate(uint8_t instance, flexcan_time_segment_t *bitrate)
Gets the FlexCAN bit rate for standard frames or the arbitration phase of FD frames.
#define FEATURE_CAN_MAX_MB_NUM
IRQn_Type
Defines the Interrupt Numbers definitions.
#define FEATURE_CAN_PE_CLK_NUM
Number of FlexCAN PE clock sources.