#include <S32K142.h>
DMA - Register Layout Typedef
Definition at line 2160 of file S32K142.h.
TCD Transfer Attributes, array offset: 0x1006, array step: 0x20
Definition at line 2189 of file S32K142.h.
Clear DONE Status Bit Register, offset: 0x1C
Definition at line 2171 of file S32K142.h.
Clear Enable Error Interrupt Register, offset: 0x18
Definition at line 2167 of file S32K142.h.
Clear Enable Request Register, offset: 0x1A
Definition at line 2169 of file S32K142.h.
Clear Error Register, offset: 0x1E
Definition at line 2173 of file S32K142.h.
Clear Interrupt Request Register, offset: 0x1F
Definition at line 2174 of file S32K142.h.
Control Register, offset: 0x0
Definition at line 2161 of file S32K142.h.
TCD Control and Status, array offset: 0x101C, array step: 0x20
Definition at line 2203 of file S32K142.h.
TCD Destination Address, array offset: 0x1010, array step: 0x20
Definition at line 2196 of file S32K142.h.
Channel n Priority Register, array offset: 0x100, array step: 0x1
Definition at line 2184 of file S32K142.h.
TCD Last Destination Address Adjustment/Scatter Gather Address, array offset: 0x1018, array step: 0x20
Definition at line 2202 of file S32K142.h.
TCD Signed Destination Address Offset, array offset: 0x1014, array step: 0x20
Definition at line 2197 of file S32K142.h.
Enable Asynchronous Request in Stop Register, offset: 0x44
Definition at line 2182 of file S32K142.h.
Enable Error Interrupt Register, offset: 0x14
Definition at line 2166 of file S32K142.h.
TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled), array offset: 0x1016, array step: 0x20
TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled), array offset: 0x101E, array step: 0x20
Definition at line 2199 of file S32K142.h.
TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled), array offset: 0x1016, array step: 0x20
TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled), array offset: 0x101E, array step: 0x20
Definition at line 2200 of file S32K142.h.
Enable Request Register, offset: 0xC
Definition at line 2164 of file S32K142.h.
Error Register, offset: 0x2C
Definition at line 2178 of file S32K142.h.
Error Status Register, offset: 0x4
Definition at line 2162 of file S32K142.h.
Hardware Request Status Register, offset: 0x34
Definition at line 2180 of file S32K142.h.
Interrupt Request Register, offset: 0x24
Definition at line 2176 of file S32K142.h.
TCD Minor Byte Count (Minor Loop Mapping Disabled), array offset: 0x1008, array step: 0x20
Definition at line 2191 of file S32K142.h.
TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled), array offset: 0x1008, array step: 0x20
Definition at line 2192 of file S32K142.h.
TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled), array offset: 0x1008, array step: 0x20
Definition at line 2193 of file S32K142.h.
TCD Source Address, array offset: 0x1000, array step: 0x20
Definition at line 2187 of file S32K142.h.
Set Enable Error Interrupt Register, offset: 0x19
Definition at line 2168 of file S32K142.h.
Set Enable Request Register, offset: 0x1B
Definition at line 2170 of file S32K142.h.
TCD Last Source Address Adjustment, array offset: 0x100C, array step: 0x20
Definition at line 2195 of file S32K142.h.
TCD Signed Source Address Offset, array offset: 0x1004, array step: 0x20
Definition at line 2188 of file S32K142.h.
Set START Bit Register, offset: 0x1D
Definition at line 2172 of file S32K142.h.
The documentation for this struct was generated from the following file:
- D:/Bamboo/home/xml-data/build-dir/AS-NIG6-DOCS/layout_S32K142_170630/platform/devices/S32K142/include/S32K142.h