![]() |
S32 SDK
|
#include <S32K142.h>
Data Fields | |
__IO uint32_t | MCR |
__IO uint32_t | CTRL1 |
__IO uint32_t | TIMER |
uint8_t | RESERVED_0 [4] |
__IO uint32_t | RXMGMASK |
__IO uint32_t | RX14MASK |
__IO uint32_t | RX15MASK |
__IO uint32_t | ECR |
__IO uint32_t | ESR1 |
uint8_t | RESERVED_1 [4] |
__IO uint32_t | IMASK1 |
uint8_t | RESERVED_2 [4] |
__IO uint32_t | IFLAG1 |
__IO uint32_t | CTRL2 |
__I uint32_t | ESR2 |
uint8_t | RESERVED_3 [8] |
__I uint32_t | CRCR |
__IO uint32_t | RXFGMASK |
__I uint32_t | RXFIR |
__IO uint32_t | CBT |
uint8_t | RESERVED_4 [44] |
__IO uint32_t | RAMn [CAN_RAMn_COUNT] |
uint8_t | RESERVED_5 [1536] |
__IO uint32_t | RXIMR [CAN_RXIMR_COUNT] |
uint8_t | RESERVED_6 [576] |
__IO uint32_t | CTRL1_PN |
__IO uint32_t | CTRL2_PN |
__IO uint32_t | WU_MTC |
__IO uint32_t | FLT_ID1 |
__IO uint32_t | FLT_DLC |
__IO uint32_t | PL1_LO |
__IO uint32_t | PL1_HI |
__IO uint32_t | FLT_ID2_IDMASK |
__IO uint32_t | PL2_PLMASK_LO |
__IO uint32_t | PL2_PLMASK_HI |
uint8_t | RESERVED_7 [24] |
struct { | |
__I uint32_t WMBn_CS | |
__I uint32_t WMBn_ID | |
__I uint32_t WMBn_D03 | |
__I uint32_t WMBn_D47 | |
} | WMB [CAN_WMB_COUNT] |
uint8_t | RESERVED_8 [128] |
__IO uint32_t | FDCTRL |
__IO uint32_t | FDCBT |
__I uint32_t | FDCRC |
__IO uint32_t CTRL1_PN |
__IO uint32_t CTRL2_PN |
__IO uint32_t ESR1 |
__I uint32_t ESR2 |
__IO uint32_t FDCBT |
__IO uint32_t FDCTRL |
__IO uint32_t FLT_DLC |
__IO uint32_t FLT_ID1 |
__IO uint32_t FLT_ID2_IDMASK |
__IO uint32_t IFLAG1 |
__IO uint32_t IMASK1 |
__IO uint32_t MCR |
__IO uint32_t PL1_HI |
__IO uint32_t PL1_LO |
__IO uint32_t PL2_PLMASK_HI |
__IO uint32_t PL2_PLMASK_LO |
__IO uint32_t RAMn[CAN_RAMn_COUNT] |
__IO uint32_t RXFGMASK |
__I uint32_t RXFIR |
__IO uint32_t RXIMR[CAN_RXIMR_COUNT] |
__IO uint32_t RXMGMASK |
struct { ... } WMB[CAN_WMB_COUNT] |
__I uint32_t WMBn_CS |
__I uint32_t WMBn_D03 |
__I uint32_t WMBn_D47 |
__I uint32_t WMBn_ID |
__IO uint32_t WU_MTC |