S32 SDK

#include <S32K142.h>

Data Fields

__I uint32_t VERID
 
__I uint32_t PARAM
 
uint8_t RESERVED_0 [8]
 
__IO uint32_t CR
 
__IO uint32_t SR
 
__IO uint32_t IER
 
__IO uint32_t DER
 
__IO uint32_t CFGR0
 
__IO uint32_t CFGR1
 
uint8_t RESERVED_1 [8]
 
__IO uint32_t DMR0
 
__IO uint32_t DMR1
 
uint8_t RESERVED_2 [8]
 
__IO uint32_t CCR
 
uint8_t RESERVED_3 [20]
 
__IO uint32_t FCR
 
__I uint32_t FSR
 
__IO uint32_t TCR
 
__O uint32_t TDR
 
uint8_t RESERVED_4 [8]
 
__I uint32_t RSR
 
__I uint32_t RDR
 

Detailed Description

LPSPI - Size of Registers Arrays LPSPI - Register Layout Typedef

Definition at line 6104 of file S32K142.h.

Field Documentation

__IO uint32_t CCR

Clock Configuration Register, offset: 0x40

Definition at line 6118 of file S32K142.h.

__IO uint32_t CFGR0

Configuration Register 0, offset: 0x20

Definition at line 6112 of file S32K142.h.

__IO uint32_t CFGR1

Configuration Register 1, offset: 0x24

Definition at line 6113 of file S32K142.h.

__IO uint32_t CR

Control Register, offset: 0x10

Definition at line 6108 of file S32K142.h.

__IO uint32_t DER

DMA Enable Register, offset: 0x1C

Definition at line 6111 of file S32K142.h.

__IO uint32_t DMR0

Data Match Register 0, offset: 0x30

Definition at line 6115 of file S32K142.h.

__IO uint32_t DMR1

Data Match Register 1, offset: 0x34

Definition at line 6116 of file S32K142.h.

__IO uint32_t FCR

FIFO Control Register, offset: 0x58

Definition at line 6120 of file S32K142.h.

__I uint32_t FSR

FIFO Status Register, offset: 0x5C

Definition at line 6121 of file S32K142.h.

__IO uint32_t IER

Interrupt Enable Register, offset: 0x18

Definition at line 6110 of file S32K142.h.

__I uint32_t PARAM

Parameter Register, offset: 0x4

Definition at line 6106 of file S32K142.h.

__I uint32_t RDR

Receive Data Register, offset: 0x74

Definition at line 6126 of file S32K142.h.

uint8_t RESERVED_0[8]

Definition at line 6107 of file S32K142.h.

uint8_t RESERVED_1[8]

Definition at line 6114 of file S32K142.h.

uint8_t RESERVED_2[8]

Definition at line 6117 of file S32K142.h.

uint8_t RESERVED_3[20]

Definition at line 6119 of file S32K142.h.

uint8_t RESERVED_4[8]

Definition at line 6124 of file S32K142.h.

__I uint32_t RSR

Receive Status Register, offset: 0x70

Definition at line 6125 of file S32K142.h.

__IO uint32_t SR

Status Register, offset: 0x14

Definition at line 6109 of file S32K142.h.

__IO uint32_t TCR

Transmit Command Register, offset: 0x60

Definition at line 6122 of file S32K142.h.

__O uint32_t TDR

Transmit Data Register, offset: 0x64

Definition at line 6123 of file S32K142.h.

__I uint32_t VERID

Version ID Register, offset: 0x0

Definition at line 6105 of file S32K142.h.


The documentation for this struct was generated from the following file: