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S32 SDK
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Data Structures | |
struct | drv_config_t |
Functions | |
static status_t | sbc_write_can_others (const sbc_can_conf_t *const can) |
static status_t | sbc_read_can_others (sbc_can_conf_t *const can) |
static void | sbc_clean_events_status (sbc_evn_capt_t *event) |
static status_t | sbc_change_factories_direct (const sbc_factories_conf_t *const factory) |
static uint8_t | sbc_get_factories_crc (uint8_t *data) |
status_t | SBC_Init (const sbc_int_config_t *const config, const uint32_t lpspiInstance) |
This function initializes all registers. It waits 10ms and then writes to all registers. More... | |
status_t | SBC_SetVreg (const sbc_regulator_ctr_t *const regulatorCtr) |
This function configures Regulator control registers. More... | |
status_t | SBC_GetVreg (sbc_regulator_ctr_t *const regulatorCtr) |
This function reads Regulator control registers. More... | |
status_t | SBC_SetWatchdog (const sbc_wtdog_ctr_t *const wtdog) |
This function configures Watchdog control register (0x00). More... | |
status_t | SBC_GetWatchdog (sbc_wtdog_ctr_t *const wtdog) |
This function reads Watchdog control register (0x00). More... | |
void | SBC_FeedWatchdog (void) |
This function refreshes watchdog period by writing byte to the SBC watchdog register. This function must be called periodically according Watchdog mode control and Nominal watchdog period settings. Note: Unxpected behaviour can happend if watchdog mode is set to timeout period and watchdog is triggered exactly at 50% of period. Be sure you trigger watchdog before 50% or above 50% of watchdog period. More... | |
status_t | SBC_SetMode (const sbc_mode_mc_t mode) |
This function writes to Mode control register. (0x01). More... | |
status_t | SBC_GetMode (sbc_mode_mc_t *const mode) |
This function reads Mode control register. (0x01). More... | |
status_t | SBC_SetFailSafe (const sbc_fail_safe_lhc_t lhc, const sbc_fail_safe_rcc_t *const rcc) |
This function writes to Fail-safe control register (0x02). The dedicated LIMP pin can be used to enable so called limp home hardware in the event of a serious ECU failure. Detectable failure conditions include SBC overtemperature events, loss of watchdog service, short-circuits on pins RSTN or V1 and user-initiated or external reset events. The LIMP pin is a battery-robust, active-LOW, open-drain output. The LIMP pin can also be forced LOW by setting bit LHC in the Fail-safe control register. The limp-home function and the reset counter are disabled in Forced Normal mode. The LIMP pin is floating, RCC remains unchanged and bit LHC = 0. RCC -reset counter control. incremented every time the SBC enters Reset mode while FNMC = 0; RCC overflows from 11 to 00; default at power-on is 00. For ignore settings of rcc use NULL pointer or otherwise send pointer to variable. More... | |
status_t | SBC_GetFailSafe (sbc_fail_safe_lhc_t *const lhc, sbc_fail_safe_rcc_t *const rcc) |
This function reads from Fail-safe control register (0x02). The dedicated LIMP pin can be used to enable so called limp home hardware in the event of a serious ECU failure. Detectable failure conditions include SBC overtemperature events, loss of watchdog service, short-circuits on pins RSTN or V1 and user-initiated or external reset events. The LIMP pin is a battery-robust, active-LOW, open-drain output. The LIMP pin can also be forced LOW by setting bit LHC in the Fail-safe control register. The limp-home function and the reset counter are disabled in Forced Normal mode. The LIMP pin is floating, RCC remains unchanged and bit LHC = 0. More... | |
status_t | SBC_SetSystemEvents (const sbc_sys_evnt_t *const sysEvnt) |
This function writes System event capture enable register (0x04). This function enables or disables overtemperature warning, SPI failure enable. More... | |
status_t | SBC_GetSystemEvents (sbc_sys_evnt_t *const sysEvnt) |
This function reads System event capture enable register (0x04). This function reads content of overtemperature warning and SPI failure settings. More... | |
status_t | SBC_SetLock (const sbc_lock_t lockMask) |
This function writes to Lock control register (0x0A). Sections of the register address area can be write-protected to protect against unintended modifications. This facility only protects locked bits from being modified via the SPI and will not prevent the UJA1169 updating status registers etc. For SPI write disable set lock bit to 1. This is mask for set lock control register. More... | |
status_t | SBC_GetLock (sbc_lock_t *const lockMask) |
This function reads Lock control register (0x0A). Sections of the register address area can be write-protected to protect against unintended modifications. This facility only protects locked bits from being modified via the SPI and will not prevent the UJA1169 updating status registers etc. For SPI write disable set lock bit to 1. This is mask for set lock control register. More... | |
status_t | SBC_SetCanConfig (const sbc_can_conf_t *const can) |
This function configures CAN peripheral behavior. This function configures CAN peripheral behavior. This function configures several registers which configure CAN. It contains CAN control register, Transceiver event capture enable register, CAN data rate selection, ID registers, ID mask registers, Frame control register, Data mask 0 - 7 configuration. More... | |
status_t | SBC_GetCanConfig (sbc_can_conf_t *const can) |
This function reads CAN peripheral settings. This function configures CAN peripheral behavior. This function configures several registers which configure CAN. It contains CAN control register, Transceiver event capture enable register, CAN data rate selection, ID registers, ID mask registers, Frame control register, Data mask 0 - 7 configuration. More... | |
status_t | SBC_SetWakePin (const sbc_wake_t *const wakePin) |
This function writes to WAKE pin event capture enable register (0x4C). Local wake-up is enabled via bits WPRE and WPFE in the WAKE pin event capture enable register. A wake-up event is triggered by a LOW-to-HIGH (ifWPRE = 1) and/or a HIGH-to-LOW (if WPFE = 1) transition on the WAKE pin. This arrangement allows for maximum flexibility when designing a local wake-up circuit. In applications that do not use the local wake-up facility, local wake-up should be disabled and the WAKE pin connected to GND. More... | |
status_t | SBC_GetWakePin (sbc_wake_t *const wakePin) |
This function reads WAKE pin event capture enable register (0x4C). Local wake-up is enabled via bits WPRE and WPFE in the WAKE pin event capture enable register. A wake-up event is triggered by a LOW-to-HIGH (ifWPRE = 1) and/or a HIGH-to-LOW (if WPFE = 1) transition on the WAKE pin. This arrangement allows for maximum flexibility when designing a local wake-up circuit. In applications that do not use the local wake-up facility, local wake-up should be disabled and the WAKE pin connected to GND. More... | |
status_t | SBC_GetMainStatus (sbc_main_status_t *const mainStatus) |
This function reads Main status register. This function will clear R/W registers automatically after reading. More... | |
status_t | SBC_GetWatchdogStatus (sbc_wtdog_status_t *const watchdogStatus) |
This function reads Watchdog status register. This function will clear R/W registers automatically after reading. More... | |
status_t | SBC_GetSupplyStatus (sbc_supply_status_t *const supStatus) |
This functions reads Supply voltage status register. This function clear R/W status after reading writing 0 to register. It contains V2/VEXT status and V1 status. More... | |
status_t | SBC_GetCanStatus (sbc_trans_stat_t *const transStatus) |
This functions reads Transceiver status register. It contains CAN transceiver status, CAN partial networking error, CAN partial networking status, CAN oscillator status, CAN-bus silence status, VCAN status, CAN failure status. More... | |
status_t | SBC_GetWakeStatus (sbc_wake_stat_wpvs_t *const wakeStatus) |
This functions reads WAKE pin status register. This function reads switching threshold of voltage on WAKE pin. More... | |
status_t | SBC_GetEventsStatus (sbc_evn_capt_t *const events) |
This functions reads Event capture registers. This function reads switching threshold of voltage on WAKE pin. This functions reads global events statuses: Global event status, System event status, Supply event status, Transceiver event status, WAKE pin event status. More... | |
status_t | SBC_CleanEvents (const sbc_evn_capt_t *const events) |
This function clears Event capture registers. It contains Global event status, System event status, Supply event status, Transceiver event status, WAKE pin event status. This function write 1 to bit which should be delete. After an event source has been identified, the status flag should be cleared (set to 0) by writing 1 to the relevant status bit (writing 0 will have no effect). Write true value to appropriate enumeration. More... | |
status_t | SBC_GetAllStatus (sbc_status_group_t *const status) |
This function reads all statuses from SBC device. It reads all status registers: Main status and Watchdog status, Supply voltage status, Transceiver status, WAKE pin status, Event capture registers. More... | |
status_t | SBC_GetMtpnvStatus (sbc_mtpnv_stat_t *const mtpnv) |
This function reads MTPNV status register. The MTPNV cells can be reprogrammed a maximum of 200 times (Ncy(W)MTP). Bit NVMPS in the MTPNV status register indicates whether the non-volatile cells can be reprogrammed. This register also contains a write counter, WRCNTS, that is incremented each time the MTPNV cells are reprogrammed (up to a maximum value of 111111; there is no overflow; performing a factory reset also increments the counter). This counter is provided for information purposes only; reprogramming will not be rejected when it reaches its maximum value. More... | |
status_t | SBC_GetFactoriesSettings (sbc_factories_conf_t *const factoriesConf) |
This function reads Start-up control register and SBC configuration control register. It is non-volatile memory with limited write access. The UJA1169 contains Multiple Time Programmable Non-Volatile (MTPNV) memory cells that allow some of the default device settings to be reconfigured. The MTPNV memory address range is from 0x73 to 0x74. NXP delivers the UJA1169 in so-called Forced Normal mode, also referred to as the factory preset configuration. In order to change the default settings, the device must be in Forced Normal mode with FNMC = 1 and NVMPS = 1. In Forced Normal mode, the watchdog is disabled, all regulators are on and the CAN transceiver is in Active mode. More... | |
status_t | SBC_ChangeFactoriesSettings (const sbc_factories_conf_t *const newConf) |
This function sets Start-up control register and SBC configuration control register. It is non-volatile memory with limited write access. The UJA1169 contains Multiple Time Programmable Non-Volatile (MTPNV) memory cells that allow some of the default device settings to be reconfigured. The MTPNV memory address range is from 0x73 to 0x74. NXP delivers the UJA1169 in so-called Forced Normal mode, also referred to as the factory preset configuration. In order to change the default settings, the device must be in Forced Normal mode with FNMC = 1 and NVMPS = 1. In Forced Normal mode, the watchdog is disabled, all regulators are on and the CAN transceiver is in Active mode. Note for default settings see sbc_factories_conf_t comment. If the device has been programmed previously, the factory presets may need to be restored before reprogramming can begin. When the factory presets have been restored successfully, a system reset is generated automatically and UJA1169 switches back to Forced Normal mode. Factory preset values are restored if the following conditions apply continuously for at least td(MTPNV) during battery power-up: -pin RSTN is held LOW -CANH is pulled up to VBAT -CANL is pulled down to GND. More... | |
status_t | SBC_DataTransfer (const sbc_register_t regName, const uint8_t *const sendData, uint8_t *const receiveData) |
This function sends data over LSPI to SBC device. This function sends 8 bites to SBC device register according device address which is selected. This transfer uses 16bit LSPI. CS polarity - active low, clock phase on second edge. Clock polarity active high. More... | |
Variables | |
static drv_config_t | g_drvConfig |
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Definition at line 1852 of file sbc_uja1169_driver.c.
status_t SBC_ChangeFactoriesSettings | ( | const sbc_factories_conf_t *const | newConf | ) |
This function sets Start-up control register and SBC configuration control register. It is non-volatile memory with limited write access. The UJA1169 contains Multiple Time Programmable Non-Volatile (MTPNV) memory cells that allow some of the default device settings to be reconfigured. The MTPNV memory address range is from 0x73 to 0x74. NXP delivers the UJA1169 in so-called Forced Normal mode, also referred to as the factory preset configuration. In order to change the default settings, the device must be in Forced Normal mode with FNMC = 1 and NVMPS = 1. In Forced Normal mode, the watchdog is disabled, all regulators are on and the CAN transceiver is in Active mode. Note for default settings see sbc_factories_conf_t comment. If the device has been programmed previously, the factory presets may need to be restored before reprogramming can begin. When the factory presets have been restored successfully, a system reset is generated automatically and UJA1169 switches back to Forced Normal mode. Factory preset values are restored if the following conditions apply continuously for at least td(MTPNV) during battery power-up: -pin RSTN is held LOW -CANH is pulled up to VBAT -CANL is pulled down to GND.
newConf | value of this variable will be write to Start-up control register and SBC configuration control register. |
Definition at line 1584 of file sbc_uja1169_driver.c.
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Definition at line 1789 of file sbc_uja1169_driver.c.
status_t SBC_CleanEvents | ( | const sbc_evn_capt_t *const | events | ) |
This function clears Event capture registers. It contains Global event status, System event status, Supply event status, Transceiver event status, WAKE pin event status. This function write 1 to bit which should be delete. After an event source has been identified, the status flag should be cleared (set to 0) by writing 1 to the relevant status bit (writing 0 will have no effect). Write true value to appropriate enumeration.
events | variable for clear Event capture registers, set status to 1 for clear appropriate status. |
Definition at line 1342 of file sbc_uja1169_driver.c.
status_t SBC_DataTransfer | ( | const sbc_register_t | regName, |
const uint8_t *const | sendData, | ||
uint8_t *const | receiveData | ||
) |
This function sends data over LSPI to SBC device. This function sends 8 bites to SBC device register according device address which is selected. This transfer uses 16bit LSPI. CS polarity - active low, clock phase on second edge. Clock polarity active high.
regName | this is register name for access. |
sendData | pointer of 8 bits variable which contains data for writing to register of SBC device. Use NULL pointer for data reading. |
receiveData | pointer of 8 bits variable which contains data for reading from SBC device. Use NULL pointer for data writing. |
Definition at line 1630 of file sbc_uja1169_driver.c.
void SBC_FeedWatchdog | ( | void | ) |
This function refreshes watchdog period by writing byte to the SBC watchdog register. This function must be called periodically according Watchdog mode control and Nominal watchdog period settings. Note: Unxpected behaviour can happend if watchdog mode is set to timeout period and watchdog is triggered exactly at 50% of period. Be sure you trigger watchdog before 50% or above 50% of watchdog period.
Definition at line 418 of file sbc_uja1169_driver.c.
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Definition at line 1818 of file sbc_uja1169_driver.c.
status_t SBC_GetAllStatus | ( | sbc_status_group_t *const | status | ) |
This function reads all statuses from SBC device. It reads all status registers: Main status and Watchdog status, Supply voltage status, Transceiver status, WAKE pin status, Event capture registers.
status | variable for storing all status registers. |
Definition at line 1410 of file sbc_uja1169_driver.c.
status_t SBC_GetCanConfig | ( | sbc_can_conf_t *const | can | ) |
This function reads CAN peripheral settings. This function configures CAN peripheral behavior. This function configures several registers which configure CAN. It contains CAN control register, Transceiver event capture enable register, CAN data rate selection, ID registers, ID mask registers, Frame control register, Data mask 0 - 7 configuration.
can | reads CAN peripheral settings from SBC device. |
Definition at line 877 of file sbc_uja1169_driver.c.
status_t SBC_GetCanStatus | ( | sbc_trans_stat_t *const | transStatus | ) |
This functions reads Transceiver status register. It contains CAN transceiver status, CAN partial networking error, CAN partial networking status, CAN oscillator status, CAN-bus silence status, VCAN status, CAN failure status.
transStatus | variable for storing Transceiver status. |
Definition at line 1147 of file sbc_uja1169_driver.c.
status_t SBC_GetEventsStatus | ( | sbc_evn_capt_t *const | events | ) |
This functions reads Event capture registers. This function reads switching threshold of voltage on WAKE pin. This functions reads global events statuses: Global event status, System event status, Supply event status, Transceiver event status, WAKE pin event status.
events | variable for storing Event capture registers. |
Definition at line 1225 of file sbc_uja1169_driver.c.
status_t SBC_GetFactoriesSettings | ( | sbc_factories_conf_t *const | factoriesConf | ) |
This function reads Start-up control register and SBC configuration control register. It is non-volatile memory with limited write access. The UJA1169 contains Multiple Time Programmable Non-Volatile (MTPNV) memory cells that allow some of the default device settings to be reconfigured. The MTPNV memory address range is from 0x73 to 0x74. NXP delivers the UJA1169 in so-called Forced Normal mode, also referred to as the factory preset configuration. In order to change the default settings, the device must be in Forced Normal mode with FNMC = 1 and NVMPS = 1. In Forced Normal mode, the watchdog is disabled, all regulators are on and the CAN transceiver is in Active mode.
factoriesConf | variable for storing Start-up control register and SBC configuration control register. |
Definition at line 1514 of file sbc_uja1169_driver.c.
status_t SBC_GetFailSafe | ( | sbc_fail_safe_lhc_t *const | lhc, |
sbc_fail_safe_rcc_t *const | rcc | ||
) |
This function reads from Fail-safe control register (0x02). The dedicated LIMP pin can be used to enable so called limp home hardware in the event of a serious ECU failure. Detectable failure conditions include SBC overtemperature events, loss of watchdog service, short-circuits on pins RSTN or V1 and user-initiated or external reset events. The LIMP pin is a battery-robust, active-LOW, open-drain output. The LIMP pin can also be forced LOW by setting bit LHC in the Fail-safe control register. The limp-home function and the reset counter are disabled in Forced Normal mode. The LIMP pin is floating, RCC remains unchanged and bit LHC = 0.
lhc | Variable for reading of limp home control. |
rcc | Pointer to rcc. Use null pointer or wrong value for ignore parameter or empty for reading. |
Definition at line 616 of file sbc_uja1169_driver.c.
status_t SBC_GetLock | ( | sbc_lock_t *const | lockMask | ) |
This function reads Lock control register (0x0A). Sections of the register address area can be write-protected to protect against unintended modifications. This facility only protects locked bits from being modified via the SPI and will not prevent the UJA1169 updating status registers etc. For SPI write disable set lock bit to 1. This is mask for set lock control register.
lockMask | reads CAN peripheral settings from SBC device. SBC device bytes. |
Definition at line 775 of file sbc_uja1169_driver.c.
status_t SBC_GetMainStatus | ( | sbc_main_status_t *const | mainStatus | ) |
This function reads Main status register. This function will clear R/W registers automatically after reading.
mainStatus | variable for storing Status. |
Definition at line 1025 of file sbc_uja1169_driver.c.
status_t SBC_GetMode | ( | sbc_mode_mc_t *const | mode | ) |
This function reads Mode control register. (0x01).
Normal mode is the active operating mode. In this mode, all the hardware on the device is available and can be activated. Voltage regulator V1 is enabled to supply the microcontroller. Standby mode is the first-level power-saving mode of the UJA1169, offering reduced current consumption. The transceiver is unable to transmit or receive data in Standby mode. The SPI remains enabled and V1 is still active; the watchdog is active (in Timeout mode) if enabled. The behavior of V2/VEXT is determined by the SPI setting. Sleep mode is the second-level power-saving mode of the UJA1169. The difference between Sleep and Standby modes is that V1 is off in Sleep mode and temperature protection is inactive. Note event status are cleared before device move to sleep mode.
mode | variable for store device mode - Normal, StandBy, Sleep. |
Definition at line 512 of file sbc_uja1169_driver.c.
status_t SBC_GetMtpnvStatus | ( | sbc_mtpnv_stat_t *const | mtpnv | ) |
This function reads MTPNV status register. The MTPNV cells can be reprogrammed a maximum of 200 times (Ncy(W)MTP). Bit NVMPS in the MTPNV status register indicates whether the non-volatile cells can be reprogrammed. This register also contains a write counter, WRCNTS, that is incremented each time the MTPNV cells are reprogrammed (up to a maximum value of 111111; there is no overflow; performing a factory reset also increments the counter). This counter is provided for information purposes only; reprogramming will not be rejected when it reaches its maximum value.
mtpnv | variable for storing MTPNV status registers. |
Definition at line 1466 of file sbc_uja1169_driver.c.
status_t SBC_GetSupplyStatus | ( | sbc_supply_status_t *const | supStatus | ) |
This functions reads Supply voltage status register. This function clear R/W status after reading writing 0 to register. It contains V2/VEXT status and V1 status.
supStatus | variable for storing Supply voltage status. |
Definition at line 1105 of file sbc_uja1169_driver.c.
status_t SBC_GetSystemEvents | ( | sbc_sys_evnt_t *const | sysEvnt | ) |
This function reads System event capture enable register (0x04). This function reads content of overtemperature warning and SPI failure settings.
sysEvnt | system event capture enable register structure for storing result from SBC device. |
Definition at line 698 of file sbc_uja1169_driver.c.
status_t SBC_GetVreg | ( | sbc_regulator_ctr_t *const | regulatorCtr | ) |
This function reads Regulator control registers.
Regulator control (0x10), Supply event enable(0x1C).
regulator | regulator registers structure where device data will be stored. |
Definition at line 237 of file sbc_uja1169_driver.c.
status_t SBC_GetWakePin | ( | sbc_wake_t *const | wakePin | ) |
This function reads WAKE pin event capture enable register (0x4C). Local wake-up is enabled via bits WPRE and WPFE in the WAKE pin event capture enable register. A wake-up event is triggered by a LOW-to-HIGH (ifWPRE = 1) and/or a HIGH-to-LOW (if WPFE = 1) transition on the WAKE pin. This arrangement allows for maximum flexibility when designing a local wake-up circuit. In applications that do not use the local wake-up facility, local wake-up should be disabled and the WAKE pin connected to GND.
wakePin | reads configuration to WAKE pin event capture enable register of SBC device. |
Definition at line 987 of file sbc_uja1169_driver.c.
status_t SBC_GetWakeStatus | ( | sbc_wake_stat_wpvs_t *const | wakeStatus | ) |
This functions reads WAKE pin status register. This function reads switching threshold of voltage on WAKE pin.
wakeStatus | variable for storing WAKE pin status. |
Definition at line 1188 of file sbc_uja1169_driver.c.
status_t SBC_GetWatchdog | ( | sbc_wtdog_ctr_t *const | wtdog | ) |
This function reads Watchdog control register (0x00).
This function reads Watchdog mode control, and nominal watchdog period.
The UJA1169 contains a watchdog that supports three operating modes: Window, Timeout and Autonomous. In Window mode (available only in SBC Normal mode), a watchdog trigger event within a defined watchdog window triggers and resets the watchdog timer. In Timeout mode, the watchdog runs continuously and can be triggered and reset at any time within the watchdog period by a watchdog trigger. Watchdog time-out mode can also be used for cyclic wake-up of the microcontroller. In Autonomous mode, the watchdog can be off or autonomously in Timeout mode, depending on the selected SBC mode.
wtdog | watchdog registers structure which will be read from device. |
Definition at line 375 of file sbc_uja1169_driver.c.
status_t SBC_GetWatchdogStatus | ( | sbc_wtdog_status_t *const | watchdogStatus | ) |
This function reads Watchdog status register. This function will clear R/W registers automatically after reading.
watchdogStatus | variable for storing Status. |
Definition at line 1063 of file sbc_uja1169_driver.c.
status_t SBC_Init | ( | const sbc_int_config_t *const | config, |
const uint32_t | lpspiInstance | ||
) |
This function initializes all registers. It waits 10ms and then writes to all registers.
config | structure which contains configuration of all registers. |
lpspiInstance | is instance of LPSPI device. |
Definition at line 109 of file sbc_uja1169_driver.c.
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Definition at line 1731 of file sbc_uja1169_driver.c.
status_t SBC_SetCanConfig | ( | const sbc_can_conf_t *const | can | ) |
This function configures CAN peripheral behavior. This function configures CAN peripheral behavior. This function configures several registers which configure CAN. It contains CAN control register, Transceiver event capture enable register, CAN data rate selection, ID registers, ID mask registers, Frame control register, Data mask 0 - 7 configuration.
can | writes CAN peripheral settings to SBC device. |
Definition at line 818 of file sbc_uja1169_driver.c.
status_t SBC_SetFailSafe | ( | const sbc_fail_safe_lhc_t | lhc, |
const sbc_fail_safe_rcc_t *const | rcc | ||
) |
This function writes to Fail-safe control register (0x02). The dedicated LIMP pin can be used to enable so called limp home hardware in the event of a serious ECU failure. Detectable failure conditions include SBC overtemperature events, loss of watchdog service, short-circuits on pins RSTN or V1 and user-initiated or external reset events. The LIMP pin is a battery-robust, active-LOW, open-drain output. The LIMP pin can also be forced LOW by setting bit LHC in the Fail-safe control register. The limp-home function and the reset counter are disabled in Forced Normal mode. The LIMP pin is floating, RCC remains unchanged and bit LHC = 0. RCC -reset counter control. incremented every time the SBC enters Reset mode while FNMC = 0; RCC overflows from 11 to 00; default at power-on is 00. For ignore settings of rcc use NULL pointer or otherwise send pointer to variable.
lhc | Variable for set limp home control. |
rcc | Pointer to rcc. Use null pointer or wrong value for ignore parameter or set value 0x00 to 0x03. |
Definition at line 562 of file sbc_uja1169_driver.c.
status_t SBC_SetLock | ( | const sbc_lock_t | lockMask | ) |
This function writes to Lock control register (0x0A). Sections of the register address area can be write-protected to protect against unintended modifications. This facility only protects locked bits from being modified via the SPI and will not prevent the UJA1169 updating status registers etc. For SPI write disable set lock bit to 1. This is mask for set lock control register.
lockMask | writes Lock control mask for lock or unlock appropriate SBC device bytes. |
Definition at line 741 of file sbc_uja1169_driver.c.
status_t SBC_SetMode | ( | const sbc_mode_mc_t | mode | ) |
This function writes to Mode control register. (0x01).
Normal mode is the active operating mode. In this mode, all the hardware on the device is available and can be activated. Voltage regulator V1 is enabled to supply the microcontroller. Standby mode is the first-level power-saving mode of the UJA1169, offering reduced current consumption. The transceiver is unable to transmit or receive data in Standby mode. The SPI remains enabled and V1 is still active; the watchdog is active (in Timeout mode) if enabled. The behavior of V2/VEXT is determined by the SPI setting. Sleep mode is the second-level power-saving mode of the UJA1169. The difference between Sleep and Standby modes is that V1 is off in Sleep mode and temperature protection is inactive. Note event status are cleared before device move to sleep mode. At least one wake up event must be enabled before moving to sleep mode otherwise SBC will be reseted.
mode | device mode - Normal, StandBy, Sleep. |
Definition at line 449 of file sbc_uja1169_driver.c.
status_t SBC_SetSystemEvents | ( | const sbc_sys_evnt_t *const | sysEvnt | ) |
This function writes System event capture enable register (0x04). This function enables or disables overtemperature warning, SPI failure enable.
sysEvnt | system event capture enable register structure which will be written to device. |
Definition at line 664 of file sbc_uja1169_driver.c.
status_t SBC_SetVreg | ( | const sbc_regulator_ctr_t *const | regulatorCtr | ) |
This function configures Regulator control registers.
Regulator control (0x10), Supply status (0x1B), Supply event enable(0x1C).
regulatorCtr | regulator registers structure which will be written to device. |
Definition at line 193 of file sbc_uja1169_driver.c.
status_t SBC_SetWakePin | ( | const sbc_wake_t *const | wakePin | ) |
This function writes to WAKE pin event capture enable register (0x4C). Local wake-up is enabled via bits WPRE and WPFE in the WAKE pin event capture enable register. A wake-up event is triggered by a LOW-to-HIGH (ifWPRE = 1) and/or a HIGH-to-LOW (if WPFE = 1) transition on the WAKE pin. This arrangement allows for maximum flexibility when designing a local wake-up circuit. In applications that do not use the local wake-up facility, local wake-up should be disabled and the WAKE pin connected to GND.
wakePin | writes configuration to WAKE pin event capture enable register of SBC device. |
Definition at line 949 of file sbc_uja1169_driver.c.
status_t SBC_SetWatchdog | ( | const sbc_wtdog_ctr_t *const | wtdog | ) |
This function configures Watchdog control register (0x00).
This function selects Watchdog mode control, and nominal watchdog period.
The UJA1169 contains a watchdog that supports three operating modes: Window, Timeout and Autonomous. In Window mode (available only in SBC Normal mode), a watchdog trigger event within a defined watchdog window triggers and resets the watchdog timer. In Timeout mode, the watchdog runs continuously and can be triggered and reset at any time within the watchdog period by a watchdog trigger. Watchdog time-out mode can also be used for cyclic wake-up of the microcontroller. In Autonomous mode, the watchdog can be off or autonomously in Timeout mode, depending on the selected SBC mode. Note SBC mode will temporary set to StandBy while WatchDog configuration is changed.
wtdog | watchdog registers structure which will be written to device. |
Definition at line 299 of file sbc_uja1169_driver.c.
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Definition at line 1680 of file sbc_uja1169_driver.c.
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Definition at line 71 of file sbc_uja1169_driver.c.