79 bool faultDetection =
false;
90 #if (FTM_INSTANCE_COUNT > 4U)
91 {SIM_FTM4_CLOCKSEL, FTM4_CLK},
93 #if (FTM_INSTANCE_COUNT > 5U)
94 {SIM_FTM5_CLOCKSEL, FTM5_CLK},
96 #if (FTM_INSTANCE_COUNT > 6U)
97 {SIM_FTM6_CLOCKSEL, FTM6_CLK},
99 #if (FTM_INSTANCE_COUNT > 7U)
100 {SIM_FTM7_CLOCKSEL, FTM7_CLK},
119 FTM_Type * ftmBase = g_ftmBase[instance];
123 if (ftmStatePtr[instance] != NULL)
133 ftmStatePtr[instance] = state;
136 FTM_DRV_Reset(ftmBase);
155 FTM_DRV_SetBdmMode(ftmBase, info->
BDMMode);
160 FTM_DRV_SetTimerOverflowInt(ftmBase,
true);
165 FTM_DRV_SetTimerOverflowInt(ftmBase,
false);
184 FTM_Type * ftmBase = g_ftmBase[instance];
187 FTM_DRV_Reset(ftmBase);
188 ftmStatePtr[instance] = NULL;
202 uint32_t channelsMask,
203 bool softwareTrigger)
206 FTM_Type * ftmBase = g_ftmBase[instance];
208 FTM_DRV_SetOutmaskReg(ftmBase, channelsMask);
211 FTM_DRV_SetSoftwareTriggerCmd(ftmBase,
true);
226 uint16_t counterValue,
227 bool softwareTrigger)
230 FTM_Type * ftmBase = g_ftmBase[instance];
232 FTM_DRV_SetCounterInitVal(ftmBase, counterValue);
235 FTM_DRV_SetSoftwareTriggerCmd(ftmBase,
true);
250 uint16_t reloadPoint,
251 bool softwareTrigger)
254 FTM_Type * ftmBase = g_ftmBase[instance];
256 FTM_DRV_SetHalfCycleValue(ftmBase, reloadPoint);
259 FTM_DRV_SetSoftwareTriggerCmd(ftmBase,
true);
276 uint8_t channelsValues,
277 bool softwareTrigger)
280 FTM_Type * ftmBase = g_ftmBase[instance];
281 FTM_DRV_SetAllChnSoftwareCtrlVal(ftmBase, channelsValues);
284 FTM_DRV_SetSoftwareTriggerCmd(ftmBase,
true);
299 uint8_t channelsMask,
300 bool softwareTrigger)
303 FTM_Type * ftmBase = g_ftmBase[instance];
304 FTM_DRV_SetAllChnSoftwareCtrlCmd(ftmBase, channelsMask);
307 FTM_DRV_SetSoftwareTriggerCmd(ftmBase,
true);
322 uint8_t channelsPairMask,
323 bool softwareTrigger)
326 FTM_Type * ftmBase = g_ftmBase[instance];
328 FTM_DRV_SetInvctrlReg(ftmBase, channelsPairMask);
331 FTM_DRV_SetSoftwareTriggerCmd(ftmBase,
true);
345 uint16_t counterValue,
346 bool softwareTrigger)
349 FTM_Type * ftmBase = g_ftmBase[instance];
351 FTM_DRV_SetMod(ftmBase, counterValue);
354 FTM_DRV_SetSoftwareTriggerCmd(ftmBase,
true);
375 FTM_Type * ftmBase = g_ftmBase[instance];
387 FTM_DRV_SetOutmaskSoftwareSyncModeCmd(ftmBase,
true);
389 FTM_DRV_SetInvctrlSoftwareSyncModeCmd(ftmBase,
true);
391 FTM_DRV_SetSwoctrlSoftwareSyncModeCmd(ftmBase,
true);
393 FTM_DRV_SetModCntinCvSoftwareSyncModeCmd(ftmBase,
true);
395 FTM_DRV_SetCounterSoftwareSyncModeCmd(ftmBase, param->
syncPoint);
400 FTM_DRV_SetOutmaskHardwareSyncModeCmd(ftmBase,
true);
402 FTM_DRV_SetInvctrlHardwareSyncModeCmd(ftmBase,
true);
404 FTM_DRV_SetSwoctrlHardwareSyncModeCmd(ftmBase,
true);
406 FTM_DRV_SetModCntinCvHardwareSyncModeCmd(ftmBase,
true);
408 FTM_DRV_SetCounterHardwareSyncModeCmd(ftmBase, (
bool)param->
syncPoint);
414 FTM_DRV_SetPwmSyncModeCmd(ftmBase,
true);
416 FTM_DRV_SetHardwareSyncTriggerSrc(ftmBase, 0U, param->
hardwareSync0);
417 FTM_DRV_SetHardwareSyncTriggerSrc(ftmBase, 1U, param->
hardwareSync1);
418 FTM_DRV_SetHardwareSyncTriggerSrc(ftmBase, 2U, param->
hardwareSync2);
423 FTM_DRV_SetOutmaskPwmSyncModeCmd(ftmBase, (
bool)param->
maskRegSync);
425 FTM_DRV_SetInvctrlPwmSyncModeCmd(ftmBase, param->
inverterSync);
427 FTM_DRV_SetSwoctrlPwmSyncModeCmd(ftmBase, param->
outRegSync);
449 FTM_Type const * ftmBase = g_ftmBase[instance];
453 uint32_t frequency = 0U;
459 case FTM_CLOCK_SOURCE_EXTERNALCLK:
473 case FTM_CLOCK_SOURCE_FIXEDCLK:
477 case FTM_CLOCK_SOURCE_SYSTEMCLK:
490 return (uint32_t)(frequency / clkPs);
510 return (uint16_t)(uFTMhz / freqencyHz);
const IRQn_Type g_ftmOverflowIrqId[FTM_INSTANCE_COUNT]
ftm_reg_update_t initCounterSync
status_t FTM_DRV_SetSoftwareOutputChannelControl(uint32_t instance, uint8_t channelsMask, bool softwareTrigger)
This function will configure which output channel can be software controlled.
ftm_pwm_sync_t syncMethod
FlexTimer state structure of the driver.
status_t FTM_DRV_SetSync(uint32_t instance, const ftm_pwm_sync_t *param)
This function configures sync mechanism for some FTM registers (MOD, CNINT, HCR, CnV, OUTMASK, INVCTRL, SWOCTRL).
Configuration structure that the user needs to set.
FTM_Type *const g_ftmBase[FTM_INSTANCE_COUNT]
Table of base addresses for FTM instances.
static uint8_t FTM_DRV_GetClockPs(const FTM_Type *ftmBase)
Reads the FTM clock divider.
FlexTimer Registers sync parameters Please don't use software and hardware trigger simultaneously Imp...
ftm_state_t * ftmStatePtr[FTM_INSTANCE_COUNT]
Pointer to runtime state structure.
status_t FTM_DRV_SetInitialCounterValue(uint32_t instance, uint16_t counterValue, bool softwareTrigger)
This function configure the initial counter value. The counter will get this value after an overflow ...
status_t FTM_DRV_SetHalfCycleReloadPoint(uint32_t instance, uint16_t reloadPoint, bool softwareTrigger)
This function configure the value of the counter which will generates an reload point.
#define FEATURE_FTM_CHANNEL_COUNT
void INT_SYS_DisableIRQ(IRQn_Type irqNumber)
Disables an interrupt for a given IRQ number.
uint32_t FTM_DRV_GetFrequency(uint32_t instance)
Retrieves the frequency of the clock source feeding the FTM counter.
clock_names_t
Clock names.
uint16_t FTM_DRV_ConvertFreqToPeriodTicks(uint32_t instance, uint32_t freqencyHz)
This function is used to covert the given frequency to period in ticks.
const IRQn_Type g_ftmReloadIrqId[FTM_INSTANCE_COUNT]
status_t CLOCK_SYS_GetFreq(clock_names_t clockName, uint32_t *frequency)
Gets the clock frequency for a specific clock name.
ftm_clock_source_t ftmClockSource
ftm_pwm_sync_mode_t syncPoint
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
#define FTM_INSTANCE_COUNT
status_t FTM_DRV_SetInvertingControl(uint32_t instance, uint8_t channelsPairMask, bool softwareTrigger)
This function will configure if the second channel of a pair will be inverted or not.
bool enableInitializationTrigger
#define FTM_Overflow_IRQS
ftm_reg_update_t inverterSync
const IRQn_Type g_ftmFaultIrqId[FTM_INSTANCE_COUNT]
ftm_config_mode_t ftmMode
status_t FTM_DRV_SetModuloCounterValue(uint32_t instance, uint16_t counterValue, bool softwareTrigger)
This function configure the maximum counter value.
ftm_config_mode_t ftmMode
status_t FTM_DRV_Deinit(uint32_t instance)
Shuts down the FTM driver.
void INT_SYS_EnableIRQ(IRQn_Type irqNumber)
Enables an interrupt for a given IRQ number.
status_t FTM_DRV_MaskOutputChannels(uint32_t instance, uint32_t channelsMask, bool softwareTrigger)
This function will mask the output of the channels and at match events will be ignored by the masked ...
ftm_reg_update_t maskRegSync
static const clock_names_t g_ftmExtClockSel[FTM_INSTANCE_COUNT][2]
Select external clock pin or clock source for peripheral.
status_t FTM_DRV_Init(uint32_t instance, const ftm_user_config_t *info, ftm_state_t *state)
Initializes the FTM driver.
status_t FTM_DRV_SetSoftOutChnValue(uint32_t instance, uint8_t channelsValues, bool softwareTrigger)
This function will force the output value of a channel to a specific value. Before using this functio...
ftm_clock_source_t ftmClockSource
uint32_t ftmSourceClockFrequency
const IRQn_Type g_ftmIrqId[FTM_INSTANCE_COUNT][FEATURE_FTM_CHANNEL_COUNT]
Interrupt vectors for the FTM peripheral.
ftm_reg_update_t outRegSync
ftm_clock_ps_t ftmPrescaler
IRQn_Type
Defines the Interrupt Numbers definitions.