S32 SDK
s32_core_cm4.h
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1 /*
2  * Copyright (c) 2015-2016 Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  *
18  */
36 /*
37  * Tool Chains:
38  * __GNUC__ : GNU Compiler Collection
39  * __ghs__ : Green Hills ARM Compiler
40  * __ICCARM__ : IAR ARM Compiler
41  * __CSMC__ : Cosmic C Cross Compiler
42  * __DCC__ : Wind River Diab Compiler
43  */
44 
45 #if !defined (CORE_CM4_H)
46 #define CORE_CM4_H
47 
48 
49 #ifdef __cplusplus
50 extern "C" {
51 #endif
52 
57 #define INT_VECTOR_Reg S32_SCB->VTOR
58 
63 #define BKPT_ASM __asm("BKPT #0\n\t")
64 
65 
70 #if defined (__GNUC__)
71 #if defined (__VFP_FP__) && !defined (__SOFTFP__)
72 #define ENABLE_FPU
73 #endif
74 
75 #elif defined (__ICCARM__)
76 #if defined __ARMVFP__
77 #define ENABLE_FPU
78 #endif
79 
80 #elif defined (__ghs__) || defined (__DCC__)
81 #if defined (__VFP__)
82 #define ENABLE_FPU
83 #endif
84 
85 #elif defined (__CSMC__)
86 #if (__CSMC__ & 0x400U) /* bit 10: set if hardware FPU selected (+fpu) */
87 #define ENABLE_FPU
88 #endif
89 #endif /* if defined (__GNUC__) */
90 
91 
94 #if defined (__GNUC__)
95 #define ENABLE_INTERRUPTS() __asm volatile ("cpsie i" : : : "memory");
96 #else
97 #define ENABLE_INTERRUPTS() __asm("cpsie i")
98 #endif
99 
100 
103 #if defined (__GNUC__)
104 #define DISABLE_INTERRUPTS() __asm volatile ("cpsid i" : : : "memory");
105 #else
106 #define DISABLE_INTERRUPTS() __asm("cpsid i")
107 #endif
108 
109 
113 #if defined (__GNUC__)
114 #define STANDBY() __asm volatile ("wfi")
115 #else
116 #define STANDBY() __asm("wfi")
117 #endif
118 
119 
122 #if defined (__GNUC__) || defined (__ICCARM__) || defined (__ghs__)
123 #define REV_BYTES_32(a, b) __asm volatile ("rev %0, %1" : "=r" (b) : "r" (a))
124 #else
125 #define REV_BYTES_32(a, b) (b = ((a & 0xFF000000U) >> 24U) | ((a & 0xFF0000U) >> 8U) \
126  | ((a & 0xFF00U) << 8U) | ((a & 0xFFU) << 24U))
127 #endif
128 
131 #if defined (__GNUC__) || defined (__ICCARM__) || defined (__ghs__)
132 #define REV_BYTES_16(a, b) __asm volatile ("rev16 %0, %1" : "=r" (b) : "r" (a))
133 #else
134 #define REV_BYTES_16(a, b) (b = ((a & 0xFF000000U) >> 8U) | ((a & 0xFF0000U) << 8U) \
135  | ((a & 0xFF00U) >> 8U) | ((a & 0xFFU) << 8U))
136 #endif
137 
140 #if defined ( __GNUC__ )
141  #define START_FUNCTION_DECLARATION_RAMSECTION
142  #define END_FUNCTION_DECLARATION_RAMSECTION __attribute__((section (".code_ram")));
143 #elif defined ( __ghs__ )
144  #define START_FUNCTION_DECLARATION_RAMSECTION _Pragma("ghs callmode=far")
145  #define END_FUNCTION_DECLARATION_RAMSECTION __attribute__((section (".code_ram")));\
146  _Pragma("ghs callmode=default")
147 #elif defined ( __ICCARM__ )
148  #define START_FUNCTION_DECLARATION_RAMSECTION __ramfunc
149  #define END_FUNCTION_DECLARATION_RAMSECTION ;
150 #elif defined ( __DCC__ )
151  #define START_FUNCTION_DECLARATION_RAMSECTION _Pragma("section CODE \".code_ram\"") \
152  _Pragma("use_section CODE")
153  #define END_FUNCTION_DECLARATION_RAMSECTION ; \
154  _Pragma("section CODE \".text\"")
155 #elif defined ( __CSMC__ )
156  #define START_FUNCTION_DECLARATION_RAMSECTION @ext
157  #define END_FUNCTION_DECLARATION_RAMSECTION ;
158 #else
159  /* Keep compatibility with software analysis tools */
160  #define START_FUNCTION_DECLARATION_RAMSECTION
161  #define END_FUNCTION_DECLARATION_RAMSECTION ;
162 #endif
163 
164 #if defined ( __CSMC__ )
165  #define START_FUNCTION_DEFINITION_RAMSECTION _Pragma("section (code_ram)")
166  #define END_FUNCTION_DEFINITION_RAMSECTION _Pragma("section ()")
167 #else
168  /* For GCC, IAR, GHS and Diab there is no need to specify the section when
169  defining a function, it is enough to specify it at the declaration. This
170  also enables compatibility with software analysis tools. */
171  #define START_FUNCTION_DEFINITION_RAMSECTION
172  #define END_FUNCTION_DEFINITION_RAMSECTION
173 #endif
174 
175 #if defined (__ICCARM__)
176  #define DISABLE_CHECK_RAMSECTION_FUNCTION_CALL _Pragma("diag_suppress=Ta022")
177  #define ENABLE_CHECK_RAMSECTION_FUNCTION_CALL _Pragma("diag_default=Ta022")
178 #else
179  #define DISABLE_CHECK_RAMSECTION_FUNCTION_CALL
180  #define ENABLE_CHECK_RAMSECTION_FUNCTION_CALL
181 #endif
182 
183 
186 #if defined ( __GNUC__ ) || defined ( __ghs__ ) || defined ( __DCC__ )
187  #define ALIGNED(x) __attribute__((aligned(x)))
188 #elif defined ( __ICCARM__ )
189  #define stringify(s) tostring(s)
190  #define tostring(s) #s
191  #define ALIGNED(x) _Pragma(stringify(data_alignment=x))
192 #else
193  /* Keep compatibility with software analysis tools */
194  #define ALIGNED(x)
195 #endif
196 
199 #define CORE_LITTLE_ENDIAN
200 
201 #ifdef __cplusplus
202 }
203 #endif
204 
205 #endif /* CORE_CM4_H */
206 
207 /*******************************************************************************
208  * EOF
209  ******************************************************************************/