S32 SDK
flash_driver.c
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1 /*
2  * Copyright (c) 2016 Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
71 #include "flash_driver.h"
72 
74 static status_t FLASH_DRV_CommandSequence(const flash_ssd_config_t * pSSDConfig)
76 /*******************************************************************************
77  * Code
78  ******************************************************************************/
79 
80 /*FUNCTION**********************************************************************
81  *
82  * Function Name : FLASH_DRV_GetDEPartitionCode
83  * Description : Gets DFlash size from FlexNVM Partition Code.
84  *
85  *END**************************************************************************/
86 static void FLASH_DRV_GetDEPartitionCode(flash_ssd_config_t * const pSSDConfig,
87  uint8_t DEPartitionCode)
88 {
89  /* Select D-Flash size */
90  if (0x00U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0000;}
91  else if (0x01U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0001;}
92  else if (0x02U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0010;}
93  else if (0x03U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0011;}
94  else if (0x04U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0100;}
95  else if (0x05U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0101;}
96  else if (0x06U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0110;}
97  else if (0x07U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0111;}
98  else if (0x08U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1000;}
99  else if (0x09U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1001;}
100  else if (0x0AU == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1010;}
101  else if (0x0BU == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1011;}
102  else if (0x0CU == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1100;}
103  else if (0x0DU == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1101;}
104  else if (0x0EU == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1110;}
105  else if (0x0FU == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1111;}
106  else {/* Undefined value */}
107 }
108 
109 #if (FEATURE_FLS_IS_FTFC == 0U)
110 /*FUNCTION**********************************************************************
111  *
112  * Function Name : FLASH_DRV_GetEEEDataSetSize
113  * Description : Gets EEPROM size from EEPROM Data Set Size.
114  *
115  *END**************************************************************************/
116 static void FLASH_DRV_GetEEEDataSetSize(flash_ssd_config_t * const pSSDConfig,
117  uint8_t EEEDataSetSize)
118 {
119  /* Select EEPROM size */
120  if (0x00U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0000;}
121  else if (0x01U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0001;}
122  else if (0x02U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0010;}
123  else if (0x03U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0011;}
124  else if (0x04U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0100;}
125  else if (0x05U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0101;}
126  else if (0x06U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0110;}
127  else if (0x07U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0111;}
128  else if (0x08U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1000;}
129  else if (0x09U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1001;}
130  else if (0x0AU == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1010;}
131  else if (0x0BU == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1011;}
132  else if (0x0CU == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1100;}
133  else if (0x0DU == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1101;}
134  else if (0x0EU == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1110;}
135  else if (0x0FU == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1111;}
136  else {/* Undefined value */}
137 }
138 #endif /* if (FEATURE_FLS_IS_FTFC == 0U) */
139 
140 /*FUNCTION**********************************************************************
141  *
142  * Function Name : FLASH_DRV_Init
143  * Description : Initializes Flash module by clearing status error bit
144  * and reporting the memory configuration via SSD configuration structure.
145  *
146  * Implements : FLASH_DRV_Init_Activity
147  *END**************************************************************************/
148 status_t FLASH_DRV_Init(const flash_user_config_t * const pUserConf,
149  flash_ssd_config_t * const pSSDConfig)
150 {
151  DEV_ASSERT(pUserConf != NULL);
152  DEV_ASSERT(pSSDConfig != NULL);
153  status_t ret = STATUS_SUCCESS;
154 #if FEATURE_FLS_HAS_FLEX_NVM
155  uint8_t DEPartitionCode; /* store D/E-Flash Partition Code */
156 #endif
157 
158  pSSDConfig->PFlashBase = pUserConf->PFlashBase;
159  pSSDConfig->PFlashSize = pUserConf->PFlashSize;
160  pSSDConfig->DFlashBase = pUserConf->DFlashBase;
161  pSSDConfig->EERAMBase = pUserConf->EERAMBase;
162  pSSDConfig->CallBack = pUserConf->CallBack;
163 
164 #if FEATURE_FLS_HAS_FLEX_NVM
165  /* Temporary solution for FTFC and S32K144 CSEc part */
166  /* Get DEPART from Flash Configuration Register 1 */
167  DEPartitionCode = (uint8_t)((SIM->FCFG1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
168  /* Get data flash size */
169  FLASH_DRV_GetDEPartitionCode(pSSDConfig, DEPartitionCode);
170  if (pSSDConfig->DFlashSize < FEATURE_FLS_DF_BLOCK_SIZE)
171  {
172  pSSDConfig->EEESize = FEATURE_FLS_FLEX_RAM_SIZE;
173  }
174  else
175  {
176  pSSDConfig->EEESize = 0U;
177  }
178 #else /* FEATURE_FLS_HAS_FLEX_NVM == 0 */
179  /* If size of D/E-Flash = 0 */
180  pSSDConfig->DFlashSize = 0U;
181  pSSDConfig->EEESize = 0U;
182 #endif /* End of FEATURE_FLS_HAS_FLEX_NVM */
183 
184  return ret;
185 }
186 
187 /*FUNCTION**********************************************************************
188  *
189  * Function Name : FLASH_DRV_CommandSequence
190  * Description : Perform command write sequence on Flash.
191  * It is internal function, called by driver APIs only.
192  *
193  *END**************************************************************************/
195 static status_t FLASH_DRV_CommandSequence(const flash_ssd_config_t * pSSDConfig)
196 {
197  status_t ret = STATUS_SUCCESS; /* Return code variable */
198 
199  /* Clear CCIF to launch command */
200  FTFx_FSTAT |= FTFx_FSTAT_CCIF_MASK;
201 
202  while (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
203  {
204  /* Wait till CCIF bit is set
205  * Serve callback function as often as possible
206  */
207  if (NULL_CALLBACK != pSSDConfig->CallBack)
208  {
209  /* Temporarily disable compiler's check for ROM access call from within a ram function.
210  * The use of a function pointer type makes this check irrelevant.
211  * Nevertheless, it is imperative that the user-provided callback be defined in RAMSECTION */
213  (pSSDConfig->CallBack)();
215  }
216  }
217 
218  /* Check if an error is occurred */
219  if ((FTFx_FSTAT & (FTFx_FSTAT_MGSTAT0_MASK | FTFx_FSTAT_FPVIOL_MASK | FTFx_FSTAT_ACCERR_MASK | FTFx_FSTAT_RDCOLERR_MASK)) != 0U)
220  {
221  ret = STATUS_ERROR;
222  }
223 
224  return ret;
225 }
227 
228 /*FUNCTION**********************************************************************
229  *
230  * Function Name : FLASH_DRV_GetPFlashProtection
231  * Description : Retrieves the current P-Flash protection status.
232  * Considering the time consumption for getting protection is very low and
233  * even can be ignored. It is not necessary to utilize the Callback function to
234  * support the time-critical events.
235  *
236  * Implements : FLASH_DRV_GetPFlashProtection_Activity
237  *END**************************************************************************/
238 void FLASH_DRV_GetPFlashProtection(uint32_t * protectStatus)
239 {
240  DEV_ASSERT(protectStatus != NULL);
241  uint32_t reg0, reg1, reg2, reg3;
242 
243  reg0 = FTFx_FPROT0;
244  reg1 = FTFx_FPROT1;
245  reg2 = FTFx_FPROT2;
246  reg3 = FTFx_FPROT3;
247 
248  *protectStatus = (uint32_t)((reg0 << 24U) | (reg1 << 16U) | (reg2 << 8U) | reg3);
249 }
250 
251 /*FUNCTION**********************************************************************
252  *
253  * Function Name : FLASH_DRV_SetPFlashProtection
254  * Description : Sets the P-Flash protection to the intended protection status.
255  * Setting P-Flash protection status is subject to a protection transition
256  * restriction. If there is a setting violation, it returns an error code
257  * and the current protection status will not be changed.
258  *
259  * Implements : FLASH_DRV_SetPFlashProtection_Activity
260  *END**************************************************************************/
261 status_t FLASH_DRV_SetPFlashProtection(uint32_t protectStatus)
262 {
263  status_t ret = STATUS_SUCCESS;
264  uint8_t reg0, reg1, reg2, reg3;
265  bool flag0, flag1, flag2, flag3;
266 
267  /* Get register */
268  reg0 = GET_BIT_24_31(protectStatus);
269  reg1 = GET_BIT_16_23(protectStatus);
270  reg2 = GET_BIT_8_15(protectStatus);
271  reg3 = GET_BIT_0_7(protectStatus);
272 
273  /* Write to register */
274  FTFx_FPROT0 = reg0;
275  FTFx_FPROT1 = reg1;
276  FTFx_FPROT2 = reg2;
277  FTFx_FPROT3 = reg3;
278 
279  /* Compare changes */
280  flag0 = (FTFx_FPROT0 != reg0);
281  flag1 = (FTFx_FPROT1 != reg1);
282  flag2 = (FTFx_FPROT2 != reg2);
283  flag3 = (FTFx_FPROT3 != reg3);
284 
285  /* Read the value of FPPROT registers */
286  if (flag0 || flag1 || flag2 || flag3)
287  {
288  ret = STATUS_ERROR;
289  }
290 
291  return ret;
292 }
293 
294 /*FUNCTION**********************************************************************
295  *
296  * Function Name : FLASH_DRV_GetSecurityState
297  * Description : Retrieves the current Flash security status, including
298  * the security enabling state and the back door key enabling state.
299  *
300  * Implements : FLASH_DRV_GetSecurityState_Activity
301  *END**************************************************************************/
302 void FLASH_DRV_GetSecurityState(uint8_t * securityState)
303 {
304  DEV_ASSERT(securityState != NULL);
305  /* Store data read from flash register */
306  uint8_t regValue;
307 
308  /* Get flash security register value */
309  regValue = FTFx_FSEC;
310 
311  /* Check the status of the flash security bits in the security register */
312  if (FLASH_SECURITY_STATE_UNSECURED == (regValue & FTFx_FSEC_SEC_MASK))
313  {
314  /* Flash in unsecured state */
315  *securityState = FLASH_NOT_SECURE;
316  }
317  else
318  {
319  /* Flash in secured state
320  * Check for backdoor key security enable bit
321  */
322  if (0x80U == (regValue & FTFx_FSEC_KEYEN_MASK))
323  {
324  /* Backdoor key security enabled */
325  *securityState = FLASH_SECURE_BACKDOOR_ENABLED;
326  }
327  else
328  {
329  /* Backdoor key security disabled */
330  *securityState = FLASH_SECURE_BACKDOOR_DISABLED;
331  }
332  }
333 }
334 
335 /*FUNCTION**********************************************************************
336  *
337  * Function Name : FLASH_DRV_SecurityBypass
338  * Description : Un-secures the device by comparing the user's provided back
339  * door key with the ones in the Flash Configuration Field. If they are
340  * matched, the security is released. Otherwise, an error code is returned.
341  *
342  * Implements : FLASH_DRV_SecurityBypass_Activity
343  *END**************************************************************************/
345  const uint8_t * keyBuffer)
346 {
347  DEV_ASSERT(pSSDConfig != NULL);
348  DEV_ASSERT(keyBuffer != NULL);
349  status_t ret; /* Return code variable */
350  uint32_t temp; /* Temporary variable */
351  uint8_t i;
352 
353  /* Check CCIF to verify the previous command is completed */
354  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
355  {
356  ret = STATUS_BUSY;
357  }
358  else
359  {
360  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
362 
363  /* Passing parameter to the command */
364  FTFx_FCCOB0 = FTFx_SECURITY_BY_PASS;
365  for (i = 0U; i < 8U; i++)
366  {
367  temp = FTFx_BASE + i + 0x08U;
368  *(uint8_t *)temp = keyBuffer[i];
369  }
370 
371  ret = FLASH_DRV_CommandSequence(pSSDConfig);
372  }
373 
374  return ret;
375 }
376 
377 /*FUNCTION**********************************************************************
378  *
379  * Function Name : FLASH_DRV_EraseAllBlock
380  * Description : Erases all Flash memory, initializes the FlexRAM, verifies
381  * all memory contents, and then releases the MCU security.
382  *
383  * Implements : FLASH_DRV_EraseAllBlock_Activity
384  *END**************************************************************************/
386 {
387  DEV_ASSERT(pSSDConfig != NULL);
388  status_t ret; /* Return code variable */
389 
390  /* Check CCIF to verify the previous command is completed */
391  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
392  {
393  ret = STATUS_BUSY;
394  }
395  else
396  {
397  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
399 
400  /* Passing parameter to the command */
401  FTFx_FCCOB0 = FTFx_ERASE_ALL_BLOCK;
402 
403  /* Calling flash command sequence function to execute the command */
404  ret = FLASH_DRV_CommandSequence(pSSDConfig);
405  }
406 
407  return ret;
408 }
409 
410 /*FUNCTION**********************************************************************
411  *
412  * Function Name : FLASH_DRV_VerifyAllBlock
413  * Description : Checks to see if the P-Flash and/or D-Flash, EEPROM
414  * backup area, and D-Flash IFR have been erased to the specified read
415  * margin level, if applicable, and releases security if the readout passes.
416  *
417  * Implements : FLASH_DRV_VerifyAllBlock_Activity
418  *END**************************************************************************/
420  uint8_t marginLevel)
421 {
422  DEV_ASSERT(pSSDConfig != NULL);
423  status_t ret; /* Return code variable */
424 
425  /* Check CCIF to verify the previous command is completed */
426  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
427  {
428  ret = STATUS_BUSY;
429  }
430  else
431  {
432  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
434 
435  /* Passing parameter to the command */
436  FTFx_FCCOB0 = FTFx_VERIFY_ALL_BLOCK;
437  FTFx_FCCOB1 = marginLevel;
438 
439  /* Calling flash command sequence function to execute the command */
440  ret = FLASH_DRV_CommandSequence(pSSDConfig);
441  }
442 
443  return ret;
444 }
445 
446 /*FUNCTION**********************************************************************
447  *
448  * Function Name : FLASH_DRV_EraseSector
449  * Description : Erases one or more sectors in P-Flash or D-Flash memory.
450  * This API always returns STATUS_SUCCESS if size provided by the user is
451  * zero regardless of the input validation.
452  *
453  * Implements : FLASH_DRV_EraseSector_Activity
454  *END**************************************************************************/
456  uint32_t dest,
457  uint32_t size)
458 {
459  DEV_ASSERT(pSSDConfig != NULL);
460  status_t ret = STATUS_SUCCESS; /* Return code variable */
461  uint32_t sectorSize; /* Size of one sector */
462  uint32_t temp; /* Temporary variable */
463  uint32_t tempSize = size; /* Temporary of size variation */
464 
465 #if FEATURE_FLS_HAS_FLEX_NVM
466  temp = pSSDConfig->DFlashBase;
467  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
468  {
469  dest += 0x800000U - temp;
470  sectorSize = (uint32_t)FEATURE_FLS_DF_BLOCK_SECTOR_SIZE;
471  }
472  else
473 #endif
474  {
475  temp = pSSDConfig->PFlashBase;
476  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
477  {
478  dest -= temp;
479  sectorSize = (uint32_t)FEATURE_FLS_PF_BLOCK_SECTOR_SIZE;
480  }
481  else
482  {
483  ret = STATUS_ERROR;
484  tempSize = 0U;
485  sectorSize = 0U;
486  }
487  }
488 
489  /* Check if the size is sector alignment or not */
490  if ((tempSize & (sectorSize - 1U)) != 0U)
491  {
492  /* Return an error code */
493  ret = STATUS_UNSUPPORTED;
494  }
495 
496  while ((tempSize > 0U) && (STATUS_SUCCESS == ret))
497  {
498  /* Check CCIF to verify the previous command is completed */
499  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
500  {
501  ret = STATUS_BUSY;
502  }
503  else
504  {
505  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
507 
508  /* Passing parameter to the command */
509  FTFx_FCCOB0 = FTFx_ERASE_SECTOR;
510  FTFx_FCCOB1 = GET_BIT_16_23(dest);
511  FTFx_FCCOB2 = GET_BIT_8_15(dest);
512  FTFx_FCCOB3 = GET_BIT_0_7(dest);
513 
514  /* Calling flash command sequence function to execute the command */
515  ret = FLASH_DRV_CommandSequence(pSSDConfig);
516 
517  /* Update size and destination address */
518  tempSize -= sectorSize;
519  dest += sectorSize;
520  }
521  }
522 
523  return ret;
524 }
525 
526 /*FUNCTION**********************************************************************
527  *
528  * Function Name : FLASH_DRV_VerifySection
529  * Description : Checks if a section of the P-Flash or the D-Flash memory
530  * is erased to the specified read margin level.
531  *
532  * Implements : FLASH_DRV_VerifySection_Activity
533  *END**************************************************************************/
535  uint32_t dest,
536  uint16_t number,
537  uint8_t marginLevel)
538 {
539  DEV_ASSERT(pSSDConfig != NULL);
540  status_t ret = STATUS_SUCCESS; /* Return code variable */
541  uint32_t temp;
542 
543  /* Check if the destination is aligned or not */
544 #if FEATURE_FLS_HAS_FLEX_NVM
545  temp = pSSDConfig->DFlashBase;
546  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
547  {
548  dest += 0x800000U - temp;
549  }
550  else
551 #endif
552  {
553  temp = pSSDConfig->PFlashBase;
554  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
555  {
556  dest -= temp;
557  }
558  else
559  {
560  ret = STATUS_ERROR;
561  }
562  }
563 
564  if (STATUS_SUCCESS == ret)
565  {
566  /* Check CCIF to verify the previous command is completed */
567  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
568  {
569  ret = STATUS_BUSY;
570  }
571  else
572  {
573  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
575 
576  /* Passing parameter to the command */
577  FTFx_FCCOB0 = FTFx_VERIFY_SECTION;
578  FTFx_FCCOB1 = GET_BIT_16_23(dest);
579  FTFx_FCCOB2 = GET_BIT_8_15(dest);
580  FTFx_FCCOB3 = GET_BIT_0_7(dest);
581  FTFx_FCCOB4 = GET_BIT_8_15(number);
582  FTFx_FCCOB5 = GET_BIT_0_7(number);
583  FTFx_FCCOB6 = marginLevel;
584 
585  /* Calling flash command sequence function to execute the command */
586  ret = FLASH_DRV_CommandSequence(pSSDConfig);
587  }
588  }
589 
590  return ret;
591 }
592 
593 /*FUNCTION**********************************************************************
594  *
595  * Function Name : FLASH_DRV_EraseSuspend
596  * Description : Suspend a current operation of Flash erase sector command.
597  * This function must be located in RAM memory or different Flash blocks which are
598  * targeted for writing to avoid the RWW error.
599  *
600  * Implements : FLASH_DRV_EraseSuspend_Activity
601  *END**************************************************************************/
602 void FLASH_DRV_EraseSuspend(void)
603 {
604  uint32_t count = SUSPEND_WAIT_CNT; /* Counter variable */
605 
606  if ((FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK) == 0U)
607  {
608  FTFx_FCNFG |= FTFx_FCNFG_ERSSUSP_MASK;
609 
610  /* Wait till CCIF bit is set */
611  while (((FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK) == 0U) && (count > 0U))
612  {
613  count--;
614  }
615  }
616 }
617 
618 /*FUNCTION**********************************************************************
619  *
620  * Function Name : FLASH_DRV_EraseResume
621  * Description : Resume a previous suspended operation of Flash erase sector command
622  * This function must be located in RAM memory or different Flash blocks which are targeted
623  * for writing to avoid RWW error.
624  *
625  * Implements : FLASH_DRV_EraseResume_Activity
626  *END**************************************************************************/
627 void FLASH_DRV_EraseResume(void)
628 {
629  uint16_t i = 0U; /* Counter variable */
630 
631  /* Check ERSSUSP bit of the flash configuration register */
632  if ((FTFx_FCNFG & FTFx_FCNFG_ERSSUSP_MASK) == FTFx_FCNFG_ERSSUSP_MASK)
633  {
634  /* Clear CCIF to launch command */
635  FTFx_FSTAT |= FTFx_FSTAT_CCIF_MASK;
636  /* Wait for completion of this command */
637  while ((0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK)) && (i < RESUME_WAIT_CNT))
638  {
639  i++;
640  }
641  }
642 }
643 
644 /*FUNCTION**********************************************************************
645  *
646  * Function Name : FLASH_DRV_ReadOnce
647  * Description : Read out a reserved 64 byte field located in the P-Flash IFR via given number
648  * of record. See the corresponding reference manual to get the correct value of this number.
649  *
650  * Implements : FLASH_DRV_ReadOnce_Activity
651  *END**************************************************************************/
653  uint8_t recordIndex,
654  uint8_t * pDataArray)
655 {
656  DEV_ASSERT(pSSDConfig != NULL);
657  DEV_ASSERT(pDataArray != NULL);
658  status_t ret; /* Return code variable */
659  uint32_t temp; /* Temporary variable */
660  uint8_t i;
661 
662  /* Check CCIF to verify the previous command is completed */
663  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
664  {
665  ret = STATUS_BUSY;
666  }
667  else
668  {
669  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
671 
672  /* Passing parameter to the command */
673  FTFx_FCCOB0 = FTFx_READ_ONCE;
674  FTFx_FCCOB1 = recordIndex;
675 
676  /* Calling flash command sequence function to execute the command */
677  ret = FLASH_DRV_CommandSequence(pSSDConfig);
678 
679  /* Checking for the success of command execution */
680  if (STATUS_SUCCESS == ret)
681  {
682  /* Read the data from the FCCOB registers into the pDataArray */
683  for (i = 0U; i < FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE; i++)
684  {
685  temp = FTFx_BASE + i + 0x08U;
686  pDataArray[i] = *(uint8_t *)temp;
687  }
688  }
689  }
690 
691  return ret;
692 }
693 
694 /*FUNCTION**********************************************************************
695  *
696  * Function Name : FLASH_DRV_ProgramOnce
697  * Description : Program to a reserved 64 byte field located in the
698  * P-Flash IFR via given number of record. See the corresponding reference manual
699  * to get correct value of this number.
700  *
701  * Implements : FLASH_DRV_ProgramOnce_Activity
702  *END**************************************************************************/
704  uint8_t recordIndex,
705  const uint8_t * pDataArray)
706 {
707  DEV_ASSERT(pSSDConfig != NULL);
708  DEV_ASSERT(pDataArray != NULL);
709  status_t ret; /* Return code variable */
710  uint32_t temp; /* Temporary variable */
711  uint8_t i;
712 
713  /* Check CCIF to verify the previous command is completed */
714  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
715  {
716  ret = STATUS_BUSY;
717  }
718  else
719  {
720  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
722 
723  /* Passing parameter to the command */
724  FTFx_FCCOB0 = FTFx_PROGRAM_ONCE;
725  FTFx_FCCOB1 = recordIndex;
726 
727  for (i = 0U; i < FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE; i++)
728  {
729  temp = FTFx_BASE + i + 0x08U;
730  *(uint8_t *)temp = pDataArray[i];
731  }
732 
733  /* Calling flash command sequence function to execute the command */
734  ret = FLASH_DRV_CommandSequence(pSSDConfig);
735  }
736 
737  return ret;
738 }
739 
740 #if FEATURE_FLS_HAS_READ_RESOURCE_CMD
741 /*FUNCTION**********************************************************************
742  *
743  * Function Name : FLASH_DRV_ReadResource
744  * Description : Read data from special purpose memory in Flash memory module
745  * including P-Flash IFR, swap IFR, D-Flash IFR space and version ID.
746  *
747  *END**************************************************************************/
748 status_t FLASH_DRV_ReadResource(const flash_ssd_config_t * pSSDConfig,
749  uint32_t dest,
750  uint8_t * pDataArray,
751  uint8_t resourceSelectCode)
752 {
753  DEV_ASSERT(pSSDConfig != NULL);
754  DEV_ASSERT(pDataArray != NULL);
755  status_t ret = STATUS_SUCCESS; /* Return code variable */
756  uint32_t temp;
757  uint8_t i;
758 
759  /* Check if the destination is aligned or not */
760 #if FEATURE_FLS_HAS_FLEX_NVM
761  temp = pSSDConfig->DFlashBase;
762  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
763  {
764  dest += 0x800000U - temp;
765  }
766  else
767 #endif
768  {
769  temp = pSSDConfig->PFlashBase;
770  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
771  {
772  dest -= temp;
773  }
774  else
775  {
776  ret = STATUS_ERROR;
777  }
778  }
779 
780  if (ret == STATUS_SUCCESS)
781  {
782  /* Check CCIF to verify the previous command is completed */
783  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
784  {
785  ret = STATUS_BUSY;
786  }
787  else
788  {
789  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
791  /* Passing parameter to the command */
792  FTFx_FCCOB0 = FTFx_READ_RESOURCE;
793  FTFx_FCCOB1 = GET_BIT_16_23(dest);
794  FTFx_FCCOB2 = GET_BIT_8_15(dest);
795  FTFx_FCCOB3 = GET_BIT_0_7(dest);
796  FTFx_RSRC_CODE_REG = resourceSelectCode;
797  /* Calling flash command sequence function to execute the command */
798  ret = FLASH_DRV_CommandSequence(pSSDConfig);
799 
800  if (STATUS_SUCCESS == ret)
801  {
802  /* Read the data from the FCCOB registers into the pDataArray */
803  for (i = 0U; i < FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE; i++)
804  {
805  temp = FTFx_BASE + i + 0x08U;
806  pDataArray[i] = *(uint8_t *)temp;
807  }
808  }
809  }
810  }
811 
812  return ret;
813 }
814 #endif /* if FEATURE_FLS_HAS_READ_RESOURCE_CMD */
815 
816 /*FUNCTION**********************************************************************
817  *
818  * Function Name : FLASH_DRV_Program
819  * Description : Program 4 consecutive bytes (for program long word command)
820  * and 8 consecutive bytes (for program phrase command) on P-Flash or D-Flash block.
821  * This API always returns STATUS_SUCCESS if size provided by user is
822  * zero regardless of the input validation.
823  *
824  * Implements : FLASH_DRV_Program_Activity
825  *END**************************************************************************/
827  uint32_t dest,
828  uint32_t size,
829  const uint8_t * pData)
830 {
831  DEV_ASSERT(pSSDConfig != NULL);
832  DEV_ASSERT(pData != NULL);
833  status_t ret = STATUS_SUCCESS; /* Return code variable */
834  uint32_t temp;
835  uint8_t i;
836 
837  if ((size & (FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE - 1U)) != 0U)
838  {
839  ret = STATUS_UNSUPPORTED;
840  }
841  else
842  {
843  #if FEATURE_FLS_HAS_FLEX_NVM
844  temp = pSSDConfig->DFlashBase;
845  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
846  {
847  dest += 0x800000U - temp;
848  }
849  else
850  #endif
851  {
852  temp = pSSDConfig->PFlashBase;
853  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
854  {
855  dest -= temp;
856  }
857  else
858  {
859  ret = STATUS_ERROR;
860  }
861  }
862 
863  while ((size > 0U) && (STATUS_SUCCESS == ret))
864  {
865  /* Check CCIF to verify the previous command is completed */
866  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
867  {
868  ret = STATUS_BUSY;
869  }
870  else
871  {
872  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
874 
875  /* Passing parameter to the command */
876  #if (FEATURE_FLS_DF_BLOCK_WRITE_UNIT_SIZE == FTFx_PHRASE_SIZE)
877  FTFx_FCCOB0 = FTFx_PROGRAM_PHRASE;
878  #else
879  FTFx_FCCOB0 = FTFx_PROGRAM_LONGWORD;
880  #endif
881  FTFx_FCCOB1 = GET_BIT_16_23(dest);
882  FTFx_FCCOB2 = GET_BIT_8_15(dest);
883  FTFx_FCCOB3 = GET_BIT_0_7(dest);
884 
885  for (i = 0U; i < FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE; i++)
886  {
887  temp = FTFx_BASE + i + 0x08U;
888  *(uint8_t *)(temp) = pData[i];
889  }
890 
891  /* Calling flash command sequence function to execute the command */
892  ret = FLASH_DRV_CommandSequence(pSSDConfig);
893 
894  /* Update destination address for next iteration */
896  /* Update size for next iteration */
898  /* Increment the source address by 1 */
900  }
901  }
902  }
903 
904  return ret;
905 }
906 
907 /*FUNCTION**********************************************************************
908  *
909  * Function Name : FLASH_DRV_ProgramCheck
910  * Description : Tests a previously programmed P-Flash or D-Flash long word
911  * to see if it reads correctly at the specified margin level. This
912  * API always returns STATUS_SUCCESS if size provided by user is zero
913  * regardless of the input validation
914  *
915  * Implements : FLASH_DRV_ProgramCheck_Activity
916  *END**************************************************************************/
918  uint32_t dest,
919  uint32_t size,
920  const uint8_t * pExpectedData,
921  uint32_t * pFailAddr,
922  uint8_t marginLevel)
923 {
924  DEV_ASSERT(pSSDConfig != NULL);
925  DEV_ASSERT(pExpectedData != NULL);
926  DEV_ASSERT(pFailAddr != NULL);
927  status_t ret = STATUS_SUCCESS; /* Return code variable */
928  uint32_t offsetAddr; /* Offset address to convert to internal memory address */
929  uint32_t temp; /* Temporary variable */
930  uint32_t tempSize = size; /* Temporary of size variation */
931  uint8_t i;
932 
933  if ((tempSize & (FEATURE_FLS_PF_CHECK_CMD_ADDRESS_ALIGMENT - 1U)) != 0U)
934  {
935  ret = STATUS_UNSUPPORTED;
936  }
937  else
938  {
939  /* Check if the destination is aligned or not */
940  #if FEATURE_FLS_HAS_FLEX_NVM
941  offsetAddr = pSSDConfig->DFlashBase;
942  if ((dest >= offsetAddr) && (dest < (offsetAddr + pSSDConfig->DFlashSize)))
943  {
944  dest += 0x800000U - offsetAddr;
945  }
946  else
947  #endif
948  {
949  offsetAddr = pSSDConfig->PFlashBase;
950  if ((dest >= offsetAddr) && (dest < (offsetAddr + pSSDConfig->PFlashSize)))
951  {
952  dest -= offsetAddr;
953  }
954  else
955  {
956  ret = STATUS_ERROR;
957  tempSize = 0U;
958  }
959  }
960 
961  while (tempSize > 0U)
962  {
963  /* Check CCIF to verify the previous command is completed */
964  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
965  {
966  ret = STATUS_BUSY;
967  }
968  else
969  {
970  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
972 
973  /* Passing parameter to the command */
974  FTFx_FCCOB0 = FTFx_PROGRAM_CHECK;
975  FTFx_FCCOB1 = GET_BIT_16_23(dest);
976  FTFx_FCCOB2 = GET_BIT_8_15(dest);
977  FTFx_FCCOB3 = GET_BIT_0_7(dest);
978  FTFx_FCCOB4 = marginLevel;
979 
980  for (i = 0U; i < FEATURE_FLS_PF_CHECK_CMD_ADDRESS_ALIGMENT; i++)
981  {
982  temp = FTFx_BASE + i + 0x0CU;
983  *(uint8_t *)(temp) = pExpectedData[i];
984  }
985 
986  /* Calling flash command sequence function to execute the command */
987  ret = FLASH_DRV_CommandSequence(pSSDConfig);
988 
989  /* Checking for the success of command execution */
990  if (STATUS_SUCCESS != ret)
991  {
992  #if FEATURE_FLS_HAS_FLEX_NVM
993  if (dest >= 0x800000U)
994  {
995  *pFailAddr = dest + offsetAddr - 0x800000U;
996  }
997  else
998  #endif
999  {
1000  *pFailAddr = dest + offsetAddr;
1001  }
1002 
1004  }
1005 
1006  /* Update size for next iteration */
1008  /* Increment the source address by 1 */
1010  /* Update destination address for next iteration */
1012  }
1013  }
1014  }
1015 
1016  return ret;
1017 }
1018 
1019 /*FUNCTION**********************************************************************
1020  *
1021  * Function Name : FLASH_DRV_CheckSum
1022  * Description : Performs 32 bit sum of each byte data over a specified Flash
1023  * memory range without carry which provides rapid method for checking data integrity.
1024  * The callback time period of this API is determined via FLASH_CALLBACK_CS macro in the
1025  * flash_driver.h which is used as a counter value for the CallBack() function calling in
1026  * this API. This value can be changed as per the user requirement. User can change this value
1027  * to obtain the maximum permissible callback time period.
1028  * This API always returns STATUS_SUCCESS if size provided by user is zero regardless of the input
1029  * validation.
1030  *
1031  * Implements : FLASH_DRV_CheckSum_Activity
1032  *END**************************************************************************/
1034  uint32_t dest,
1035  uint32_t size,
1036  uint32_t * pSum)
1037 {
1038  DEV_ASSERT(pSSDConfig != NULL);
1039  DEV_ASSERT(pSum != NULL);
1040  status_t ret = STATUS_SUCCESS; /* Return code variable */
1041  uint32_t counter = 0U; /* Counter for callback operation */
1042  uint32_t data; /* Data read from Flash address */
1043  uint32_t endAddress; /* PFlash end address */
1044  uint32_t tempSize = size; /* Temporary of size variation */
1045 
1046  /* Calculating Flash end address */
1047  endAddress = dest + tempSize;
1048 
1049  /* Check for valid range of the target addresses */
1050  if ((dest < pSSDConfig->PFlashBase) || (endAddress > (pSSDConfig->PFlashBase + pSSDConfig->PFlashSize)))
1051  {
1052  #if FEATURE_FLS_HAS_FLEX_NVM
1053  if ((dest < pSSDConfig->DFlashBase) || (endAddress > (pSSDConfig->DFlashBase + pSSDConfig->DFlashSize)))
1054  {
1055  #endif
1056  ret = STATUS_ERROR;
1057  tempSize = 0U;
1058  #if FEATURE_FLS_HAS_FLEX_NVM
1059  }
1060  #endif /* End of if FEATURE_FLS_HAS_FLEX_NVM */
1061  }
1062 
1063  *pSum = 0U;
1064  /* Doing sum operation */
1065  while (tempSize > 0U)
1066  {
1067  data = *(uint8_t *)(dest);
1068  *pSum += data;
1069  dest += 1U;
1070  tempSize -= 1U;
1071  ++counter;
1072 
1073  /* Check if need to serve callback function */
1074  if (counter >= FLASH_CALLBACK_CS)
1075  {
1076  /* Serve callback function if counter reaches limitation */
1077  if (NULL_CALLBACK != pSSDConfig->CallBack)
1078  {
1079  pSSDConfig->CallBack();
1080  }
1081 
1082  /* Reset counter */
1083  counter = 0U;
1084  }
1085  }
1086 
1087  return ret;
1088 }
1089 
1090 #if FEATURE_FLS_HAS_PROGRAM_SECTION_CMD
1091 /*FUNCTION**********************************************************************
1092  *
1093  * Function Name : FLASH_DRV_ProgramSection
1094  * Description : Program the data found in the Section Program Buffer
1095  * to previously erased locations in the Flash memory. Data is preloaded into
1096  * the Section Program Buffer by writing to the acceleration Ram and FlexRam
1097  * while it is set to function as a RAM. The Section Program Buffer is limited
1098  * to the value of FlexRam divides by a ratio. Refer to the associate reference
1099  * manual to get correct value of this ratio.
1100  * For derivatives including swap feature, the swap indicator address is encountered
1101  * during FlashProgramSection, it is bypassed without setting FPVIOL but the content
1102  * are not be programmed. In addition, the content of source data used to program to
1103  * swap indicator will be re-initialized to 0xFF after completion of this command.
1104  *
1105  * Implements : FLASH_DRV_ProgramSection_Activity
1106  *END**************************************************************************/
1107 status_t FLASH_DRV_ProgramSection(const flash_ssd_config_t * pSSDConfig,
1108  uint32_t dest,
1109  uint16_t number)
1110 {
1111  DEV_ASSERT(pSSDConfig != NULL);
1112  status_t ret = STATUS_SUCCESS; /* Return code variable */
1113  uint32_t temp;
1114 
1115  /* Check RAMRDY bit of the flash configuration register */
1116  if (0U == (FTFx_FCNFG & FTFx_FCNFG_RAMRDY_MASK))
1117  {
1118  /* Return an error code */
1119  ret = STATUS_UNSUPPORTED;
1120  }
1121  else
1122  {
1123  #if FEATURE_FLS_HAS_FLEX_NVM
1124  temp = pSSDConfig->DFlashBase;
1125  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
1126  {
1127  dest += 0x800000U - temp;
1128  }
1129  else
1130  #endif
1131  {
1132  temp = pSSDConfig->PFlashBase;
1133  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
1134  {
1135  dest -= temp;
1136  }
1137  else
1138  {
1139  ret = STATUS_ERROR;
1140  }
1141  }
1142 
1143  if (ret == STATUS_SUCCESS)
1144  {
1145  /* Check CCIF to verify the previous command is completed */
1146  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1147  {
1148  ret = STATUS_BUSY;
1149  }
1150  else
1151  {
1152  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register.
1153  * Write 1 to clear
1154  */
1156  /* Passing parameter to command */
1157  FTFx_FCCOB0 = FTFx_PROGRAM_SECTION;
1158  FTFx_FCCOB1 = GET_BIT_16_23(dest);
1159  FTFx_FCCOB2 = GET_BIT_8_15(dest);
1160  FTFx_FCCOB3 = GET_BIT_0_7(dest);
1161  FTFx_FCCOB4 = GET_BIT_8_15(number);
1162  FTFx_FCCOB5 = GET_BIT_0_7(number);
1163 
1164  /* Calling flash command sequence function to execute the command */
1165  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1166  }
1167  }
1168  }
1169 
1170  return ret;
1171 }
1172 #endif /* if FEATURE_FLS_HAS_PROGRAM_SECTION_CMD */
1173 
1174 #if FEATURE_FLS_HAS_ERASE_BLOCK_CMD
1175 /*FUNCTION**********************************************************************
1176  *
1177  * Function Name : FLASH_DRV_EraseBlock
1178  * Description : Erases all addresses in an individual P-Flash or D-Flash block.
1179  * For the derivatives including multiply logical P-Flash or D-Flash blocks,
1180  * this API erases a single block in a single call.
1181  *
1182  * Implements : FLASH_DRV_EraseBlock_Activity
1183  *END**************************************************************************/
1184 status_t FLASH_DRV_EraseBlock(const flash_ssd_config_t * pSSDConfig,
1185  uint32_t dest)
1186 {
1187  DEV_ASSERT(pSSDConfig != NULL);
1188  status_t ret = STATUS_SUCCESS; /* Return code variable */
1189  uint32_t temp; /* Temporary variable */
1190 
1191  /* Check if the destination is aligned or not */
1192 #if FEATURE_FLS_HAS_FLEX_NVM
1193  temp = pSSDConfig->DFlashBase;
1194  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
1195  {
1196  dest += 0x800000U - temp;
1197  }
1198  else
1199 #endif
1200  {
1201  temp = pSSDConfig->PFlashBase;
1202  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
1203  {
1204  dest -= temp;
1205  }
1206  else
1207  {
1208  ret = STATUS_ERROR;
1209  }
1210  }
1211 
1212  if (STATUS_SUCCESS == ret)
1213  {
1214  /* Check CCIF to verify the previous command is completed */
1215  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1216  {
1217  ret = STATUS_BUSY;
1218  }
1219  else
1220  {
1221  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
1223 
1224  /* Passing parameter to the command */
1225  FTFx_FCCOB0 = FTFx_ERASE_BLOCK;
1226  FTFx_FCCOB1 = GET_BIT_16_23(dest);
1227  FTFx_FCCOB2 = GET_BIT_8_15(dest);
1228  FTFx_FCCOB3 = GET_BIT_0_7(dest);
1229 
1230  /* Calling flash command sequence function to execute the command */
1231  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1232  }
1233  }
1234 
1235  return ret;
1236 }
1237 #endif /* if FEATURE_FLS_HAS_ERASE_BLOCK_CMD */
1238 
1239 #if FEATURE_FLS_HAS_READ_1S_BLOCK_CMD
1240 /*FUNCTION**********************************************************************
1241  *
1242  * Function Name : FLASH_DRV_VerifyBlock
1243  * Description : Checks to see if an entire P-Flash or D-Flash block has been
1244  * erased to the specified margin level. For the derivatives including multiply
1245  * logical P-Flash or D-Flash blocks, this API erases a single block in a single call.
1246  *
1247  * Implements : FLASH_DRV_VerifyBlock_Activity
1248  *END**************************************************************************/
1249 status_t FLASH_DRV_VerifyBlock(const flash_ssd_config_t * pSSDConfig,
1250  uint32_t dest,
1251  uint8_t marginLevel)
1252 {
1253  DEV_ASSERT(pSSDConfig != NULL);
1254  status_t ret = STATUS_SUCCESS; /* Return code variable */
1255  uint32_t temp;
1256 
1257  /* Check if the destination is aligned or not */
1258 #if FEATURE_FLS_HAS_FLEX_NVM
1259  temp = pSSDConfig->DFlashBase;
1260  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
1261  {
1262  dest += 0x800000U - temp;
1263  }
1264  else
1265 #endif
1266  {
1267  temp = pSSDConfig->PFlashBase;
1268  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
1269  {
1270  dest -= temp;
1271  }
1272  else
1273  {
1274  ret = STATUS_ERROR;
1275  }
1276  }
1277 
1278  if (STATUS_SUCCESS == ret)
1279  {
1280  /* Check CCIF to verify the previous command is completed */
1281  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1282  {
1283  ret = STATUS_BUSY;
1284  }
1285  else
1286  {
1287  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
1289 
1290  /* Passing parameter to the command */
1291  FTFx_FCCOB0 = FTFx_VERIFY_BLOCK;
1292  FTFx_FCCOB1 = GET_BIT_16_23(dest);
1293  FTFx_FCCOB2 = GET_BIT_8_15(dest);
1294  FTFx_FCCOB3 = GET_BIT_0_7(dest);
1295  FTFx_FCCOB4 = marginLevel;
1296 
1297  /* Calling flash command sequence function to execute the command */
1298  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1299  }
1300  }
1301 
1302  return ret;
1303 }
1304 #endif /* if FEATURE_FLS_HAS_READ_1S_BLOCK_CMD */
1305 
1306 #if FEATURE_FLS_HAS_FLEX_NVM
1307 /*FUNCTION**********************************************************************
1308  *
1309  * Function Name : FLASH_DRV_GetEERAMProtection
1310  * Description : Retrieves which EEPROM sections of FlexRAM are protected
1311  * against program and erase operations. Considering the time consumption
1312  * for getting protection is very low and even can be ignored, it is not necessary
1313  * to utilize the Callback function to support the time-critical events
1314  *
1315  * Implements : FLASH_DRV_GetEERAMProtection_Activity
1316  *END**************************************************************************/
1317 status_t FLASH_DRV_GetEERAMProtection(uint8_t * protectStatus)
1318 {
1319  DEV_ASSERT(protectStatus != NULL);
1320  status_t ret = STATUS_SUCCESS; /* Return code variable */
1321 
1322  /* Check if EERAM is set for EEPROM */
1323  if ((FTFx_FCNFG & FTFx_FCNFG_EEERDY_MASK) == FTFx_FCNFG_EEERDY_MASK)
1324  {
1325  *protectStatus = FTFx_FEPROT;
1326  }
1327  else
1328  {
1329  ret = STATUS_UNSUPPORTED;
1330  }
1331 
1332  return ret;
1333 }
1334 
1335 /*FUNCTION**********************************************************************
1336  *
1337  * Function Name : FLASH_DRV_SetEERAMProtection
1338  * Description : Sets protection to the intended protection status for EEPROM us
1339  * area of FlexRam. This is subject to a protection transition restriction.
1340  * If there is a setting violation, it returns failed information and
1341  * the current protection status will not be changed.
1342  *
1343  * Implements : FLASH_DRV_SetEERAMProtection_Activity
1344  *END**************************************************************************/
1345 status_t FLASH_DRV_SetEERAMProtection(uint8_t protectStatus)
1346 {
1347  status_t ret = STATUS_SUCCESS; /* Return code variable */
1348 
1349  /* Check if FlexRAM is set for EEPROM */
1350  if (0U == (FTFx_FCNFG & FTFx_FCNFG_EEERDY_MASK))
1351  {
1352  /* FlexRAM is not set for EEPROM */
1353  ret = STATUS_UNSUPPORTED;
1354  }
1355  else
1356  {
1357  FTFx_FEPROT = protectStatus;
1358  if (protectStatus != FTFx_FEPROT)
1359  {
1360  ret = STATUS_ERROR;
1361  }
1362  else
1363  {
1364  /* Do nothing */
1365  }
1366  }
1367 
1368  return ret;
1369 }
1370 
1371 /*FUNCTION**********************************************************************
1372  *
1373  * Function Name : FLASH_DRV_SetFlexRamFunction
1374  * Description : This function is used to change the function of the FlexRAM. When not partitioned for
1375  * emulated EEPROM, the FlexRAM is typically used as traditional RAM.
1376  * Otherwise, the FlexRam is typically used to store EEPROM data, the writing to EEPROM is normal write or
1377  * quick write.
1378  * In addition, this function may be used to get EEPROM status or complete interrupted EEPROM quick write process.
1379  * For example, after partitioning to have EEPROM backup, FlexRAM is used for EEPROM
1380  * use accordingly and if want to change FlexRAM to traditional RAM for FlashProgramSection() use, call this API
1381  * with the function control code is 0xFFU.
1382  *
1383  * Implements : FLASH_DRV_SetFlexRamFunction_Activity
1384  *END**************************************************************************/
1385 status_t FLASH_DRV_SetFlexRamFunction(const flash_ssd_config_t * pSSDConfig,
1386  flash_flexRam_function_control_code_t flexRamFuncCode,
1387  uint16_t byteOfQuickWrite,
1388  flash_eeprom_status_t * const pEEPROMStatus)
1389 {
1390  DEV_ASSERT(pSSDConfig != NULL);
1391  status_t ret; /* Return code variable */
1392 
1393  /* Check CCIF to verify the previous command is completed */
1394  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1395  {
1396  ret = STATUS_BUSY;
1397  }
1398  else
1399  {
1400  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
1402 
1403  /* Passing parameter to the command */
1404  FTFx_FCCOB0 = FTFx_SET_EERAM;
1405  FTFx_FCCOB1 = (uint8_t)flexRamFuncCode;
1406 
1407  if (flexRamFuncCode == EEE_QUICK_WRITE)
1408  {
1409  FTFx_FCCOB4 = (uint8_t)(byteOfQuickWrite >> 0x8U);
1410  FTFx_FCCOB5 = (uint8_t)(byteOfQuickWrite & 0xFFU);
1411  }
1412 
1413  /* Calling flash command sequence function to execute the command */
1414  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1415 
1416  if ((flexRamFuncCode == EEE_STATUS_QUERY) && (ret == STATUS_SUCCESS))
1417  {
1418  if (pEEPROMStatus == NULL)
1419  {
1420  ret = STATUS_ERROR;
1421  }
1422  else
1423  {
1424  pEEPROMStatus->brownOutCode = FTFx_FCCOB5;
1425  pEEPROMStatus->sectorEraseCount = (uint16_t)((uint16_t)FTFx_FCCOB8 << 8U);
1426  pEEPROMStatus->sectorEraseCount |= (uint16_t)FTFx_FCCOB9;
1427  pEEPROMStatus->numOfRecordReqMaintain = (uint16_t)((uint16_t)FTFx_FCCOB6 << 8U);
1428  pEEPROMStatus->numOfRecordReqMaintain |= (uint16_t)FTFx_FCCOB7;
1429  }
1430  }
1431  }
1432 
1433  return ret;
1434 }
1435 
1436 /*FUNCTION**********************************************************************
1437  *
1438  * Function Name : FLASH_DRV_WaitEEWriteToFinish
1439  * Description : Write to EEPROM with data was aligned and wait until operation finish.
1440  *
1441  *END**************************************************************************/
1442 static status_t FLASH_DRV_WaitEEWriteToFinish(const flash_ssd_config_t * pSSDConfig,
1443  uint32_t dest,
1444  const uint8_t * pData,
1445  uint8_t step)
1446 {
1447  DEV_ASSERT(pData != NULL);
1448  status_t ret = STATUS_SUCCESS; /* Return code variable */
1449  uint32_t temp; /* Temporary variable */
1450 
1451  if (0x01U == step)
1452  {
1453  *(uint8_t *)dest = *pData;
1454  }
1455 
1456  if (0x02U == step)
1457  {
1458  temp = (uint32_t)(pData[1]) << 8U;
1459  temp |= (uint32_t)(pData[0]);
1460  *(volatile uint16_t *)dest = (uint16_t)temp;
1461  }
1462 
1463  if (0x04U == step)
1464  {
1465  temp = (uint32_t)(pData[3]) << 24U;
1466  temp |= (uint32_t)(pData[2]) << 16U;
1467  temp |= (uint32_t)(pData[1]) << 8U;
1468  temp |= (uint32_t)(pData[0]);
1469  *(volatile uint32_t *)dest = temp;
1470  }
1471 
1472  while (0U == (FTFx_FCNFG & FTFx_FCNFG_EEERDY_MASK))
1473  {
1474  /* Wait till EEERDY bit is set
1475  * Serve callback function as often as possible
1476  */
1477  if (NULL_CALLBACK != pSSDConfig->CallBack)
1478  {
1479  (pSSDConfig->CallBack)();
1480  }
1481  }
1482 
1483  /* Check for protection violation error */
1484  if ((FTFx_FSTAT & (FTFx_FSTAT_MGSTAT0_MASK | FTFx_FSTAT_FPVIOL_MASK | FTFx_FSTAT_ACCERR_MASK | FTFx_FSTAT_RDCOLERR_MASK)) != 0U)
1485  {
1486  ret = STATUS_ERROR;
1487  }
1488 
1489  return ret;
1490 }
1491 
1492 /*FUNCTION**********************************************************************
1493  *
1494  * Function Name : FLASH_DRV_EEEWrite
1495  * Description : Write data to FlexRAM section which is partitioned
1496  * as EEPROM use for EEPROM operation. After data has been written to EEPROM
1497  * use section of FlexRAM, the EEPROM file system will create new data record
1498  * in EEPROM back-up area of FlexNVM in round-robin fashion.
1499  * There is no alignment constraint for destination and size parameters
1500  * provided by user. However, according to user's input provided, this
1501  * API will set priority to write to FlexRAM with following rules:
1502  * 32-bit writing is invoked if destination is 32 bit aligned and size
1503  * is not less than 32 bits.
1504  * 16-bit writing is invoked if destination is 16 bit aligned and size
1505  * is not less than 16 bits.
1506  * 8-bit writing is invoked if destination is 8 bit aligned and size
1507  * is not less than 8 bits.
1508  *
1509  * Implements : FLASH_DRV_EEEWrite_Activity
1510  *END**************************************************************************/
1511 status_t FLASH_DRV_EEEWrite(const flash_ssd_config_t * pSSDConfig,
1512  uint32_t dest,
1513  uint32_t size,
1514  const uint8_t * pData)
1515 {
1516  DEV_ASSERT(pSSDConfig != NULL);
1517  DEV_ASSERT(pData != NULL);
1518  status_t ret = STATUS_SUCCESS; /* Return code variable */
1519  uint8_t i;
1520 
1521  /* Check if EEE is enabled */
1522  if ((FTFx_FCNFG & FTFx_FCNFG_EEERDY_MASK) == FTFx_FCNFG_EEERDY_MASK)
1523  {
1524  /* Check range */
1525  if ((dest < pSSDConfig->EERAMBase) || ((dest + size) > (pSSDConfig->EERAMBase + pSSDConfig->EEESize)))
1526  {
1527  ret = STATUS_ERROR;
1528  }
1529 
1530  while ((size > 0U) && (ret == STATUS_SUCCESS))
1531  {
1532  /* Dest is 32bit-aligned and size is not less than 4 */
1533  if ((0U == (dest & 3U)) && (size >= 4U))
1534  {
1535  i = 4U;
1536  }
1537  else if ((0U == (dest & 1U)) && (size >= 2U))
1538  {
1539  i = 2U;
1540  }
1541  else
1542  {
1543  i = 1U;
1544  }
1545 
1546  ret = FLASH_DRV_WaitEEWriteToFinish(pSSDConfig,
1547  dest,
1548  pData,
1549  i);
1550  /* Update destination address for next iteration */
1551  dest += i;
1552  /* Update size for next iteration */
1553  size -= i;
1554  /* Update data for next iteration */
1555  pData += i;
1556  }
1557  }
1558  else
1559  {
1560  ret = STATUS_UNSUPPORTED;
1561  }
1562 
1563  return ret;
1564 }
1565 
1566 /*FUNCTION**********************************************************************
1567  *
1568  * Function Name : FLASH_DRV_DEFlashPartition
1569  * Description : Prepares the FlexNVM block for use as D-Flash, EEPROM backup, or a combination
1570  * of both and initializes the FlexRAM.
1571  * The single partition choice should be used through entire life time of a given
1572  * application to guarantee the Flash endurance and data retention of Flash module.
1573  *
1574  * Implements : FLASH_DRV_DEFlashPartition_Activity
1575  *END**************************************************************************/
1576 status_t FLASH_DRV_DEFlashPartition(const flash_ssd_config_t * pSSDConfig,
1577  uint8_t uEEEDataSizeCode,
1578  uint8_t uDEPartitionCode,
1579  uint8_t uCSEcKeySize,
1580  bool uSFE,
1581  bool flexRamEnableLoadEEEData)
1582 {
1583  DEV_ASSERT(pSSDConfig != NULL);
1584  DEV_ASSERT(uCSEcKeySize <= CSE_KEY_SIZE_CODE_MAX);
1585  status_t ret; /* Return code variable */
1586 
1587  /* Check CCIF to verify the previous command is completed */
1588  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1589  {
1590  ret = STATUS_BUSY;
1591  }
1592  else
1593  {
1594  /* Clear RDCOLERR & ACCERR & FPVIOL & MGSTAT0 flag in flash status register. Write 1 to clear */
1596 
1597  /* Passing parameter to the command */
1598  FTFx_FCCOB0 = FTFx_PROGRAM_PARTITION;
1599  FTFx_FCCOB1 = uCSEcKeySize;
1600  FTFx_FCCOB2 = (uint8_t)(uSFE ? 1U : 0U);
1601  FTFx_FCCOB3 = (uint8_t)(flexRamEnableLoadEEEData ? 0U : 1U);
1602  FTFx_FCCOB4 = uEEEDataSizeCode;
1603  FTFx_FCCOB5 = uDEPartitionCode;
1604 
1605  /* Calling flash command sequence function to execute the command */
1606  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1607  }
1608 
1609  return ret;
1610 }
1611 
1612 /*FUNCTION**********************************************************************
1613  *
1614  * Function Name : FLASH_DRV_GetDFlashProtection
1615  * Description : Retrieves current P-Flash protection status. Considering the time consumption
1616  * for getting protection is very low and even can be ignored, it is not necessary to utilize
1617  * the Callback function to support the time-critical events.
1618  *
1619  * Implements : FLASH_DRV_GetDFlashProtection_Activity
1620  *END**************************************************************************/
1621 status_t FLASH_DRV_GetDFlashProtection(const flash_ssd_config_t * pSSDConfig,
1622  uint8_t * protectStatus)
1623 {
1624  DEV_ASSERT(pSSDConfig != NULL);
1625  DEV_ASSERT(protectStatus != NULL);
1626  status_t ret = STATUS_SUCCESS; /* Return code variable */
1627 
1628  /* Check if size of DFlash = 0 */
1629  if (pSSDConfig->DFlashSize == 0U)
1630  {
1631  ret = STATUS_UNSUPPORTED;
1632  }
1633  else
1634  {
1635  *protectStatus = FTFx_FDPROT;
1636  }
1637 
1638  return ret;
1639 }
1640 
1641 /*FUNCTION**********************************************************************
1642  *
1643  * Function Name : FLASH_DRV_SetDFlashProtection
1644  * Description : Sets the D-Flash protection to the intended protection status.
1645  * Setting D-Flash protection status is subject to a protection transition restriction.
1646  * If there is a setting violation, it returns failed information
1647  * and the current protection status will not be changed.
1648  *
1649  * Implements : FLASH_DRV_SetDFlashProtection_Activity
1650  *END**************************************************************************/
1651 status_t FLASH_DRV_SetDFlashProtection(const flash_ssd_config_t * pSSDConfig,
1652  uint8_t protectStatus)
1653 {
1654  DEV_ASSERT(pSSDConfig != NULL);
1655  status_t ret = STATUS_SUCCESS; /* Return code variable */
1656 
1657  /* Check if size of DFlash = 0 */
1658  if (pSSDConfig->DFlashSize == 0U)
1659  {
1660  ret = STATUS_UNSUPPORTED;
1661  }
1662  else
1663  {
1664  FTFx_FDPROT = protectStatus;
1665  if (protectStatus != FTFx_FDPROT)
1666  {
1667  ret = STATUS_ERROR;
1668  }
1669  else
1670  {
1671  /* Do nothing */
1672  }
1673  }
1674 
1675  return ret;
1676 }
1677 #endif /* If FEATURE_FLS_HAS_FLEX_NVM */
1678 
1679 #if FEATURE_FLS_HAS_PF_BLOCK_SWAP
1680 /*FUNCTION**********************************************************************
1681  *
1682  * Function Name : FLASH_DRV_PFlashSwap
1683  * Description : Provides to user with an ability to interfere in a swap progress by letting the
1684  * user code know about the swap state in each phase of the process. This is done via pSwapCallBack()
1685  * parameter. To stop at each intermediate swap state, set the return value of
1686  * this callback function to FALSE. To complete swap process within a single call,
1687  * set the return value of this function to TRUE.
1688  *
1689  * Erase the non-active swap indicator somewhere in the application code
1690  * or in the swap call back function when swap system is in UPDATE state.
1691  *
1692  * In addition, if user does not want to use the swap call back parameter, pass the NULL_SWAP_CALLBACK
1693  * as a null pointer. In this situation, the PFlashSwap() behaves in the same way as setting the return
1694  * value of pSwapCallBack to TRUE and the user does not need to erase the non-active swap
1695  * indicator when the swap system is in UPDATE state.
1696  * The swap indicator provided by the user must be within the lower half of P-Flash block but not in the
1697  * Flash configuration area. If P-Flash block has two logical blocks, the swap indicator must be
1698  * in P-Flash block 0. If the P-Flash block has four logical blocks, the swap indicator can be in block
1699  * 0 or block 1. It must not be in the Flash configuration field.
1700  * The user must use the same swap indicator for all swap control code except report swap status once
1701  * swap system has been initialized. To refresh swap system to un-initialization state,
1702  * use the FlashEraseAllBlock() to clean up the swap environment.
1703  *
1704  *END**************************************************************************/
1705 status_t FLASH_DRV_PFlashSwap(const flash_ssd_config_t * pSSDConfig,
1706  uint32_t addr,
1707  flash_swap_callback_t pSwapCallback)
1708 {
1709  DEV_ASSERT(pSSDConfig != NULL);
1710  DEV_ASSERT(pSwapCallback != NULL);
1711  status_t ret = STATUS_SUCCESS; /* Return code variable */
1712  uint8_t currentSwapMode, currentSwapBlockStatus, nextSwapBlockStatus;
1713  bool swapContinue;
1714  currentSwapMode = 0xFFU;
1715  currentSwapBlockStatus = 0xFFU;
1716  nextSwapBlockStatus = 0xFFU;
1717  swapContinue = false;
1718 
1719  /* Report current swap state */
1720  ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig, addr, FTFx_SWAP_REPORT_STATUS, &currentSwapMode, &currentSwapBlockStatus, &nextSwapBlockStatus);
1721 
1722  if (STATUS_SUCCESS == ret)
1723  {
1724  if ((FTFx_SWAP_UNINIT == currentSwapMode) || (FTFx_SWAP_READY == currentSwapMode) || (FTFx_SWAP_UPDATE == currentSwapMode))
1725  {
1726  /* If current swap mode is Uninitialized */
1727  if (FTFx_SWAP_UNINIT == currentSwapMode)
1728  {
1729  /* Initialize Swap to Initialized/READY state */
1730  ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1731  addr,
1733  &currentSwapMode,
1734  &currentSwapBlockStatus,
1735  &nextSwapBlockStatus);
1736  }
1737  /* If current swap mode is Initialized/Ready */
1738  else if (FTFx_SWAP_READY == currentSwapMode)
1739  {
1740  /* Initialize Swap to UPDATE state */
1741  ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1742  addr,
1744  &currentSwapMode,
1745  &currentSwapBlockStatus,
1746  &nextSwapBlockStatus);
1747  }
1748  else
1749  {
1750  /* If (FTFx_SWAP_UPDATE == currentSwapMode) do nothing */
1751  }
1752 
1753  /* Check for the success of command execution
1754  * Report the current swap state to user via callback
1755  */
1756  if ((NULL_SWAP_CALLBACK != pSwapCallback) && (STATUS_SUCCESS == ret))
1757  {
1758  swapContinue = pSwapCallback(currentSwapMode);
1759 
1760  if (swapContinue == true)
1761  {
1762  /* Report current swap state */
1763  ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1764  addr,
1766  &currentSwapMode,
1767  &currentSwapBlockStatus,
1768  &nextSwapBlockStatus);
1769  }
1770  }
1771  }
1772  else
1773  {
1774  /* Do nothing */
1775  }
1776 
1777  if ((NULL_SWAP_CALLBACK == pSwapCallback) && (FTFx_SWAP_UPDATE == currentSwapMode))
1778  {
1779  /* Erase indicator sector in non active block to proceed swap system to update-erased state */
1780  ret = FLASH_DRV_EraseSector(pSSDConfig, addr + (pSSDConfig->PFlashSize >> 1U), (uint32_t)FEATURE_FLS_PF_BLOCK_SECTOR_SIZE);
1781  if (STATUS_SUCCESS == ret)
1782  {
1783  /* Now the swap state must be Update-Erased, so report current swap state */
1784  ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1785  addr,
1787  &currentSwapMode,
1788  &currentSwapBlockStatus,
1789  &nextSwapBlockStatus);
1790  }
1791  }
1792 
1793  /* If current swap mode is Update or Update-Erased */
1794  if (FTFx_SWAP_UPDATE_ERASED == currentSwapMode)
1795  {
1796  if (NULL_SWAP_CALLBACK == pSwapCallback)
1797  {
1798  swapContinue = true;
1799  }
1800  else
1801  {
1802  swapContinue = pSwapCallback(currentSwapMode);
1803  }
1804 
1805  if (swapContinue == true)
1806  {
1807  /* Progress Swap to COMPLETE State */
1808  ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1809  addr,
1811  &currentSwapMode,
1812  &currentSwapBlockStatus,
1813  &nextSwapBlockStatus);
1814  }
1815  }
1816  }
1817 
1818  return ret;
1819 }
1820 
1821 /*FUNCTION**********************************************************************
1822  *
1823  * Function Name : FLASH_DRV_PFlashSwapCtl
1824  * Description : Performs swap control command corresponding with the swap
1825  * control code provided via the swap command parameter.
1826  *
1827  *END**************************************************************************/
1828 status_t FLASH_DRV_PFlashSwapCtl(const flash_ssd_config_t * pSSDConfig,
1829  uint32_t addr,
1830  uint8_t swapcmd,
1831  uint8_t * pCurrentSwapMode,
1832  uint8_t * pCurrentSwapBlockStatus,
1833  uint8_t * pNextSwapBlockStatus)
1834 {
1835  DEV_ASSERT(pSSDConfig != NULL);
1836  DEV_ASSERT(pCurrentSwapMode != NULL);
1837  DEV_ASSERT(pCurrentSwapBlockStatus != NULL);
1838  DEV_ASSERT(pNextSwapBlockStatus != NULL);
1839  status_t ret; /* Return code variable */
1840 
1841  /* Check CCIF to verify the previous command is completed */
1842  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1843  {
1844  ret = STATUS_BUSY;
1845  }
1846  else
1847  {
1848  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
1850 
1851  /* Passing parameter to the command */
1852  FTFx_FCCOB0 = FTFx_PFLASH_SWAP;
1853  FTFx_FCCOB1 = GET_BIT_16_23(addr);
1854  FTFx_FCCOB2 = GET_BIT_8_15(addr);
1855  FTFx_FCCOB3 = GET_BIT_0_7(addr);
1856  FTFx_FCCOB4 = swapcmd;
1857  FTFx_FCCOB5 = 0xFFU;
1858  FTFx_FCCOB6 = 0xFFU;
1859  FTFx_FCCOB7 = 0xFFU;
1860 
1861  /* Calling flash command sequence function to execute the command */
1862  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1863 
1864  if (STATUS_SUCCESS == ret)
1865  {
1866  *pCurrentSwapMode = FTFx_FCCOB5;
1867  *pCurrentSwapBlockStatus = FTFx_FCCOB6;
1868  *pNextSwapBlockStatus = FTFx_FCCOB7;
1869  }
1870  }
1871 
1872  return ret;
1873 }
1874 #endif /* End of FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP */
1875 
1876 #if FEATURE_FLS_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD
1877 /*FUNCTION**********************************************************************
1878  *
1879  * Function Name : FLASH_DRV_EraseAllBlockUnsecure
1880  * Description : Erases all Flash memory, initializes the FlexRAM, verifies
1881  * all memory contents, and then releases the MCU security.
1882  *
1883  * Implements : FLASH_DRV_EraseAllBlockUnsecure_Activity
1884  *END**************************************************************************/
1885 status_t FLASH_DRV_EraseAllBlockUnsecure(const flash_ssd_config_t * pSSDConfig)
1886 {
1887  DEV_ASSERT(pSSDConfig != NULL);
1888  status_t ret; /* Return code variable */
1889 
1890  /* Check CCIF to verify the previous command is completed */
1891  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1892  {
1893  ret = STATUS_BUSY;
1894  }
1895  else
1896  {
1897  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
1899 
1900  /* Passing parameter to the command */
1901  FTFx_FCCOB0 = FTFx_ERASE_ALL_BLOCK_UNSECURE;
1902 
1903  /* Calling flash command sequence function to execute the command */
1904  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1905  }
1906 
1907  return ret;
1908 }
1909 
1910 #endif /* End of FEATURE_FLS_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD */
1911 
1912 /*******************************************************************************
1913 * EOF
1914 *******************************************************************************/
#define FTFx_SWAP_SET_IN_COMPLETE
Set Swap in Complete State.
Definition: flash_driver.h:427
status_t FLASH_DRV_VerifyAllBlock(const flash_ssd_config_t *pSSDConfig, uint8_t marginLevel)
Flash verify all blocks.
#define NULL_CALLBACK
Null callback.
Definition: flash_driver.h:523
#define FEATURE_FLS_EE_SIZE_1001
#define FEATURE_FLS_DF_SIZE_1011
#define FTFx_VERIFY_BLOCK
Definition: flash_driver.h:398
#define FTFx_VERIFY_SECTION
Definition: flash_driver.h:399
void FLASH_DRV_EraseResume(void)
Flash erase resume.
flash_callback_t CallBack
Definition: flash_driver.h:591
#define FEATURE_FLS_EE_SIZE_0111
#define FEATURE_FLS_EE_SIZE_0011
#define FEATURE_FLS_EE_SIZE_1000
#define CLEAR_FTFx_FSTAT_ERROR_BITS
Definition: flash_driver.h:377
#define FTFx_SWAP_SET_IN_PREPARE
Set Swap in Update State.
Definition: flash_driver.h:425
#define FEATURE_FLS_DF_SIZE_1001
#define FLASH_NOT_SECURE
Flash currently not in secure state.
Definition: flash_driver.h:495
void FLASH_DRV_EraseSuspend(void)
Flash erase suspend.
#define SIM
Definition: S32K142.h:10664
#define FEATURE_FLS_EE_SIZE_0100
#define FTFx_PROGRAM_ONCE
Definition: flash_driver.h:409
#define FTFx_SET_EERAM
Definition: flash_driver.h:415
#define FLASH_SECURE_BACKDOOR_DISABLED
Flash is secured and backdoor key access disabled.
Definition: flash_driver.h:499
status_t FLASH_DRV_EraseSector(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size)
Flash erase sector.
#define GET_BIT_0_7(value)
Definition: flash_driver.h:459
#define FEATURE_FLS_DF_SIZE_0010
#define FEATURE_FLS_FLEX_RAM_SIZE
#define END_FUNCTION_DECLARATION_RAMSECTION
Definition: s32_core_cm4.h:161
#define FTFx_SWAP_UPDATE
Update swap mode.
Definition: flash_driver.h:441
#define FEATURE_FLS_DF_SIZE_1100
#define FLASH_CALLBACK_CS
Callback period count for FlashCheckSum.
Definition: flash_driver.h:512
#define FTFx_PROGRAM_CHECK
Definition: flash_driver.h:400
#define FEATURE_FLS_DF_BLOCK_SECTOR_SIZE
#define FEATURE_FLS_EE_SIZE_1111
status_t FLASH_DRV_Init(const flash_user_config_t *const pUserConf, flash_ssd_config_t *const pSSDConfig)
Initializes Flash.
#define FTFx_SECURITY_BY_PASS
Definition: flash_driver.h:411
#define FTFx_ERASE_ALL_BLOCK
Definition: flash_driver.h:410
#define FEATURE_FLS_EE_SIZE_0000
status_t FLASH_DRV_Program(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size, const uint8_t *pData)
Flash program.
#define FTFx_ERASE_ALL_BLOCK_UNSECURE
Definition: flash_driver.h:413
#define FTFx_SWAP_REPORT_STATUS
Report Swap Status.
Definition: flash_driver.h:429
#define FTFx_SWAP_READY
Ready swap mode.
Definition: flash_driver.h:439
#define FEATURE_FLS_EE_SIZE_1011
#define FEATURE_FLS_DF_BLOCK_SIZE
#define CSE_KEY_SIZE_CODE_MAX
Definition: flash_driver.h:469
#define FEATURE_FLS_DF_SIZE_1111
flash_flexRam_function_control_code_t
FlexRAM Function control Code.
Definition: flash_driver.h:481
#define FEATURE_FLS_PF_BLOCK_SECTOR_SIZE
#define SIM_FCFG1_DEPART_SHIFT
Definition: S32K142.h:10905
#define FEATURE_FLS_DF_SIZE_0110
#define FTFx_RSRC_CODE_REG
Definition: flash_driver.h:392
#define FEATURE_FLS_DF_SIZE_1000
#define FEATURE_FLS_EE_SIZE_1101
#define FEATURE_FLS_EE_SIZE_1010
static START_FUNCTION_DECLARATION_RAMSECTION status_t FLASH_DRV_CommandSequence(const flash_ssd_config_t *pSSDConfig) END_FUNCTION_DECLARATION_RAMSECTION static void FLASH_DRV_GetDEPartitionCode(flash_ssd_config_t *const pSSDConfig
#define GET_BIT_8_15(value)
Definition: flash_driver.h:460
#define DEV_ASSERT(x)
Definition: devassert.h:77
void FLASH_DRV_GetPFlashProtection(uint32_t *protectStatus)
P-Flash get protection.
status_t FLASH_DRV_ProgramCheck(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size, const uint8_t *pExpectedData, uint32_t *pFailAddr, uint8_t marginLevel)
Flash program check.
#define ENABLE_CHECK_RAMSECTION_FUNCTION_CALL
Definition: s32_core_cm4.h:180
#define END_FUNCTION_DEFINITION_RAMSECTION
Definition: s32_core_cm4.h:172
#define FTFx_READ_ONCE
Definition: flash_driver.h:408
#define FTFx_SWAP_SET_INDICATOR_ADDR
Initialize Swap System control code.
Definition: flash_driver.h:423
#define FEATURE_FLS_EE_SIZE_0101
status_t FLASH_DRV_CheckSum(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size, uint32_t *pSum)
Calculates check sum.
#define FTFx_PROGRAM_LONGWORD
Definition: flash_driver.h:402
#define GET_BIT_24_31(value)
Definition: flash_driver.h:462
#define START_FUNCTION_DECLARATION_RAMSECTION
Places a function in RAM.
Definition: s32_core_cm4.h:160
#define FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE
#define FTFx_ERASE_BLOCK
Definition: flash_driver.h:404
#define FEATURE_FLS_EE_SIZE_1100
#define SUSPEND_WAIT_CNT
Suspend wait count used in FLASH_DRV_EraseSuspend function.
Definition: flash_driver.h:451
#define FEATURE_FLS_EE_SIZE_0010
#define FLASH_SECURITY_STATE_UNSECURED
Definition: flash_driver.h:466
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
Definition: status.h:44
EEPROM status structure.
Definition: flash_driver.h:600
#define FEATURE_FLS_DF_SIZE_0001
#define START_FUNCTION_DEFINITION_RAMSECTION
Definition: s32_core_cm4.h:171
uint16_t numOfRecordReqMaintain
Definition: flash_driver.h:603
status_t FLASH_DRV_SetPFlashProtection(uint32_t protectStatus)
P-Flash set protection.
#define DISABLE_CHECK_RAMSECTION_FUNCTION_CALL
Definition: s32_core_cm4.h:179
#define FEATURE_FLS_DF_SIZE_0011
#define FEATURE_FLS_DF_SIZE_1101
#define FEATURE_FLS_DF_SIZE_0000
#define FTFx_SWAP_UPDATE_ERASED
Update-Erased swap mode.
Definition: flash_driver.h:443
#define FTFx_PROGRAM_PHRASE
Definition: flash_driver.h:403
#define FTFx_READ_RESOURCE
Definition: flash_driver.h:401
status_t FLASH_DRV_VerifySection(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint16_t number, uint8_t marginLevel)
Flash verify section.
status_t FLASH_DRV_ReadOnce(const flash_ssd_config_t *pSSDConfig, uint8_t recordIndex, uint8_t *pDataArray)
Flash read once.
#define FEATURE_FLS_DF_SIZE_0111
#define FTFx_VERIFY_ALL_BLOCK
Definition: flash_driver.h:407
#define FEATURE_FLS_DF_SIZE_1010
#define FTFx_PROGRAM_SECTION
Definition: flash_driver.h:406
Flash SSD Configuration Structure.
Definition: flash_driver.h:578
#define FEATURE_FLS_EE_SIZE_1110
#define FTFx_PFLASH_SWAP
Definition: flash_driver.h:412
status_t FLASH_DRV_EraseAllBlock(const flash_ssd_config_t *pSSDConfig)
Flash erase all blocks.
#define FTFx_ERASE_SECTOR
Definition: flash_driver.h:405
#define SIM_FCFG1_DEPART_MASK
Definition: S32K142.h:10904
#define FLASH_SECURE_BACKDOOR_ENABLED
Flash is secured and backdoor key access enabled.
Definition: flash_driver.h:497
#define FEATURE_FLS_EE_SIZE_0110
#define GET_BIT_16_23(value)
Definition: flash_driver.h:461
#define RESUME_WAIT_CNT
Resume wait count used in FLASH_DRV_EraseResume function.
Definition: flash_driver.h:449
#define FEATURE_FLS_DF_SIZE_0101
#define FTFx_SWAP_UNINIT
Uninitialized swap mode.
Definition: flash_driver.h:437
Flash User Configuration Structure.
Definition: flash_driver.h:554
status_t FLASH_DRV_SecurityBypass(const flash_ssd_config_t *pSSDConfig, const uint8_t *keyBuffer)
Flash security bypass.
#define FEATURE_FLS_EE_SIZE_0001
#define FEATURE_FLS_DF_SIZE_1110
#define FTFx_PROGRAM_PARTITION
Definition: flash_driver.h:414
status_t FLASH_DRV_ProgramOnce(const flash_ssd_config_t *pSSDConfig, uint8_t recordIndex, const uint8_t *pDataArray)
Flash program once.
#define FEATURE_FLS_DF_SIZE_0100
#define FEATURE_FLS_PF_CHECK_CMD_ADDRESS_ALIGMENT
void FLASH_DRV_GetSecurityState(uint8_t *securityState)
Flash get security state.