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S32 SDK
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Modules | |
LPIT Register Masks | |
Data Structures | |
struct | LPIT_Type |
Macros | |
#define | LPIT_TMR_COUNT 4u |
#define | LPIT_INSTANCE_COUNT (1u) |
#define | LPIT0_BASE (0x40037000u) |
#define | LPIT0 ((LPIT_Type *)LPIT0_BASE) |
#define | LPIT_BASE_ADDRS { LPIT0_BASE } |
#define | LPIT_BASE_PTRS { LPIT0 } |
#define | LPIT_IRQS_ARR_COUNT (1u) |
#define | LPIT_IRQS_CH_COUNT (4u) |
#define | LPIT_IRQS { LPIT0_Ch0_IRQn, LPIT0_Ch1_IRQn, LPIT0_Ch2_IRQn, LPIT0_Ch3_IRQn } |
Typedefs | |
typedef struct LPIT_Type * | LPIT_MemMapPtr |
#define LPIT0 ((LPIT_Type *)LPIT0_BASE) |
#define LPIT0_BASE (0x40037000u) |
#define LPIT_BASE_ADDRS { LPIT0_BASE } |
#define LPIT_BASE_PTRS { LPIT0 } |
#define LPIT_INSTANCE_COUNT (1u) |
#define LPIT_IRQS { LPIT0_Ch0_IRQn, LPIT0_Ch1_IRQn, LPIT0_Ch2_IRQn, LPIT0_Ch3_IRQn } |
#define LPIT_IRQS_ARR_COUNT (1u) |
#define LPIT_IRQS_CH_COUNT (4u) |
#define LPIT_TMR_COUNT 4u |
typedef struct LPIT_Type * LPIT_MemMapPtr |