S32 SDK

#include <S32K148.h>

Data Fields

__IO uint32_t MCR
 
uint8_t RESERVED_0 [4]
 
__IO uint32_t IPCR
 
__IO uint32_t FLSHCR
 
__IO uint32_t BUF0CR
 
__IO uint32_t BUF1CR
 
__IO uint32_t BUF2CR
 
__IO uint32_t BUF3CR
 
__IO uint32_t BFGENCR
 
__IO uint32_t SOCCR
 
uint8_t RESERVED_1 [8]
 
__IO uint32_t BUF0IND
 
__IO uint32_t BUF1IND
 
__IO uint32_t BUF2IND
 
uint8_t RESERVED_2 [196]
 
__IO uint32_t SFAR
 
__IO uint32_t SFACR
 
__IO uint32_t SMPR
 
__I uint32_t RBSR
 
__IO uint32_t RBCT
 
uint8_t RESERVED_3 [60]
 
__I uint32_t TBSR
 
__IO uint32_t TBDR
 
__IO uint32_t TBCT
 
__I uint32_t SR
 
__IO uint32_t FR
 
__IO uint32_t RSER
 
__I uint32_t SPNDST
 
__IO uint32_t SPTRCLR
 
uint8_t RESERVED_4 [16]
 
__IO uint32_t SFA1AD
 
__IO uint32_t SFA2AD
 
__IO uint32_t SFB1AD
 
__IO uint32_t SFB2AD
 
uint8_t RESERVED_5 [112]
 
__I uint32_t RBDR [QuadSPI_RBDR_COUNT]
 
uint8_t RESERVED_6 [128]
 
__IO uint32_t LUTKEY
 
__IO uint32_t LCKCR
 
uint8_t RESERVED_7 [8]
 
__IO uint32_t LUT [QuadSPI_LUT_COUNT]
 

Detailed Description

QuadSPI - Register Layout Typedef

Definition at line 9755 of file S32K148.h.

Field Documentation

__IO uint32_t BFGENCR

Buffer Generic Configuration Register, offset: 0x20

Definition at line 9764 of file S32K148.h.

__IO uint32_t BUF0CR

Buffer0 Configuration Register, offset: 0x10

Definition at line 9760 of file S32K148.h.

__IO uint32_t BUF0IND

Buffer0 Top Index Register, offset: 0x30

Definition at line 9767 of file S32K148.h.

__IO uint32_t BUF1CR

Buffer1 Configuration Register, offset: 0x14

Definition at line 9761 of file S32K148.h.

__IO uint32_t BUF1IND

Buffer1 Top Index Register, offset: 0x34

Definition at line 9768 of file S32K148.h.

__IO uint32_t BUF2CR

Buffer2 Configuration Register, offset: 0x18

Definition at line 9762 of file S32K148.h.

__IO uint32_t BUF2IND

Buffer2 Top Index Register, offset: 0x38

Definition at line 9769 of file S32K148.h.

__IO uint32_t BUF3CR

Buffer3 Configuration Register, offset: 0x1C

Definition at line 9763 of file S32K148.h.

__IO uint32_t FLSHCR

Flash Configuration Register, offset: 0xC

Definition at line 9759 of file S32K148.h.

__IO uint32_t FR

Flag Register, offset: 0x160

Definition at line 9781 of file S32K148.h.

__IO uint32_t IPCR

IP Configuration Register, offset: 0x8

Definition at line 9758 of file S32K148.h.

__IO uint32_t LCKCR

LUT Lock Configuration Register, offset: 0x304

Definition at line 9794 of file S32K148.h.

__IO uint32_t LUT[QuadSPI_LUT_COUNT]

Look-up Table register, array offset: 0x310, array step: 0x4

Definition at line 9796 of file S32K148.h.

__IO uint32_t LUTKEY

LUT Key Register, offset: 0x300

Definition at line 9793 of file S32K148.h.

__IO uint32_t MCR

Module Configuration Register, offset: 0x0

Definition at line 9756 of file S32K148.h.

__IO uint32_t RBCT

RX Buffer Control Register, offset: 0x110

Definition at line 9775 of file S32K148.h.

__I uint32_t RBDR[QuadSPI_RBDR_COUNT]

RX Buffer Data Register, array offset: 0x200, array step: 0x4

Definition at line 9791 of file S32K148.h.

__I uint32_t RBSR

RX Buffer Status Register, offset: 0x10C

Definition at line 9774 of file S32K148.h.

uint8_t RESERVED_0[4]

Definition at line 9757 of file S32K148.h.

uint8_t RESERVED_1[8]

Definition at line 9766 of file S32K148.h.

uint8_t RESERVED_2[196]

Definition at line 9770 of file S32K148.h.

uint8_t RESERVED_3[60]

Definition at line 9776 of file S32K148.h.

uint8_t RESERVED_4[16]

Definition at line 9785 of file S32K148.h.

uint8_t RESERVED_5[112]

Definition at line 9790 of file S32K148.h.

uint8_t RESERVED_6[128]

Definition at line 9792 of file S32K148.h.

uint8_t RESERVED_7[8]

Definition at line 9795 of file S32K148.h.

__IO uint32_t RSER

Interrupt and DMA Request Select and Enable Register, offset: 0x164

Definition at line 9782 of file S32K148.h.

__IO uint32_t SFA1AD

Serial Flash A1 Top Address, offset: 0x180

Definition at line 9786 of file S32K148.h.

__IO uint32_t SFA2AD

Serial Flash A2 Top Address, offset: 0x184

Definition at line 9787 of file S32K148.h.

__IO uint32_t SFACR

Serial Flash Address Configuration Register, offset: 0x104

Definition at line 9772 of file S32K148.h.

__IO uint32_t SFAR

Serial Flash Address Register, offset: 0x100

Definition at line 9771 of file S32K148.h.

__IO uint32_t SFB1AD

Serial Flash B1 Top Address, offset: 0x188

Definition at line 9788 of file S32K148.h.

__IO uint32_t SFB2AD

Serial Flash B2 Top Address, offset: 0x18C

Definition at line 9789 of file S32K148.h.

__IO uint32_t SMPR

Sampling Register, offset: 0x108

Definition at line 9773 of file S32K148.h.

__IO uint32_t SOCCR

SOC Configuration Register, offset: 0x24

Definition at line 9765 of file S32K148.h.

__I uint32_t SPNDST

Sequence Suspend Status Register, offset: 0x168

Definition at line 9783 of file S32K148.h.

__IO uint32_t SPTRCLR

Sequence Pointer Clear Register, offset: 0x16C

Definition at line 9784 of file S32K148.h.

__I uint32_t SR

Status Register, offset: 0x15C

Definition at line 9780 of file S32K148.h.

__IO uint32_t TBCT

Tx Buffer Control Register, offset: 0x158

Definition at line 9779 of file S32K148.h.

__IO uint32_t TBDR

TX Buffer Data Register, offset: 0x154

Definition at line 9778 of file S32K148.h.

__I uint32_t TBSR

TX Buffer Status Register, offset: 0x150

Definition at line 9777 of file S32K148.h.


The documentation for this struct was generated from the following file: