S32 SDK

#include <S32K142.h>

Data Fields

__I uint32_t VERID
 
__I uint32_t PARAM
 
__IO uint32_t CTRL
 
__I uint32_t PIN
 
__IO uint32_t SHIFTSTAT
 
__IO uint32_t SHIFTERR
 
__IO uint32_t TIMSTAT
 
uint8_t RESERVED_0 [4]
 
__IO uint32_t SHIFTSIEN
 
__IO uint32_t SHIFTEIEN
 
__IO uint32_t TIMIEN
 
uint8_t RESERVED_1 [4]
 
__IO uint32_t SHIFTSDEN
 
uint8_t RESERVED_2 [76]
 
__IO uint32_t SHIFTCTL [FLEXIO_SHIFTCTL_COUNT]
 
uint8_t RESERVED_3 [112]
 
__IO uint32_t SHIFTCFG [FLEXIO_SHIFTCFG_COUNT]
 
uint8_t RESERVED_4 [240]
 
__IO uint32_t SHIFTBUF [FLEXIO_SHIFTBUF_COUNT]
 
uint8_t RESERVED_5 [112]
 
__IO uint32_t SHIFTBUFBIS [FLEXIO_SHIFTBUFBIS_COUNT]
 
uint8_t RESERVED_6 [112]
 
__IO uint32_t SHIFTBUFBYS [FLEXIO_SHIFTBUFBYS_COUNT]
 
uint8_t RESERVED_7 [112]
 
__IO uint32_t SHIFTBUFBBS [FLEXIO_SHIFTBUFBBS_COUNT]
 
uint8_t RESERVED_8 [112]
 
__IO uint32_t TIMCTL [FLEXIO_TIMCTL_COUNT]
 
uint8_t RESERVED_9 [112]
 
__IO uint32_t TIMCFG [FLEXIO_TIMCFG_COUNT]
 
uint8_t RESERVED_10 [112]
 
__IO uint32_t TIMCMP [FLEXIO_TIMCMP_COUNT]
 

Detailed Description

FLEXIO - Register Layout Typedef

Definition at line 3386 of file S32K142.h.

Field Documentation

__IO uint32_t CTRL

FlexIO Control Register, offset: 0x8

Definition at line 3389 of file S32K142.h.

__I uint32_t PARAM

Parameter Register, offset: 0x4

Definition at line 3388 of file S32K142.h.

__I uint32_t PIN

Pin State Register, offset: 0xC

Definition at line 3390 of file S32K142.h.

uint8_t RESERVED_0[4]

Definition at line 3394 of file S32K142.h.

uint8_t RESERVED_1[4]

Definition at line 3398 of file S32K142.h.

uint8_t RESERVED_10[112]

Definition at line 3416 of file S32K142.h.

uint8_t RESERVED_2[76]

Definition at line 3400 of file S32K142.h.

uint8_t RESERVED_3[112]

Definition at line 3402 of file S32K142.h.

uint8_t RESERVED_4[240]

Definition at line 3404 of file S32K142.h.

uint8_t RESERVED_5[112]

Definition at line 3406 of file S32K142.h.

uint8_t RESERVED_6[112]

Definition at line 3408 of file S32K142.h.

uint8_t RESERVED_7[112]

Definition at line 3410 of file S32K142.h.

uint8_t RESERVED_8[112]

Definition at line 3412 of file S32K142.h.

uint8_t RESERVED_9[112]

Definition at line 3414 of file S32K142.h.

__IO uint32_t SHIFTBUF[FLEXIO_SHIFTBUF_COUNT]

Shifter Buffer N Register, array offset: 0x200, array step: 0x4

Definition at line 3405 of file S32K142.h.

__IO uint32_t SHIFTBUFBBS[FLEXIO_SHIFTBUFBBS_COUNT]

Shifter Buffer N Bit Byte Swapped Register, array offset: 0x380, array step: 0x4

Definition at line 3411 of file S32K142.h.

__IO uint32_t SHIFTBUFBIS[FLEXIO_SHIFTBUFBIS_COUNT]

Shifter Buffer N Bit Swapped Register, array offset: 0x280, array step: 0x4

Definition at line 3407 of file S32K142.h.

__IO uint32_t SHIFTBUFBYS[FLEXIO_SHIFTBUFBYS_COUNT]

Shifter Buffer N Byte Swapped Register, array offset: 0x300, array step: 0x4

Definition at line 3409 of file S32K142.h.

__IO uint32_t SHIFTCFG[FLEXIO_SHIFTCFG_COUNT]

Shifter Configuration N Register, array offset: 0x100, array step: 0x4

Definition at line 3403 of file S32K142.h.

__IO uint32_t SHIFTCTL[FLEXIO_SHIFTCTL_COUNT]

Shifter Control N Register, array offset: 0x80, array step: 0x4

Definition at line 3401 of file S32K142.h.

__IO uint32_t SHIFTEIEN

Shifter Error Interrupt Enable, offset: 0x24

Definition at line 3396 of file S32K142.h.

__IO uint32_t SHIFTERR

Shifter Error Register, offset: 0x14

Definition at line 3392 of file S32K142.h.

__IO uint32_t SHIFTSDEN

Shifter Status DMA Enable, offset: 0x30

Definition at line 3399 of file S32K142.h.

__IO uint32_t SHIFTSIEN

Shifter Status Interrupt Enable, offset: 0x20

Definition at line 3395 of file S32K142.h.

__IO uint32_t SHIFTSTAT

Shifter Status Register, offset: 0x10

Definition at line 3391 of file S32K142.h.

__IO uint32_t TIMCFG[FLEXIO_TIMCFG_COUNT]

Timer Configuration N Register, array offset: 0x480, array step: 0x4

Definition at line 3415 of file S32K142.h.

__IO uint32_t TIMCMP[FLEXIO_TIMCMP_COUNT]

Timer Compare N Register, array offset: 0x500, array step: 0x4

Definition at line 3417 of file S32K142.h.

__IO uint32_t TIMCTL[FLEXIO_TIMCTL_COUNT]

Timer Control N Register, array offset: 0x400, array step: 0x4

Definition at line 3413 of file S32K142.h.

__IO uint32_t TIMIEN

Timer Interrupt Enable Register, offset: 0x28

Definition at line 3397 of file S32K142.h.

__IO uint32_t TIMSTAT

Timer Status Register, offset: 0x18

Definition at line 3393 of file S32K142.h.

__I uint32_t VERID

Version ID Register, offset: 0x0

Definition at line 3387 of file S32K142.h.


The documentation for this struct was generated from the following file: