00001 /* ---------------------------------------------------------------------------- 00002 * SAM Software Package License 00003 * ---------------------------------------------------------------------------- 00004 * Copyright (c) 2013, Atmel Corporation 00005 * 00006 * All rights reserved. 00007 * 00008 * Redistribution and use in source and binary forms, with or without 00009 * modification, are permitted provided that the following conditions are met: 00010 * 00011 * - Redistributions of source code must retain the above copyright notice, 00012 * this list of conditions and the disclaimer below. 00013 * 00014 * Atmel's name may not be used to endorse or promote products derived from 00015 * this software without specific prior written permission. 00016 * 00017 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR 00018 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 00019 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 00020 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, 00021 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 00022 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 00023 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 00024 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 00025 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 00026 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00027 * ---------------------------------------------------------------------------- 00028 */ 00029 00030 /** 00031 * \file 00032 */ 00033 #include "board.h" 00034 00035 #define MT9V022_SLAVE_ADDRESS (0x90>>1) 00036 #define MT9V022_PIDH_ADDRESS 0x0 00037 #define MT9V022_PIDL_ADDRESS 0x0 00038 #define MT9V022_PIDH 0x13 00039 #define MT9V022_PIDL 0x13 00040 #define MT9V022_PID_VER_MASK 0xFFF0 00041 /*------------------------------------------------------------------------------ 00042 * Local Variables 00043 *------------------------------------------------------------------------------*/ 00044 00045 const sensorReg_t mt9v022_mono_vga[] = { 00046 {0x01, 0x0100 }, // COL_WINDOW_START_CONTEXTA_REG 00047 {0x02, 0x0400 }, // ROW_WINDOW_START_CONTEXTA_REG 00048 {0x03, 0xE001 }, // ROW_WINDOW_SIZE_CONTEXTA_REG 00049 {0x04, 0x8002 }, // COL_WINDOW_SIZE_CONTEXTA_REG 00050 {0x05, 0x5E00 }, // HORZ_BLANK_CONTEXTA_REG 00051 {0x06, 0x2D00 }, // VERT_BLANK_CONTEXTA_REG 00052 {0x07, 0x8801 }, // CONTROL_MODE_REG 00053 {0x08, 0x9001 }, // COARSE_SHUTTER_WIDTH_1_CONTEXTA 00054 {0x09, 0xBD01 }, // COARSE_SHUTTER_WIDTH_2_CONTEXTA 00055 {0x0A, 0x6401 }, // SHUTTER_WIDTH_CONTROL_CONTEXTA 00056 {0x0B, 0xC201 }, // COARSE_SHUTTER_WIDTH_TOTAL_CONTEXTA 00057 {0x0C, 0x0 }, // RESET_REG 00058 {0x0D, 0x0003 }, // READ_MODE_REG 00059 {0x0E, 0x0 }, // READ_MODE2_REG 00060 {0x0F, 0x1100 }, // PIXEL_OPERATION_MODE 0x0100 00061 // {0x0F, 0x1500 }, // PIXEL_OPERATION_MODE 0x0100 00062 {0x10, 0x4000 }, // RESERVED_CORE_10 00063 {0x11, 0x4280 }, // RESERVED_CORE_11 00064 {0x12, 0x2200 }, // RESERVED_CORE_12 00065 {0x13, 0x322D }, // RESERVED_CORE_13 00066 {0x14, 0x020E }, // RESERVED_CORE_14 00067 {0x15, 0x327F }, // RESERVED_CORE_15 00068 {0x16, 0x0228 }, // RESERVED_CORE_16 00069 {0x17, 0x383E }, // RESERVED_CORE_17 00070 {0x18, 0x383E }, // RESERVED_CORE_18 00071 {0x19, 0x0228 }, // RESERVED_CORE_19 00072 {0x1A, 0x2804 }, // RESERVED_CORE_1A 00073 {0x1B, 0x0 }, // LED_OUT_CONTROL 00074 {0x1C, 0x0203 }, // DATA_COMPRESSION 00075 {0x1D, 0x0 }, // RESERVED_CORE_1D 00076 {0x1E, 0x0 }, // RESERVED_CORE_1E 00077 {0x1F, 0x0 }, // RESERVED_CORE_1F 00078 {0x20, 0xD101 }, // RESERVED_CORE_20 00079 {0x21, 0x2000 }, // RESERVED_CORE_21 00080 {0x22, 0x2000 }, // RESERVED_CORE_22 00081 {0x23, 0x1000 }, // RESERVED_CORE_23 00082 {0x24, 0x1000 }, // RESERVED_CORE_24 00083 {0x25, 0x2000 }, // RESERVED_CORE_25 00084 {0x26, 0x1000 }, // RESERVED_CORE_26 00085 {0x27, 0x1000 }, // RESERVED_CORE_27 00086 {0x28, 0x1000 }, // RESERVED_CORE_28 00087 {0x29, 0x1000 }, // RESERVED_CORE_29 00088 {0x2A, 0x2000 }, // RESERVED_CORE_2A 00089 {0x2B, 0x0300 }, // RESERVED_CORE_2B 00090 {0x2C, 0x0400 }, // VREF_ADC_CONTROL //0~7 00091 {0x2D, 0x0400 }, // RESERVED_CORE_2D 00092 {0x2E, 0x0700 }, // RESERVED_CORE_2E 00093 {0x2F, 0x0400 }, // RESERVED_CORE_2F 00094 {0x30, 0x0300 }, // RESERVED_CORE_30 00095 {0x31, 0x1F00 }, // V1_CONTROL_CONTEXTA 00096 {0x32, 0x1A00 }, // V2_CONTROL_CONTEXTA 00097 {0x33, 0x1200 }, // V3_CONTROL_CONTEXTA 00098 {0x34, 0x0300 }, // V4_CONTROL_CONTEXTA 00099 {0x35, 0x1000 }, // GLOBAL_GAIN_CONTEXTA_REG 00100 {0x36, 0x4000 }, // GLOBAL_GAIN_CONTEXTB_REG 00101 {0x37, 0x0 }, // RESERVED_CORE_37 00102 {0x38, 0x0 }, // RESERVED_CORE_38 00103 {0x39, 0x2500 }, // V1_CONTROL_CONTEXTB//none 00104 {0x3A, 0x2000 }, // V2_CONTROL_CONTEXTB//none 00105 {0x3B, 0x0300 }, // V3_CONTROL_CONTEXTB//none 00106 {0x3C, 0x0300 }, // V4_CONTROL_CONTEXTB//none 00107 {0x46, 0x1D23 }, // DARK_AVG_THRESHOLDS 00108 {0x47, 0x8080 }, // CALIB_CONTROL_REG 00109 {0x4C, 0x0200 }, // STEP_SIZE_AVG_MODE 00110 {0x39, 0x2500 }, // V1_CONTROL_CONTEXTB//none 00111 {0x3A, 0x2000 }, // V2_CONTROL_CONTEXTB//none 00112 {0x3B, 0x0300 }, // V3_CONTROL_CONTEXTB//none 00113 {0x3C, 0x0300 }, // V4_CONTROL_CONTEXTB//none 00114 {0x46, 0x1D23 }, // DARK_AVG_THRESHOLDS 00115 {0x47, 0x8080 }, // CALIB_CONTROL_REG 00116 {0x4C, 0x0200 }, // STEP_SIZE_AVG_MODE 00117 {0x39, 0x2500 }, // V1_CONTROL_CONTEXTB//none 00118 {0x3A, 0x2000 }, // V2_CONTROL_CONTEXTB//none 00119 {0x3B, 0x0300 }, // V3_CONTROL_CONTEXTB//none 00120 {0x3C, 0x0300 }, // V4_CONTROL_CONTEXTB//none 00121 {0x46, 0x1D23 }, // DARK_AVG_THRESHOLDS 00122 {0x47, 0x8080 }, // CALIB_CONTROL_REG 00123 {0x4C, 0x0200 }, // STEP_SIZE_AVG_MODE 00124 {0x60, 0x0 }, // RESERVED_CORE_60 00125 {0x61, 0x0 }, // RESERVED_CORE_61 00126 {0x62, 0x0 }, // RESERVED_CORE_62 00127 {0x63, 0x0 }, // RESERVED_CORE_63 00128 {0x64, 0x0 }, // RESERVED_CORE_64 00129 {0x65, 0x0 }, // RESERVED_CORE_65 00130 {0x66, 0x0 }, // RESERVED_CORE_66 00131 {0x67, 0x0 }, // RESERVED_CORE_67 00132 {0x6C, 0x0 }, // RESERVED_CORE_6C 00133 {0x70, 0x0400 }, // ROW_NOISE_CONTROL 00134 {0x71, 0x0 }, // NOISE_CONSTANT 00135 {0x72, 0x2A00 }, // PIXCLK_CONTROL 00136 {0x73, 0xF702 }, // 00137 {0x74, 0x0 }, // 00138 {0x7F, 0x0 }, // TEST_DATA 00139 //{0x7F, 0x0028 }, // TEST_DATA 00140 {0x80, 0xF400 }, // TILE_X0_Y0 00141 {0x81, 0xF400 }, // TILE_X1_Y0 00142 {0x82, 0xF400 }, // TILE_X2_Y0 00143 {0x83, 0xF400 }, // TILE_X3_Y0 00144 {0x84, 0xF400 }, // TILE_X4_Y0 00145 {0x85, 0xF400 }, // TILE_X0_Y1 00146 {0x86, 0xF400 }, // TILE_X1_Y1 00147 {0x87, 0xF400 }, // TILE_X2_Y1 00148 {0x88, 0xF400 }, // TILE_X3_Y1 00149 {0x89, 0xF400 }, // TILE_X4_Y1 00150 {0x8A, 0xF400 }, // TILE_X0_Y2 00151 {0x8B, 0xF400 }, // TILE_X1_Y2 00152 {0x8C, 0xF400 }, // TILE_X2_Y2 00153 {0x8D, 0xF400 }, // TILE_X3_Y2 00154 {0x8E, 0xF400 }, // TILE_X4_Y2 00155 {0x8F, 0xF400 }, // TILE_X0_Y3 00156 {0x90, 0xF400 }, // TILE_X1_Y3 00157 {0x91, 0xF400 }, // TILE_X2_Y3 00158 {0x92, 0xF400 }, // TILE_X3_Y3 00159 {0x93, 0xF400 }, // TILE_X4_Y3 00160 {0x94, 0xF400 }, // TILE_X0_Y4 00161 {0x95, 0xF400 }, // TILE_X1_Y4 00162 {0x96, 0xF400 }, // TILE_X2_Y4 00163 {0x97, 0xF400 }, // TILE_X3_Y4 00164 {0x98, 0xF400 }, // TILE_X4_Y4 00165 {0x99, 0x0 }, // X0_SLASH5 00166 {0x9A, 0x9600 }, // X1_SLASH5 00167 {0x9B, 0x2C01 }, // X2_SLASH5 00168 {0x9C, 0xC201 }, // X3_SLASH5 00169 {0x9D, 0x5802 }, // X4_SLASH5 00170 {0x9E, 0xF002 }, // X5_SLASH5 00171 {0x9F, 0x0 }, // Y0_SLASH5 00172 {0xA0, 0x6000 }, // Y1_SLASH5 00173 {0xA1, 0xC000 }, // Y2_SLASH5 00174 {0xA2, 0x2001 }, // Y3_SLASH5 00175 {0xA3, 0x8001 }, // Y4_SLASH5 00176 {0xA4, 0xE001 }, // Y5_SLASH5 00177 {0xA5, 0x3A00 }, // DESIRED_BIN 00178 {0xA6, 0x0200 }, // EXP_SKIP_FRM_H 00179 {0xA8, 0x0200 }, // EXP_LPF 00180 {0xA9, 0x0200 }, // GAIN_SKIP_FRM 00181 {0xAA, 0x0 }, // GAIN_LPF_H 00182 {0xAB, 0x0200 }, // MAX_GAIN 00183 {0xAC, 0x0100 }, // MIN_COARSE_EXPOSURE 00184 {0xAD, 0xE001 }, // MAX_COARSE_EXPOSURE 00185 {0xAE, 0x1400 }, // BIN_DIFF_THRESHOLD 00186 {0xAF, 0x0300 }, // AUTO_BLOCK_CONTROL 00187 {0xB0, 0xE0AB }, // PIXEL_COUNT 00188 {0xB1, 0x0200 }, // LVDS_MASTER_CONTROL 00189 {0xB2, 0x1000 }, // LVDS_SHFT_CLK_CONTROL 00190 {0xB3, 0x1000 }, // LVDS_DATA_CONTROL 00191 {0xB4, 0x0 }, // LVDS_DATA_STREAM_LATENCY 00192 {0xB5, 0x0 }, // LVDS_INTERNAL_SYNC 00193 {0xB6, 0x0 }, // LVDS_USE_10BIT_PIXELS 00194 {0xB7, 0x0 }, // STEREO_ERROR_CONTROL 00195 {0xBD, 0xE001 }, // Max Shutter 控制(自動AEC時使用) 1~0x7FF 00196 {0xBF, 0x1600 }, // INTERLACE_FIELD_VBLANK 00197 {0xC0, 0x0A00 }, // IMAGE_CAPTURE_NUM 00198 {0xC2, 0x4008 }, // ANALOG_CONTROLS 00199 {0xC3, 0x0 }, // RESERVED_CORE_C3 0x007F 00200 {0xC4, 0x1644 }, // RESERVED_CORE_C4 00201 {0xC5, 0x2144 }, // RESERVED_CORE_C5 00202 {0xF1, 0x0 }, // RESERVED_CORE_ F1 00203 {0xFE, 0xEFBE }, // RESERVED_CORE_FE 00204 {0xFF, 0xFF}, // END use 00205 }; 00206 00207 const sensorReg_t mt9v022_mono_qvga[] = { 00208 {0x01, 0x0100 }, // COL_WINDOW_START_CONTEXTA_REG 00209 {0x02, 0x0400 }, // ROW_WINDOW_START_CONTEXTA_REG 00210 {0x03, 0xE001 }, // ROW_WINDOW_SIZE_CONTEXTA_REG 00211 {0x04, 0x8002 }, // COL_WINDOW_SIZE_CONTEXTA_REG 00212 {0x05, 0x5E00 }, // HORZ_BLANK_CONTEXTA_REG 00213 //{0x06, 0x2D00 }, // VERT_BLANK_CONTEXTA_REG 00214 {0x06, 0x1D01 }, // VERT_BLANK_CONTEXTA_REG QVGA VB 285 00215 {0x07, 0x8801 }, // CONTROL_MODE_REG 00216 {0x08, 0x9001 }, // COARSE_SHUTTER_WIDTH_1_CONTEXTA 00217 {0x09, 0xBD01 }, // COARSE_SHUTTER_WIDTH_2_CONTEXTA 00218 {0x0A, 0x6401 }, // SHUTTER_WIDTH_CONTROL_CONTEXTA 00219 {0x0B, 0xC201 }, // COARSE_SHUTTER_WIDTH_TOTAL_CONTEXTA 00220 {0x0C, 0x0 }, // RESET_REG 00221 //{0x0D, 0x0003 }, // READ_MODE_REG 00222 {0x0D, 0x0503 }, // READ_MODE_REG QVGA bin2 00223 {0x0E, 0x0 }, // READ_MODE2_REG 00224 {0x0F, 0x1100 }, // PIXEL_OPERATION_MODE 0x0100 00225 // {0x0F, 0x1500 }, // PIXEL_OPERATION_MODE 0x0100 00226 {0x10, 0x4000 }, // RESERVED_CORE_10 00227 {0x11, 0x4280 }, // RESERVED_CORE_11 00228 {0x12, 0x2200 }, // RESERVED_CORE_12 00229 {0x13, 0x322D }, // RESERVED_CORE_13 00230 {0x14, 0x020E }, // RESERVED_CORE_14 00231 {0x15, 0x327F }, // RESERVED_CORE_15 00232 {0x16, 0x0228 }, // RESERVED_CORE_16 00233 {0x17, 0x383E }, // RESERVED_CORE_17 00234 {0x18, 0x383E }, // RESERVED_CORE_18 00235 {0x19, 0x0228 }, // RESERVED_CORE_19 00236 {0x1A, 0x2804 }, // RESERVED_CORE_1A 00237 {0x1B, 0x0 }, // LED_OUT_CONTROL 00238 {0x1C, 0x0203 }, // DATA_COMPRESSION 00239 {0x1D, 0x0 }, // RESERVED_CORE_1D 00240 {0x1E, 0x0 }, // RESERVED_CORE_1E 00241 {0x1F, 0x0 }, // RESERVED_CORE_1F 00242 {0x20, 0xD101 }, // RESERVED_CORE_20 00243 {0x21, 0x2000 }, // RESERVED_CORE_21 00244 {0x22, 0x2000 }, // RESERVED_CORE_22 00245 {0x23, 0x1000 }, // RESERVED_CORE_23 00246 {0x24, 0x1000 }, // RESERVED_CORE_24 00247 {0x25, 0x2000 }, // RESERVED_CORE_25 00248 {0x26, 0x1000 }, // RESERVED_CORE_26 00249 {0x27, 0x1000 }, // RESERVED_CORE_27 00250 {0x28, 0x1000 }, // RESERVED_CORE_28 00251 {0x29, 0x1000 }, // RESERVED_CORE_29 00252 {0x2A, 0x2000 }, // RESERVED_CORE_2A 00253 {0x2B, 0x0300 }, // RESERVED_CORE_2B 00254 {0x2C, 0x0400 }, // VREF_ADC_CONTROL //0~7 00255 {0x2D, 0x0400 }, // RESERVED_CORE_2D 00256 {0x2E, 0x0700 }, // RESERVED_CORE_2E 00257 {0x2F, 0x0400 }, // RESERVED_CORE_2F 00258 {0x30, 0x0300 }, // RESERVED_CORE_30 00259 {0x31, 0x1F00 }, // V1_CONTROL_CONTEXTA 00260 {0x32, 0x1A00 }, // V2_CONTROL_CONTEXTA 00261 {0x33, 0x1200 }, // V3_CONTROL_CONTEXTA 00262 {0x34, 0x0300 }, // V4_CONTROL_CONTEXTA 00263 {0x35, 0x1000 }, // GLOBAL_GAIN_CONTEXTA_REG 00264 {0x36, 0x4000 }, // GLOBAL_GAIN_CONTEXTB_REG 00265 {0x37, 0x0 }, // RESERVED_CORE_37 00266 {0x38, 0x0 }, // RESERVED_CORE_38 00267 {0x39, 0x2500 }, // V1_CONTROL_CONTEXTB//none 00268 {0x3A, 0x2000 }, // V2_CONTROL_CONTEXTB//none 00269 {0x3B, 0x0300 }, // V3_CONTROL_CONTEXTB//none 00270 {0x3C, 0x0300 }, // V4_CONTROL_CONTEXTB//none 00271 {0x46, 0x1D23 }, // DARK_AVG_THRESHOLDS 00272 {0x47, 0x8080 }, // CALIB_CONTROL_REG 00273 {0x4C, 0x0200 }, // STEP_SIZE_AVG_MODE 00274 {0x39, 0x2500 }, // V1_CONTROL_CONTEXTB//none 00275 {0x3A, 0x2000 }, // V2_CONTROL_CONTEXTB//none 00276 {0x3B, 0x0300 }, // V3_CONTROL_CONTEXTB//none 00277 {0x3C, 0x0300 }, // V4_CONTROL_CONTEXTB//none 00278 {0x46, 0x1D23 }, // DARK_AVG_THRESHOLDS 00279 {0x47, 0x8080 }, // CALIB_CONTROL_REG 00280 {0x4C, 0x0200 }, // STEP_SIZE_AVG_MODE 00281 {0x39, 0x2500 }, // V1_CONTROL_CONTEXTB//none 00282 {0x3A, 0x2000 }, // V2_CONTROL_CONTEXTB//none 00283 {0x3B, 0x0300 }, // V3_CONTROL_CONTEXTB//none 00284 {0x3C, 0x0300 }, // V4_CONTROL_CONTEXTB//none 00285 {0x46, 0x1D23 }, // DARK_AVG_THRESHOLDS 00286 {0x47, 0x8080 }, // CALIB_CONTROL_REG 00287 {0x4C, 0x0200 }, // STEP_SIZE_AVG_MODE 00288 {0x60, 0x0 }, // RESERVED_CORE_60 00289 {0x61, 0x0 }, // RESERVED_CORE_61 00290 {0x62, 0x0 }, // RESERVED_CORE_62 00291 {0x63, 0x0 }, // RESERVED_CORE_63 00292 {0x64, 0x0 }, // RESERVED_CORE_64 00293 {0x65, 0x0 }, // RESERVED_CORE_65 00294 {0x66, 0x0 }, // RESERVED_CORE_66 00295 {0x67, 0x0 }, // RESERVED_CORE_67 00296 {0x6C, 0x0 }, // RESERVED_CORE_6C 00297 {0x70, 0x0400 }, // ROW_NOISE_CONTROL 00298 {0x71, 0x0 }, // NOISE_CONSTANT 00299 {0x72, 0x2A00 }, // PIXCLK_CONTROL 00300 {0x73, 0xF702 }, // 00301 {0x74, 0x0 }, // 00302 {0x7F, 0x0 }, // TEST_DATA 00303 //{0x7F, 0x0028 }, // TEST_DATA 00304 {0x80, 0xF400 }, // TILE_X0_Y0 00305 {0x81, 0xF400 }, // TILE_X1_Y0 00306 {0x82, 0xF400 }, // TILE_X2_Y0 00307 {0x83, 0xF400 }, // TILE_X3_Y0 00308 {0x84, 0xF400 }, // TILE_X4_Y0 00309 {0x85, 0xF400 }, // TILE_X0_Y1 00310 {0x86, 0xF400 }, // TILE_X1_Y1 00311 {0x87, 0xF400 }, // TILE_X2_Y1 00312 {0x88, 0xF400 }, // TILE_X3_Y1 00313 {0x89, 0xF400 }, // TILE_X4_Y1 00314 {0x8A, 0xF400 }, // TILE_X0_Y2 00315 {0x8B, 0xF400 }, // TILE_X1_Y2 00316 {0x8C, 0xF400 }, // TILE_X2_Y2 00317 {0x8D, 0xF400 }, // TILE_X3_Y2 00318 {0x8E, 0xF400 }, // TILE_X4_Y2 00319 {0x8F, 0xF400 }, // TILE_X0_Y3 00320 {0x90, 0xF400 }, // TILE_X1_Y3 00321 {0x91, 0xF400 }, // TILE_X2_Y3 00322 {0x92, 0xF400 }, // TILE_X3_Y3 00323 {0x93, 0xF400 }, // TILE_X4_Y3 00324 {0x94, 0xF400 }, // TILE_X0_Y4 00325 {0x95, 0xF400 }, // TILE_X1_Y4 00326 {0x96, 0xF400 }, // TILE_X2_Y4 00327 {0x97, 0xF400 }, // TILE_X3_Y4 00328 {0x98, 0xF400 }, // TILE_X4_Y4 00329 {0x99, 0x0 }, // X0_SLASH5 00330 {0x9A, 0x9600 }, // X1_SLASH5 00331 {0x9B, 0x2C01 }, // X2_SLASH5 00332 {0x9C, 0xC201 }, // X3_SLASH5 00333 {0x9D, 0x5802 }, // X4_SLASH5 00334 {0x9E, 0xF002 }, // X5_SLASH5 00335 {0x9F, 0x0 }, // Y0_SLASH5 00336 {0xA0, 0x6000 }, // Y1_SLASH5 00337 {0xA1, 0xC000 }, // Y2_SLASH5 00338 {0xA2, 0x2001 }, // Y3_SLASH5 00339 {0xA3, 0x8001 }, // Y4_SLASH5 00340 {0xA4, 0xE001 }, // Y5_SLASH5 00341 {0xA5, 0x3A00 }, // DESIRED_BIN 00342 {0xA6, 0x0200 }, // EXP_SKIP_FRM_H 00343 {0xA8, 0x0200 }, // EXP_LPF 00344 {0xA9, 0x0200 }, // GAIN_SKIP_FRM 00345 {0xAA, 0x0 }, // GAIN_LPF_H 00346 {0xAB, 0x0200 }, // MAX_GAIN 00347 {0xAC, 0x0100 }, // MIN_COARSE_EXPOSURE 00348 {0xAD, 0xE001 }, // MAX_COARSE_EXPOSURE 00349 {0xAE, 0x1400 }, // BIN_DIFF_THRESHOLD 00350 {0xAF, 0x0300 }, // AUTO_BLOCK_CONTROL 00351 {0xB0, 0xE0AB }, // PIXEL_COUNT 00352 {0xB1, 0x0200 }, // LVDS_MASTER_CONTROL 00353 {0xB2, 0x1000 }, // LVDS_SHFT_CLK_CONTROL 00354 {0xB3, 0x1000 }, // LVDS_DATA_CONTROL 00355 {0xB4, 0x0 }, // LVDS_DATA_STREAM_LATENCY 00356 {0xB5, 0x0 }, // LVDS_INTERNAL_SYNC 00357 {0xB6, 0x0 }, // LVDS_USE_10BIT_PIXELS 00358 {0xB7, 0x0 }, // STEREO_ERROR_CONTROL 00359 {0xBD, 0xE001 }, // Max Shutter 控制(自動AEC時使用) 1~0x7FF 00360 {0xBF, 0x1600 }, // INTERLACE_FIELD_VBLANK 00361 {0xC0, 0x0A00 }, // IMAGE_CAPTURE_NUM 00362 {0xC2, 0x4008 }, // ANALOG_CONTROLS 00363 {0xC3, 0x0 }, // RESERVED_CORE_C3 0x007F 00364 {0xC4, 0x1644 }, // RESERVED_CORE_C4 00365 {0xC5, 0x2144 }, // RESERVED_CORE_C5 00366 {0xF1, 0x0 }, // RESERVED_CORE_ F1 00367 {0xFE, 0xEFBE }, // RESERVED_CORE_FE 00368 {0xFF, 0xFF}, // END use 00369 }; 00370 00371 const sensorOutput_t mt9v022_output_mono_vga = 00372 {0, VGA, MONO_12_BIT, 1, 640, 480, mt9v022_mono_vga}; 00373 00374 const sensorOutput_t mt9v022_output_mono_qvga = 00375 {0, QVGA, MONO_12_BIT, 1, 320, 240, mt9v022_mono_qvga}; 00376 00377 const sensorProfile_t mt9v022Profile = 00378 { 00379 SENSOR_COMS, /* Sensor type for CMOS sensor or CCD */ 00380 SENSOR_TWI_REG_BYTE_DATA_2BYTE, /* TWI interface mode */ 00381 MT9V022_SLAVE_ADDRESS, /* TWI slave address */ 00382 MT9V022_PIDH_ADDRESS, /* Register address for product ID high byte */ 00383 MT9V022_PIDL_ADDRESS, /* Register address for product ID low byte*/ 00384 MT9V022_PIDH, /* product ID high byte */ 00385 MT9V022_PIDL, /* product ID low byte */ 00386 MT9V022_PID_VER_MASK, /* version mask */ 00387 &mt9v022_output_mono_vga, 00388 &mt9v022_output_mono_qvga, 00389 0, 00390 0, 00391 0, 00392 0, 00393 0 00394 };