00001 /* ---------------------------------------------------------------------------- 00002 * SAM Software Package License 00003 * ---------------------------------------------------------------------------- 00004 * Copyright (c) 2011, Atmel Corporation 00005 * 00006 * All rights reserved. 00007 * 00008 * Redistribution and use in source and binary forms, with or without 00009 * modification, are permitted provided that the following conditions are met: 00010 * 00011 * - Redistributions of source code must retain the above copyright notice, 00012 * this list of conditions and the disclaimer below. 00013 * 00014 * Atmel's name may not be used to endorse or promote products derived from 00015 * this software without specific prior written permission. 00016 * 00017 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR 00018 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 00019 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 00020 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, 00021 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 00022 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 00023 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 00024 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 00025 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 00026 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00027 * ---------------------------------------------------------------------------- 00028 */ 00029 00030 /** 00031 * \file 00032 * 00033 * Definitions and function prototype for SDRAMC. 00034 */ 00035 00036 // --------------------------------------------------------------------------- 00037 // SDRAM 00038 // --------------------------------------------------------------------------- 00039 /** SDRAMC Configuration */ 00040 #define EBI_SDRAMC_ADDR (0x70000000u) 00041 00042 /** SDRAM bus width */ 00043 #define BOARD_SDRAM_BUSWIDTH 16 00044 00045 00046 typedef struct _SSdramc_config 00047 { 00048 uint32_t dwColumnBits ; // Number of Column Bits 00049 uint32_t dwRowBits ; // Number of Row Bits 00050 uint32_t dwBanks ; // Number of Banks 00051 uint32_t dwCAS ; // CAS Latency 00052 uint32_t dwDataBusWidth ; // Data Bus Width 00053 uint32_t dwWriteRecoveryDelay ; // Write Recovery Delay 00054 uint32_t dwRowCycleDelay_RowRefreshCycle ; // Row Cycle Delay and Row Refresh Cycle 00055 uint32_t dwRowPrechargeDelay ; // Row Precharge Delay 00056 uint32_t dwRowColumnDelay ; // Row to Column Delay 00057 uint32_t dwActivePrechargeDelay ; // Active to Precharge Delay 00058 uint32_t dwExitSelfRefreshActiveDelay ; // Exit Self Refresh to Active Delay 00059 uint32_t dwBK1 ; // bk1 addr 00060 00061 } SSdramc_config ; 00062 00063 typedef struct _SSdramc_Memory 00064 { 00065 SSdramc_config cfg ; 00066 00067 } SSdramc_Memory ; 00068 00069 extern void SDRAMC_Configure( SSdramc_Memory* pMemory, 00070 uint32_t dwClockFrequency ) ;