00001 /* ---------------------------------------------------------------------------- */ 00002 /* Atmel Microcontroller Software Support */ 00003 /* SAM Software Package License */ 00004 /* ---------------------------------------------------------------------------- */ 00005 /* Copyright (c) 2014, Atmel Corporation */ 00006 /* */ 00007 /* All rights reserved. */ 00008 /* */ 00009 /* Redistribution and use in source and binary forms, with or without */ 00010 /* modification, are permitted provided that the following condition is met: */ 00011 /* */ 00012 /* - Redistributions of source code must retain the above copyright notice, */ 00013 /* this list of conditions and the disclaimer below. */ 00014 /* */ 00015 /* Atmel's name may not be used to endorse or promote products derived from */ 00016 /* this software without specific prior written permission. */ 00017 /* */ 00018 /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ 00019 /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ 00020 /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ 00021 /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ 00022 /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ 00023 /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ 00024 /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ 00025 /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ 00026 /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ 00027 /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ 00028 /* ---------------------------------------------------------------------------- */ 00029 00030 #ifndef _SAMV71_PIOD_INSTANCE_ 00031 #define _SAMV71_PIOD_INSTANCE_ 00032 00033 /* ========== Register definition for PIOD peripheral ========== */ 00034 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 00035 #define REG_PIOD_PER (0x400E1400U) /**< \brief (PIOD) PIO Enable Register */ 00036 #define REG_PIOD_PDR (0x400E1404U) /**< \brief (PIOD) PIO Disable Register */ 00037 #define REG_PIOD_PSR (0x400E1408U) /**< \brief (PIOD) PIO Status Register */ 00038 #define REG_PIOD_OER (0x400E1410U) /**< \brief (PIOD) Output Enable Register */ 00039 #define REG_PIOD_ODR (0x400E1414U) /**< \brief (PIOD) Output Disable Register */ 00040 #define REG_PIOD_OSR (0x400E1418U) /**< \brief (PIOD) Output Status Register */ 00041 #define REG_PIOD_IFER (0x400E1420U) /**< \brief (PIOD) Glitch Input Filter Enable Register */ 00042 #define REG_PIOD_IFDR (0x400E1424U) /**< \brief (PIOD) Glitch Input Filter Disable Register */ 00043 #define REG_PIOD_IFSR (0x400E1428U) /**< \brief (PIOD) Glitch Input Filter Status Register */ 00044 #define REG_PIOD_SODR (0x400E1430U) /**< \brief (PIOD) Set Output Data Register */ 00045 #define REG_PIOD_CODR (0x400E1434U) /**< \brief (PIOD) Clear Output Data Register */ 00046 #define REG_PIOD_ODSR (0x400E1438U) /**< \brief (PIOD) Output Data Status Register */ 00047 #define REG_PIOD_PDSR (0x400E143CU) /**< \brief (PIOD) Pin Data Status Register */ 00048 #define REG_PIOD_IER (0x400E1440U) /**< \brief (PIOD) Interrupt Enable Register */ 00049 #define REG_PIOD_IDR (0x400E1444U) /**< \brief (PIOD) Interrupt Disable Register */ 00050 #define REG_PIOD_IMR (0x400E1448U) /**< \brief (PIOD) Interrupt Mask Register */ 00051 #define REG_PIOD_ISR (0x400E144CU) /**< \brief (PIOD) Interrupt Status Register */ 00052 #define REG_PIOD_MDER (0x400E1450U) /**< \brief (PIOD) Multi-driver Enable Register */ 00053 #define REG_PIOD_MDDR (0x400E1454U) /**< \brief (PIOD) Multi-driver Disable Register */ 00054 #define REG_PIOD_MDSR (0x400E1458U) /**< \brief (PIOD) Multi-driver Status Register */ 00055 #define REG_PIOD_PUDR (0x400E1460U) /**< \brief (PIOD) Pull-up Disable Register */ 00056 #define REG_PIOD_PUER (0x400E1464U) /**< \brief (PIOD) Pull-up Enable Register */ 00057 #define REG_PIOD_PUSR (0x400E1468U) /**< \brief (PIOD) Pad Pull-up Status Register */ 00058 #define REG_PIOD_ABCDSR (0x400E1470U) /**< \brief (PIOD) Peripheral Select Register */ 00059 #define REG_PIOD_IFSCDR (0x400E1480U) /**< \brief (PIOD) Input Filter Slow Clock Disable Register */ 00060 #define REG_PIOD_IFSCER (0x400E1484U) /**< \brief (PIOD) Input Filter Slow Clock Enable Register */ 00061 #define REG_PIOD_IFSCSR (0x400E1488U) /**< \brief (PIOD) Input Filter Slow Clock Status Register */ 00062 #define REG_PIOD_SCDR (0x400E148CU) /**< \brief (PIOD) Slow Clock Divider Debouncing Register */ 00063 #define REG_PIOD_PPDDR (0x400E1490U) /**< \brief (PIOD) Pad Pull-down Disable Register */ 00064 #define REG_PIOD_PPDER (0x400E1494U) /**< \brief (PIOD) Pad Pull-down Enable Register */ 00065 #define REG_PIOD_PPDSR (0x400E1498U) /**< \brief (PIOD) Pad Pull-down Status Register */ 00066 #define REG_PIOD_OWER (0x400E14A0U) /**< \brief (PIOD) Output Write Enable */ 00067 #define REG_PIOD_OWDR (0x400E14A4U) /**< \brief (PIOD) Output Write Disable */ 00068 #define REG_PIOD_OWSR (0x400E14A8U) /**< \brief (PIOD) Output Write Status Register */ 00069 #define REG_PIOD_AIMER (0x400E14B0U) /**< \brief (PIOD) Additional Interrupt Modes Enable Register */ 00070 #define REG_PIOD_AIMDR (0x400E14B4U) /**< \brief (PIOD) Additional Interrupt Modes Disable Register */ 00071 #define REG_PIOD_AIMMR (0x400E14B8U) /**< \brief (PIOD) Additional Interrupt Modes Mask Register */ 00072 #define REG_PIOD_ESR (0x400E14C0U) /**< \brief (PIOD) Edge Select Register */ 00073 #define REG_PIOD_LSR (0x400E14C4U) /**< \brief (PIOD) Level Select Register */ 00074 #define REG_PIOD_ELSR (0x400E14C8U) /**< \brief (PIOD) Edge/Level Status Register */ 00075 #define REG_PIOD_FELLSR (0x400E14D0U) /**< \brief (PIOD) Falling Edge/Low-Level Select Register */ 00076 #define REG_PIOD_REHLSR (0x400E14D4U) /**< \brief (PIOD) Rising Edge/High-Level Select Register */ 00077 #define REG_PIOD_FRLHSR (0x400E14D8U) /**< \brief (PIOD) Fall/Rise - Low/High Status Register */ 00078 #define REG_PIOD_LOCKSR (0x400E14E0U) /**< \brief (PIOD) Lock Status */ 00079 #define REG_PIOD_WPMR (0x400E14E4U) /**< \brief (PIOD) Write Protection Mode Register */ 00080 #define REG_PIOD_WPSR (0x400E14E8U) /**< \brief (PIOD) Write Protection Status Register */ 00081 #define REG_PIOD_SCHMITT (0x400E1500U) /**< \brief (PIOD) Schmitt Trigger Register */ 00082 #define REG_PIOD_KER (0x400E1520U) /**< \brief (PIOD) Keypad Controller Enable Register */ 00083 #define REG_PIOD_KRCR (0x400E1524U) /**< \brief (PIOD) Keypad Controller Row Column Register */ 00084 #define REG_PIOD_KDR (0x400E1528U) /**< \brief (PIOD) Keypad Controller Debouncing Register */ 00085 #define REG_PIOD_KIER (0x400E1530U) /**< \brief (PIOD) Keypad Controller Interrupt Enable Register */ 00086 #define REG_PIOD_KIDR (0x400E1534U) /**< \brief (PIOD) Keypad Controller Interrupt Disable Register */ 00087 #define REG_PIOD_KIMR (0x400E1538U) /**< \brief (PIOD) Keypad Controller Interrupt Mask Register */ 00088 #define REG_PIOD_KSR (0x400E153CU) /**< \brief (PIOD) Keypad Controller Status Register */ 00089 #define REG_PIOD_KKPR (0x400E1540U) /**< \brief (PIOD) Keypad Controller Key Press Register */ 00090 #define REG_PIOD_KKRR (0x400E1544U) /**< \brief (PIOD) Keypad Controller Key Release Register */ 00091 #define REG_PIOD_PCMR (0x400E1550U) /**< \brief (PIOD) Parallel Capture Mode Register */ 00092 #define REG_PIOD_PCIER (0x400E1554U) /**< \brief (PIOD) Parallel Capture Interrupt Enable Register */ 00093 #define REG_PIOD_PCIDR (0x400E1558U) /**< \brief (PIOD) Parallel Capture Interrupt Disable Register */ 00094 #define REG_PIOD_PCIMR (0x400E155CU) /**< \brief (PIOD) Parallel Capture Interrupt Mask Register */ 00095 #define REG_PIOD_PCISR (0x400E1560U) /**< \brief (PIOD) Parallel Capture Interrupt Status Register */ 00096 #define REG_PIOD_PCRHR (0x400E1564U) /**< \brief (PIOD) Parallel Capture Reception Holding Register */ 00097 #else 00098 #define REG_PIOD_PER (*(__O uint32_t*)0x400E1400U) /**< \brief (PIOD) PIO Enable Register */ 00099 #define REG_PIOD_PDR (*(__O uint32_t*)0x400E1404U) /**< \brief (PIOD) PIO Disable Register */ 00100 #define REG_PIOD_PSR (*(__I uint32_t*)0x400E1408U) /**< \brief (PIOD) PIO Status Register */ 00101 #define REG_PIOD_OER (*(__O uint32_t*)0x400E1410U) /**< \brief (PIOD) Output Enable Register */ 00102 #define REG_PIOD_ODR (*(__O uint32_t*)0x400E1414U) /**< \brief (PIOD) Output Disable Register */ 00103 #define REG_PIOD_OSR (*(__I uint32_t*)0x400E1418U) /**< \brief (PIOD) Output Status Register */ 00104 #define REG_PIOD_IFER (*(__O uint32_t*)0x400E1420U) /**< \brief (PIOD) Glitch Input Filter Enable Register */ 00105 #define REG_PIOD_IFDR (*(__O uint32_t*)0x400E1424U) /**< \brief (PIOD) Glitch Input Filter Disable Register */ 00106 #define REG_PIOD_IFSR (*(__I uint32_t*)0x400E1428U) /**< \brief (PIOD) Glitch Input Filter Status Register */ 00107 #define REG_PIOD_SODR (*(__O uint32_t*)0x400E1430U) /**< \brief (PIOD) Set Output Data Register */ 00108 #define REG_PIOD_CODR (*(__O uint32_t*)0x400E1434U) /**< \brief (PIOD) Clear Output Data Register */ 00109 #define REG_PIOD_ODSR (*(__IO uint32_t*)0x400E1438U) /**< \brief (PIOD) Output Data Status Register */ 00110 #define REG_PIOD_PDSR (*(__I uint32_t*)0x400E143CU) /**< \brief (PIOD) Pin Data Status Register */ 00111 #define REG_PIOD_IER (*(__O uint32_t*)0x400E1440U) /**< \brief (PIOD) Interrupt Enable Register */ 00112 #define REG_PIOD_IDR (*(__O uint32_t*)0x400E1444U) /**< \brief (PIOD) Interrupt Disable Register */ 00113 #define REG_PIOD_IMR (*(__I uint32_t*)0x400E1448U) /**< \brief (PIOD) Interrupt Mask Register */ 00114 #define REG_PIOD_ISR (*(__I uint32_t*)0x400E144CU) /**< \brief (PIOD) Interrupt Status Register */ 00115 #define REG_PIOD_MDER (*(__O uint32_t*)0x400E1450U) /**< \brief (PIOD) Multi-driver Enable Register */ 00116 #define REG_PIOD_MDDR (*(__O uint32_t*)0x400E1454U) /**< \brief (PIOD) Multi-driver Disable Register */ 00117 #define REG_PIOD_MDSR (*(__I uint32_t*)0x400E1458U) /**< \brief (PIOD) Multi-driver Status Register */ 00118 #define REG_PIOD_PUDR (*(__O uint32_t*)0x400E1460U) /**< \brief (PIOD) Pull-up Disable Register */ 00119 #define REG_PIOD_PUER (*(__O uint32_t*)0x400E1464U) /**< \brief (PIOD) Pull-up Enable Register */ 00120 #define REG_PIOD_PUSR (*(__I uint32_t*)0x400E1468U) /**< \brief (PIOD) Pad Pull-up Status Register */ 00121 #define REG_PIOD_ABCDSR (*(__IO uint32_t*)0x400E1470U) /**< \brief (PIOD) Peripheral Select Register */ 00122 #define REG_PIOD_IFSCDR (*(__O uint32_t*)0x400E1480U) /**< \brief (PIOD) Input Filter Slow Clock Disable Register */ 00123 #define REG_PIOD_IFSCER (*(__O uint32_t*)0x400E1484U) /**< \brief (PIOD) Input Filter Slow Clock Enable Register */ 00124 #define REG_PIOD_IFSCSR (*(__I uint32_t*)0x400E1488U) /**< \brief (PIOD) Input Filter Slow Clock Status Register */ 00125 #define REG_PIOD_SCDR (*(__IO uint32_t*)0x400E148CU) /**< \brief (PIOD) Slow Clock Divider Debouncing Register */ 00126 #define REG_PIOD_PPDDR (*(__O uint32_t*)0x400E1490U) /**< \brief (PIOD) Pad Pull-down Disable Register */ 00127 #define REG_PIOD_PPDER (*(__O uint32_t*)0x400E1494U) /**< \brief (PIOD) Pad Pull-down Enable Register */ 00128 #define REG_PIOD_PPDSR (*(__I uint32_t*)0x400E1498U) /**< \brief (PIOD) Pad Pull-down Status Register */ 00129 #define REG_PIOD_OWER (*(__O uint32_t*)0x400E14A0U) /**< \brief (PIOD) Output Write Enable */ 00130 #define REG_PIOD_OWDR (*(__O uint32_t*)0x400E14A4U) /**< \brief (PIOD) Output Write Disable */ 00131 #define REG_PIOD_OWSR (*(__I uint32_t*)0x400E14A8U) /**< \brief (PIOD) Output Write Status Register */ 00132 #define REG_PIOD_AIMER (*(__O uint32_t*)0x400E14B0U) /**< \brief (PIOD) Additional Interrupt Modes Enable Register */ 00133 #define REG_PIOD_AIMDR (*(__O uint32_t*)0x400E14B4U) /**< \brief (PIOD) Additional Interrupt Modes Disable Register */ 00134 #define REG_PIOD_AIMMR (*(__I uint32_t*)0x400E14B8U) /**< \brief (PIOD) Additional Interrupt Modes Mask Register */ 00135 #define REG_PIOD_ESR (*(__O uint32_t*)0x400E14C0U) /**< \brief (PIOD) Edge Select Register */ 00136 #define REG_PIOD_LSR (*(__O uint32_t*)0x400E14C4U) /**< \brief (PIOD) Level Select Register */ 00137 #define REG_PIOD_ELSR (*(__I uint32_t*)0x400E14C8U) /**< \brief (PIOD) Edge/Level Status Register */ 00138 #define REG_PIOD_FELLSR (*(__O uint32_t*)0x400E14D0U) /**< \brief (PIOD) Falling Edge/Low-Level Select Register */ 00139 #define REG_PIOD_REHLSR (*(__O uint32_t*)0x400E14D4U) /**< \brief (PIOD) Rising Edge/High-Level Select Register */ 00140 #define REG_PIOD_FRLHSR (*(__I uint32_t*)0x400E14D8U) /**< \brief (PIOD) Fall/Rise - Low/High Status Register */ 00141 #define REG_PIOD_LOCKSR (*(__I uint32_t*)0x400E14E0U) /**< \brief (PIOD) Lock Status */ 00142 #define REG_PIOD_WPMR (*(__IO uint32_t*)0x400E14E4U) /**< \brief (PIOD) Write Protection Mode Register */ 00143 #define REG_PIOD_WPSR (*(__I uint32_t*)0x400E14E8U) /**< \brief (PIOD) Write Protection Status Register */ 00144 #define REG_PIOD_SCHMITT (*(__IO uint32_t*)0x400E1500U) /**< \brief (PIOD) Schmitt Trigger Register */ 00145 #define REG_PIOD_KER (*(__IO uint32_t*)0x400E1520U) /**< \brief (PIOD) Keypad Controller Enable Register */ 00146 #define REG_PIOD_KRCR (*(__IO uint32_t*)0x400E1524U) /**< \brief (PIOD) Keypad Controller Row Column Register */ 00147 #define REG_PIOD_KDR (*(__IO uint32_t*)0x400E1528U) /**< \brief (PIOD) Keypad Controller Debouncing Register */ 00148 #define REG_PIOD_KIER (*(__O uint32_t*)0x400E1530U) /**< \brief (PIOD) Keypad Controller Interrupt Enable Register */ 00149 #define REG_PIOD_KIDR (*(__O uint32_t*)0x400E1534U) /**< \brief (PIOD) Keypad Controller Interrupt Disable Register */ 00150 #define REG_PIOD_KIMR (*(__I uint32_t*)0x400E1538U) /**< \brief (PIOD) Keypad Controller Interrupt Mask Register */ 00151 #define REG_PIOD_KSR (*(__I uint32_t*)0x400E153CU) /**< \brief (PIOD) Keypad Controller Status Register */ 00152 #define REG_PIOD_KKPR (*(__I uint32_t*)0x400E1540U) /**< \brief (PIOD) Keypad Controller Key Press Register */ 00153 #define REG_PIOD_KKRR (*(__I uint32_t*)0x400E1544U) /**< \brief (PIOD) Keypad Controller Key Release Register */ 00154 #define REG_PIOD_PCMR (*(__IO uint32_t*)0x400E1550U) /**< \brief (PIOD) Parallel Capture Mode Register */ 00155 #define REG_PIOD_PCIER (*(__O uint32_t*)0x400E1554U) /**< \brief (PIOD) Parallel Capture Interrupt Enable Register */ 00156 #define REG_PIOD_PCIDR (*(__O uint32_t*)0x400E1558U) /**< \brief (PIOD) Parallel Capture Interrupt Disable Register */ 00157 #define REG_PIOD_PCIMR (*(__I uint32_t*)0x400E155CU) /**< \brief (PIOD) Parallel Capture Interrupt Mask Register */ 00158 #define REG_PIOD_PCISR (*(__I uint32_t*)0x400E1560U) /**< \brief (PIOD) Parallel Capture Interrupt Status Register */ 00159 #define REG_PIOD_PCRHR (*(__I uint32_t*)0x400E1564U) /**< \brief (PIOD) Parallel Capture Reception Holding Register */ 00160 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 00161 00162 #endif /* _SAMV71_PIOD_INSTANCE_ */