SAMV71 Xplained Ultra Software Package 1.5

xdmac.c

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00029 
00030 
00031 /**
00032  * \file
00033  *
00034  * Implementation of xDMA controller (XDMAC).
00035  *
00036  */
00037 
00038 /*----------------------------------------------------------------------------
00039  *        Headers
00040  *----------------------------------------------------------------------------*/
00041 
00042 #include "chip.h"
00043 
00044 #include <stdint.h>
00045 #include <assert.h>
00046 /** \addtogroup dmac_functions XDMAC Functions
00047  *@{
00048  */
00049 
00050 /*----------------------------------------------------------------------------
00051  *        Exported functions
00052  *----------------------------------------------------------------------------*/
00053 
00054 /**
00055  * \brief Get XDMAC global type.
00056  *
00057  * \param pXdmac Pointer to the XDMAC peripheral.
00058  */
00059 uint32_t XDMAC_GetType(Xdmac *pXdmac)
00060 {
00061     assert(pXdmac);
00062     return pXdmac->XDMAC_GTYPE;
00063 }
00064 
00065 /**
00066  * \brief Get XDMAC global configuration.
00067  *
00068  * \param pXdmac Pointer to the XDMAC peripheral.
00069  */
00070 uint32_t XDMAC_GetConfig(Xdmac *pXdmac)
00071 {
00072     assert(pXdmac);
00073     return pXdmac->XDMAC_GCFG;
00074 }
00075 
00076 /**
00077  * \brief Get XDMAC global weighted arbiter configuration.
00078  *
00079  * \param pXdmac Pointer to the XDMAC peripheral.
00080  */
00081 uint32_t XDMAC_GetArbiter(Xdmac *pXdmac)
00082 {
00083     assert(pXdmac);
00084     return pXdmac->XDMAC_GWAC;
00085 }
00086 
00087 /**
00088  * \brief Enables XDMAC global interrupt.
00089  *
00090  * \param pXdmac Pointer to the XDMAC peripheral.
00091  * \param dwInteruptMask IT to be enabled.
00092  */
00093 void XDMAC_EnableGIt (Xdmac *pXdmac, uint8_t dwInteruptMask)
00094 {
00095     assert(pXdmac);
00096     pXdmac->XDMAC_GIE = (XDMAC_GIE_IE0 << dwInteruptMask);
00097 }
00098 
00099 /**
00100  * \brief Disables XDMAC global interrupt
00101  *
00102  * \param pXdmac Pointer to the XDMAC peripheral.
00103  * \param dwInteruptMask IT to be enabled
00104  */
00105 void XDMAC_DisableGIt (Xdmac *pXdmac, uint8_t dwInteruptMask)
00106 {
00107     assert(pXdmac);
00108     pXdmac->XDMAC_GID = (XDMAC_GID_ID0 << dwInteruptMask);
00109 }
00110 
00111 /**
00112  * \brief Get XDMAC global interrupt mask.
00113  *
00114  * \param pXdmac Pointer to the XDMAC peripheral.
00115  */
00116 uint32_t XDMAC_GetGItMask(Xdmac *pXdmac)
00117 {
00118     assert(pXdmac);
00119     return (pXdmac->XDMAC_GIM);
00120 }
00121 
00122 /**
00123  * \brief Get XDMAC global interrupt status.
00124  *
00125  * \param pXdmac Pointer to the XDMAC peripheral.
00126  */
00127 uint32_t XDMAC_GetGIsr(Xdmac *pXdmac)
00128 {
00129     assert(pXdmac);
00130     return (pXdmac->XDMAC_GIS);
00131 }
00132 
00133 /**
00134  * \brief Get XDMAC masked global interrupt.
00135  *
00136  * \param pXdmac Pointer to the XDMAC peripheral.
00137  */
00138 uint32_t XDMAC_GetMaskedGIsr(Xdmac *pXdmac)
00139 {
00140     uint32_t _dwStatus;
00141     assert(pXdmac);
00142     _dwStatus = pXdmac->XDMAC_GIS;
00143     _dwStatus &= pXdmac->XDMAC_GIM;
00144     return _dwStatus;
00145 }
00146 
00147 /**
00148  * \brief enables the relevant channel of given XDMAC.
00149  *
00150  * \param pXdmac Pointer to the XDMAC peripheral.
00151  * \param channel Particular channel number.
00152  */
00153 void XDMAC_EnableChannel(Xdmac *pXdmac, uint8_t channel)
00154 {
00155     assert(pXdmac);
00156     assert(channel < XDMAC_CHANNEL_NUM);
00157     pXdmac->XDMAC_GE = (XDMAC_GE_EN0 << channel);
00158 }
00159 
00160 /**
00161  * \brief enables the relevant channels of given XDMAC.
00162  *
00163  * \param pXdmac Pointer to the XDMAC peripheral.
00164  * \param bmChannels Channels bitmap.
00165  */
00166 void XDMAC_EnableChannels(Xdmac *pXdmac, uint32_t bmChannels)
00167 {
00168     assert(pXdmac);
00169     pXdmac->XDMAC_GE = bmChannels;
00170 }
00171 
00172 /**
00173  * \brief Disables the relevant channel of given XDMAC.
00174  *
00175  * \param pXdmac Pointer to the XDMAC peripheral.
00176  * \param channel Particular channel number.
00177  */
00178 void XDMAC_DisableChannel(Xdmac *pXdmac, uint8_t channel)
00179 {
00180     assert(pXdmac);
00181     assert(channel < XDMAC_CHANNEL_NUM);
00182     pXdmac->XDMAC_GD = (XDMAC_GD_DI0 << channel);
00183 }
00184 
00185 /**
00186  * \brief Disables the relevant channels of given XDMAC.
00187  *
00188  * \param pXdmac Pointer to the XDMAC peripheral.
00189  * \param bmChannels Channels bitmap.
00190  */
00191 void XDMAC_DisableChannels(Xdmac *pXdmac, uint32_t bmChannels)
00192 {
00193     assert(pXdmac);
00194     pXdmac->XDMAC_GD = bmChannels;
00195 }
00196 
00197 
00198 /**
00199  * \brief Get Global channel status of given XDMAC.
00200  * \note: When set to 1, this bit indicates that the channel x is enabled.
00201    If a channel disable request is issued, this bit remains asserted
00202    until pending transaction is completed.
00203  * \param pXdmac Pointer to the XDMAC peripheral.
00204  */
00205 uint32_t XDMAC_GetGlobalChStatus(Xdmac *pXdmac)
00206 {
00207     assert(pXdmac);
00208     return pXdmac->XDMAC_GS;
00209 }
00210 
00211 /**
00212  * \brief Suspend the relevant channel's read.
00213  *
00214  * \param pXdmac Pointer to the XDMAC peripheral.
00215  * \param channel Particular channel number.
00216  */
00217 void XDMAC_SuspendReadChannel(Xdmac *pXdmac, uint8_t channel)
00218 {
00219     assert(pXdmac);
00220     assert(channel < XDMAC_CHANNEL_NUM);
00221     pXdmac->XDMAC_GRS |= XDMAC_GRS_RS0 << channel;
00222 }
00223 
00224 /**
00225  * \brief Suspend the relevant channel's write.
00226  *
00227  * \param pXdmac Pointer to the XDMAC peripheral.
00228  * \param channel Particular channel number.
00229  */
00230 void XDMAC_SuspendWriteChannel(Xdmac *pXdmac, uint8_t channel)
00231 {
00232     assert(pXdmac);
00233     assert(channel < XDMAC_CHANNEL_NUM);
00234     pXdmac->XDMAC_GWS |= XDMAC_GWS_WS0 << channel;
00235 }
00236 
00237 /**
00238  * \brief Suspend the relevant channel's read & write.
00239  *
00240  * \param pXdmac Pointer to the XDMAC peripheral.
00241  * \param channel Particular channel number.
00242  */
00243 void XDMAC_SuspendReadWriteChannel(Xdmac *pXdmac, uint8_t channel)
00244 {
00245     assert(pXdmac);
00246     assert(channel < XDMAC_CHANNEL_NUM);
00247     pXdmac->XDMAC_GRWS = (XDMAC_GRWS_RWS0 << channel);
00248 }
00249 
00250 /**
00251  * \brief Resume the relevant channel's read & write.
00252  *
00253  * \param pXdmac Pointer to the XDMAC peripheral.
00254  * \param channel Particular channel number.
00255  */
00256 void XDMAC_ResumeReadWriteChannel(Xdmac *pXdmac, uint8_t channel)
00257 {
00258     assert(pXdmac);
00259     assert(channel < XDMAC_CHANNEL_NUM);
00260     pXdmac->XDMAC_GRWR = (XDMAC_GRWR_RWR0 << channel);
00261 }
00262 
00263 /**
00264  * \brief Set software transfer request on the relevant channel.
00265  *
00266  * \param pXdmac Pointer to the XDMAC peripheral.
00267  * \param channel Particular channel number.
00268  */
00269 void XDMAC_SoftwareTransferReq(Xdmac *pXdmac, uint8_t channel)
00270 {
00271 
00272     assert(pXdmac);
00273     assert(channel < XDMAC_CHANNEL_NUM);
00274     pXdmac->XDMAC_GSWR = (XDMAC_GSWR_SWREQ0 << channel);
00275 }
00276 
00277 /**
00278  * \brief Get software transfer status of the relevant channel.
00279  *
00280  * \param pXdmac Pointer to the XDMAC peripheral.
00281  */
00282 uint32_t XDMAC_GetSoftwareTransferStatus(Xdmac *pXdmac)
00283 {
00284 
00285     assert(pXdmac);
00286     return pXdmac->XDMAC_GSWS;
00287 }
00288 
00289 /**
00290  * \brief Set software flush request on the relevant channel.
00291  * \note: This API is used as polling without enabling FIE interrupt.
00292  * The user can use it in interrupt mode after deleting while sentense.
00293  * \param pXdmac Pointer to the XDMAC peripheral.
00294  * \param channel Particular channel number.
00295  */
00296 void XDMAC_SoftwareFlushReq(Xdmac *pXdmac, uint8_t channel)
00297 {
00298     assert(pXdmac);
00299     assert(channel < XDMAC_CHANNEL_NUM);
00300     pXdmac->XDMAC_GSWF = (XDMAC_GSWF_SWF0 << channel);
00301 
00302     while (!(XDMAC_GetChannelIsr(pXdmac, channel) & XDMAC_CIS_FIS));
00303 }
00304 
00305 /**
00306  * \brief Disable interrupt with mask on the relevant channel of given XDMA.
00307  *
00308  * \param pXdmac Pointer to the XDMAC peripheral.
00309  * \param channel Particular channel number.
00310  * \param dwInteruptMask Interrupt mask.
00311  */
00312 void XDMAC_EnableChannelIt (Xdmac *pXdmac, uint8_t channel,
00313                             uint8_t dwInteruptMask)
00314 {
00315     assert(pXdmac);
00316     assert(channel < XDMAC_CHANNEL_NUM);
00317     pXdmac->XDMAC_CHID[channel].XDMAC_CIE = dwInteruptMask;
00318 }
00319 
00320 /**
00321  * \brief Enable interrupt with mask on the relevant channel of given XDMA.
00322  *
00323  * \param pXdmac Pointer to the XDMAC peripheral.
00324  * \param channel Particular channel number.
00325  * \param dwInteruptMask Interrupt mask.
00326  */
00327 void XDMAC_DisableChannelIt (Xdmac *pXdmac, uint8_t channel,
00328                              uint8_t dwInteruptMask)
00329 {
00330     assert(pXdmac);
00331     assert(channel < XDMAC_CHANNEL_NUM);
00332     pXdmac->XDMAC_CHID[channel].XDMAC_CID = dwInteruptMask;
00333 }
00334 
00335 /**
00336  * \brief Get interrupt mask for the relevant channel of given XDMA.
00337  *
00338  * \param pXdmac Pointer to the XDMAC peripheral.
00339  * \param channel Particular channel number.
00340  */
00341 uint32_t XDMAC_GetChannelItMask (Xdmac *pXdmac, uint8_t channel)
00342 {
00343     assert(pXdmac);
00344     assert(channel < XDMAC_CHANNEL_NUM);
00345     return pXdmac->XDMAC_CHID[channel].XDMAC_CIM;
00346 }
00347 
00348 /**
00349  * \brief Get interrupt status for the relevant channel of given XDMA.
00350  *
00351  * \param pXdmac Pointer to the XDMAC peripheral.
00352  * \param channel Particular channel number.
00353  */
00354 uint32_t XDMAC_GetChannelIsr (Xdmac *pXdmac, uint8_t channel)
00355 {
00356     assert(pXdmac);
00357     assert(channel < XDMAC_CHANNEL_NUM);
00358     return pXdmac->XDMAC_CHID[channel].XDMAC_CIS;
00359 }
00360 
00361 /**
00362  * \brief Get masked interrupt status for the relevant channel of given XDMA.
00363  *
00364  * \param pXdmac Pointer to the XDMAC peripheral.
00365  * \param channel Particular channel number.
00366  */
00367 uint32_t XDMAC_GetMaskChannelIsr (Xdmac *pXdmac, uint8_t channel)
00368 {
00369     uint32_t status;
00370     assert(pXdmac);
00371     assert(channel < XDMAC_CHANNEL_NUM);
00372     status = pXdmac->XDMAC_CHID[channel].XDMAC_CIS;
00373     status &= pXdmac->XDMAC_CHID[channel].XDMAC_CIM;
00374 
00375     return status;
00376 }
00377 
00378 /**
00379  * \brief Set source address for the relevant channel of given XDMA.
00380  *
00381  * \param pXdmac Pointer to the XDMAC peripheral.
00382  * \param channel Particular channel number.
00383  * \param addr Source address.
00384  */
00385 void XDMAC_SetSourceAddr(Xdmac *pXdmac, uint8_t channel, uint32_t addr)
00386 {
00387     assert(pXdmac);
00388     assert(channel < XDMAC_CHANNEL_NUM);
00389     pXdmac->XDMAC_CHID[channel].XDMAC_CSA = addr;
00390 }
00391 
00392 /**
00393  * \brief Set destination address for the relevant channel of given XDMA.
00394  *
00395  * \param pXdmac Pointer to the XDMAC peripheral.
00396  * \param channel Particular channel number.
00397  * \param addr Destination address.
00398  */
00399 void XDMAC_SetDestinationAddr(Xdmac *pXdmac, uint8_t channel, uint32_t addr)
00400 {
00401     assert(pXdmac);
00402     assert(channel < XDMAC_CHANNEL_NUM);
00403     pXdmac->XDMAC_CHID[channel].XDMAC_CDA = addr;
00404 }
00405 
00406 /**
00407  * \brief Set next descriptor's address & interface for the relevant channel of
00408  *  given XDMA.
00409  *
00410  * \param pXdmac Pointer to the XDMAC peripheral.
00411  * \param channel Particular channel number.
00412  * \param addr Address of next descriptor.
00413  * \param ndaif Interface of next descriptor.
00414  */
00415 void XDMAC_SetDescriptorAddr(Xdmac *pXdmac, uint8_t channel,
00416                              uint32_t addr, uint8_t ndaif)
00417 {
00418     assert(pXdmac);
00419     assert(ndaif < 2);
00420     assert(channel < XDMAC_CHANNEL_NUM);
00421     pXdmac->XDMAC_CHID[channel].XDMAC_CNDA =  (addr & 0xFFFFFFFC) | ndaif;
00422 }
00423 
00424 /**
00425  * \brief Set next descriptor's configuration for the relevant channel of
00426  *  given XDMA.
00427  *
00428  * \param pXdmac Pointer to the XDMAC peripheral.
00429  * \param channel Particular channel number.
00430  * \param config Configuration of next descriptor.
00431  */
00432 void XDMAC_SetDescriptorControl(Xdmac *pXdmac, uint8_t channel, uint8_t config)
00433 {
00434     assert(pXdmac);
00435     assert(channel < XDMAC_CHANNEL_NUM);
00436     pXdmac->XDMAC_CHID[channel].XDMAC_CNDC = config;
00437 }
00438 
00439 /**
00440  * \brief Set microblock length for the relevant channel of given XDMA.
00441  *
00442  * \param pXdmac Pointer to the XDMAC peripheral.
00443  * \param channel Particular channel number.
00444  * \param ublen Microblock length.
00445  */
00446 void XDMAC_SetMicroblockControl(Xdmac *pXdmac, uint8_t channel, uint32_t ublen)
00447 {
00448     assert(pXdmac);
00449     assert(channel < XDMAC_CHANNEL_NUM);
00450     pXdmac->XDMAC_CHID[channel].XDMAC_CUBC = XDMAC_CUBC_UBLEN(ublen);
00451 }
00452 
00453 /**
00454  * \brief Set block length for the relevant channel of given XDMA.
00455  *
00456  * \param pXdmac Pointer to the XDMAC peripheral.
00457  * \param channel Particular channel number.
00458  * \param blen Block length.
00459  */
00460 void XDMAC_SetBlockControl(Xdmac *pXdmac, uint8_t channel, uint16_t blen)
00461 {
00462     assert(pXdmac);
00463     assert(channel < XDMAC_CHANNEL_NUM);
00464     pXdmac->XDMAC_CHID[channel].XDMAC_CBC = XDMAC_CBC_BLEN(blen);
00465 }
00466 
00467 /**
00468  * \brief Set configuration for the relevant channel of given XDMA.
00469  *
00470  * \param pXdmac Pointer to the XDMAC peripheral.
00471  * \param channel Particular channel number.
00472  * \param config Channel configuration.
00473  */
00474 void XDMAC_SetChannelConfig(Xdmac *pXdmac, uint8_t channel, uint32_t config)
00475 {
00476     assert(pXdmac);
00477     assert(channel < XDMAC_CHANNEL_NUM);
00478     pXdmac->XDMAC_CHID[channel].XDMAC_CC = config;
00479 }
00480 
00481 /**
00482  * \brief Get the relevant channel's configuration of given XDMA.
00483  *
00484  * \param pXdmac Pointer to the XDMAC peripheral.
00485  * \param channel Particular channel number.
00486  */
00487 uint32_t XDMAC_GetChannelConfig(Xdmac *pXdmac, uint8_t channel)
00488 {
00489     assert(pXdmac);
00490     assert(channel < XDMAC_CHANNEL_NUM);
00491     return pXdmac->XDMAC_CHID[channel].XDMAC_CC;
00492 }
00493 
00494 /**
00495  * \brief Set the relevant channel's data stride memory pattern of given XDMA.
00496  *
00497  * \param pXdmac Pointer to the XDMAC peripheral.
00498  * \param channel Particular channel number.
00499  * \param dds_msp Data stride memory pattern.
00500  */
00501 void XDMAC_SetDataStride_MemPattern(Xdmac *pXdmac, uint8_t channel,
00502                                     uint32_t dds_msp)
00503 {
00504 
00505     assert(pXdmac);
00506     assert(channel < XDMAC_CHANNEL_NUM);
00507     pXdmac->XDMAC_CHID[channel].XDMAC_CDS_MSP = dds_msp;
00508 }
00509 
00510 /**
00511  * \brief Set the relevant channel's source microblock stride of given XDMA.
00512  *
00513  * \param pXdmac Pointer to the XDMAC peripheral.
00514  * \param channel Particular channel number.
00515  * \param subs Source microblock stride.
00516  */
00517 void XDMAC_SetSourceMicroBlockStride(Xdmac *pXdmac, uint8_t channel,
00518                                      uint32_t subs)
00519 {
00520     assert(pXdmac);
00521     assert(channel < XDMAC_CHANNEL_NUM);
00522     pXdmac->XDMAC_CHID[channel].XDMAC_CSUS = XDMAC_CSUS_SUBS(subs);
00523 }
00524 
00525 /**
00526  * \brief Set the relevant channel's destination microblock stride of given XDMA.
00527  *
00528  * \param pXdmac Pointer to the XDMAC peripheral.
00529  * \param channel Particular channel number.
00530  * \param dubs Destination microblock stride.
00531  */
00532 void XDMAC_SetDestinationMicroBlockStride(Xdmac *pXdmac, uint8_t channel,
00533         uint32_t dubs)
00534 {
00535     assert(pXdmac);
00536     assert(channel < XDMAC_CHANNEL_NUM);
00537     pXdmac->XDMAC_CHID[channel].XDMAC_CDUS = XDMAC_CDUS_DUBS(dubs);
00538 }
00539 
00540 /**
00541  * \brief Get the relevant channel's destination address of given XDMA.
00542  *
00543  * \param pXdmac Pointer to the XDMAC peripheral.
00544  * \param channel Particular channel number.
00545  */
00546 uint32_t XDMAC_GetChDestinationAddr(Xdmac *pXdmac, uint8_t channel)
00547 {
00548     assert(pXdmac);
00549     assert(channel < XDMAC_CHANNEL_NUM);
00550     return pXdmac->XDMAC_CHID[channel].XDMAC_CDA;
00551 }
00552 
00553 /**@}*/
00554 
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