Data Structures |
struct | QspiMemCmd_t |
| qspi command structure More...
|
struct | QspiBuffer_t |
| qspi buffer structure More...
|
struct | QspiInstFrame_t |
| qspi frame structure for QSPI mode More...
|
union | QspiInstFrame_t::_QspiInstFrame |
struct | QspiInstFrame_t::_QspiInstFrame::_QspiInstFrameBM |
struct | Qspid_t |
| qspi driver structure More...
|
Defines |
#define | QSPI_SCBR(baudrate, masterClock) ((uint32_t) (masterClock / baudrate) << 8) |
#define | QSPI_DLYBS(delay, masterClock) ((uint32_t) (((masterClock / 1000000) * delay) / 1000) << 16) |
#define | QSPI_DLYBCT(delay, masterClock) ((uint32_t) (((masterClock / 1000000) * delay) / 32000) << 24) |
Enumerations |
enum | Access_t { CmdAccess = 0,
ReadAccess,
WriteAccess
} |
| qspi access modes
|
enum | QspiMode_t { SpiMode = QSPI_MR_SMM_SPI,
QspiMemMode = QSPI_MR_SMM_MEMORY
} |
| qspi modes SPI or QSPI
|
enum | QspiClockMode_t { ClockMode_00 = 0,
ClockMode_10,
ClockMode_01,
ClockMode_11
} |
| qspi clock modes , regarding clock phase and clock polarity
|
enum | QspidStatus_t {
QSPI_SUCCESS = 0,
QSPI_BUSY,
QSPI_BUSY_SENDING,
QSPI_READ_ERROR,
QSPI_WRITE_ERROR,
QSPI_UNKNOWN_ERROR,
QSPI_INIT_ERROR,
QSPI_INPUT_ERROR,
QSPI_TOTAL_ERROR
} |
| qspi status codes
|
enum | QspiStatus_t {
IsReceived = QSPI_SR_RDRF,
IsTxSent = QSPI_SR_TDRE,
IsTxEmpty = QSPI_SR_TXEMPTY,
IsOverrun = QSPI_SR_OVRES,
IsCsRise = QSPI_SR_CSR,
IsCsAsserted = QSPI_SR_CSS,
IsEofInst = QSPI_SR_INSTRE,
IsEnabled = QSPI_SR_QSPIENS
} |
| qspi status regiter bits
|
Functions |
void | QSPI_SwReset (Qspi *pQspi) |
| Resets a QSPI peripheral.
|
void | QSPI_Disable (Qspi *pQspi) |
| Disables a QSPI peripheral.
|
void | QSPI_Enable (Qspi *pQspi) |
| Enables a QSPI peripheral.
|
QspidStatus_t | QSPI_EndTransfer (Qspi *pQspi) |
| Ends ongoing transfer by releasing CS of QSPI peripheral.
|
uint32_t | QSPI_GetStatus (Qspi *pQspi, const QspiStatus_t rStatus) |
| Get the current status register of the given QSPI peripheral.
|
void | QSPI_ConfigureClock (Qspi *pQspi, QspiClockMode_t ClockMode, uint32_t dwClockCfg) |
| Configures peripheral clock of a QSPI/SPI peripheral.
|
QspidStatus_t | QSPI_SingleReadSPI (Qspid_t *pQspid, uint16_t *const pData) |
| Reads the data received by a SPI peripheral. This method must be called after a successful SPI_Write call.
|
QspidStatus_t | QSPI_MultiReadSPI (Qspid_t *pQspid, uint16_t *const pData, uint32_t NumOfBytes) |
| Reads multiple data received by a SPI peripheral. This method must be called after a successful SPI_Write call.
|
QspidStatus_t | QSPI_SingleWriteSPI (Qspid_t *pQspid, uint16_t const *pData) |
| Sends a single data through a SPI peripheral.
|
QspidStatus_t | QSPI_MultiWriteSPI (Qspid_t *pQspid, uint16_t const *pData, uint32_t NumOfBytes) |
| Sends multiple data through a SPI peripheral.
|
QspidStatus_t | QSPI_EnableIt (Qspi *pQspi, uint32_t dwSources) |
| Enables one or more interrupt sources of a QSPI peripheral.
|
QspidStatus_t | QSPI_DisableIt (Qspi *pQspi, uint32_t dwSources) |
| Disables one or more interrupt sources of a QSPI peripheral.
|
uint32_t | QSPI_GetItMask (Qspi *pQspi) |
| Return the interrupt mask register.
|
uint32_t | QSPI_GetEnabledItStatus (Qspi *pQspi) |
| Returns enabled interrupt status.
|
QspidStatus_t | QSPI_ConfigureInterface (Qspid_t *pQspid, QspiMode_t Mode, uint32_t dwConfiguration) |
| Configures QSPI/SPI.
|
QspidStatus_t | QSPI_SendCommand (Qspid_t *pQspi, uint8_t const KeepCfg) |
| Send an instruction over QSPI (oly a flash command no data).
|
QspidStatus_t | QSPI_SendCommandWithData (Qspid_t *pQspi, uint8_t const KeepCfg) |
| Send instruction over QSPI with data.
|
QspidStatus_t | QSPI_ReadCommand (Qspid_t *pQspi, uint8_t const KeepCfg) |
| Send instruction over QSPI to read data.
|
QspidStatus_t | QSPI_EnableMemAccess (Qspid_t *pQspi, uint8_t const KeepCfg, uint8_t ScrambleFlag) |
| Sends an instruction over QSPI and configures other related address like Addr , Frame and synchronise bus access before data read or write.
|
QspidStatus_t | QSPI_ReadWriteMem (Qspid_t *pQspid, Access_t const ReadWrite) |
| Writes or reads the QSPI memory (0x80000000) to transmit or receive data from Flash memory.
|
Interface for Serial Peripheral Interface (SPI) controller.