SAMV71 Xplained Ultra Software Package 1.5

rstc.c

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00001 /* ---------------------------------------------------------------------------- */
00002 /*                  Atmel Microcontroller Software Support                      */
00003 /*                       SAM Software Package License                           */
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00005 /* Copyright (c) 2015, Atmel Corporation                                        */
00006 /*                                                                              */
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00011 /*                                                                              */
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00014 /*                                                                              */
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00016 /* this software without specific prior written permission.                     */
00017 /*                                                                              */
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00028 /* ---------------------------------------------------------------------------- */
00029 
00030 /** \file */
00031 /*---------------------------------------------------------------------------
00032  *         Headers
00033  *---------------------------------------------------------------------------*/
00034 
00035 #include <chip.h>
00036 
00037 
00038 /*---------------------------------------------------------------------------
00039  *         Exported functions
00040  *---------------------------------------------------------------------------*/
00041 
00042 /**
00043  * Configure the mode of the RSTC peripheral.
00044  * The configuration is computed by the lib (RSTC_RMR_*).
00045  * \param mr Desired mode configuration.
00046  */
00047 void RSTC_ConfigureMode(uint32_t mr)
00048 {
00049     Rstc *pHw = RSTC;
00050     mr &= ~RSTC_MR_KEY_Msk;
00051     pHw->RSTC_MR = mr | RSTC_MR_KEY_PASSWD;
00052 }
00053 
00054 /**
00055  * Enable/Disable the detection of a low level on the pin NRST as User Reset
00056  * \param enable 1 to enable & 0 to disable.
00057  */
00058 void RSTC_SetUserResetEnable(uint8_t enable)
00059 {
00060     Rstc *pHw = RSTC;
00061     uint32_t mr = pHw->RSTC_MR & (~RSTC_MR_KEY_Msk);
00062 
00063     if (enable)
00064         mr |=  RSTC_MR_URSTEN;
00065     else
00066         mr &= ~RSTC_MR_URSTEN;
00067 
00068     pHw->RSTC_MR = mr | RSTC_MR_KEY_PASSWD;
00069 }
00070 
00071 /**
00072  * Enable/Disable the interrupt of a User Reset (USRTS bit in RSTC_RST).
00073  * \param enable 1 to enable & 0 to disable.
00074  */
00075 void RSTC_SetUserResetInterruptEnable(uint8_t enable)
00076 {
00077     Rstc *pHw = RSTC;
00078     uint32_t mr = pHw->RSTC_MR & (~RSTC_MR_KEY_Msk);
00079 
00080     if (enable)
00081         mr |=  RSTC_MR_URSTIEN;
00082     else
00083         mr &= ~RSTC_MR_URSTIEN;
00084 
00085     pHw->RSTC_MR = mr | RSTC_MR_KEY_PASSWD;
00086 }
00087 
00088 /**
00089  * Setup the external reset length. The length is asserted during a time of
00090  * pow(2, powl+1) Slow Clock(32KHz). The duration is between 60us and 2s.
00091  * \param powl   Power length defined.
00092  */
00093 void RSTC_SetExtResetLength(uint8_t powl)
00094 {
00095     Rstc *pHw = RSTC;
00096     uint32_t mr = pHw->RSTC_MR;
00097     mr &= ~(RSTC_MR_KEY_Msk | RSTC_MR_ERSTL_Msk);
00098     mr |=  RSTC_MR_ERSTL(powl);
00099     pHw->RSTC_MR = mr | RSTC_MR_KEY_PASSWD;
00100 }
00101 
00102 
00103 /**
00104  * Resets the processor.
00105  */
00106 void RSTC_ProcessorReset(void)
00107 {
00108     Rstc *pHw = RSTC;
00109     pHw->RSTC_CR = RSTC_CR_PROCRST | RSTC_CR_KEY_PASSWD;
00110 }
00111 
00112 
00113 /**
00114  * Asserts the NRST pin for external resets.
00115  */
00116 void RSTC_ExtReset(void)
00117 {
00118     Rstc *pHw = RSTC;
00119     pHw->RSTC_CR = RSTC_CR_EXTRST | RSTC_CR_KEY_PASSWD;
00120 }
00121 
00122 /**
00123  * Return NRST pin level (1 or 0).
00124  */
00125 uint8_t RSTC_GetNrstLevel(void)
00126 {
00127     Rstc *pHw = RSTC;
00128     return ((pHw->RSTC_SR & RSTC_SR_NRSTL) > 0);
00129 }
00130 
00131 /**
00132  * Returns 1 if at least one high-to-low transition of NRST (User Reset) has
00133  * been detected since the last read of RSTC_RSR.
00134  */
00135 uint8_t RSTC_IsUserResetDetected(void)
00136 {
00137     Rstc *pHw = RSTC;
00138 
00139     if (pHw->RSTC_SR & RSTC_SR_URSTS)
00140         return 1;
00141 
00142     return 0;
00143 }
00144 
00145 /**
00146  * Return 1 if a software reset command is being performed by the reset
00147  * controller. The reset controller is busy.
00148  */
00149 uint8_t RSTC_IsBusy(void)
00150 {
00151     Rstc *pHw = RSTC;
00152 
00153     if (pHw->RSTC_SR & RSTC_SR_SRCMP)
00154         return 1;
00155 
00156     return 0;
00157 }
00158 
00159 /**
00160  * Get the status
00161  */
00162 uint32_t RSTC_GetStatus(void)
00163 {
00164     Rstc *pHw = RSTC;
00165     return (pHw->RSTC_SR);
00166 }
00167 
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