SAMV71 Xplained Ultra Software Package 1.5

pio.h

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00029 
00030 /**
00031  *  \file
00032  *
00033  *  \section Purpose
00034  *
00035  *  This file provides a basic API for PIO configuration and usage of
00036  *  user-controlled pins. Please refer to the board.h file for a list of
00037  *  available pin definitions.
00038  *
00039  *  \section Usage
00040  *
00041  *  -# Define a constant pin description array such as the following one, using
00042  *     the existing definitions provided by the board.h file if possible:
00043  *     \code
00044  *        const Pin pPins[] = {PIN_USART0_TXD, PIN_USART0_RXD};
00045  *     \endcode
00046  *     Alternatively, it is possible to add new pins by provided the full Pin
00047  *     structure:
00048  *     \code
00049  *     // Pin instance to configure PA10 & PA11 as inputs with the internal
00050  *     // pull-up enabled.
00051  *     const Pin pPins = {
00052  *          (1 << 10) | (1 << 11),
00053  *          REG_PIOA,
00054  *          ID_PIOA,
00055  *          PIO_INPUT,
00056  *          PIO_PULLUP
00057  *     };
00058  *     \endcode
00059  *  -# Configure a pin array by calling PIO_Configure() with a pointer to the
00060  *     array and its size (which is computed using the PIO_LISTSIZE macro).
00061  *  -# Change and get the value of a user-controlled pin using the PIO_Set,
00062  *     PIO_Clear and PIO_Get methods.
00063  *  -# Get the level being currently output by a user-controlled pin configured
00064  *     as an output using PIO_GetOutputDataStatus().
00065  */
00066 
00067 #ifndef _PIO_
00068 #define _PIO_
00069 
00070 /*
00071  *         Headers
00072  */
00073 
00074 #include "chip.h"
00075 
00076 #include <stdint.h>
00077 
00078 /*
00079  *         Global Definitions
00080  */
00081 
00082 /**  The pin is controlled by the associated signal of peripheral A. */
00083 #define PIO_PERIPH_A                0
00084 /**  The pin is controlled by the associated signal of peripheral B. */
00085 #define PIO_PERIPH_B                1
00086 /**  The pin is controlled by the associated signal of peripheral C. */
00087 #define PIO_PERIPH_C                2
00088 /**  The pin is controlled by the associated signal of peripheral D. */
00089 #define PIO_PERIPH_D                3
00090 /**  The pin is an input. */
00091 #define PIO_INPUT                   4
00092 /**  The pin is an output and has a default level of 0. */
00093 #define PIO_OUTPUT_0                5
00094 /**  The pin is an output and has a default level of 1. */
00095 #define PIO_OUTPUT_1                6
00096 
00097 /**  Default pin configuration (no attribute). */
00098 #define PIO_DEFAULT                 (0 << 0)
00099 /**  The internal pin pull-up is active. */
00100 #define PIO_PULLUP                  (1 << 0)
00101 /**  The internal glitch filter is active. */
00102 #define PIO_DEGLITCH                (1 << 1)
00103 /**  The pin is open-drain. */
00104 #define PIO_OPENDRAIN               (1 << 2)
00105 
00106 /**  The internal debouncing filter is active. */
00107 #define PIO_DEBOUNCE                (1 << 3)
00108 
00109 /**  Enable additional interrupt modes. */
00110 #define PIO_IT_AIME                 (1 << 4)
00111 
00112 /**  Interrupt High Level/Rising Edge detection is active. */
00113 #define PIO_IT_RE_OR_HL             (1 << 5)
00114 /**  Interrupt Edge detection is active. */
00115 #define PIO_IT_EDGE                 (1 << 6)
00116 
00117 /**  Low level interrupt is active */
00118 #define PIO_IT_LOW_LEVEL          (0               | 0 | PIO_IT_AIME)
00119 /**  High level interrupt is active */
00120 #define PIO_IT_HIGH_LEVEL         (PIO_IT_RE_OR_HL | 0 | PIO_IT_AIME)
00121 /**  Falling edge interrupt is active */
00122 #define PIO_IT_FALL_EDGE          (0               | PIO_IT_EDGE | PIO_IT_AIME)
00123 /**  Rising edge interrupt is active */
00124 #define PIO_IT_RISE_EDGE          (PIO_IT_RE_OR_HL | PIO_IT_EDGE | PIO_IT_AIME)
00125 /** The WP is enable */
00126 #define PIO_WPMR_WPEN_EN          (0x01     << 0)
00127 /** The WP is disable */
00128 #define PIO_WPMR_WPEN_DIS         (0x00     << 0)
00129 /** Valid WP key */
00130 #define PIO_WPMR_WPKEY_VALID      (0x50494F << 8)
00131 #ifdef __cplusplus
00132 extern "C" {
00133 #endif
00134 
00135 /*
00136  *          Global Macros
00137  */
00138 
00139 /**
00140  *  Calculates the size of an array of Pin instances. The array must be defined
00141  *  locally (i.e. not a pointer), otherwise the computation will not be correct.
00142  *  \param pPins  Local array of Pin instances.
00143  *  \return Number of elements in array.
00144  */
00145 #define PIO_LISTSIZE(pPins)    (sizeof(pPins) / sizeof(Pin))
00146 
00147 /*
00148  *         Global Types
00149  */
00150 
00151 
00152 /*
00153  *  Describes the type and attribute of one PIO pin or a group of similar pins.
00154  *  The #type# field can have the following values:
00155  *     - PIO_PERIPH_A
00156  *     - PIO_PERIPH_B
00157  *     - PIO_OUTPUT_0
00158  *     - PIO_OUTPUT_1
00159  *     - PIO_INPUT
00160  *
00161  *  The #attribute# field is a bitmask that can either be set to PIO_DEFAULt,
00162  *  or combine (using bitwise OR '|') any number of the following constants:
00163  *     - PIO_PULLUP
00164  *     - PIO_DEGLITCH
00165  *     - PIO_DEBOUNCE
00166  *     - PIO_OPENDRAIN
00167  *     - PIO_IT_LOW_LEVEL
00168  *     - PIO_IT_HIGH_LEVEL
00169  *     - PIO_IT_FALL_EDGE
00170  *     - PIO_IT_RISE_EDGE
00171  */
00172 typedef struct _Pin {
00173     /*  Bitmask indicating which pin(s) to configure. */
00174     uint32_t mask;
00175     /*  Pointer to the PIO controller which has the pin(s). */
00176     Pio    *pio;
00177     /*  Peripheral ID of the PIO controller which has the pin(s). */
00178     uint8_t id;
00179     /*  Pin type. */
00180     uint8_t type;
00181     /*  Pin attribute. */
00182     uint8_t attribute;
00183 } Pin;
00184 
00185 /*
00186  *         Global Access Macros
00187  */
00188 
00189 /*
00190  *         Global Functions
00191  */
00192 
00193 extern uint8_t PIO_Configure(const Pin *list, uint32_t size);
00194 
00195 extern void PIO_Set(const Pin *pin);
00196 
00197 extern void PIO_Clear(const Pin *pin);
00198 
00199 extern uint8_t PIO_Get(const Pin *pin);
00200 
00201 extern uint8_t PIO_GetOutputDataStatus(const Pin *pin);
00202 
00203 extern void PIO_SetDebounceFilter(const Pin *pin, uint32_t cuttoff);
00204 
00205 extern void PIO_EnableWriteProtect(const Pin *pin);
00206 
00207 extern void PIO_DisableWriteProtect(const Pin *pin);
00208 
00209 extern void PIO_SetPinType(Pin *pin, uint8_t pinType);
00210 
00211 extern uint32_t PIO_GetWriteProtectViolationInfo(const Pin *pin);
00212 #ifdef __cplusplus
00213 }
00214 #endif
00215 
00216 #endif /* #ifndef _PIO_ */
00217 
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