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00038 #include "uhi_msc.h"
00039 #include "uhi_msc_mem.h"
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00055 static uint8_t uhi_msc_mem_lun;
00056
00057
00058 static volatile bool uhi_msc_mem_command_ongoing;
00059 static volatile bool uhi_msc_mem_command_status;
00060
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00064
00065
00066
00067 static void uhi_msc_mem_stop_pooling(bool b_success);
00068 static Ctrl_status uhi_msc_mem_translate_status(lun_status_t status);
00069
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00076
00077 uint8_t uhi_msc_mem_get_lun(void)
00078 {
00079 while (!uhi_msc_is_available());
00080
00081 return uhi_msc_get_lun();
00082 }
00083
00084 Ctrl_status uhi_msc_mem_test_unit_ready(uint8_t lun)
00085 {
00086 uhi_msc_lun_t *lun_desc;
00087
00088 while (!uhi_msc_is_available());
00089
00090 uhi_msc_mem_command_ongoing = true;
00091 uhi_msc_mem_lun = lun;
00092
00093 if (!uhi_msc_scsi_test_unit_ready(uhi_msc_mem_lun, uhi_msc_mem_stop_pooling))
00094 return CTRL_FAIL;
00095
00096 while (uhi_msc_mem_command_ongoing);
00097
00098 if (!uhi_msc_mem_command_status)
00099 return CTRL_FAIL;
00100
00101 lun_desc = uhi_msc_get_lun_desc(uhi_msc_mem_lun);
00102 return uhi_msc_mem_translate_status(lun_desc->status);
00103 }
00104
00105 Ctrl_status uhi_msc_mem_read_capacity(uint8_t lun, uint32_t *u32_nb_sector)
00106 {
00107 uhi_msc_lun_t *lun_desc;
00108 uint32_t *pBlockLen;
00109
00110 while (!uhi_msc_is_available());
00111
00112 uhi_msc_mem_lun = lun;
00113 lun_desc = uhi_msc_get_lun_desc(uhi_msc_mem_lun);
00114 pBlockLen = (uint32_t *)&lun_desc->capacity.pLogicalBlockLength[0];
00115
00116 if (lun_desc == NULL)
00117 return CTRL_FAIL;
00118
00119 if (*pBlockLen != 512) {
00120
00121
00122
00123 return CTRL_FAIL;
00124 }
00125
00126 *u32_nb_sector = (uint32_t)&lun_desc->capacity.pLogicalBlockAddress[0];
00127 return uhi_msc_mem_translate_status(lun_desc->status);
00128 }
00129
00130 uint8_t uhi_msc_mem_read_sector_size(uint8_t lun)
00131 {
00132 uhi_msc_lun_t *lun_desc;
00133 uint32_t *pBlockLen;
00134
00135 while (!uhi_msc_is_available());
00136
00137 uhi_msc_mem_lun = lun;
00138 lun_desc = uhi_msc_get_lun_desc(uhi_msc_mem_lun);
00139 pBlockLen = (uint32_t *)&lun_desc->capacity.pLogicalBlockLength[0];
00140
00141 if (lun_desc == NULL)
00142 return 0;
00143
00144 return ((*pBlockLen) / 512);
00145 }
00146
00147 bool uhi_msc_mem_wr_protect(uint8_t lun)
00148 {
00149 uhi_msc_lun_t *lun_desc;
00150 uint32_t *pBlockLen;
00151
00152 while (!uhi_msc_is_available());
00153
00154 uhi_msc_mem_lun = lun;
00155 lun_desc = uhi_msc_get_lun_desc(uhi_msc_mem_lun);
00156 pBlockLen = (uint32_t *)&lun_desc->capacity.pLogicalBlockLength[0];
00157
00158 if (lun_desc == NULL)
00159 return true;
00160
00161 if (*pBlockLen != 512)
00162 return true;
00163
00164 return lun_desc->b_write_protected;
00165 }
00166
00167 bool uhi_msc_mem_removal(void)
00168 {
00169 return true;
00170 }
00171
00172 Ctrl_status uhi_msc_mem_read_10_ram(uint32_t addr, void *ram)
00173 {
00174 uhi_msc_lun_t *lun_desc;
00175 uint32_t *pBlockLen;
00176
00177 while (!uhi_msc_is_available());
00178
00179
00180 lun_desc = uhi_msc_get_lun_desc(uhi_msc_mem_lun);
00181 pBlockLen = (uint32_t *)&lun_desc->capacity.pLogicalBlockLength[0];
00182
00183 if (lun_desc == NULL)
00184 return CTRL_FAIL;
00185
00186 if (uhi_msc_mem_translate_status(lun_desc->status) != CTRL_GOOD)
00187 return uhi_msc_mem_translate_status(lun_desc->status);
00188
00189 if (*pBlockLen != 512) {
00190 return CTRL_FAIL;
00191 }
00192
00193 uhi_msc_mem_command_ongoing = true;
00194 uhi_msc_scsi_read_10(uhi_msc_mem_lun, addr, ram, 1,
00195 uhi_msc_mem_stop_pooling);
00196
00197 while (uhi_msc_mem_command_ongoing);
00198
00199 if (!uhi_msc_mem_command_status)
00200 return CTRL_FAIL;
00201
00202 return uhi_msc_mem_translate_status(lun_desc->status);
00203
00204 }
00205
00206 Ctrl_status uhi_msc_mem_write_10_ram(uint32_t addr, const void *ram)
00207 {
00208 uhi_msc_lun_t *lun_desc;
00209 uint32_t *pBlockLen;
00210
00211 while (!uhi_msc_is_available());
00212
00213
00214 lun_desc = uhi_msc_get_lun_desc(uhi_msc_mem_lun);
00215 pBlockLen = (uint32_t *)&lun_desc->capacity.pLogicalBlockLength[0];
00216
00217 if (lun_desc == NULL)
00218 return CTRL_FAIL;
00219
00220 if (uhi_msc_mem_translate_status(lun_desc->status) != CTRL_GOOD)
00221 return uhi_msc_mem_translate_status(lun_desc->status);
00222
00223 if (*pBlockLen != 512) {
00224 return CTRL_FAIL;
00225 }
00226
00227 uhi_msc_mem_command_ongoing = true;
00228 uhi_msc_scsi_write_10(uhi_msc_mem_lun, addr, ram, 1,
00229 uhi_msc_mem_stop_pooling);
00230
00231 while (uhi_msc_mem_command_ongoing);
00232
00233 if (!uhi_msc_mem_command_status)
00234 return CTRL_FAIL;
00235
00236 return uhi_msc_mem_translate_status(lun_desc->status);
00237 }
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00250
00251 static void uhi_msc_mem_stop_pooling(bool b_success)
00252 {
00253 uhi_msc_mem_command_ongoing = false;
00254 uhi_msc_mem_command_status = b_success;
00255 }
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00264 static Ctrl_status uhi_msc_mem_translate_status(lun_status_t status)
00265 {
00266 switch (status) {
00267 case LUN_GOOD:
00268 return CTRL_GOOD;
00269
00270 case LUN_NOT_PRESENT:
00271 return CTRL_NO_PRESENT;
00272
00273 case LUN_BUSY:
00274 return CTRL_BUSY;
00275
00276 case LUN_FAIL:
00277 default:
00278 return CTRL_FAIL;
00279 }
00280 }
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