SAMV71 Xplained Ultra Software Package 1.3

component_trng.h

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00002 /*                  Atmel Microcontroller Software Support                      */
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00005 /* Copyright (c) 2014, Atmel Corporation                                        */
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00011 /*                                                                              */
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00029 
00030 #ifndef _SAMV71_TRNG_COMPONENT_
00031 #define _SAMV71_TRNG_COMPONENT_
00032 
00033 /* ============================================================================= */
00034 /**  SOFTWARE API DEFINITION FOR True Random Number Generator */
00035 /* ============================================================================= */
00036 /** \addtogroup SAMV71_TRNG True Random Number Generator */
00037 /*@{*/
00038 
00039 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
00040 /** \brief Trng hardware registers */
00041 typedef struct {
00042   __O uint32_t TRNG_CR;       /**< \brief (Trng Offset: 0x00) Control Register */
00043   __I uint32_t Reserved1[3];
00044   __O uint32_t TRNG_IER;      /**< \brief (Trng Offset: 0x10) Interrupt Enable Register */
00045   __O uint32_t TRNG_IDR;      /**< \brief (Trng Offset: 0x14) Interrupt Disable Register */
00046   __I uint32_t TRNG_IMR;      /**< \brief (Trng Offset: 0x18) Interrupt Mask Register */
00047   __I uint32_t TRNG_ISR;      /**< \brief (Trng Offset: 0x1C) Interrupt Status Register */
00048   __I uint32_t Reserved2[12];
00049   __I uint32_t TRNG_ODATA;    /**< \brief (Trng Offset: 0x50) Output Data Register */
00050 } Trng;
00051 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
00052 /* -------- TRNG_CR : (TRNG Offset: 0x00) Control Register -------- */
00053 #define TRNG_CR_ENABLE (0x1u << 0) /**< \brief (TRNG_CR) Enables the TRNG to provide random values */
00054 #define TRNG_CR_KEY_Pos 8
00055 #define TRNG_CR_KEY_Msk (0xffffffu << TRNG_CR_KEY_Pos) /**< \brief (TRNG_CR) Security Key. */
00056 #define TRNG_CR_KEY(value) ((TRNG_CR_KEY_Msk & ((value) << TRNG_CR_KEY_Pos)))
00057 #define   TRNG_CR_KEY_PASSWD (0x524E47u << 8) /**< \brief (TRNG_CR) Writing any other value in this field aborts the write operation. */
00058 /* -------- TRNG_IER : (TRNG Offset: 0x10) Interrupt Enable Register -------- */
00059 #define TRNG_IER_DATRDY (0x1u << 0) /**< \brief (TRNG_IER) Data Ready Interrupt Enable */
00060 /* -------- TRNG_IDR : (TRNG Offset: 0x14) Interrupt Disable Register -------- */
00061 #define TRNG_IDR_DATRDY (0x1u << 0) /**< \brief (TRNG_IDR) Data Ready Interrupt Disable */
00062 /* -------- TRNG_IMR : (TRNG Offset: 0x18) Interrupt Mask Register -------- */
00063 #define TRNG_IMR_DATRDY (0x1u << 0) /**< \brief (TRNG_IMR) Data Ready Interrupt Mask */
00064 /* -------- TRNG_ISR : (TRNG Offset: 0x1C) Interrupt Status Register -------- */
00065 #define TRNG_ISR_DATRDY (0x1u << 0) /**< \brief (TRNG_ISR) Data Ready */
00066 /* -------- TRNG_ODATA : (TRNG Offset: 0x50) Output Data Register -------- */
00067 #define TRNG_ODATA_ODATA_Pos 0
00068 #define TRNG_ODATA_ODATA_Msk (0xffffffffu << TRNG_ODATA_ODATA_Pos) /**< \brief (TRNG_ODATA) Output Data */
00069 
00070 /*@}*/
00071 
00072 
00073 #endif /* _SAMV71_TRNG_COMPONENT_ */
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