SAMV71 Xplained Ultra Software Package 1.3

xdmac.c

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00001 /* ----------------------------------------------------------------------------
00002  *         SAM Software Package License 
00003  * ----------------------------------------------------------------------------
00004  * Copyright (c) 2014, Atmel Corporation
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00010  *
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00029 
00030 
00031 /**
00032  * \file
00033  *
00034  * Implementation of xDMA controller (XDMAC).
00035  *
00036  */
00037 
00038 /*----------------------------------------------------------------------------
00039  *        Headers
00040  *----------------------------------------------------------------------------*/
00041 
00042 #include "chip.h"
00043 
00044 #include <stdint.h>
00045 #include <assert.h>
00046 /** \addtogroup dmac_functions XDMAC Functions
00047  *@{
00048  */
00049 
00050 /*----------------------------------------------------------------------------
00051  *        Exported functions
00052  *----------------------------------------------------------------------------*/
00053 
00054 /**
00055  * \brief Get XDMAC global type.
00056  *
00057  * \param pXdmac Pointer to the XDMAC peripheral.
00058  */
00059 uint32_t XDMAC_GetType( Xdmac *pXdmac)
00060 {
00061     assert(pXdmac);
00062     return pXdmac->XDMAC_GTYPE;
00063 }
00064 
00065 /**
00066  * \brief Get XDMAC global configuration.
00067  *
00068  * \param pXdmac Pointer to the XDMAC peripheral.
00069  */
00070 uint32_t XDMAC_GetConfig( Xdmac *pXdmac)
00071 {
00072     assert(pXdmac);
00073     return pXdmac->XDMAC_GCFG;
00074 }
00075 
00076 /**
00077  * \brief Get XDMAC global weighted arbiter configuration.
00078  *
00079  * \param pXdmac Pointer to the XDMAC peripheral.
00080  */
00081 uint32_t XDMAC_GetArbiter( Xdmac *pXdmac)
00082 {
00083     assert(pXdmac);
00084     return pXdmac->XDMAC_GWAC;
00085 }
00086 
00087 /**
00088  * \brief Enables XDMAC global interrupt.
00089  *
00090  * \param pXdmac Pointer to the XDMAC peripheral.
00091  * \param dwInteruptMask IT to be enabled.
00092  */
00093 void XDMAC_EnableGIt (Xdmac *pXdmac, uint8_t dwInteruptMask )
00094 {
00095     assert(pXdmac);
00096     pXdmac->XDMAC_GIE = ( XDMAC_GIE_IE0 << dwInteruptMask) ;
00097 }
00098 
00099 /**
00100  * \brief Disables XDMAC global interrupt
00101  *
00102  * \param pXdmac Pointer to the XDMAC peripheral.
00103  * \param dwInteruptMask IT to be enabled
00104  */
00105 void XDMAC_DisableGIt (Xdmac *pXdmac, uint8_t dwInteruptMask )
00106 {
00107     assert(pXdmac);
00108     pXdmac->XDMAC_GID = (XDMAC_GID_ID0 << dwInteruptMask);
00109 }
00110 
00111 /**
00112  * \brief Get XDMAC global interrupt mask.
00113  *
00114  * \param pXdmac Pointer to the XDMAC peripheral.
00115  */
00116 uint32_t XDMAC_GetGItMask( Xdmac *pXdmac )
00117 {
00118     assert(pXdmac);
00119     return (pXdmac->XDMAC_GIM);
00120 }
00121 
00122 /**
00123  * \brief Get XDMAC global interrupt status.
00124  *
00125  * \param pXdmac Pointer to the XDMAC peripheral.
00126  */
00127 uint32_t XDMAC_GetGIsr( Xdmac *pXdmac )
00128 {
00129     assert(pXdmac);
00130     return (pXdmac->XDMAC_GIS);
00131 }
00132 
00133 /**
00134  * \brief Get XDMAC masked global interrupt.
00135  *
00136  * \param pXdmac Pointer to the XDMAC peripheral.
00137  */
00138 uint32_t XDMAC_GetMaskedGIsr( Xdmac *pXdmac )
00139 {
00140     uint32_t _dwStatus;
00141     assert(pXdmac);
00142     _dwStatus = pXdmac->XDMAC_GIS;
00143     _dwStatus &= pXdmac->XDMAC_GIM;
00144     return _dwStatus;
00145 }
00146 
00147 /**
00148  * \brief enables the relevant channel of given XDMAC.
00149  *
00150  * \param pXdmac Pointer to the XDMAC peripheral.
00151  * \param channel Particular channel number.
00152  */
00153 void XDMAC_EnableChannel( Xdmac *pXdmac, uint8_t channel )
00154 {
00155     assert(pXdmac);
00156     assert(channel < XDMAC_CHANNEL_NUM);
00157     pXdmac->XDMAC_GE = (XDMAC_GE_EN0 << channel);
00158 }
00159 
00160 /**
00161  * \brief enables the relevant channels of given XDMAC.
00162  *
00163  * \param pXdmac Pointer to the XDMAC peripheral.
00164  * \param bmChannels Channels bitmap.
00165  */
00166 void XDMAC_EnableChannels( Xdmac *pXdmac, uint32_t bmChannels )
00167 {
00168     assert(pXdmac);
00169     pXdmac->XDMAC_GE = bmChannels;
00170 }
00171 
00172 /**
00173  * \brief Disables the relevant channel of given XDMAC.
00174  *
00175  * \param pXdmac Pointer to the XDMAC peripheral.
00176  * \param channel Particular channel number.
00177  */
00178 void XDMAC_DisableChannel( Xdmac *pXdmac, uint8_t channel )
00179 {
00180     assert(pXdmac);
00181     assert(channel < XDMAC_CHANNEL_NUM);
00182     pXdmac->XDMAC_GD =( XDMAC_GD_DI0 << channel);
00183 }
00184 
00185 /**
00186  * \brief Disables the relevant channels of given XDMAC.
00187  *
00188  * \param pXdmac Pointer to the XDMAC peripheral.
00189  * \param bmChannels Channels bitmap.
00190  */
00191 void XDMAC_DisableChannels( Xdmac *pXdmac, uint32_t bmChannels )
00192 {
00193     assert(pXdmac);
00194     pXdmac->XDMAC_GD = bmChannels;
00195 }
00196 
00197 
00198 /**
00199  * \brief Get Global channel status of given XDMAC.
00200  * \note: When set to 1, this bit indicates that the channel x is enabled. 
00201    If a channel disable request is issued, this bit remains asserted
00202    until pending transaction is completed.
00203  * \param pXdmac Pointer to the XDMAC peripheral.
00204  */
00205 uint32_t XDMAC_GetGlobalChStatus(Xdmac *pXdmac)
00206 {
00207     assert(pXdmac);
00208     return pXdmac->XDMAC_GS;
00209 }
00210 
00211 /**
00212  * \brief Suspend the relevant channel's read.
00213  *
00214  * \param pXdmac Pointer to the XDMAC peripheral.
00215  * \param channel Particular channel number.
00216  */
00217 void XDMAC_SuspendReadChannel( Xdmac *pXdmac, uint8_t channel )
00218 {
00219     assert(pXdmac);
00220     assert(channel < XDMAC_CHANNEL_NUM);
00221     pXdmac->XDMAC_GRS |= XDMAC_GRS_RS0 << channel;
00222 }
00223 
00224 /**
00225  * \brief Suspend the relevant channel's write.
00226  *
00227  * \param pXdmac Pointer to the XDMAC peripheral.
00228  * \param channel Particular channel number.
00229  */
00230 void XDMAC_SuspendWriteChannel( Xdmac *pXdmac, uint8_t channel )
00231 {
00232     assert(pXdmac);
00233     assert(channel < XDMAC_CHANNEL_NUM);
00234     pXdmac->XDMAC_GWS |= XDMAC_GWS_WS0 << channel;
00235 }
00236 
00237 /**
00238  * \brief Suspend the relevant channel's read & write.
00239  *
00240  * \param pXdmac Pointer to the XDMAC peripheral.
00241  * \param channel Particular channel number.
00242  */
00243 void XDMAC_SuspendReadWriteChannel( Xdmac *pXdmac, uint8_t channel )
00244 {
00245     assert(pXdmac);
00246     assert(channel < XDMAC_CHANNEL_NUM);
00247     pXdmac->XDMAC_GRWS = (XDMAC_GRWS_RWS0 << channel);
00248 }
00249 
00250 /**
00251  * \brief Resume the relevant channel's read & write.
00252  *
00253  * \param pXdmac Pointer to the XDMAC peripheral.
00254  * \param channel Particular channel number.
00255  */
00256 void XDMAC_ResumeReadWriteChannel( Xdmac *pXdmac, uint8_t channel )
00257 {
00258     assert(pXdmac);
00259     assert(channel < XDMAC_CHANNEL_NUM);
00260     pXdmac->XDMAC_GRWR = (XDMAC_GRWR_RWR0 << channel);
00261 }
00262 
00263 /**
00264  * \brief Set software transfer request on the relevant channel.
00265  *
00266  * \param pXdmac Pointer to the XDMAC peripheral.
00267  * \param channel Particular channel number.
00268  */
00269 void XDMAC_SoftwareTransferReq(Xdmac *pXdmac, uint8_t channel)
00270 {
00271 
00272     assert(pXdmac);
00273     assert(channel < XDMAC_CHANNEL_NUM);
00274     pXdmac->XDMAC_GSWR = (XDMAC_GSWR_SWREQ0 << channel);
00275 }
00276 
00277 /**
00278  * \brief Get software transfer status of the relevant channel.
00279  *
00280  * \param pXdmac Pointer to the XDMAC peripheral.
00281  */
00282 uint32_t XDMAC_GetSoftwareTransferStatus(Xdmac *pXdmac)
00283 {
00284 
00285     assert(pXdmac);
00286     return pXdmac->XDMAC_GSWS;
00287 }
00288 
00289 /**
00290  * \brief Set software flush request on the relevant channel.
00291  *
00292  * \param pXdmac Pointer to the XDMAC peripheral.
00293  * \param channel Particular channel number.
00294  */
00295 void XDMAC_SoftwareFlushReq(Xdmac *pXdmac, uint8_t channel)
00296 {
00297     assert(pXdmac);
00298     assert(channel < XDMAC_CHANNEL_NUM);
00299     pXdmac->XDMAC_GSWF = (XDMAC_GSWF_SWF0 << channel);
00300     while( !(XDMAC_GetChannelIsr(pXdmac, channel) & XDMAC_CIS_FIS) );
00301 }
00302 
00303 /**
00304  * \brief Disable interrupt with mask on the relevant channel of given XDMA.
00305  *
00306  * \param pXdmac Pointer to the XDMAC peripheral.
00307  * \param channel Particular channel number.
00308  * \param dwInteruptMask Interrupt mask.
00309  */
00310 void XDMAC_EnableChannelIt (Xdmac *pXdmac, uint8_t channel, uint8_t dwInteruptMask )
00311 {
00312     assert(pXdmac);
00313     assert(channel < XDMAC_CHANNEL_NUM);
00314     pXdmac->XDMAC_CHID[channel].XDMAC_CIE = dwInteruptMask;
00315 }
00316 
00317 /**
00318  * \brief Enable interrupt with mask on the relevant channel of given XDMA.
00319  *
00320  * \param pXdmac Pointer to the XDMAC peripheral.
00321  * \param channel Particular channel number.
00322  * \param dwInteruptMask Interrupt mask.
00323  */
00324 void XDMAC_DisableChannelIt (Xdmac *pXdmac, uint8_t channel, uint8_t dwInteruptMask )
00325 {
00326     assert(pXdmac);
00327     assert(channel < XDMAC_CHANNEL_NUM);
00328     pXdmac->XDMAC_CHID[channel].XDMAC_CID = dwInteruptMask;
00329 }
00330 
00331 /**
00332  * \brief Get interrupt mask for the relevant channel of given XDMA.
00333  *
00334  * \param pXdmac Pointer to the XDMAC peripheral.
00335  * \param channel Particular channel number.
00336  */
00337 uint32_t XDMAC_GetChannelItMask (Xdmac *pXdmac, uint8_t channel)
00338 {
00339     assert(pXdmac);
00340     assert(channel < XDMAC_CHANNEL_NUM);
00341     return pXdmac->XDMAC_CHID[channel].XDMAC_CIM;
00342 }
00343 
00344 /**
00345  * \brief Get interrupt status for the relevant channel of given XDMA.
00346  *
00347  * \param pXdmac Pointer to the XDMAC peripheral.
00348  * \param channel Particular channel number.
00349  */
00350 uint32_t XDMAC_GetChannelIsr (Xdmac *pXdmac, uint8_t channel)
00351 {
00352     assert(pXdmac);
00353     assert(channel < XDMAC_CHANNEL_NUM);
00354     return pXdmac->XDMAC_CHID[channel].XDMAC_CIS;
00355 }
00356 
00357 /**
00358  * \brief Get masked interrupt status for the relevant channel of given XDMA.
00359  *
00360  * \param pXdmac Pointer to the XDMAC peripheral.
00361  * \param channel Particular channel number.
00362  */
00363 uint32_t XDMAC_GetMaskChannelIsr (Xdmac *pXdmac, uint8_t channel)
00364 {
00365     uint32_t status;
00366     assert(pXdmac);
00367     assert(channel < XDMAC_CHANNEL_NUM);
00368     status = pXdmac->XDMAC_CHID[channel].XDMAC_CIS;
00369     status &= pXdmac->XDMAC_CHID[channel].XDMAC_CIM;
00370 
00371     return status;
00372 }
00373 
00374 /**
00375  * \brief Set source address for the relevant channel of given XDMA.
00376  *
00377  * \param pXdmac Pointer to the XDMAC peripheral.
00378  * \param channel Particular channel number.
00379  * \param addr Source address.
00380  */
00381 void XDMAC_SetSourceAddr(Xdmac *pXdmac, uint8_t channel, uint32_t addr)
00382 {
00383     assert(pXdmac);
00384     assert(channel < XDMAC_CHANNEL_NUM);
00385     pXdmac->XDMAC_CHID[channel].XDMAC_CSA = addr;
00386 }
00387 
00388 /**
00389  * \brief Set destination address for the relevant channel of given XDMA.
00390  *
00391  * \param pXdmac Pointer to the XDMAC peripheral.
00392  * \param channel Particular channel number.
00393  * \param addr Destination address.
00394  */
00395 void XDMAC_SetDestinationAddr(Xdmac *pXdmac, uint8_t channel, uint32_t addr)
00396 {
00397     assert(pXdmac);
00398     assert(channel < XDMAC_CHANNEL_NUM);
00399     pXdmac->XDMAC_CHID[channel].XDMAC_CDA = addr;
00400 }
00401 
00402 /**
00403  * \brief Set next descriptor's address & interface for the relevant channel of 
00404  *  given XDMA.
00405  *
00406  * \param pXdmac Pointer to the XDMAC peripheral.
00407  * \param channel Particular channel number.
00408  * \param addr Address of next descriptor.
00409  * \param ndaif Interface of next descriptor.
00410  */
00411 void XDMAC_SetDescriptorAddr(Xdmac *pXdmac, uint8_t channel, 
00412         uint32_t addr, uint8_t ndaif)
00413 {
00414     assert(pXdmac);
00415     assert(ndaif<2);
00416     assert(channel < XDMAC_CHANNEL_NUM);
00417     pXdmac->XDMAC_CHID[channel].XDMAC_CNDA =  ( addr & 0xFFFFFFFC ) | ndaif;
00418 }
00419 
00420 /**
00421  * \brief Set next descriptor's configuration for the relevant channel of 
00422  *  given XDMA.
00423  *
00424  * \param pXdmac Pointer to the XDMAC peripheral.
00425  * \param channel Particular channel number.
00426  * \param config Configuration of next descriptor.
00427  */
00428 void XDMAC_SetDescriptorControl(Xdmac *pXdmac, uint8_t channel, uint8_t config)
00429 {
00430     assert(pXdmac);
00431     assert(channel < XDMAC_CHANNEL_NUM);
00432     pXdmac->XDMAC_CHID[channel].XDMAC_CNDC = config;
00433 }
00434 
00435 /**
00436  * \brief Set microblock length for the relevant channel of given XDMA.
00437  *
00438  * \param pXdmac Pointer to the XDMAC peripheral.
00439  * \param channel Particular channel number.
00440  * \param ublen Microblock length.
00441  */
00442 void XDMAC_SetMicroblockControl(Xdmac *pXdmac, uint8_t channel, uint32_t ublen)
00443 {
00444     assert(pXdmac);
00445     assert(channel < XDMAC_CHANNEL_NUM);
00446     pXdmac->XDMAC_CHID[channel].XDMAC_CUBC = XDMAC_CUBC_UBLEN(ublen);
00447 }
00448 
00449 /**
00450  * \brief Set block length for the relevant channel of given XDMA.
00451  *
00452  * \param pXdmac Pointer to the XDMAC peripheral.
00453  * \param channel Particular channel number.
00454  * \param blen Block length.
00455  */
00456 void XDMAC_SetBlockControl(Xdmac *pXdmac, uint8_t channel, uint16_t blen)
00457 {
00458     assert(pXdmac);
00459     assert(channel < XDMAC_CHANNEL_NUM);
00460     pXdmac->XDMAC_CHID[channel].XDMAC_CBC = XDMAC_CBC_BLEN(blen);
00461 }
00462 
00463 /**
00464  * \brief Set configuration for the relevant channel of given XDMA.
00465  *
00466  * \param pXdmac Pointer to the XDMAC peripheral.
00467  * \param channel Particular channel number.
00468  * \param config Channel configuration.
00469  */
00470 void XDMAC_SetChannelConfig(Xdmac *pXdmac, uint8_t channel, uint32_t config)
00471 {
00472     assert(pXdmac);
00473     assert(channel < XDMAC_CHANNEL_NUM);
00474     pXdmac->XDMAC_CHID[channel].XDMAC_CC = config;
00475 }
00476 
00477 /**
00478  * \brief Get the relevant channel's configuration of given XDMA.
00479  *
00480  * \param pXdmac Pointer to the XDMAC peripheral.
00481  * \param channel Particular channel number.
00482  */
00483 uint32_t XDMAC_GetChannelConfig(Xdmac *pXdmac, uint8_t channel)
00484 {
00485     assert(pXdmac);
00486     assert(channel < XDMAC_CHANNEL_NUM);
00487     return pXdmac->XDMAC_CHID[channel].XDMAC_CC;
00488 }
00489 
00490 /**
00491  * \brief Set the relevant channel's data stride memory pattern of given XDMA.
00492  *
00493  * \param pXdmac Pointer to the XDMAC peripheral.
00494  * \param channel Particular channel number.
00495  * \param dds_msp Data stride memory pattern.
00496  */
00497 void XDMAC_SetDataStride_MemPattern(Xdmac *pXdmac, uint8_t channel, uint32_t dds_msp)
00498 {
00499 
00500     assert(pXdmac);
00501     assert(channel < XDMAC_CHANNEL_NUM);
00502     pXdmac->XDMAC_CHID[channel].XDMAC_CDS_MSP = dds_msp;
00503 }
00504 
00505 /**
00506  * \brief Set the relevant channel's source microblock stride of given XDMA.
00507  *
00508  * \param pXdmac Pointer to the XDMAC peripheral.
00509  * \param channel Particular channel number.
00510  * \param subs Source microblock stride.
00511  */
00512 void XDMAC_SetSourceMicroBlockStride(Xdmac *pXdmac, uint8_t channel, uint32_t subs)
00513 {
00514     assert(pXdmac);
00515     assert(channel < XDMAC_CHANNEL_NUM);
00516     pXdmac->XDMAC_CHID[channel].XDMAC_CSUS = XDMAC_CSUS_SUBS(subs);
00517 }
00518 
00519 /**
00520  * \brief Set the relevant channel's destination microblock stride of given XDMA.
00521  *
00522  * \param pXdmac Pointer to the XDMAC peripheral.
00523  * \param channel Particular channel number.
00524  * \param dubs Destination microblock stride.
00525  */
00526 void XDMAC_SetDestinationMicroBlockStride(Xdmac *pXdmac, uint8_t channel, uint32_t dubs)
00527 {
00528     assert(pXdmac);
00529     assert(channel < XDMAC_CHANNEL_NUM);
00530     pXdmac->XDMAC_CHID[channel].XDMAC_CDUS = XDMAC_CDUS_DUBS(dubs);
00531 }
00532 
00533 /**
00534  * \brief Get the relevant channel's destination address of given XDMA.
00535  *
00536  * \param pXdmac Pointer to the XDMAC peripheral.
00537  * \param channel Particular channel number.
00538  */
00539 uint32_t XDMAC_GetChDestinationAddr(Xdmac *pXdmac, uint8_t channel)
00540 {
00541     assert(pXdmac);
00542     assert(channel < XDMAC_CHANNEL_NUM);
00543     return pXdmac->XDMAC_CHID[channel].XDMAC_CDA;
00544 }
00545 
00546 /**@}*/
00547 
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