SAMV71 Xplained Ultra Software Package 1.3

PwmCh_num Struct Reference
[Pulse Width Modulation Controller]

PwmCh_num hardware registers. More...

#include <C:/softpack/canopus1.3/softpack/samv7/libraries/libchip_samv7/include/samv7/component/component_pwm.h>

Data Fields

__IO uint32_t PWM_CMR
 (PwmCh_num Offset: 0x0) PWM Channel Mode Register
__IO uint32_t PWM_CDTY
 (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register
__O uint32_t PWM_CDTYUPD
 (PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register
__IO uint32_t PWM_CPRD
 (PwmCh_num Offset: 0xC) PWM Channel Period Register
__O uint32_t PWM_CPRDUPD
 (PwmCh_num Offset: 0x10) PWM Channel Period Update Register
__I uint32_t PWM_CCNT
 (PwmCh_num Offset: 0x14) PWM Channel Counter Register
__IO uint32_t PWM_DT
 (PwmCh_num Offset: 0x18) PWM Channel Dead Time Register
__O uint32_t PWM_DTUPD
 (PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register

Detailed Description

PwmCh_num hardware registers.

Definition at line 41 of file component_pwm.h.


The documentation for this struct was generated from the following file:
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