Data Fields | |
__IO uint32_t | MATRIX_MCFG [12] |
(Matrix Offset: 0x0000) Master Configuration Register | |
__I uint32_t | Reserved1 [4] |
__IO uint32_t | MATRIX_SCFG [9] |
(Matrix Offset: 0x0040) Slave Configuration Register | |
__I uint32_t | Reserved2 [7] |
MatrixPr | MATRIX_PR [MATRIXPR_NUMBER] |
(Matrix Offset: 0x0080) 0 .. 8 | |
__I uint32_t | Reserved3 [14] |
__IO uint32_t | MATRIX_MRCR |
(Matrix Offset: 0x0100) Master Remap Control Register | |
__I uint32_t | Reserved4 [3] |
__IO uint32_t | CCFG_CAN0 |
(Matrix Offset: 0x0110) CAN0 Configuration Register | |
__IO uint32_t | CCFG_SYSIO |
(Matrix Offset: 0x0114) System I/O and CAN1 Configuration Register | |
__I uint32_t | Reserved5 [3] |
__IO uint32_t | CCFG_SMCNFCS |
(Matrix Offset: 0x0124) SMC NAND Flash Chip Select Configuration Register | |
__I uint32_t | Reserved6 [47] |
__IO uint32_t | MATRIX_WPMR |
(Matrix Offset: 0x01E4) Write Protection Mode Register | |
__I uint32_t | MATRIX_WPSR |
(Matrix Offset: 0x01E8) Write Protection Status Register |
Definition at line 47 of file component_matrix.h.