Go to the documentation of this file.00001
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00042 #include "chip.h"
00043
00044 #include <stdint.h>
00045 #include <assert.h>
00046
00047
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00049
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00053
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00058
00059 uint32_t XDMAC_GetType( Xdmac *pXdmac)
00060 {
00061 assert(pXdmac);
00062 return pXdmac->XDMAC_GTYPE;
00063 }
00064
00065
00066
00067
00068
00069
00070 uint32_t XDMAC_GetConfig( Xdmac *pXdmac)
00071 {
00072 assert(pXdmac);
00073 return pXdmac->XDMAC_GCFG;
00074 }
00075
00076
00077
00078
00079
00080
00081 uint32_t XDMAC_GetArbiter( Xdmac *pXdmac)
00082 {
00083 assert(pXdmac);
00084 return pXdmac->XDMAC_GWAC;
00085 }
00086
00087
00088
00089
00090
00091
00092
00093 void XDMAC_EnableGIt (Xdmac *pXdmac, uint8_t dwInteruptMask )
00094 {
00095 assert(pXdmac);
00096 pXdmac->XDMAC_GIE = ( XDMAC_GIE_IE0 << dwInteruptMask) ;
00097 }
00098
00099
00100
00101
00102
00103
00104
00105 void XDMAC_DisableGIt (Xdmac *pXdmac, uint8_t dwInteruptMask )
00106 {
00107 assert(pXdmac);
00108 pXdmac->XDMAC_GID = (XDMAC_GID_ID0 << dwInteruptMask);
00109 }
00110
00111
00112
00113
00114
00115
00116 uint32_t XDMAC_GetGItMask( Xdmac *pXdmac )
00117 {
00118 assert(pXdmac);
00119 return (pXdmac->XDMAC_GIM);
00120 }
00121
00122
00123
00124
00125
00126
00127 uint32_t XDMAC_GetGIsr( Xdmac *pXdmac )
00128 {
00129 assert(pXdmac);
00130 return (pXdmac->XDMAC_GIS);
00131 }
00132
00133
00134
00135
00136
00137
00138 uint32_t XDMAC_GetMaskedGIsr( Xdmac *pXdmac )
00139 {
00140 uint32_t _dwStatus;
00141 assert(pXdmac);
00142 _dwStatus = pXdmac->XDMAC_GIS;
00143 _dwStatus &= pXdmac->XDMAC_GIM;
00144 return _dwStatus;
00145 }
00146
00147
00148
00149
00150
00151
00152
00153 void XDMAC_EnableChannel( Xdmac *pXdmac, uint8_t channel )
00154 {
00155 assert(pXdmac);
00156 assert(channel < XDMAC_CHANNEL_NUM);
00157 pXdmac->XDMAC_GE = (XDMAC_GE_EN0 << channel);
00158 }
00159
00160
00161
00162
00163
00164
00165
00166 void XDMAC_EnableChannels( Xdmac *pXdmac, uint32_t bmChannels )
00167 {
00168 assert(pXdmac);
00169 pXdmac->XDMAC_GE = bmChannels;
00170 }
00171
00172
00173
00174
00175
00176
00177
00178 void XDMAC_DisableChannel( Xdmac *pXdmac, uint8_t channel )
00179 {
00180 assert(pXdmac);
00181 assert(channel < XDMAC_CHANNEL_NUM);
00182 pXdmac->XDMAC_GD =( XDMAC_GD_DI0 << channel);
00183 }
00184
00185
00186
00187
00188
00189
00190
00191 void XDMAC_DisableChannels( Xdmac *pXdmac, uint32_t bmChannels )
00192 {
00193 assert(pXdmac);
00194 pXdmac->XDMAC_GD = bmChannels;
00195 }
00196
00197
00198
00199
00200
00201
00202
00203
00204
00205 uint32_t XDMAC_GetGlobalChStatus(Xdmac *pXdmac)
00206 {
00207 assert(pXdmac);
00208 return pXdmac->XDMAC_GS;
00209 }
00210
00211
00212
00213
00214
00215
00216
00217 void XDMAC_SuspendReadChannel( Xdmac *pXdmac, uint8_t channel )
00218 {
00219 assert(pXdmac);
00220 assert(channel < XDMAC_CHANNEL_NUM);
00221 pXdmac->XDMAC_GRS |= XDMAC_GRS_RS0 << channel;
00222 }
00223
00224
00225
00226
00227
00228
00229
00230 void XDMAC_SuspendWriteChannel( Xdmac *pXdmac, uint8_t channel )
00231 {
00232 assert(pXdmac);
00233 assert(channel < XDMAC_CHANNEL_NUM);
00234 pXdmac->XDMAC_GWS |= XDMAC_GWS_WS0 << channel;
00235 }
00236
00237
00238
00239
00240
00241
00242
00243 void XDMAC_SuspendReadWriteChannel( Xdmac *pXdmac, uint8_t channel )
00244 {
00245 assert(pXdmac);
00246 assert(channel < XDMAC_CHANNEL_NUM);
00247 pXdmac->XDMAC_GRWS = (XDMAC_GRWS_RWS0 << channel);
00248 }
00249
00250
00251
00252
00253
00254
00255
00256 void XDMAC_ResumeReadWriteChannel( Xdmac *pXdmac, uint8_t channel )
00257 {
00258 assert(pXdmac);
00259 assert(channel < XDMAC_CHANNEL_NUM);
00260 pXdmac->XDMAC_GRWR = (XDMAC_GRWR_RWR0 << channel);
00261 }
00262
00263
00264
00265
00266
00267
00268
00269 void XDMAC_SoftwareTransferReq(Xdmac *pXdmac, uint8_t channel)
00270 {
00271
00272 assert(pXdmac);
00273 assert(channel < XDMAC_CHANNEL_NUM);
00274 pXdmac->XDMAC_GSWR = (XDMAC_GSWR_SWREQ0 << channel);
00275 }
00276
00277
00278
00279
00280
00281
00282 uint32_t XDMAC_GetSoftwareTransferStatus(Xdmac *pXdmac)
00283 {
00284
00285 assert(pXdmac);
00286 return pXdmac->XDMAC_GSWS;
00287 }
00288
00289
00290
00291
00292
00293
00294
00295 void XDMAC_SoftwareFlushReq(Xdmac *pXdmac, uint8_t channel)
00296 {
00297 assert(pXdmac);
00298 assert(channel < XDMAC_CHANNEL_NUM);
00299 pXdmac->XDMAC_GSWF = (XDMAC_GSWF_SWF0 << channel);
00300 while( !(XDMAC_GetChannelIsr(pXdmac, channel) & XDMAC_CIS_FIS) );
00301 }
00302
00303
00304
00305
00306
00307
00308
00309
00310 void XDMAC_EnableChannelIt (Xdmac *pXdmac, uint8_t channel, uint8_t dwInteruptMask )
00311 {
00312 assert(pXdmac);
00313 assert(channel < XDMAC_CHANNEL_NUM);
00314 pXdmac->XDMAC_CHID[channel].XDMAC_CIE = dwInteruptMask;
00315 }
00316
00317
00318
00319
00320
00321
00322
00323
00324 void XDMAC_DisableChannelIt (Xdmac *pXdmac, uint8_t channel, uint8_t dwInteruptMask )
00325 {
00326 assert(pXdmac);
00327 assert(channel < XDMAC_CHANNEL_NUM);
00328 pXdmac->XDMAC_CHID[channel].XDMAC_CID = dwInteruptMask;
00329 }
00330
00331
00332
00333
00334
00335
00336
00337 uint32_t XDMAC_GetChannelItMask (Xdmac *pXdmac, uint8_t channel)
00338 {
00339 assert(pXdmac);
00340 assert(channel < XDMAC_CHANNEL_NUM);
00341 return pXdmac->XDMAC_CHID[channel].XDMAC_CIM;
00342 }
00343
00344
00345
00346
00347
00348
00349
00350 uint32_t XDMAC_GetChannelIsr (Xdmac *pXdmac, uint8_t channel)
00351 {
00352 assert(pXdmac);
00353 assert(channel < XDMAC_CHANNEL_NUM);
00354 return pXdmac->XDMAC_CHID[channel].XDMAC_CIS;
00355 }
00356
00357
00358
00359
00360
00361
00362
00363 uint32_t XDMAC_GetMaskChannelIsr (Xdmac *pXdmac, uint8_t channel)
00364 {
00365 uint32_t status;
00366 assert(pXdmac);
00367 assert(channel < XDMAC_CHANNEL_NUM);
00368 status = pXdmac->XDMAC_CHID[channel].XDMAC_CIS;
00369 status &= pXdmac->XDMAC_CHID[channel].XDMAC_CIM;
00370
00371 return status;
00372 }
00373
00374
00375
00376
00377
00378
00379
00380
00381 void XDMAC_SetSourceAddr(Xdmac *pXdmac, uint8_t channel, uint32_t addr)
00382 {
00383 assert(pXdmac);
00384 assert(channel < XDMAC_CHANNEL_NUM);
00385 pXdmac->XDMAC_CHID[channel].XDMAC_CSA = addr;
00386 }
00387
00388
00389
00390
00391
00392
00393
00394
00395 void XDMAC_SetDestinationAddr(Xdmac *pXdmac, uint8_t channel, uint32_t addr)
00396 {
00397 assert(pXdmac);
00398 assert(channel < XDMAC_CHANNEL_NUM);
00399 pXdmac->XDMAC_CHID[channel].XDMAC_CDA = addr;
00400 }
00401
00402
00403
00404
00405
00406
00407
00408
00409
00410
00411 void XDMAC_SetDescriptorAddr(Xdmac *pXdmac, uint8_t channel,
00412 uint32_t addr, uint8_t ndaif)
00413 {
00414 assert(pXdmac);
00415 assert(ndaif<2);
00416 assert(channel < XDMAC_CHANNEL_NUM);
00417 pXdmac->XDMAC_CHID[channel].XDMAC_CNDA = ( addr & 0xFFFFFFFC ) | ndaif;
00418 }
00419
00420
00421
00422
00423
00424
00425
00426
00427
00428 void XDMAC_SetDescriptorControl(Xdmac *pXdmac, uint8_t channel, uint8_t config)
00429 {
00430 assert(pXdmac);
00431 assert(channel < XDMAC_CHANNEL_NUM);
00432 pXdmac->XDMAC_CHID[channel].XDMAC_CNDC = config;
00433 }
00434
00435
00436
00437
00438
00439
00440
00441
00442 void XDMAC_SetMicroblockControl(Xdmac *pXdmac, uint8_t channel, uint32_t ublen)
00443 {
00444 assert(pXdmac);
00445 assert(channel < XDMAC_CHANNEL_NUM);
00446 pXdmac->XDMAC_CHID[channel].XDMAC_CUBC = XDMAC_CUBC_UBLEN(ublen);
00447 }
00448
00449
00450
00451
00452
00453
00454
00455
00456 void XDMAC_SetBlockControl(Xdmac *pXdmac, uint8_t channel, uint16_t blen)
00457 {
00458 assert(pXdmac);
00459 assert(channel < XDMAC_CHANNEL_NUM);
00460 pXdmac->XDMAC_CHID[channel].XDMAC_CBC = XDMAC_CBC_BLEN(blen);
00461 }
00462
00463
00464
00465
00466
00467
00468
00469
00470 void XDMAC_SetChannelConfig(Xdmac *pXdmac, uint8_t channel, uint32_t config)
00471 {
00472 assert(pXdmac);
00473 assert(channel < XDMAC_CHANNEL_NUM);
00474 pXdmac->XDMAC_CHID[channel].XDMAC_CC = config;
00475 }
00476
00477
00478
00479
00480
00481
00482
00483 uint32_t XDMAC_GetChannelConfig(Xdmac *pXdmac, uint8_t channel)
00484 {
00485 assert(pXdmac);
00486 assert(channel < XDMAC_CHANNEL_NUM);
00487 return pXdmac->XDMAC_CHID[channel].XDMAC_CC;
00488 }
00489
00490
00491
00492
00493
00494
00495
00496
00497 void XDMAC_SetDataStride_MemPattern(Xdmac *pXdmac, uint8_t channel, uint32_t dds_msp)
00498 {
00499
00500 assert(pXdmac);
00501 assert(channel < XDMAC_CHANNEL_NUM);
00502 pXdmac->XDMAC_CHID[channel].XDMAC_CDS_MSP = dds_msp;
00503 }
00504
00505
00506
00507
00508
00509
00510
00511
00512 void XDMAC_SetSourceMicroBlockStride(Xdmac *pXdmac, uint8_t channel, uint32_t subs)
00513 {
00514 assert(pXdmac);
00515 assert(channel < XDMAC_CHANNEL_NUM);
00516 pXdmac->XDMAC_CHID[channel].XDMAC_CSUS = XDMAC_CSUS_SUBS(subs);
00517 }
00518
00519
00520
00521
00522
00523
00524
00525
00526 void XDMAC_SetDestinationMicroBlockStride(Xdmac *pXdmac, uint8_t channel, uint32_t dubs)
00527 {
00528 assert(pXdmac);
00529 assert(channel < XDMAC_CHANNEL_NUM);
00530 pXdmac->XDMAC_CHID[channel].XDMAC_CDUS = XDMAC_CDUS_DUBS(dubs);
00531 }
00532
00533
00534
00535
00536
00537
00538
00539 uint32_t XDMAC_GetChDestinationAddr(Xdmac *pXdmac, uint8_t channel)
00540 {
00541 assert(pXdmac);
00542 assert(channel < XDMAC_CHANNEL_NUM);
00543 return pXdmac->XDMAC_CHID[channel].XDMAC_CDA;
00544 }
00545
00546
00547