00001 /* ---------------------------------------------------------------------------- 00002 * SAM Software Package License 00003 * ---------------------------------------------------------------------------- 00004 * Copyright (c) 2013, Atmel Corporation 00005 * 00006 * All rights reserved. 00007 * 00008 * Redistribution and use in source and binary forms, with or without 00009 * modification, are permitted provided that the following conditions are met: 00010 * 00011 * - Redistributions of source code must retain the above copyright notice, 00012 * this list of conditions and the disclaimer below. 00013 * 00014 * Atmel's name may not be used to endorse or promote products derived from 00015 * this software without specific prior written permission. 00016 * 00017 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR 00018 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 00019 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 00020 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, 00021 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 00022 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 00023 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 00024 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 00025 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 00026 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00027 * ---------------------------------------------------------------------------- 00028 */ 00029 00030 /** 00031 * \file 00032 * 00033 * Interface for the S25fl1 SPI driver. 00034 * 00035 */ 00036 00037 #ifndef S25FL1_SPI_H 00038 #define S25FL1_SPI_H 00039 00040 /*---------------------------------------------------------------------------- 00041 * Headers 00042 *----------------------------------------------------------------------------*/ 00043 #include <board.h> 00044 00045 /*---------------------------------------------------------------------------- 00046 * Macros 00047 *----------------------------------------------------------------------------*/ 00048 00049 #define S25FL1_Size(pS25fl1) ((pS25fl1)->pDesc->size) 00050 #define S25FL1_PageSize(pS25fl1) ((pS25fl1)->pDesc->pageSize) 00051 #define S25FL1_BlockSize(pS25fl1) ((pS25fl1)->pDesc->blockSize) 00052 #define S25FL1_Name(pS25fl1) ((pS25fl1)->pDesc->name) 00053 #define S25FL1_ManId(pS25fl1) (((pS25fl1)->pDesc->jedecId) & 0xFF) 00054 #define S25FL1_PageNumber(pS25fl1) (S25FL1_Size(pS25FL1) / S25FL1_PageSize(pS25fl1)) 00055 #define S25FL1_BlockNumber(pS25fl1) (S25FL1_Size(pS25fl1) / S25FL1_BlockSize(pS25fl1)) 00056 #define S25FL1_PagePerBlock(pS25fl1) (S25FL1_BlockSize(pS25fl1) / S25FL1_PageSize(pS25fl1)) 00057 #define S25FL1_BlockEraseCmd(pS25fl1) ((pS25fl1)->pDesc->blockEraseCmd) 00058 00059 /*---------------------------------------------------------------------------- 00060 * Local definitions 00061 *----------------------------------------------------------------------------*/ 00062 00063 /** Device is protected, operation cannot be carried out. */ 00064 #define S25FL1_ERROR_PROTECTED 1 00065 /** Device is busy executing a command. */ 00066 #define S25FL1_ERROR_BUSY 2 00067 /** There was a problem while trying to program page data. */ 00068 #define S25FL1_ERROR_PROGRAM 3 00069 /** There was an SPI communication error. */ 00070 #define S25FL1_ERROR_SPI 4 00071 00072 /** Device ready/busy status bit. */ 00073 #define S25FL1_STATUS_RDYBSY (1 << 0) 00074 /** Device is ready. */ 00075 #define S25FL1_STATUS_RDYBSY_READY (0 << 0) 00076 /** Device is busy with internal operations. */ 00077 #define S25FL1_STATUS_RDYBSY_BUSY (1 << 0) 00078 /** Write enable latch status bit. */ 00079 #define S25FL1_STATUS_WEL (1 << 1) 00080 /** Device is not write enabled. */ 00081 #define S25FL1_STATUS_WEL_DISABLED (0 << 1) 00082 /** Device is write enabled. */ 00083 #define S25FL1_STATUS_WEL_ENABLED (1 << 1) 00084 /** Software protection status bit-field. */ 00085 #define S25FL1_STATUS_SWP (3 << 2) 00086 /** All sectors are software protected. */ 00087 #define S25FL1_STATUS_SWP_PROTALL (3 << 2) 00088 /** Some sectors are software protected. */ 00089 #define S25FL1_STATUS_SWP_PROTSOME (1 << 2) 00090 /** No sector is software protected. */ 00091 #define S25FL1_STATUS_SWP_PROTNONE (0 << 2) 00092 /** Write protect pin status bit. */ 00093 #define S25FL1_STATUS_WPP (1 << 4) 00094 /** Write protect signal is not asserted. */ 00095 #define S25FL1_STATUS_WPP_NOTASSERTED (0 << 4) 00096 /** Write protect signal is asserted. */ 00097 #define S25FL1_STATUS_WPP_ASSERTED (1 << 4) 00098 /** Erase/program error bit. */ 00099 #define S25FL1_STATUS_EPE (1 << 5) 00100 /** Erase or program operation was successful. */ 00101 #define S25FL1_STATUS_EPE_SUCCESS (0 << 5) 00102 /** Erase or program error detected. */ 00103 #define S25FL1_STATUS_EPE_ERROR (1 << 5) 00104 /** Sector protection registers locked bit. */ 00105 #define S25FL1_STATUS_SPRL (1 << 7) 00106 /** Sector protection registers are unlocked. */ 00107 #define S25FL1_STATUS_SPRL_UNLOCKED (0 << 7) 00108 /** Sector protection registers are locked. */ 00109 #define S25FL1_STATUS_SPRL_LOCKED (1 << 7) 00110 00111 /** Read array command code. */ 00112 #define S25FL1_READ_ARRAY 0x0B 00113 /** Read array (low frequency) command code. */ 00114 #define S25FL1_READ_ARRAY_LF 0x03 00115 /** Block erase command code (4K block). */ 00116 #define S25FL1_BLOCK_ERASE_4K 0x20 00117 /** Block erase command code (32K block). */ 00118 #define S25FL1_BLOCK_ERASE_32K 0x52 00119 /** Block erase command code (64K block). */ 00120 #define S25FL1_BLOCK_ERASE_64K 0xD8 00121 /** Chip erase command code 1. */ 00122 #define S25FL1_CHIP_ERASE_1 0x60 00123 /** Chip erase command code 2. */ 00124 #define S25FL1_CHIP_ERASE_2 0xC7 00125 /** Byte/page program command code. */ 00126 #define S25FL1_BYTE_PAGE_PROGRAM 0x02 00127 /** Sequential program mode command code 1. */ 00128 #define S25FL1_SEQUENTIAL_PROGRAM_1 0xAD 00129 /** Sequential program mode command code 2. */ 00130 #define S25FL1_SEQUENTIAL_PROGRAM_2 0xAF 00131 /** Write enable command code. */ 00132 #define S25FL1_WRITE_ENABLE 0x06 00133 /** Write disable command code. */ 00134 #define S25FL1_WRITE_DISABLE 0x04 00135 /** Protect sector command code. */ 00136 #define S25FL1_PROTECT_SECTOR 0x36 00137 /** Unprotected sector command code. */ 00138 #define S25FL1_UNPROTECT_SECTOR 0x39 00139 /** Read sector protection registers command code. */ 00140 #define S25FL1_READ_SECTOR_PROT 0x3C 00141 /** Read status register command code. */ 00142 #define S25FL1_READ_STATUS 0x05 00143 /** Write status register command code. */ 00144 #define S25FL1_WRITE_STATUS 0x01 00145 /** Read manufacturer and device ID command code. */ 00146 #define S25FL1_READ_JEDEC_ID 0x9F 00147 /** Deep power-down command code. */ 00148 #define S25FL1_DEEP_PDOWN 0xB9 00149 /** Resume from deep power-down command code. */ 00150 #define S25FL1_RES_DEEP_PDOWN 0xAB 00151 00152 /* Enter 4-BYTE ADDRESS mode */ 00153 #define S25FL1_ENTER_4ADDR_MODE 0xB7 00154 /* Exit 4-BYTE ADDRESS mode */ 00155 #define S25FL1_EXIT_4ADDR_MODE 0xE9 00156 00157 /** SPI Flash Manufacturer JEDEC ID */ 00158 #define ATMEL_SPI_FLASH 0x1F 00159 #define ST_SPI_FLASH 0x20 00160 #define WINBOND_SPI_FLASH 0xEF 00161 #define MACRONIX_SPI_FLASH 0xC2 00162 #define SST_SPI_FLASH 0xBF 00163 00164 /*---------------------------------------------------------------------------- 00165 * Types 00166 *----------------------------------------------------------------------------*/ 00167 00168 /** Describes a serial firmware flash device parameters. */ 00169 typedef struct _S25fl1Desc { 00170 00171 /** Device string name. */ 00172 const char *name; 00173 /** JEDEC ID of device. */ 00174 uint32_t jedecId; 00175 /** Size of device in bytes. */ 00176 uint32_t size; 00177 /** Size of one page in bytes. */ 00178 uint32_t pageSize; 00179 /** Block erase size in bytes. */ 00180 uint32_t blockSize; 00181 /** Block erase command. */ 00182 uint32_t blockEraseCmd; 00183 00184 } S25fl1Desc; 00185 00186 /** 00187 * Serial flash driver structure. Holds the current state of the driver, 00188 * including the current command and the descriptor for the underlying device. 00189 */ 00190 typedef struct _S25fl1 { 00191 00192 /** Pointer to the underlying QSPI driver. */ 00193 Qspid *pQspid; 00194 /** Current command sent to the QSPI driver. */ 00195 QspidCmd command; 00196 /** Pointer to a descriptor for the serial firmware flash device. */ 00197 const S25fl1Desc *pDesc; 00198 /** Qspi Command buffer. */ 00199 qspiFrame CmdBuffer; 00200 /** Polling mode */ 00201 uint32_t pollingMode; 00202 /** Support for 4 byte address mode */ 00203 uint32_t fourbytemode; 00204 } S25fl1; 00205 00206 /*---------------------------------------------------------------------------- 00207 * Exported functions 00208 *----------------------------------------------------------------------------*/ 00209 00210 extern void S25fl1_Configure(S25fl1 *pS25fl1, 00211 Qspid *pQspid, 00212 uint8_t cs, 00213 uint8_t polling); 00214 00215 extern uint8_t S25fl1_SendCommand( 00216 S25fl1 *pS25fl1, 00217 uint8_t cmd, 00218 uint8_t cmdSize, 00219 uint8_t *pData, 00220 uint32_t dataSize, 00221 uint32_t address, 00222 QspidCallback callback, 00223 void *pArgument); 00224 00225 extern uint8_t S25fl1_IsBusy(S25fl1 *pS25fl1); 00226 00227 extern const S25fl1Desc * S25fl1_FindDevice( 00228 S25fl1 *pS25fl1, 00229 uint32_t jedecId); 00230 00231 #endif /*#ifndef S25FL1_SPI_H */ 00232