SAMV71 Xplained Ultra Software Package 1.3

ov7740_config.c

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00001 /* ----------------------------------------------------------------------------
00002  *         SAM Software Package License 
00003  * ----------------------------------------------------------------------------
00004  * Copyright (c) 2013, Atmel Corporation
00005  *
00006  * All rights reserved.
00007  *
00008  * Redistribution and use in source and binary forms, with or without
00009  * modification, are permitted provided that the following conditions are met:
00010  *
00011  * - Redistributions of source code must retain the above copyright notice,
00012  * this list of conditions and the disclaimer below.
00013  *
00014  * Atmel's name may not be used to endorse or promote products derived from
00015  * this software without specific prior written permission.
00016  *
00017  * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
00018  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00019  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
00020  * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
00021  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
00022  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
00023  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
00024  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00025  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
00026  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00027  * ----------------------------------------------------------------------------
00028  */
00029 
00030 /**
00031  * \file
00032  */
00033 
00034 #include "include/ov_7740.h"
00035 #include "board.h"
00036 
00037 
00038 #ifdef __cplusplus
00039 extern "C" {
00040 #endif
00041 
00042 #define FRAMERATE   30   
00043  
00044 /**
00045  * \defgroup ov7740_CMOS_image_sensor_registers_group
00046  *
00047  * This file defines several arrays. Each of them contain address of ov7740
00048  * register and corresponding value for a specific configuration.
00049  * There are seven different configuration:
00050  *       -  OV7740_VGA_YUV422[]
00051  *       -  OV7740_QVGA_YUV422[]
00052  *       -  OV7740_QQVGA_YUV422[]   
00053  *       -  OV7740_QVGA_RGB888[]
00054  *       -  OV7740_QQVGA_RGB888[]
00055  *       -  OV7740_TEST_PATTERN[]
00056 
00057  * These values have been obtained from OV7740 datasheet and OmniVision 
00058  * Developer Kit.
00059  * @{
00060  */
00061 
00062 /*------------------------------------------------------------------------------
00063  *         Local Variables
00064  *----------------------------------------------------------------------------*/
00065 
00066   /**
00067  * \brief Addresses and values of the OV7740 registers for the
00068  * OV7740_VGA_YUV422 configuration:
00069  *  - 640*4800 pixel by picture (VGA)
00070  *  - pixel data in YUV422 format (Y1, U, Y2, V)
00071  */
00072 const struct ov_reg OV7740_VGA_YUV422[] = {
00073     
00074     {0x12, 0x80},
00075     /* flag for soft reset delay */
00076     {0x55 ,PLL_DIV_DEFAULT},
00077 
00078     /**************************************************************/
00079     /*  30fps  11 01 ;clock_divider ;sysclk=24MHz at XCLK=24MHz   */
00080     /*  20fps  11 02 ;clock_divider ;sysclk=16MHz at XCLK=24MHz   */
00081     /*  15fps  11 03 ;clock_divider ;sysclk=12MHz at XCLK=24MHz   */
00082     /*  10fps  11 05 ;sysclk=8MHz at XCLK=24MHz                   */
00083     /*  7p5fps 11 07 ;sysclk=6MHz at XCLK=24MHz  ((PLL/2)/16) (PLL=792)*/
00084     /**************************************************************/
00085     /*  7p5fps 11 0x0A ;sysclk=6MHz at XCLK=16.5MHz(MCK_132)/8  */
00086     /**************************************************************/
00087    
00088     {OV7740_CLK, FRAME_RATE_30},
00089     /**************************************************************/
00090 
00091     {0x12 ,0x00},
00092     {0xd5 ,0x10},
00093     {0x0c, 0x12},
00094     {0x0d ,0x34},
00095     {0x17 ,0x25},
00096     {0x18 ,0xa0},
00097     {0x19 ,0x03},
00098     {0x1a ,0xf0},
00099     {0x1b ,0x89}, 
00100     {0x22 ,0x03},
00101     {0x29 ,0x18}, 
00102     {0x2b ,0xf8},
00103     {0x2c ,0x01},
00104     {0x31 ,0xa0},
00105     {0x32 ,0xf0},
00106     {0x33 ,0xc4},
00107     {0x35 ,0x05},
00108     {0x36 ,0x3f},
00109 
00110     {0x04 ,0x60},
00111     {0x27 ,0x80}, 
00112     {0x3d ,0x0f},
00113     {0x3e ,0x80},
00114     {0x3f ,0x40},
00115     {0x40 ,0x7f},
00116     {0x41 ,0x6a},
00117     {0x42 ,0x29},
00118     {0x44 ,0x22}, 
00119     {0x45 ,0x41},
00120     {0x47 ,0x02},
00121     {0x49 ,0x64},
00122     {0x4a ,0xa1},
00123     {0x4b ,0x40},
00124     {0x4c ,0x1a},
00125     {0x4d ,0x50},
00126     {0x4e ,0x13},
00127     {0x64 ,0x00},
00128     {0x67 ,0x88},
00129     {0x68 ,0x1a},
00130 
00131     {0x14 ,0x28}, //;38/28/18 for 16/8/4x gain ceiling
00132     {0x24 ,0x3c},
00133     {0x25, 0x30},
00134     {0x26, 0x72},
00135     {0x50, 0x97},
00136     {0x51, 0x7e},
00137     {0x52, 0x00},
00138     {0x53, 0x00},
00139     {0x20, 0x00},
00140     {0x21, 0x23},
00141     {0x50, 0x97}, // ;12e/97/4b/25 for 60/30/15/7.5fps, 50Hz
00142 
00143     /*********************************/
00144     /* Normal Mode / No test pattern */
00145     {0x38, 0x14},
00146     /*********************************/
00147     {0xe9, 0x00},
00148     {0x56, 0x55},
00149     {0x57, 0xff},
00150     {0x58, 0xff},
00151     {0x59, 0xff},
00152     {0x5f, 0x04},
00153     {0xec, 0x00},
00154     {0x13, 0xff},
00155 
00156     {0x80, 0x7f},
00157     {0x81, 0x3f},
00158     {0x82, 0x32},
00159     {0x83, 0x01},
00160     {0x38, 0x11},
00161     {0x84 ,0x70},
00162     {0x85, 0x00},
00163     {0x86, 0x03},
00164     {0x87, 0x01},
00165     {0x88, 0x05},
00166     {0x89, 0x30},
00167     {0x8d, 0x30},
00168     {0x8f, 0x85},
00169     {0x93, 0x30},
00170     {0x95, 0x85},
00171     {0x99, 0x30},
00172     {0x9b, 0x85},
00173 
00174     {0x9c, 0x08},
00175     {0x9d, 0x12},
00176     {0x9e, 0x23},
00177     {0x9f, 0x45},
00178     {0xa0, 0x55},
00179     {0xa1, 0x64},
00180     {0xa2, 0x72},
00181     {0xa3, 0x7f},
00182     {0xa4, 0x8b},
00183     {0xa5, 0x95},
00184     {0xa6, 0xa7},
00185     {0xa7, 0xb5},
00186     {0xa8, 0xcb},
00187     {0xa9, 0xdd},
00188     {0xaa, 0xec},
00189     {0xab, 0x1a},
00190 
00191     {0xce, 0x78},
00192     {0xcf, 0x6e},
00193     {0xd0, 0x0a},
00194     {0xd1, 0x0c},
00195     {0xd2, 0x84},
00196     {0xd3, 0x90},
00197     {0xd4, 0x1e},
00198 
00199     {0x5a, 0x24},
00200     {0x5b, 0x1f},
00201     {0x5c, 0x88},
00202     {0x5d, 0x60},
00203 
00204     {0xac, 0x6e},
00205     {0xbe, 0xff},
00206     {0xbf, 0x00},
00207 
00208     {0x0f ,0x1d},
00209     {0x0f ,0x1f},
00210     {0xFF, 0xFF}
00211 };
00212 
00213   /**
00214  * \brief Addresses and values of the OV7740 registers for the
00215  * OV7740_QVGA_YUV422 configuration:
00216  *  - 320*240 pixel by picture (QVGA)
00217  *  - pixel data in YUV422 format (Y1, U, Y2, V)
00218 
00219  */
00220 const struct ov_reg OV7740_QVGA_YUV422[] = {
00221     
00222     {0x12, 0x80},
00223     /* flag for soft reset delay */
00224     {0x55 ,PLL_DIV_7_MCK_132},
00225 
00226     /**************************************************************/
00227     /*  30fps  11 01 ;clock_divider ;sysclk=24MHz at XCLK=24MHz   */
00228     /*  20fps  11 02 ;clock_divider ;sysclk=16MHz at XCLK=24MHz   */
00229     /*  15fps  11 03 ;clock_divider ;sysclk=12MHz at XCLK=24MHz   */
00230     /*  10fps  11 05 ;sysclk=8MHz at XCLK=24MHz                   */
00231     /*  7p5fps 11 07 ;sysclk=6MHz at XCLK=24MHz                   */
00232     /**************************************************************/
00233     /*  7p5fps 11 0x0A ;sysclk=6MHz at XCLK=16.5MHz  (MCK=132/8)  */
00234     /**************************************************************/
00235     {OV7740_CLK, FRAME_RATE_30}, 
00236     /**************************************************************/
00237 
00238     {0x12 ,0x00},
00239     {0xd5 ,0x10},
00240     {0x0c ,0x12},
00241     {0x0d ,0x34},
00242     {0x17 ,0x25},
00243     {0x18 ,0xa0},
00244     {0x19 ,0x03},
00245     {0x1a ,0xf0},
00246     {0x1b ,0x89}, //;was 81
00247     {0x22 ,0x03}, //;new
00248     {0x29 ,0x18}, //;was 17
00249     {0x2b ,0xf8},
00250     {0x2c ,0x01},
00251     {0x31 ,0xa0},
00252     {0x32 ,0xf0},
00253     {0x33 ,0xc4}, //;was44
00254     {0x35 ,0x05}, //;new
00255     {0x36 ,0x3f},
00256 
00257     {0x04 ,0x60},
00258     {0x27 ,0x80}, //;delete "42 3a b4"
00259     {0x3d ,0x0f},
00260     {0x3e ,0x80},
00261     {0x3f ,0x40},
00262     {0x40 ,0x7f},
00263     {0x41 ,0x6a},
00264     {0x42 ,0x29},
00265     {0x44 ,0x22}, //;was 11
00266     {0x45 ,0x41},
00267     {0x47 ,0x02},
00268     {0x49 ,0x64},
00269     {0x4a ,0xa1},
00270     {0x4b ,0x40},
00271     {0x4c ,0x1a},
00272     {0x4d ,0x50},
00273     {0x4e ,0x13},
00274     {0x64 ,0x00},
00275     {0x67 ,0x88},
00276     {0x68 ,0x1a},
00277 
00278     {0x14 ,0x28}, //;38/28/18 for 16/8/4x gain ceiling
00279     {0x24 ,0x3c},
00280     {0x25, 0x30},
00281     {0x26, 0x72},
00282     {0x50, 0x97},
00283     {0x51, 0x7e},
00284     {0x52, 0x00},
00285     {0x53, 0x00},
00286     {0x20, 0x00},
00287     {0x21, 0x23},
00288     /*********************************/
00289     /* To enable Static Test Pattern */
00290     /*********************************/
00291     /* {0x38, 0x07}, */
00292     /* {0x84, 0x02}, */
00293 
00294     /*********************************/
00295     /* Normal Mode / No test pattern */
00296     {0x38, 0x14},
00297     /*********************************/
00298     {0xe9, 0x00},
00299     {0x56, 0x55},
00300     {0x57, 0xff},
00301     {0x58, 0xff},
00302     {0x59, 0xff},
00303     {0x5f, 0x04},
00304     {0xec, 0x00},
00305     {0x13, 0xff},
00306 
00307     {0x80, 0x7f},
00308     {0x81, 0x3f},
00309     {0x82, 0x32},
00310     {0x83, 0x01},
00311     {0x38, 0x11},
00312     {0x84 ,0x70},
00313     {0x85, 0x00},
00314     {0x86, 0x03},
00315     {0x87, 0x01},
00316     {0x88, 0x05},
00317     {0x89, 0x30},
00318     {0x8d, 0x30},
00319     {0x8f, 0x85},
00320     {0x93, 0x30},
00321     {0x95, 0x85},
00322     {0x99, 0x30},
00323     {0x9b, 0x85},
00324 
00325     {0x9c, 0x08},
00326     {0x9d, 0x12},
00327     {0x9e, 0x23},
00328     {0x9f, 0x45},
00329     {0xa0, 0x55},
00330     {0xa1, 0x64},
00331     {0xa2, 0x72},
00332     {0xa3, 0x7f},
00333     {0xa4, 0x8b},
00334     {0xa5, 0x95},
00335     {0xa6, 0xa7},
00336     {0xa7, 0xb5},
00337     {0xa8, 0xcb},
00338     {0xa9, 0xdd},
00339     {0xaa, 0xec},
00340     {0xab, 0x1a},
00341 
00342     {0xce, 0x78},
00343     {0xcf, 0x6e},
00344     {0xd0, 0x0a},
00345     {0xd1, 0x0c},
00346     {0xd2, 0x84},
00347     {0xd3, 0x90},
00348     {0xd4, 0x1e},
00349 
00350     {0x5a, 0x24},
00351     {0x5b, 0x1f},
00352     {0x5c, 0x88},
00353     {0x5d, 0x60},
00354 
00355     {0xac, 0x6e},
00356     {0xbe, 0xff},
00357     {0xbf, 0x00},
00358 
00359     /* 320x240 */
00360 
00361     {0x31, 0x50},
00362     {0x32, 0x78},
00363     {0x82, 0x3f},
00364 
00365     {0x0f ,0x1d},
00366     {0x0f ,0x1f},
00367     {0xFF, 0xFF}
00368 };
00369 
00370 
00371 /**
00372  * \brief Addresses and values of the OV7740 registers for the
00373  * OV7740_QQVGA_YUV422 configuration:
00374  *  - 160*120 pixel by picture (QQVGA)
00375  *  - pixel data in YUV422 format (Y1, U, Y2, V)
00376  */
00377 const struct ov_reg OV7740_QQVGA_YUV422[] = {
00378     { OV7740_REG0E, OV7740_REG0E_OUTPUT_1X},
00379     { OV7740_REG12, OV7740_REG12_RESET },
00380     {0x13, 0x00},
00381     {0x55 ,0x40},
00382 
00383     /**************************************************************/
00384     /*  30fps  11 01 ;clock_divider ;sysclk=24MHz at XCLK=24MHz   */
00385     /*  20fps  11 02 ;clock_divider ;sysclk=16MHz at XCLK=24MHz   */
00386     /*  15fps  11 03 ;clock_divider ;sysclk=12MHz at XCLK=24MHz   */
00387     /*  10fps  11 05 ;sysclk=8MHz at XCLK=24MHz                   */
00388     /*  7p5fps 11 07 ;sysclk=6MHz at XCLK=24MHz                   */
00389     /**************************************************************/
00390     /*  7p5fps 11 0x0A ;sysclk=6MHz at XCLK=16.5MHz  (MCK=132/8)  */
00391     /**************************************************************/
00392     
00393     {OV7740_CLK, FRAME_RATE_30},
00394     
00395     {0x12, 0x00},
00396     {0xd5, 0x10},
00397     {OV7740_REG0C,  OV7740_REG0C_MAX_EXPOSURE(2)},
00398     {0x0d, 0x34},
00399     {0x16, 0x01},
00400     {0x17, 0x25},
00401     {0x18, 0xa0},
00402     {0x19, 0x03},
00403     {0x1a, 0xf0},
00404     {0x1b, 0x89},
00405     {0x22, 0x03},
00406     {0x29, 0x18},
00407     {0x2b, 0xf8},
00408     {0x2c, 0x01},
00409     {0x31, 0xa0},
00410     {0x32, 0xf0},
00411     {0x33, 0xc4},
00412     {0x3a, 0xb4},
00413     {0x36, 0x3f},
00414 
00415     {0x04, 0x60},
00416     {0x27, 0x80},
00417     {0x3d, 0x0f},
00418     {0x3e, 0x80},
00419     {0x3f, 0x40},
00420     {0x40, 0x7f},
00421     {0x41, 0x6a},
00422     {0x42, 0x29},
00423     {0x44, 0xe5},
00424     {0x45, 0x41},
00425     {0x47, 0x02},
00426     {0x49, 0x64},
00427     {0x4a, 0xa1},
00428     {0x4b, 0x70},
00429     {0x4c, 0x1a},
00430     {0x4d, 0x50},
00431     {0x4e, 0x13},
00432     {0x64, 0x00},
00433     {0x67, 0x88},
00434     {0x68, 0x1a},
00435 
00436     {0x14, 0x38},
00437     {0x24, 0x3c},
00438     {0x25, 0x30},
00439     {0x26, 0x72},
00440     {0x50, 0x97},
00441     {0x51, 0x7e},
00442     {0x52, 0x00},
00443     {0x53, 0x00},
00444     {0x20, 0x00},
00445     {0x21, 0x23},
00446     {0x38, 0x14},
00447     {0xe9, 0x00},
00448     {0x56, 0x55},
00449     {0x57, 0xff},
00450     {0x58, 0xff},
00451     {0x59, 0xff},
00452     {0x5f, 0x04},
00453     {0xec, 0x00},
00454     {0x13, 0xff},
00455 
00456     {0x80, 0x7f},
00457     {0x81, 0x3f},
00458     {0x82, 0x32},
00459     {0x83, 0x01},
00460     {0x38, 0x11},
00461     {0x84, 0x70},
00462     {0x85, 0x00},
00463     {0x86, 0x03},
00464     {0x87, 0x01},
00465     {0x88, 0x05},
00466     {0x89, 0x30},
00467     {0x8d, 0x30},
00468     {0x8f, 0x85},
00469     {0x93, 0x30},
00470     {0x95, 0x85},
00471     {0x99, 0x30},
00472     {0x9b, 0x85},
00473 
00474     {0x9c, 0x08},
00475     {0x9d, 0x12},
00476     {0x9e, 0x23},
00477     {0x9f, 0x45},
00478     {0xa0, 0x55},
00479     {0xa1, 0x64},
00480     {0xa2, 0x72},
00481     {0xa3, 0x7f},
00482     {0xa4, 0x8b},
00483     {0xa5, 0x95},
00484     {0xa6, 0xa7},
00485     {0xa7, 0xb5},
00486     {0xa8, 0xcb},
00487     {0xa9, 0xdd},
00488     {0xaa, 0xec},
00489     {0xab, 0x1a},
00490 
00491     {0xce, 0x78},
00492     {0xcf, 0x6e},
00493     {0xd0, 0x0a},
00494     {0xd1, 0x0c},
00495     {0xd2, 0x84},
00496     {0xd3, 0x90},
00497     {0xd4, 0x1e},
00498 
00499     {0x5a, 0x24},
00500     {0x5b, 0x1f},
00501     {0x5c, 0x88},
00502     {0x5d, 0x60},
00503 
00504     {0xac, 0x6e},
00505     {0xbe, 0xff},
00506     {0xbf, 0x00},
00507 
00508     /* 160x120 */
00509     { 0x31, 0x28 }, /* HOUTSIZE MSB */
00510     { 0x32, 0x3c }, /* VOUTSIZE MSB */
00511     { 0x34, 0x00 }, /* H/V OUTSIZE LSBs */
00512     { 0x82, 0x3f },
00513     /* {0x82, 0x01|0x04|0x08|0x10 }, */
00514 
00515     /* YUV */
00516     {0x12, 0x00},
00517     {0x36, 0x3f},
00518     {0x53, 0x00},
00519 
00520     {0x33, 0x00},
00521     /*    {0x33, 0xc4}, */
00522     {0x1b, 0x89},
00523     {0x22, 0x03},
00524 
00525     /* VSYNC, inverse */
00526     { OV7740_REG28, OV7740_REG28_VSYNC_NEGATIVE },
00527 
00528     { OV7740_YUV422CTRL, OV7740_YUV422CTRL_V_FIRST_YUYV },
00529 
00530     {0xFF, 0xFF}
00531 };
00532 
00533 
00534 /**
00535  * \brief Addresses and values of the OV7740 registers for the
00536  * OV7740_QVGA_RGB888 configuration:
00537  *  - 320*240 pixel by picture (QVGA)
00538  *  - pixel data in RGB format (8-8-8)
00539  */
00540 const struct ov_reg OV7740_QVGA_RGB888[] = {
00541     {0x0e, 0x00},
00542 
00543     {0x12, 0x80},
00544     {0x13, 0x00},
00545 
00546     {0x55 ,0x40},
00547 
00548     /**************************************************************/
00549     /*  30fps  11 01 ;clock_divider ;sysclk=24MHz at XCLK=24MHz   */
00550     /*  20fps  11 02 ;clock_divider ;sysclk=16MHz at XCLK=24MHz   */
00551     /*  15fps  11 03 ;clock_divider ;sysclk=12MHz at XCLK=24MHz   */
00552     /*  10fps  11 05 ;sysclk=8MHz at XCLK=24MHz                   */
00553     /*  7p5fps 11 07 ;sysclk=6MHz at XCLK=24MHz                   */
00554     /**************************************************************/
00555     /*  7p5fps 11 0x0A ;sysclk=6MHz at XCLK=16.5MHz  (MCK=132/8)  */
00556     /**************************************************************/
00557     
00558     {OV7740_CLK, FRAME_RATE_30}, 
00559     
00560     {0x12, 0x00},
00561     {0xd5, 0x10},
00562     {OV7740_REG0C, OV7740_REG0C_MAX_EXPOSURE(2)},
00563     {0x0d, 0x34},
00564     {0x17, 0x25},
00565     {0x18, 0xa0},
00566     {0x19, 0x03},
00567     {0x1a, 0xf0},
00568     {0x1b, 0x89},
00569     {0x22, 0x03},
00570     {0x29, 0x18},
00571     {0x2b, 0xf8},
00572     {0x2c, 0x01},
00573     {0x31, 0xa0},
00574     {0x32, 0xf0},
00575     {0x33, 0xc4},
00576     {0x3a, 0xb4},
00577     {0x36, 0x3f},
00578 
00579     {0x04, 0x60},
00580     {0x27, 0x80},
00581     {0x3d, 0x0f},
00582     {0x3e, 0x80},
00583     {0x3f, 0x40},
00584     {0x40, 0x7f},
00585     {0x41, 0x6a},
00586     {0x42, 0x29},
00587     {0x44, 0xe5},
00588     {0x45, 0x41},
00589     {0x47, 0x02},
00590     {0x49, 0x64},
00591     {0x4a, 0xa1},
00592     {0x4b, 0x70},
00593     {0x4c, 0x1a},
00594     {0x4d, 0x50},
00595     {0x4e, 0x13},
00596     {0x64, 0x00},
00597     {0x67, 0x88},
00598     {0x68, 0x1a},
00599 
00600     {0x14, 0x38},
00601     {0x24, 0x3c},
00602     {0x25, 0x30},
00603     {0x26, 0x72},
00604     {0x50, 0x97},
00605     {0x51, 0x7e},
00606     {0x52, 0x00},
00607     {0x53, 0x00},
00608     {0x20, 0x00},
00609     {0x21, 0x23},
00610     {0x38, 0x14},
00611     {0xe9, 0x00},
00612     {0x56, 0x55},
00613     {0x57, 0xff},
00614     {0x58, 0xff},
00615     {0x59, 0xff},
00616     {0x5f, 0x04},
00617     {0xec, 0x00},
00618     {0x13, 0xff},
00619 
00620     {0x80, 0x7f},
00621     {0x81, 0x3f},
00622     {0x82, 0x32},
00623     {0x83, 0x01},
00624     {0x38, 0x11},
00625     {0x84, 0x70},
00626     {0x85, 0x00},
00627     {0x86, 0x03},
00628     {0x87, 0x01},
00629     {0x88, 0x05},
00630     {0x89, 0x30},
00631     {0x8d, 0x30},
00632     {0x8f, 0x85},
00633     {0x93, 0x30},
00634     {0x95, 0x85},
00635     {0x99, 0x30},
00636     {0x9b, 0x85},
00637 
00638     {0x9c, 0x08},
00639     {0x9d, 0x12},
00640     {0x9e, 0x23},
00641     {0x9f, 0x45},
00642     {0xa0, 0x55},
00643     {0xa1, 0x64},
00644     {0xa2, 0x72},
00645     {0xa3, 0x7f},
00646     {0xa4, 0x8b},
00647     {0xa5, 0x95},
00648     {0xa6, 0xa7},
00649     {0xa7, 0xb5},
00650     {0xa8, 0xcb},
00651     {0xa9, 0xdd},
00652     {0xaa, 0xec},
00653     {0xab, 0x1a},
00654 
00655     {0xce, 0x78},
00656     {0xcf, 0x6e},
00657     {0xd0, 0x0a},
00658     {0xd1, 0x0c},
00659     {0xd2, 0x84},
00660     {0xd3, 0x90},
00661     {0xd4, 0x1e},
00662 
00663     {0x5a, 0x24},
00664     {0x5b, 0x1f},
00665     {0x5c, 0x88},
00666     {0x5d, 0x60},
00667 
00668     {0xac, 0x6e},
00669     {0xbe, 0xff},
00670     {0xbf, 0x00},
00671 
00672     /* 320x240 */
00673     {0x31, 0x50},
00674     {0x32, 0x78},
00675     {0x82, 0x3f},
00676 
00677     /* VGA,RGBRAW_8 */
00678     {0x12, 0x01},
00679     {0x36, 0x2f},
00680     {0x83, 0x04},
00681     {0x53, 0x00},
00682 
00683     {0x33, 0xf4},
00684     {0x1b, 0x8a},
00685     {0x22, 0x03},
00686 
00687     /*  */
00688     {0x84, 0x00},
00689     {0x84, 0x00},
00690 
00691     {0x28, 0x02},
00692 
00693     /*  */
00694     {0xFF, 0xFF},
00695 };
00696 
00697 
00698 /**
00699  * \brief Addresses and values of the OV7740 registers for the
00700  * OV7740_QVGA_RGB888 configuration:
00701  *  - 160*120 pixel by picture (QQVGA)
00702  *  - pixel data in RGB format (8-8-8)
00703  */
00704 const struct ov_reg OV7740_QQVGA_RGB888[] = {
00705     {0x0e, 0x00},
00706 
00707     {0x12, 0x80},
00708     {0x13, 0x00},
00709 
00710     {0x55 ,0x40},
00711 
00712     /**************************************************************/
00713     /*  30fps  11 01 ;clock_divider ;sysclk=24MHz at XCLK=24MHz   */
00714     /*  20fps  11 02 ;clock_divider ;sysclk=16MHz at XCLK=24MHz   */
00715     /*  15fps  11 03 ;clock_divider ;sysclk=12MHz at XCLK=24MHz   */
00716     /*  10fps  11 05 ;sysclk=8MHz at XCLK=24MHz                   */
00717     /*  7p5fps 11 07 ;sysclk=6MHz at XCLK=24MHz                   */
00718     /**************************************************************/
00719     /*  7p5fps 11 0x0A ;sysclk=6MHz at XCLK=16.5MHz  (MCK=132/8)  */
00720     /**************************************************************/
00721     
00722     {OV7740_CLK, FRAME_RATE_30},
00723     
00724     {0x12, 0x00},
00725     {0xd5, 0x10},
00726     {OV7740_REG0C, (OV7740_REG0C_FLIP_ENABLE | OV7740_REG0C_MAX_EXPOSURE(2))},
00727     {0x0d, 0x34},
00728     {0x17, 0x25},
00729     {0x18, 0xa0},
00730     {0x19, 0x03},
00731     {0x1a, 0xf0},
00732     {0x1b, 0x89},
00733     {0x22, 0x03},
00734     {0x29, 0x18},
00735     {0x2b, 0xf8},
00736     {0x2c, 0x01},
00737     {0x31, 0xa0},
00738     {0x32, 0xf0},
00739     {0x33, 0xc4},
00740     {0x3a, 0xb4},
00741     {0x36, 0x3f},
00742 
00743     {0x04, 0x60},
00744     {0x27, 0x80},
00745     {0x3d, 0x0f},
00746     {0x3e, 0x80},
00747     {0x3f, 0x40},
00748     {0x40, 0x7f},
00749     {0x41, 0x6a},
00750     {0x42, 0x29},
00751     {0x44, 0xe5},
00752     {0x45, 0x41},
00753     {0x47, 0x02},
00754     {0x49, 0x64},
00755     {0x4a, 0xa1},
00756     {0x4b, 0x70},
00757     {0x4c, 0x1a},
00758     {0x4d, 0x50},
00759     {0x4e, 0x13},
00760     {0x64, 0x00},
00761     {0x67, 0x88},
00762     {0x68, 0x1a},
00763 
00764     {0x14, 0x38},
00765     {0x24, 0x3c},
00766     {0x25, 0x30},
00767     {0x26, 0x72},
00768     {0x50, 0x97},
00769     {0x51, 0x7e},
00770     {0x52, 0x00},
00771     {0x53, 0x00},
00772     {0x20, 0x00},
00773     {0x21, 0x23},
00774     {0x38, 0x14},
00775     {0xe9, 0x00},
00776     {0x56, 0x55},
00777     {0x57, 0xff},
00778     {0x58, 0xff},
00779     {0x59, 0xff},
00780     {0x5f, 0x04},
00781     {0xec, 0x00},
00782     {0x13, 0xff},
00783 
00784     {0x80, 0x7f},
00785     {0x81, 0x3f},
00786     {0x82, 0x32},
00787     {0x83, 0x01},
00788     {0x38, 0x11},
00789     {0x84, 0x70},
00790     {0x85, 0x00},
00791     {0x86, 0x03},
00792     {0x87, 0x01},
00793     {0x88, 0x05},
00794     {0x89, 0x30},
00795     {0x8d, 0x30},
00796     {0x8f, 0x85},
00797     {0x93, 0x30},
00798     {0x95, 0x85},
00799     {0x99, 0x30},
00800     {0x9b, 0x85},
00801 
00802     {0x9c, 0x08},
00803     {0x9d, 0x12},
00804     {0x9e, 0x23},
00805     {0x9f, 0x45},
00806     {0xa0, 0x55},
00807     {0xa1, 0x64},
00808     {0xa2, 0x72},
00809     {0xa3, 0x7f},
00810     {0xa4, 0x8b},
00811     {0xa5, 0x95},
00812     {0xa6, 0xa7},
00813     {0xa7, 0xb5},
00814     {0xa8, 0xcb},
00815     {0xa9, 0xdd},
00816     {0xaa, 0xec},
00817     {0xab, 0x1a},
00818 
00819     {0xce, 0x78},
00820     {0xcf, 0x6e},
00821     {0xd0, 0x0a},
00822     {0xd1, 0x0c},
00823     {0xd2, 0x84},
00824     {0xd3, 0x90},
00825     {0xd4, 0x1e},
00826 
00827     {0x5a, 0x24},
00828     {0x5b, 0x1f},
00829     {0x5c, 0x88},
00830     {0x5d, 0x60},
00831 
00832     {0xac, 0x6e},
00833     {0xbe, 0xff},
00834     {0xbf, 0x00},
00835 
00836     /* 160x120 */
00837     {0x31, 0x28},
00838     {0x32, 0x3c},
00839     {0x82, 0x3f},
00840 
00841     /* VGA, RGBRAW_8 */
00842     {0x12, 0x01},
00843     {0x36, 0x2f},
00844     {0x83, 0x04},
00845     {0x53, 0x00},
00846 
00847     {0x33, 0xf4},
00848     {0x1b, 0x8a},
00849     {0x22, 0x03},
00850 
00851     {0x84, 0x00},
00852     {0x84, 0x00},
00853 
00854     {0x28, 0x02},
00855 
00856     {0xFF, 0xFF},
00857 };
00858 
00859 /**
00860  * \brief Addresses and values of the OV7740 registers for the
00861  * OV7740_QQVGA_YUV422 configuration:
00862  *  - 352*288 pixel by picture (CIF)
00863  *  - pixel data in YUV422 format (Y1, U, Y2, V)
00864  */
00865 const struct ov_reg OV7740_CIF_YUV422[] = {
00866     { OV7740_REG0E, OV7740_REG0E_OUTPUT_1X},
00867     { OV7740_REG12, OV7740_REG12_RESET },
00868     {0x13, 0x00},
00869     {0x55 ,0x40},
00870 
00871     /**************************************************************/
00872     /*  30fps  11 01 ;clock_divider ;sysclk=24MHz at XCLK=24MHz   */
00873     /*  20fps  11 02 ;clock_divider ;sysclk=16MHz at XCLK=24MHz   */
00874     /*  15fps  11 03 ;clock_divider ;sysclk=12MHz at XCLK=24MHz   */
00875     /*  10fps  11 05 ;sysclk=8MHz at XCLK=24MHz                   */
00876     /*  7p5fps 11 07 ;sysclk=6MHz at XCLK=24MHz                   */
00877     /**************************************************************/
00878     /*  7p5fps 11 0x0A ;sysclk=6MHz at XCLK=16.5MHz  (MCK=132/8)  */
00879     /**************************************************************/
00880     
00881     {OV7740_CLK, FRAME_RATE_30},
00882     {0x12, 0x00},
00883     {0xd5, 0x10},
00884     {OV7740_REG0C,
00885         (OV7740_REG0C_MIRROR_ENABLE | OV7740_REG0C_MAX_EXPOSURE(2)
00886         | OV7740_REG0C_YUV_SWAP_ENABLE)},
00887     {0x0d, 0x34},
00888     {0x16, 0x01},
00889     {0x17, 0x25},
00890     {0x18, 0xa0},
00891     {0x19, 0x03},
00892     {0x1a, 0xf0},
00893     {0x1b, 0x89},
00894     {0x22, 0x03},
00895     {0x29, 0x18},
00896     {0x2b, 0xf8},
00897     {0x2c, 0x01},
00898     {0x31, 0xa0},
00899     {0x32, 0xf0},
00900     {0x33, 0xc4},
00901     {0x3a, 0xb4},
00902     {0x36, 0x3f},
00903 
00904     {0x04, 0x60},
00905     {0x27, 0x80},
00906     {0x3d, 0x0f},
00907     {0x3e, 0x80},
00908     {0x3f, 0x40},
00909     {0x40, 0x7f},
00910     {0x41, 0x6a},
00911     {0x42, 0x29},
00912     {0x44, 0xe5},
00913     {0x45, 0x41},
00914     {0x47, 0x02},
00915     {0x49, 0x64},
00916     {0x4a, 0xa1},
00917     {0x4b, 0x70},
00918     {0x4c, 0x1a},
00919     {0x4d, 0x50},
00920     {0x4e, 0x13},
00921     {0x64, 0x00},
00922     {0x67, 0x88},
00923     {0x68, 0x1a},
00924 
00925     {0x14, 0x38},
00926     {0x24, 0x3c},
00927     {0x25, 0x30},
00928     {0x26, 0x72},
00929     {0x50, 0x97},
00930     {0x51, 0x7e},
00931     {0x52, 0x00},
00932     {0x53, 0x00},
00933     {0x20, 0x00},
00934     {0x21, 0x23},
00935     {0x38, 0x14},
00936     {0xe9, 0x00},
00937     {0x56, 0x55},
00938     {0x57, 0xff},
00939     {0x58, 0xff},
00940     {0x59, 0xff},
00941     {0x5f, 0x04},
00942     {0xec, 0x00},
00943     {0x13, 0xff},
00944 
00945     {0x80, 0x7f},
00946     {0x81, 0x3f},
00947     {0x82, 0x32},
00948     {0x83, 0x01},
00949     {0x38, 0x11},
00950     {0x84, 0x70},
00951     {0x85, 0x00},
00952     {0x86, 0x03},
00953     {0x87, 0x01},
00954     {0x88, 0x05},
00955     {0x89, 0x30},
00956     {0x8d, 0x30},
00957     {0x8f, 0x85},
00958     {0x93, 0x30},
00959     {0x95, 0x85},
00960     {0x99, 0x30},
00961     {0x9b, 0x85},
00962 
00963     {0x9c, 0x08},
00964     {0x9d, 0x12},
00965     {0x9e, 0x23},
00966     {0x9f, 0x45},
00967     {0xa0, 0x55},
00968     {0xa1, 0x64},
00969     {0xa2, 0x72},
00970     {0xa3, 0x7f},
00971     {0xa4, 0x8b},
00972     {0xa5, 0x95},
00973     {0xa6, 0xa7},
00974     {0xa7, 0xb5},
00975     {0xa8, 0xcb},
00976     {0xa9, 0xdd},
00977     {0xaa, 0xec},
00978     {0xab, 0x1a},
00979 
00980     {0xce, 0x78},
00981     {0xcf, 0x6e},
00982     {0xd0, 0x0a},
00983     {0xd1, 0x0c},
00984     {0xd2, 0x84},
00985     {0xd3, 0x90},
00986     {0xd4, 0x1e},
00987 
00988     {0x5a, 0x24},
00989     {0x5b, 0x1f},
00990     {0x5c, 0x88},
00991     {0x5d, 0x60},
00992 
00993     {0xac, 0x6e},
00994     {0xbe, 0xff},
00995     {0xbf, 0x00},
00996 
00997     /* 352x288 */
00998     { 0x31, 0x58 }, /* HOUTSIZE MSB */
00999     { 0x32, 0x90 }, /* VOUTSIZE MSB */
01000     { 0x34, 0x00 }, /* H/V OUTSIZE LSBs */
01001     { 0x82, 0x3f },
01002     /* {0x82, 0x01|0x04|0x08|0x10 }, */
01003 
01004     /* YUV */
01005     {0x12, 0x00},
01006     {0x36, 0x3f},
01007     {0x53, 0x00},
01008 
01009     {0x33, 0x00},
01010     /*    {0x33, 0xc4}, */
01011     {0x1b, 0x89},
01012     {0x22, 0x03},
01013 
01014     /* VSYNC, inverse */
01015     { OV7740_REG28, OV7740_REG28_VSYNC_NEGATIVE },
01016 
01017     { OV7740_YUV422CTRL, OV7740_YUV422CTRL_V_FIRST_YUYV },
01018 
01019     {0xFF, 0xFF}
01020 };
01021 
01022 /**
01023  * \brief Addresses and values of the OV7740 registers for the
01024  * OV7740_TEST_PATTERN configuration:
01025  *  - 320*240 pixel by picture (QVGA)
01026  *  - pixel data in YUV422 format (Y1, U, Y2, V)
01027  *  - 20 frames per second
01028  *  - test pattern enable
01029  */
01030 const struct ov_reg OV7740_TEST_PATTERN[] = {
01031     {0x0e, 0x00},
01032 
01033     {0x12, 0x80},
01034     /* flag for soft reset delay */
01035     {0xFE, 0x05},
01036     {0x13, 0x00},
01037     {0x55 ,0x40},
01038 
01039     /**************************************************************/
01040     /*  30fps  11 01 ;clock_divider ;sysclk=24MHz at XCLK=24MHz   */
01041     /*  20fps  11 02 ;clock_divider ;sysclk=16MHz at XCLK=24MHz   */
01042     /*  15fps  11 03 ;clock_divider ;sysclk=12MHz at XCLK=24MHz   */
01043     /*  10fps  11 05 ;sysclk=8MHz at XCLK=24MHz                   */
01044     /*  7p5fps 11 07 ;sysclk=6MHz at XCLK=24MHz                   */
01045     /**************************************************************/
01046     /*  7p5fps 11 0x0A ;sysclk=6MHz at XCLK=16.5MHz  (MCK=132/8)  */
01047     /**************************************************************/
01048     
01049     {OV7740_CLK, FRAME_RATE_30},
01050 
01051     {0x12, 0x00},
01052     {0xd5, 0x10},
01053     {OV7740_REG0C,
01054         (OV7740_REG0C_MIRROR_ENABLE | OV7740_REG0C_FLIP_ENABLE
01055         | OV7740_REG0C_MAX_EXPOSURE(2) | OV7740_REG0C_YUV_SWAP_ENABLE)},
01056     {0x0d, 0x34},
01057     {0x16, 0x01},
01058     {0x17, 0x25},
01059     {0x18, 0xa0},
01060     {0x19, 0x03},
01061     {0x1a, 0xf0},
01062     {0x1b, 0x89},
01063     {0x22, 0x03},
01064     {0x29, 0x18},
01065     {0x2b, 0xf8},
01066     {0x2c, 0x01},
01067     {0x31, 0xa0},
01068     {0x32, 0xf0},
01069     {0x33, 0xc4},
01070     {0x3a, 0xb4},
01071     {0x36, 0x3f},
01072 
01073     {0x04, 0x60},
01074     {0x27, 0x80},
01075     {0x3d, 0x0f},
01076     {0x3e, 0x80},
01077     {0x3f, 0x40},
01078     {0x40, 0x7f},
01079     {0x41, 0x6a},
01080     {0x42, 0x29},
01081     {0x44, 0xe5},
01082     {0x45, 0x41},
01083     {0x47, 0x02},
01084     {0x49, 0x64},
01085     {0x4a, 0xa1},
01086     {0x4b, 0x70},
01087     {0x4c, 0x1a},
01088     {0x4d, 0x50},
01089     {0x4e, 0x13},
01090     {0x64, 0x00},
01091     {0x67, 0x88},
01092     {0x68, 0x1a},
01093 
01094     {0x14, 0x38},
01095     {0x24, 0x3c},
01096     {0x25, 0x30},
01097     {0x26, 0x72},
01098     {0x50, 0x97},
01099     {0x51, 0x7e},
01100     {0x52, 0x00},
01101     {0x53, 0x00},
01102     {0x20, 0x00},
01103     {0x21, 0x23},
01104     /*********************************/
01105     /* To enable Static Test Pattern */
01106     /*********************************/
01107     {0x38, 0x07},
01108     {0x84, 0x02},
01109     /*********************************/
01110     /* Normal Mode */
01111     {0x38, 0x14},
01112     /*********************************/
01113     {0xe9, 0x00},
01114     {0x56, 0x55},
01115     {0x57, 0xff},
01116     {0x58, 0xff},
01117     {0x59, 0xff},
01118     {0x5f, 0x04},
01119     {0xec, 0x00},
01120     {0x13, 0xff},
01121 
01122     {0x80, 0x7f},
01123     {0x81, 0x3f},
01124     {0x82, 0x32},
01125     {0x83, 0x01},
01126     {0x38, 0x11},
01127     {0x85, 0x00},
01128     {0x86, 0x03},
01129     {0x87, 0x01},
01130     {0x88, 0x05},
01131     {0x89, 0x30},
01132     {0x8d, 0x30},
01133     {0x8f, 0x85},
01134     {0x93, 0x30},
01135     {0x95, 0x85},
01136     {0x99, 0x30},
01137     {0x9b, 0x85},
01138 
01139     {0x9c, 0x08},
01140     {0x9d, 0x12},
01141     {0x9e, 0x23},
01142     {0x9f, 0x45},
01143     {0xa0, 0x55},
01144     {0xa1, 0x64},
01145     {0xa2, 0x72},
01146     {0xa3, 0x7f},
01147     {0xa4, 0x8b},
01148     {0xa5, 0x95},
01149     {0xa6, 0xa7},
01150     {0xa7, 0xb5},
01151     {0xa8, 0xcb},
01152     {0xa9, 0xdd},
01153     {0xaa, 0xec},
01154     {0xab, 0x1a},
01155 
01156     {0xce, 0x78},
01157     {0xcf, 0x6e},
01158     {0xd0, 0x0a},
01159     {0xd1, 0x0c},
01160     {0xd2, 0x84},
01161     {0xd3, 0x90},
01162     {0xd4, 0x1e},
01163 
01164     {0x5a, 0x24},
01165     {0x5b, 0x1f},
01166     {0x5c, 0x88},
01167     {0x5d, 0x60},
01168 
01169     {0xac, 0x6e},
01170     {0xbe, 0xff},
01171     {0xbf, 0x00},
01172 
01173     /* 320x240 */
01174 
01175     {0x31, 0x50},
01176     {0x32, 0x78},
01177     {0x82, 0x3f},
01178 
01179     /* YUV */
01180     {0x12, 0x00},
01181     {0x36, 0x3f},
01182     {0x53, 0x00},
01183 
01184     {0x33, 0xc4},
01185     {0x1b, 0x89},
01186     {0x22, 0x03},
01187 
01188     /* VSYNC, inverse */
01189     {0x28, 0x2},
01190 
01191     {0xFF, 0xFF}
01192 };
01193 
01194 /* @} */
01195 
01196 #ifdef __cplusplus
01197 }
01198 #endif
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