Go to the documentation of this file.00001
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00042 #include "chip.h"
00043
00044 #include <stdint.h>
00045 #include <assert.h>
00046
00047
00048
00049
00050
00051
00052
00053
00054
00055
00056
00057
00058
00059 uint32_t XDMAC_GetType(Xdmac *pXdmac)
00060 {
00061 assert(pXdmac);
00062 return pXdmac->XDMAC_GTYPE;
00063 }
00064
00065
00066
00067
00068
00069
00070 uint32_t XDMAC_GetConfig(Xdmac *pXdmac)
00071 {
00072 assert(pXdmac);
00073 return pXdmac->XDMAC_GCFG;
00074 }
00075
00076
00077
00078
00079
00080
00081 uint32_t XDMAC_GetArbiter(Xdmac *pXdmac)
00082 {
00083 assert(pXdmac);
00084 return pXdmac->XDMAC_GWAC;
00085 }
00086
00087
00088
00089
00090
00091
00092
00093 void XDMAC_EnableGIt (Xdmac *pXdmac, uint8_t dwInteruptMask)
00094 {
00095 assert(pXdmac);
00096 pXdmac->XDMAC_GIE = (XDMAC_GIE_IE0 << dwInteruptMask);
00097 }
00098
00099
00100
00101
00102
00103
00104
00105 void XDMAC_DisableGIt (Xdmac *pXdmac, uint8_t dwInteruptMask)
00106 {
00107 assert(pXdmac);
00108 pXdmac->XDMAC_GID = (XDMAC_GID_ID0 << dwInteruptMask);
00109 }
00110
00111
00112
00113
00114
00115
00116 uint32_t XDMAC_GetGItMask(Xdmac *pXdmac)
00117 {
00118 assert(pXdmac);
00119 return (pXdmac->XDMAC_GIM);
00120 }
00121
00122
00123
00124
00125
00126
00127 uint32_t XDMAC_GetGIsr(Xdmac *pXdmac)
00128 {
00129 assert(pXdmac);
00130 return (pXdmac->XDMAC_GIS);
00131 }
00132
00133
00134
00135
00136
00137
00138 uint32_t XDMAC_GetMaskedGIsr(Xdmac *pXdmac)
00139 {
00140 uint32_t _dwStatus;
00141 assert(pXdmac);
00142 _dwStatus = pXdmac->XDMAC_GIS;
00143 _dwStatus &= pXdmac->XDMAC_GIM;
00144 return _dwStatus;
00145 }
00146
00147
00148
00149
00150
00151
00152
00153 void XDMAC_EnableChannel(Xdmac *pXdmac, uint8_t channel)
00154 {
00155 assert(pXdmac);
00156 assert(channel < XDMAC_CHANNEL_NUM);
00157 pXdmac->XDMAC_GE = (XDMAC_GE_EN0 << channel);
00158 }
00159
00160
00161
00162
00163
00164
00165
00166 void XDMAC_EnableChannels(Xdmac *pXdmac, uint32_t bmChannels)
00167 {
00168 assert(pXdmac);
00169 pXdmac->XDMAC_GE = bmChannels;
00170 }
00171
00172
00173
00174
00175
00176
00177
00178 void XDMAC_DisableChannel(Xdmac *pXdmac, uint8_t channel)
00179 {
00180 assert(pXdmac);
00181 assert(channel < XDMAC_CHANNEL_NUM);
00182 pXdmac->XDMAC_GD = (XDMAC_GD_DI0 << channel);
00183 }
00184
00185
00186
00187
00188
00189
00190
00191 void XDMAC_DisableChannels(Xdmac *pXdmac, uint32_t bmChannels)
00192 {
00193 assert(pXdmac);
00194 pXdmac->XDMAC_GD = bmChannels;
00195 }
00196
00197
00198
00199
00200
00201
00202
00203
00204
00205 uint32_t XDMAC_GetGlobalChStatus(Xdmac *pXdmac)
00206 {
00207 assert(pXdmac);
00208 return pXdmac->XDMAC_GS;
00209 }
00210
00211
00212
00213
00214
00215
00216
00217 void XDMAC_SuspendReadChannel(Xdmac *pXdmac, uint8_t channel)
00218 {
00219 assert(pXdmac);
00220 assert(channel < XDMAC_CHANNEL_NUM);
00221 pXdmac->XDMAC_GRS |= XDMAC_GRS_RS0 << channel;
00222 }
00223
00224
00225
00226
00227
00228
00229
00230 void XDMAC_SuspendWriteChannel(Xdmac *pXdmac, uint8_t channel)
00231 {
00232 assert(pXdmac);
00233 assert(channel < XDMAC_CHANNEL_NUM);
00234 pXdmac->XDMAC_GWS |= XDMAC_GWS_WS0 << channel;
00235 }
00236
00237
00238
00239
00240
00241
00242
00243 void XDMAC_SuspendReadWriteChannel(Xdmac *pXdmac, uint8_t channel)
00244 {
00245 assert(pXdmac);
00246 assert(channel < XDMAC_CHANNEL_NUM);
00247 pXdmac->XDMAC_GRWS = (XDMAC_GRWS_RWS0 << channel);
00248 }
00249
00250
00251
00252
00253
00254
00255
00256 void XDMAC_ResumeReadWriteChannel(Xdmac *pXdmac, uint8_t channel)
00257 {
00258 assert(pXdmac);
00259 assert(channel < XDMAC_CHANNEL_NUM);
00260 pXdmac->XDMAC_GRWR = (XDMAC_GRWR_RWR0 << channel);
00261 }
00262
00263
00264
00265
00266
00267
00268
00269 void XDMAC_SoftwareTransferReq(Xdmac *pXdmac, uint8_t channel)
00270 {
00271
00272 assert(pXdmac);
00273 assert(channel < XDMAC_CHANNEL_NUM);
00274 pXdmac->XDMAC_GSWR = (XDMAC_GSWR_SWREQ0 << channel);
00275 }
00276
00277
00278
00279
00280
00281
00282 uint32_t XDMAC_GetSoftwareTransferStatus(Xdmac *pXdmac)
00283 {
00284
00285 assert(pXdmac);
00286 return pXdmac->XDMAC_GSWS;
00287 }
00288
00289
00290
00291
00292
00293
00294
00295
00296 void XDMAC_SoftwareFlushReq(Xdmac *pXdmac, uint8_t channel)
00297 {
00298 assert(pXdmac);
00299 assert(channel < XDMAC_CHANNEL_NUM);
00300 pXdmac->XDMAC_GSWF = (XDMAC_GSWF_SWF0 << channel);
00301
00302 while (!(XDMAC_GetChannelIsr(pXdmac, channel) & XDMAC_CIS_FIS));
00303 }
00304
00305
00306
00307
00308
00309
00310
00311
00312 void XDMAC_EnableChannelIt (Xdmac *pXdmac, uint8_t channel,
00313 uint8_t dwInteruptMask)
00314 {
00315 assert(pXdmac);
00316 assert(channel < XDMAC_CHANNEL_NUM);
00317 pXdmac->XDMAC_CHID[channel].XDMAC_CIE = dwInteruptMask;
00318 }
00319
00320
00321
00322
00323
00324
00325
00326
00327 void XDMAC_DisableChannelIt (Xdmac *pXdmac, uint8_t channel,
00328 uint8_t dwInteruptMask)
00329 {
00330 assert(pXdmac);
00331 assert(channel < XDMAC_CHANNEL_NUM);
00332 pXdmac->XDMAC_CHID[channel].XDMAC_CID = dwInteruptMask;
00333 }
00334
00335
00336
00337
00338
00339
00340
00341 uint32_t XDMAC_GetChannelItMask (Xdmac *pXdmac, uint8_t channel)
00342 {
00343 assert(pXdmac);
00344 assert(channel < XDMAC_CHANNEL_NUM);
00345 return pXdmac->XDMAC_CHID[channel].XDMAC_CIM;
00346 }
00347
00348
00349
00350
00351
00352
00353
00354 uint32_t XDMAC_GetChannelIsr (Xdmac *pXdmac, uint8_t channel)
00355 {
00356 assert(pXdmac);
00357 assert(channel < XDMAC_CHANNEL_NUM);
00358 return pXdmac->XDMAC_CHID[channel].XDMAC_CIS;
00359 }
00360
00361
00362
00363
00364
00365
00366
00367 uint32_t XDMAC_GetMaskChannelIsr (Xdmac *pXdmac, uint8_t channel)
00368 {
00369 uint32_t status;
00370 assert(pXdmac);
00371 assert(channel < XDMAC_CHANNEL_NUM);
00372 status = pXdmac->XDMAC_CHID[channel].XDMAC_CIS;
00373 status &= pXdmac->XDMAC_CHID[channel].XDMAC_CIM;
00374
00375 return status;
00376 }
00377
00378
00379
00380
00381
00382
00383
00384
00385 void XDMAC_SetSourceAddr(Xdmac *pXdmac, uint8_t channel, uint32_t addr)
00386 {
00387 assert(pXdmac);
00388 assert(channel < XDMAC_CHANNEL_NUM);
00389 pXdmac->XDMAC_CHID[channel].XDMAC_CSA = addr;
00390 }
00391
00392
00393
00394
00395
00396
00397
00398
00399 void XDMAC_SetDestinationAddr(Xdmac *pXdmac, uint8_t channel, uint32_t addr)
00400 {
00401 assert(pXdmac);
00402 assert(channel < XDMAC_CHANNEL_NUM);
00403 pXdmac->XDMAC_CHID[channel].XDMAC_CDA = addr;
00404 }
00405
00406
00407
00408
00409
00410
00411
00412
00413
00414
00415 void XDMAC_SetDescriptorAddr(Xdmac *pXdmac, uint8_t channel,
00416 uint32_t addr, uint8_t ndaif)
00417 {
00418 assert(pXdmac);
00419 assert(ndaif < 2);
00420 assert(channel < XDMAC_CHANNEL_NUM);
00421 pXdmac->XDMAC_CHID[channel].XDMAC_CNDA = (addr & 0xFFFFFFFC) | ndaif;
00422 }
00423
00424
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00426
00427
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00429
00430
00431
00432 void XDMAC_SetDescriptorControl(Xdmac *pXdmac, uint8_t channel, uint8_t config)
00433 {
00434 assert(pXdmac);
00435 assert(channel < XDMAC_CHANNEL_NUM);
00436 pXdmac->XDMAC_CHID[channel].XDMAC_CNDC = config;
00437 }
00438
00439
00440
00441
00442
00443
00444
00445
00446 void XDMAC_SetMicroblockControl(Xdmac *pXdmac, uint8_t channel, uint32_t ublen)
00447 {
00448 assert(pXdmac);
00449 assert(channel < XDMAC_CHANNEL_NUM);
00450 pXdmac->XDMAC_CHID[channel].XDMAC_CUBC = XDMAC_CUBC_UBLEN(ublen);
00451 }
00452
00453
00454
00455
00456
00457
00458
00459
00460 void XDMAC_SetBlockControl(Xdmac *pXdmac, uint8_t channel, uint16_t blen)
00461 {
00462 assert(pXdmac);
00463 assert(channel < XDMAC_CHANNEL_NUM);
00464 pXdmac->XDMAC_CHID[channel].XDMAC_CBC = XDMAC_CBC_BLEN(blen);
00465 }
00466
00467
00468
00469
00470
00471
00472
00473
00474 void XDMAC_SetChannelConfig(Xdmac *pXdmac, uint8_t channel, uint32_t config)
00475 {
00476 assert(pXdmac);
00477 assert(channel < XDMAC_CHANNEL_NUM);
00478 pXdmac->XDMAC_CHID[channel].XDMAC_CC = config;
00479 }
00480
00481
00482
00483
00484
00485
00486
00487 uint32_t XDMAC_GetChannelConfig(Xdmac *pXdmac, uint8_t channel)
00488 {
00489 assert(pXdmac);
00490 assert(channel < XDMAC_CHANNEL_NUM);
00491 return pXdmac->XDMAC_CHID[channel].XDMAC_CC;
00492 }
00493
00494
00495
00496
00497
00498
00499
00500
00501 void XDMAC_SetDataStride_MemPattern(Xdmac *pXdmac, uint8_t channel,
00502 uint32_t dds_msp)
00503 {
00504
00505 assert(pXdmac);
00506 assert(channel < XDMAC_CHANNEL_NUM);
00507 pXdmac->XDMAC_CHID[channel].XDMAC_CDS_MSP = dds_msp;
00508 }
00509
00510
00511
00512
00513
00514
00515
00516
00517 void XDMAC_SetSourceMicroBlockStride(Xdmac *pXdmac, uint8_t channel,
00518 uint32_t subs)
00519 {
00520 assert(pXdmac);
00521 assert(channel < XDMAC_CHANNEL_NUM);
00522 pXdmac->XDMAC_CHID[channel].XDMAC_CSUS = XDMAC_CSUS_SUBS(subs);
00523 }
00524
00525
00526
00527
00528
00529
00530
00531
00532 void XDMAC_SetDestinationMicroBlockStride(Xdmac *pXdmac, uint8_t channel,
00533 uint32_t dubs)
00534 {
00535 assert(pXdmac);
00536 assert(channel < XDMAC_CHANNEL_NUM);
00537 pXdmac->XDMAC_CHID[channel].XDMAC_CDUS = XDMAC_CDUS_DUBS(dubs);
00538 }
00539
00540
00541
00542
00543
00544
00545
00546 uint32_t XDMAC_GetChDestinationAddr(Xdmac *pXdmac, uint8_t channel)
00547 {
00548 assert(pXdmac);
00549 assert(channel < XDMAC_CHANNEL_NUM);
00550 return pXdmac->XDMAC_CHID[channel].XDMAC_CDA;
00551 }
00552
00553
00554